Updating method and updating device for chip design file and electronic equipment

Abstract

The invention relates to the technical field of chip design, and discloses an updating method and an updating device for a chip design file, and electronic equipment. The updating method comprises the following steps: mapping a mask memory structure of a reference project into an internal structure of a Golden project; inputting the data to be modified into the Golden project; wherein the to-be-modified data is data used for modifying mask memory data in a chip design file; calling the Golden project to process the to-be-modified data according to the internal structure of the Golden project to obtain a data stream file; and replacing corresponding contents in the to-be-modified chip design file with the data stream file, and outputting the updated chip design file. In the iterative development process of the chip, for the condition that RTL code modification is not involved, the process of logic synthesis, layout and wiring and the like does not need to be executed to obtain the chip design file. Therefore, the efficiency of chip iteration development can be improved.

Description

Technical Field

[0001] The present application relates to the field of chip design technology, for example, to a method and device for updating chip design files, and an electronic device. Background Art

[0002] In the related art, during the process of iterative chip development, as long as the chip design data is modified, it is necessary to go through processes such as logic synthesis and layout and wiring to regenerate the chip design file. This solution causes each iteration to take a long time, resulting in low efficiency in chip iterative development. Therefore, how to improve the efficiency of chip iterative development has become a technical problem that needs to be solved urgently.

[0003] It should be noted that the information disclosed in the above background technology section is only used to enhance the understanding of the background of the present application, and therefore may include information that does not constitute the prior art known to ordinary technicians in the field. Summary of the invention

[0004] In order to provide a basic understanding of some aspects of the disclosed embodiments, a brief summary is given below. The summary is not an extensive review, nor is it intended to identify key / critical components or delineate the scope of protection of these embodiments, but rather serves as a prelude to the detailed description that follows.

[0005] The embodiments of the present disclosure provide a method and device for updating chip design files, and an electronic device, which can improve the efficiency of chip iterative development.

[0006] In some embodiments, a method for updating a chip design file includes: mapping the mask memory structure of a reference project to the internal structure of a Golden project; inputting data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file; calling the Golden project to process the modified data according to its internal structure to obtain a data stream file; using the data stream file to replace the corresponding content in the chip design file to be modified, and outputting an updated chip design file.

[0007] Optionally, the internal structure of the Golden project includes multiple Memory unit structures; calling the Golden project to process the data to be modified according to its internal structure to obtain a data stream file, including: splitting the data to be modified into multiple data blocks that conform to the number and size of the Memory unit structure; extracting multiple data blocks in the order of the multiple Memory unit structures and combining them to obtain a data stream file.

[0008] Optionally, a data stream file is used to replace corresponding content in the chip design file to be modified, including: determining a target replacement position corresponding to each data block in the chip design file to be modified based on a Memory unit structure corresponding to each data block in the data stream file; and using each data block in the data stream file to replace the data block at the corresponding target replacement position in the chip design file.

[0009] Optionally, mapping the mask memory structure of the reference project to the internal structure of the Golden project includes: determining modeling data of the mask memory structure of the reference project; and constructing the mask memory structure of the Golden project according to the modeling data.

[0010] Optionally, before calling the Golden project to process the data to be modified according to its mask memory structure, the updating method further includes: verifying the integrity of the data to be modified; after the verification is passed, converting the format of the data to be modified according to the requirements of the Golden project.

[0011] Optionally, the updating method for chip design files also includes: in the process of using the data stream file to replace the corresponding content in the chip design file to be modified, detecting the conflict between the data stream file and the data in the chip design file to be modified; if there is a conflict, stopping the replacement step and restoring the chip design file to be modified.

[0012] Optionally, the method for updating the chip design file further includes: performing simulation testing on the updated chip design file.

[0013] In some embodiments, an updating device for chip design files includes: a reference project component, configured to map the mask memory structure of the reference project to the internal structure of the Golden project; a Golden project component, configured to input the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file; the Golden project component is also configured to call the Golden project to process the data to be modified according to its internal structure to obtain a data stream file; a control device, configured to use the data stream file to replace the corresponding content in the chip design file to be modified, and output an updated chip design file.

[0014] In some embodiments, a device for updating a chip design file includes a processor and a memory storing program instructions, and the processor is configured to execute the above-mentioned method for updating a chip design file when running the program instructions.

[0015] In some embodiments, an electronic device includes: a device body; and an updating device for chip design files as described above, which is arranged in the device body.

[0016] The chip design file updating method, updating device, and electronic device provided by the embodiments of the present disclosure can achieve the following technical effects:

[0017] Through research, the embodiments of the present disclosure have found that when the RTL code is not modified, in the chip design file that is regenerated through logic synthesis and layout and routing, only individual data segments in the mask memory data are modified. Therefore, in the embodiments of the present disclosure, by mapping the mask memory structure of the reference project, a Golden project with the same internal structure as the mask memory structure of the reference project is constructed. When the data to be modified is received, the Golden project will be called to process the data to be modified according to its internal structure to obtain a data stream file. The data stream file is then used to replace the corresponding content in the chip design file to be modified to output the updated chip design file. In this way, in the process of iterative chip development, for situations where the RTL code is not modified, there is no need to execute processes such as logic synthesis and layout and routing to obtain the chip design file. Therefore, the embodiments of the present disclosure can improve the efficiency of iterative chip development.

[0018] The above general description and the following description are exemplary and explanatory only and are not intended to limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] One or more embodiments are exemplarily described by corresponding drawings, which do not limit the embodiments. Elements with the same reference numerals in the drawings are shown as similar elements, and the drawings do not constitute a scale limitation, and wherein:

[0020] Figure 1 is a schematic diagram of an electronic device provided by an embodiment of the present disclosure;

[0021] Figure 2 is a schematic diagram of a method for updating a chip design file provided by an embodiment of the present disclosure;

[0022] Figure 3 is a schematic diagram of another method for updating a chip design file provided by an embodiment of the present disclosure;

[0023] Figure 4 is a schematic diagram of another method for updating a chip design file provided by an embodiment of the present disclosure;

[0024] Figure 5 is a schematic diagram of a device for updating a chip design file provided by an embodiment of the present disclosure;

[0025] Figure 6 It is a schematic diagram of another device for updating chip design files provided by an embodiment of the present disclosure. DETAILED DESCRIPTION

[0026] In order to be able to understand the features and technical contents of the embodiments of the present disclosure in more detail, the implementation of the embodiments of the present disclosure is described in detail below in conjunction with the accompanying drawings. The attached drawings are for reference only and are not used to limit the embodiments of the present disclosure. In the following technical description, for the convenience of explanation, a full understanding of the disclosed embodiments is provided through multiple details. However, one or more embodiments can still be implemented without these details. In other cases, to simplify the drawings, well-known structures and devices can be simplified for display.

[0027] The terms "first", "second", etc. in the specification and claims of the embodiments of the present disclosure and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchanged where appropriate, so as to describe the embodiments of the embodiments of the present disclosure described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions.

[0028] Unless otherwise stated, the term "plurality" of a feature means two or more.

[0029] In the embodiment of the present disclosure, the character " / " feature indicates that the preceding and following objects are in an "or" relationship. For example, the A / B feature indicates: A or B.

[0030] The term "and / or" is a description of the association relationship between objects, and the characteristic indicates that there can be three relationships. For example, A and / or B, the characteristic indicates: A or B, or, A and B.

[0031] The term "correspondence" may refer to an association relationship or a binding relationship. The correspondence between A and B means that there is an association relationship or a binding relationship between A and B.

[0032] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present disclosure may be combined with each other.

[0033] like Figure 1 As shown, the electronic device 100 provided by the embodiment of the present disclosure includes a device body 110 and an updating device 500 (600) for chip design files.

[0034] Specifically, the updating device 500 ( 600 ) for chip design files is disposed in the device body 110 .

[0035] Optionally, the chip design file updating device 600 includes a processor, which can process the mask memory data to be modified in the chip design file to be modified according to the internal structure of the Golden project to obtain a data stream file. The data stream file can be used to replace the corresponding content in the chip design file to be modified to update the chip design file.

[0036] In combination with the above electronic device, the embodiment of the present disclosure provides a method for updating a chip design file, such as Figure 2 As shown, the updating method includes:

[0037] S201, the processor maps the mask memory structure of the reference project to the internal structure of the Golden project.

[0038] Specifically, the reference project refers to the tool or process used to generate the chip design file to be modified. By mapping the mask memory structure of the reference project to the internal structure of the Golden project, Golden can be used to generate the mask memory data in the chip design file.

[0039] S202, the processor inputs the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file.

[0040] Specifically, mask memory data refers to the data stored in the mask memory structure of the chip design file. Among them, the mask memory structure refers to a memory structure with a specific configuration obtained by combining and optimizing the layout of different physical memory component units (Memory units) based on the actual available memory components (Memory components) and wiring conditions through the compilation software. This memory structure is solidified on the mask during the chip manufacturing process, so it is called a mask memory structure.

[0041] S203, the processor calls the Golden project to process the data to be modified according to its internal structure, and obtains a data stream file.

[0042] Specifically, since the internal structure of the Golden project is constructed by mapping the mask memory structure of the reference project, the internal structure of the Golden project is the same as the mask memory structure of the reference project. Therefore, after the processor processes the data to be modified according to its internal structure by calling the Golden project, it can generate a data stream file related to the mask memory data content part in the chip design file.

[0043] Optionally, the internal structure of the Golden project includes multiple Memory unit structures; calling the Golden project to process the data to be modified according to its internal structure to obtain a data stream file, including: splitting the data to be modified into multiple data blocks that conform to the number and size of the Memory unit structure; extracting multiple data blocks in the order of the multiple Memory unit structures and combining them to obtain a data stream file.

[0044] Specifically, after receiving the data to be modified, the Golden project will first split the data to be modified into multiple data blocks. The size and number of the split data blocks must conform to the actual memory unit structure in the internal structure of the Golden project. In this way, it can be ensured that each data block can be mapped to each memory unit in the subsequent processing process.

[0045] Specifically, after the data to be modified is split into multiple data blocks, the Golden project will extract these split data blocks and combine them according to the order of multiple memory unit structures in its internal structure. The combined data blocks will form a data stream file, and the structure and order of this data stream file must match the internal structure of the Golden project. This makes it easier to replace the corresponding content in the chip design file to be modified.

[0046] S204, the processor uses the data stream file to replace the corresponding content in the chip design file to be modified, and outputs the updated chip design file.

[0047] Specifically, the main difficulty in updating the chip design file is to find the corresponding position and content that needs to be replaced by the data flow file. Since the data flow file is generated by calling the Golden project whose internal structure is the same as the mask memory structure of the reference project, it is easy to determine the content that needs to be replaced in the chip design file to be modified.

[0048] Optionally, in order to ensure the accuracy of using the data stream file to replace the corresponding content in the chip design file to be modified, a positioning tool or algorithm in the prior art may be used to first locate the content in the chip design file to ensure the accuracy of the replacement.

[0049] Optionally, a data stream file is used to replace corresponding content in the chip design file to be modified, including: determining a target replacement position corresponding to each data block in the chip design file to be modified based on a Memory unit structure corresponding to each data block in the data stream file; and using each data block in the data stream file to replace the data block at the corresponding target replacement position in the chip design file.

[0050] Specifically, the chip design file records the description information of the storage content of each Memory unit structure in the mask memory structure. Therefore, the target replacement position corresponding to each data block in the chip design file to be modified can be determined according to the Memory unit structure corresponding to each data block in the data stream file.

[0051] Specifically, each data block in the data stream file is used to replace the data block at the corresponding target replacement position in the chip design file, so as to obtain an updated chip design file.

[0052] Through research, the embodiments of the present disclosure have found that when the RTL code is not modified, in the chip design file that is regenerated through logic synthesis and layout and routing, only individual data segments in the mask memory data are modified. Therefore, in the embodiments of the present disclosure, by mapping the mask memory structure of the reference project, a Golden project with the same internal structure as the mask memory structure of the reference project is constructed. When the data to be modified is received, the Golden project will be called to process the data to be modified according to its internal structure to obtain a data flow file. The data flow file is then used to replace the corresponding content in the chip design file to be modified to update the chip design file. In this way, in the process of iterative chip development, for situations where the RTL code is not modified, there is no need to execute processes such as logic synthesis and layout and routing to obtain chip design files. Therefore, the embodiments of the present disclosure can improve the efficiency of iterative chip development.

[0053] The disclosed embodiment provides another method for updating chip design files, such as Figure 3 As shown, the updating method includes:

[0054] S301, the processor determines modeling data of a mask memory structure of a reference project.

[0055] Specifically, the modeling data of the mask memory structure of the reference project refers to the memory unit structures that constitute the mask memory structure and the connection relationship between these memory units when the reference project generates the chip design file to be modified.

[0056] S302: The processor constructs a memory structure of the Golden project according to the modeling data.

[0057] Specifically, by determining the modeling data of the mask memory structure of the reference project, it is possible to clarify which memory unit structures constitute the mask memory structure when generating the chip design file to be modified. The Golden project is a tool or process for generating mask memory data in chip design files. In order to ensure that the data flow file generated based on the Golden project about the mask memory data can adapt to the original content in the chip design file to be modified. Therefore, it is necessary to build the internal structure of the Golden project based on the modeling data.

[0058] S303, the processor inputs the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file.

[0059] S304, the processor calls the Golden project to process the data to be modified according to its memory structure to obtain a data stream file.

[0060] S305, the processor uses the data stream file to replace the corresponding content in the chip design file to be modified, and outputs the updated chip design file.

[0061] In the disclosed embodiment, the internal structure of the Golden project is constructed in advance based on the modeling data of the mask memory structure of the reference project that generates the chip design file to be modified. This makes the call to the Golden project to generate the data flow file and the file about the mask memory data in the chip design file to be modified compatible. This is conducive to improving the accuracy of the subsequent update of the chip design file to be modified based on the data flow file.

[0062] The disclosed embodiment provides another method for updating chip design files, such as Figure 4 As shown, the updating method includes:

[0063] S401, the processor maps the mask memory structure of the reference project to the internal structure of the Golden project.

[0064] S402, the processor inputs the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file.

[0065] S403: The processor performs integrity verification on the data to be modified.

[0066] Specifically, if the data to be modified is damaged during the transmission process, it will cause problems in the chip design file updated later. Therefore, after receiving the data to be modified, the integrity of the data to be modified needs to be verified.

[0067] Optionally, methods for performing integrity verification on the data to be modified include, but are not limited to, checksums, hash values, and the like.

[0068] S404, after the verification is passed, the processor performs format conversion on the data to be modified according to the requirements of the Golden project.

[0069] Specifically, the Golden project may not be able to process data in certain formats. Therefore, after the integrity of the data to be modified is verified, the format of the data to be modified will be converted according to the requirements of the Golden project to ensure that the data to be modified can be processed by calling the Golden project later.

[0070] S405, the processor calls the Golden project to process the data to be modified according to its internal structure to obtain a data stream file.

[0071] S406, the processor uses the data stream file to replace the corresponding content in the chip design file to be modified, and outputs the updated chip design file.

[0072] In the disclosed embodiment, after receiving the data to be modified, the data to be modified will be subjected to integrity verification and format conversion, thus ensuring that the Golden project can process the data to be modified and that the processed data to be modified is complete, thereby improving the accuracy of the determined data stream file.

[0073] In some embodiments, the updating method for chip design files also includes: in the process of using the data stream file to replace the corresponding content in the current chip design file, detecting the conflict between the data stream file and the data in the chip design file to be modified; if there is a conflict, stopping the replacement step and restoring the chip design file to be modified.

[0074] Specifically, if there is a conflict between the data in the data stream file and the data in the chip design file to be modified, it indicates that the chip design file updated according to the data stream file cannot be verified by subsequent simulation tests. In this case, it can be determined that there is a problem with the data to be modified. Therefore, in this case, it is necessary to stop the replacement step and restore the chip design file to be modified.

[0075] Specifically, conflict detection rules can be constructed in advance based on the dependencies between data, and then based on the conflict detection rules, when using the data flow file to replace the corresponding content in the current chip design file, the conflict between the data flow file and the data in the chip design file to be modified can be detected.

[0076] In some embodiments, the method for updating a chip design file further includes: performing a simulation test on the updated chip design file.

[0077] Specifically, by performing simulation tests on the updated chip design files, it is possible to verify whether the updated chip design files meet the design requirements, functional integrity, and performance, etc. This helps to clarify whether the relevant modifications to the mask memory data have any advantages compared to the previous design.

[0078] Combination Figure 5 As shown, an embodiment of the present disclosure provides an updating device 500 for chip design files, comprising: a reference engineering component 501, a Golden engineering component 502 and a control device 503. The reference engineering component 501 is configured to map the mask memory structure of the reference engineering to the internal structure of the Golden engineering. The Golden engineering component 502 is configured to input the data to be modified into the Golden engineering; wherein the data to be modified is data used to modify the mask memory data in the chip design file. The Golden engineering component 502 is also configured to call the Golden engineering to process the data to be modified according to its internal structure to obtain a data stream file. The control device 503 is configured to use the data stream file to replace the corresponding content in the chip design file to be modified, and output an updated chip design file.

[0079] Through research, the disclosed embodiment found that when the RTL code is not modified, only individual data segments in the mask memory data are modified in the chip design file that is regenerated through logic synthesis and layout and routing. Therefore, in the disclosed embodiment, the mask memory structure of the reference project is mapped by the reference engineering component 501, and a Golden project with the same internal structure as the mask memory structure of the reference project is constructed. When receiving the data to be modified, the Golden engineering component 502 can input the data to be modified into the Golden project, and call the Golden project to process the data to be modified according to its internal structure to obtain a data stream file. After obtaining the data stream file, the control device 503 will use the data stream file to replace the corresponding content in the chip design file to be modified, and update the chip design file. In this way, in the process of chip iterative development, for situations where the RTL code is not modified, there is no need to execute processes such as logic synthesis and layout and routing to obtain chip design files. Therefore, the disclosed embodiment can improve the efficiency of chip iterative development.

[0080] Combination Figure 6As shown, an embodiment of the present disclosure provides an updating device 600 for chip design files, and the updating device 600 for chip design files includes: a processor (processor) 601 and a memory (memory) 602. Optionally, the device may also include a communication interface (Communication Interface) 603 and a bus 604. Among them, the processor 601, the communication interface 603, and the memory 602 can communicate with each other through the bus 604. The communication interface 603 can be used for information transmission. The processor 601 can call the logic instructions in the memory 602 to execute the updating method for chip design files applied to the updating device 600 for chip design files of the above embodiment.

[0081] In addition, the logic instructions in the memory 602 described above may be implemented in the form of software functional units and when sold or used as independent products, may be stored in a computer-readable storage medium.

[0082] The memory 602 is a computer-readable storage medium that can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor 601 executes the function application and data processing by running the program instructions / modules stored in the memory 602, that is, the update method for chip design files applied to the update device 600 for chip design files in the above embodiment is implemented.

[0083] The memory 602 may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory 602 may include a high-speed random access memory and may also include a non-volatile memory.

[0084] An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute the above-mentioned method for updating a chip design file.

[0085] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, such as: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, and other media that can store program codes.

[0086] The above description and the accompanying drawings fully illustrate the embodiments of the present disclosure so that those skilled in the art can practice them. Other embodiments may include structural, logical, electrical, process and other changes. The embodiments represent only possible changes. Unless explicitly required, separate components and functions are optional, and the order of operation may vary. The parts and features of some embodiments may be included in or replace the parts and features of other embodiments. Moreover, the words used in this application are only used to describe the embodiments and are not used to limit the claims. As used in the description of the embodiments and the claims, unless the context clearly indicates, the singular forms of "a", "an" and "the" are intended to include plural forms as well. Similarly, the term "and / or" as used in this application refers to any and all possible combinations of listings containing one or more associated ones. In addition, when used in the present application, the term "comprise" and its variants "comprises" and / or comprising refer to the presence of stated features, wholes, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof. In the absence of further restrictions, the elements defined by the sentence "comprising a ..." do not exclude the presence of other identical elements in the process, method or device comprising the elements. In this article, each embodiment may focus on the differences from other embodiments, and the same and similar parts between the various embodiments may refer to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method part disclosed in the embodiments, then the relevant parts can refer to the description of the method part.

[0087] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software may depend on the specific application and design constraints of the technical solution. The technicians may use different methods for each specific application to implement the described functions, but such implementations should not be considered to exceed the scope of the embodiments of the present disclosure. The technicians may clearly understand that, for the convenience and simplicity of description, the specific working processes of the systems, devices and units described above may refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0088] In the embodiments disclosed herein, the disclosed methods and products (including but not limited to devices, equipment, etc.) can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units can be only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the units may be selected according to actual needs to implement this embodiment. In addition, each functional unit in the embodiment of the present disclosure may be integrated in a processing unit, or each unit may exist physically alone, or two or more units may be integrated in one unit.

[0089] The flowchart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to the embodiment of the present disclosure. In this regard, each box in the flowchart or block diagram can represent a module, a program segment or a part of the code, and the module, the program segment or a part of the code contains one or more executable instructions for realizing the specified logical function. In some alternative implementations, the functions marked in the box can also occur in a different order from the order marked in the accompanying drawings. For example, two consecutive boxes can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. In the description corresponding to the flowchart and the block diagram in the accompanying drawings, the operations or steps corresponding to different boxes can also occur in a different order from the order disclosed in the description, and sometimes there is no specific order between different operations or steps. For example, two consecutive operations or steps can actually be executed substantially in parallel, and they can sometimes be executed in the opposite order, which can depend on the functions involved. Each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, may be implemented by a dedicated hardware-based system that performs the specified functions or actions, or may be implemented by a combination of dedicated hardware and computer instructions.

Claims

1. A method for updating a chip design file, characterized in that: include: Map the mask memory structure of the reference project to the internal structure of the Golden project; Input the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file; Call the Golden project to process the modified data according to its internal structure and obtain the data stream file; The data stream file is used to replace the corresponding content in the chip design file to be modified, and the updated chip design file is output.

2. The updating method according to claim 1, characterized in that: The internal structure of the Golden project includes multiple Memory unit structures; Call the Golden project to process the modified data according to its internal structure and obtain the data stream file, including: Split the data to be modified into multiple data blocks that match the number and size of the Memory unit structure; Multiple data blocks are extracted and combined in the order of multiple Memory unit structures to obtain a data stream file.

3. The updating method according to claim 2, characterized in that: Use the data stream file to replace the corresponding content in the chip design file to be modified, including: According to the Memory unit structure corresponding to each data block in the data stream file, determine the target replacement position corresponding to each data block in the chip design file to be modified; Each data block in the data stream file is used to replace the data block at the corresponding target replacement position in the chip design file.

4. The updating method according to any one of claims 1 to 3, characterized in that: Map the mask memory structure of the reference project to the internal structure of the Golden project, including: Determine modeling data of mask memory structure of reference project; Build the internal structure of the Golden project based on the modeling data.

5. The updating method according to any one of claims 1 to 3, characterized in that: Before calling the Golden project to process the modified data according to its internal structure, the update method also includes: Verify the integrity of the data to be modified; After verification, the format of the modified data is converted according to the requirements of the Golden project.

6. The updating method according to any one of claims 1 to 3, characterized in that: Also includes: In the process of using the data stream file to replace the corresponding content in the chip design file to be modified, detecting the conflict between the data in the data stream file and the data in the chip design file to be modified; In case of a conflict, the replacement step is stopped and the chip design file to be modified is restored.

7. The updating method according to any one of claims 1 to 3, characterized in that: Also includes: Perform simulation tests on the updated chip design files.

8. A device for updating chip design files, characterized in that: include: A reference project component configured to map the mask memory structure of the reference project to the internal structure of the Golden project; The Golden project component is configured to input the data to be modified into the Golden project; wherein the data to be modified is data used to modify the mask memory data in the chip design file; The Golden project component is also configured to call the Golden project to process the modified data according to its internal structure and obtain the data stream file; The control device is configured to use the data stream file to replace the corresponding content in the chip design file to be modified, and output the updated chip design file.

9. A device for updating chip design files, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the updating method for chip design files according to any one of claims 1 to 7 when running the program instructions.

10. An electronic device, characterized in that: include: Equipment body; The device for updating chip design files as described in claim 8 or 9 is arranged on the device body.

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