Frequency hopping signal synchronization method based on double decision thresholds

Abstract

The invention discloses a frequency hopping signal synchronization method based on double decision thresholds, which belongs to the technical field of wireless communication, and comprises the following steps: designing a single frequency hopping time slot, a high decision threshold and a low decision threshold; in each frequency hopping time slot, a correlation value of a synchronization training sequence and a local synchronization sequence is calculated, the calculated correlation value is compared with a high judgment threshold and a low judgment threshold, based on a comparison result, the stepping length of synchronization success counting in the capturing process is determined, and frequency hopping signal synchronization is achieved in combination with an M / N synchronization judgment strategy. By adopting the scheme of the invention, the problems of difficulty in synchronous acquisition, low synchronous speed and the like under the conditions of broadband interference, narrowband interference and the like can be effectively improved.

Description

Technical Field

[0001] The invention relates to the technical field of wireless communication, and in particular to a frequency hopping signal synchronization method based on double decision thresholds. Background Art

[0002] Frequency hopping (FH) communication is a spectrum expansion communication technology. Its basic principle is to transmit information in a wider frequency band by quickly switching the carrier frequency of the transmission signal. This improves the anti-interference and anti-interception capabilities of the communication system. At the same time, in multi-user applications, spectrum resources can be shared by selecting different frequency hopping sequences to improve network spectrum utilization. By combining other spread spectrum technologies, such as direct sequence spread spectrum, communication performance can be further improved. In drone communications, it is possible to consider combining FH with orthogonal frequency division multiplexing (OFDM), orthogonal time frequency space (OTFS), etc. to improve the anti-interference capability of broadband communication systems.

[0003] Frequency hopping communication systems generally use pseudo-random sequences (such as m-sequences, M-sequences, RS codes, etc.) to control the change of carrier frequency. Frequency hopping synchronization refers to the process of keeping the frequency hopping consistent between the transmitter and receiver during the communication process. In actual systems, frequency hopping synchronization can be achieved by using reference clock method, independent channel method, self-synchronization method, synchronization header method, etc. Among them, the synchronization header method achieves synchronization by inserting a synchronization header at the head of each transmission time slot, which has the advantages of fast, reliable, and simple implementation. After the receiver detects the synchronization signal in the initial listening phase, it begins to try to follow the frequency according to the predetermined time slot. When the number of synchronization captures reaches a certain threshold, it is determined that the synchronization is successful and enters the synchronization lock state. However, in the case of fading channels or interference signals, the synchronization signal detection performance of the corresponding frequency hopping time slot will be seriously affected, thereby affecting the performance of frequency hopping synchronization. Therefore, it is of great application value to design a method for frequency hopping synchronization under interference conditions.

[0004] Currently, there are few studies on frequency hopping synchronization methods under interference conditions. Existing research mainly focuses on the design of frequency hopping sequences. By constructing frequency hopping sequences with large intervals, the problem of continuous interference of frequency hopping signals can be reduced when narrowband interference signals exist. As for how to improve the synchronization performance in the presence of interference signals based on traditional synchronization decision strategies and methods, further research is needed. Summary of the invention

[0005] The present invention provides a frequency hopping signal synchronization method based on double decision thresholds to solve the technical problem that in the existing frequency modulation signal synchronization method, the synchronization signal detection performance of the corresponding frequency hopping time slot is seriously affected in the case of a fading channel or the presence of an interference signal, thereby affecting the frequency hopping synchronization performance.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] On the one hand, the present invention provides a frequency hopping signal synchronization method based on a double decision threshold, which is used to achieve frequency hopping signal synchronization in a frequency hopping communication system under interference conditions. The frequency hopping signal synchronization method includes:

[0008] Design single frequency hopping time slot, as well as high and low decision thresholds;

[0009] In each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the high decision threshold and the low decision threshold. Based on the comparison result, the step length of the synchronization success count in the capture process is determined, and combined with the M / N synchronization decision strategy, the frequency hopping signal synchronization is achieved.

[0010] Furthermore, the frame structure adopted by the frequency hopping communication system includes a hopping protection, a synchronization training sequence and a data symbol;

[0011] A single frequency hopping time slot is expressed as:

[0012] T hop =T G +T P +T data

[0013] Among them, T hop Indicates the frequency hopping time slot length; T G Indicates the time slot length of the protection jump; T P Indicates the time slot length of the synchronization training sequence; T data Indicates the time slot length of the data symbol.

[0014] Further, the high decision threshold is expressed as:

[0015] T high = -2σ 2 ln(P fa1 )

[0016] The low decision threshold is expressed as:

[0017] T low = -2σ 2 ln(P fa2 )

[0018] Among them, T highis the high decision threshold; T low is the low decision threshold; 2σ 2 =L·N0, N0 represents the noise power spectrum density, L represents the synchronization training sequence length; P fa1 and P fa2 Represent different false alarm probabilities, and P fa1 <P fa2 .

[0019] Furthermore, in each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, the calculated correlation value is compared with the high decision threshold and the low decision threshold, and based on the comparison result, the step length of the synchronization success count in the acquisition process is determined, and the frequency hopping signal synchronization is realized in combination with the M / N synchronization decision strategy, including:

[0020] In the initial listening stage, the selected listening frequency is used for listening until the initial capture is successful, the initial capture success frequency is determined, and the tracking and locking stage is entered;

[0021] In the tracking and locking phase, in each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the upper decision threshold and the lower decision threshold. Based on the comparison result, the step length of the synchronization success count in the acquisition process is determined, and the number of synchronization failures and the number of synchronization acquisitions are determined;

[0022] In the tracking lock phase, when the number of synchronization failures reaches the preset synchronization failure threshold T fail When , it is determined that the synchronization capture is lost, and the initial listening phase is re-entered;

[0023] In the tracking lock phase, when the number of synchronization captures exceeds the preset synchronization capture threshold, it enters the synchronization lock state;

[0024] In the synchronous lock state, if the continuous T fail If the correlation values ​​corresponding to the synchronization positions in a time slot are all smaller than the lower decision threshold, it is determined that the frequency hopping has lost synchronization, and the initial listening phase is re-entered at this time.

[0025] Furthermore, in the initial listening stage, the selected listening frequency is listened until the initial capture is successful, the initial capture success frequency is determined, and the tracking and locking stage is entered, including:

[0026] Step 1: The receiver selects a frequency point as the initial listening frequency point and determines the duration as mT. hop , and initialize the number of synchronous captures S cnt =0; where m is the total number of frequency hopping points, T hop is the frequency hopping time slot length;

[0027] Step 2: Starting from the current listening frequency, during the duration, in each frequency hopping time slot, the received signal sequence is slidingly correlated with the local synchronization training sequence to obtain the correlation value, and the obtained correlation value is compared with the high decision threshold. When the correlation value obtained at a certain moment is not less than the high decision threshold, it is determined that the initial capture is successful, and S is updated at this time. cnt =1, and enter the tracking and locking stage; if the correlation value obtained at any time during the duration is less than the high decision threshold, execute step 3;

[0028] Step 3: Use the next frequency hopping frequency of the current listening frequency as the new listening frequency, and return to step 2.

[0029] Furthermore, the synchronization training sequence is a Zadoff-Chu sequence.

[0030] Furthermore, the correlation value between the received signal sequence r(t) and the local synchronization training sequence x(l), 0≤l≤L-1 is expressed as:

[0031]

[0032] Where C(t) represents the correlation value between the signal sequence received at time t and the local synchronization training sequence; L represents the length of the synchronization training sequence; r(t+l) represents the received signal at time t+l; x * (l) represents the conjugate of x(l).

[0033] Furthermore, in the tracking and locking stage, in each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the upper decision threshold and the lower decision threshold. Based on the comparison result, the step length of the synchronization success count in the acquisition process is determined, and the number of synchronization failures and the number of synchronization acquisitions are determined, including:

[0034] In the tracking lock phase, the number of initialization synchronization failures F cnt =0, and according to the initial capture result, at t0+T P +T data Switch the receiving frequency to the next frequency after the first successful capture;

[0035] Starting from the receiving frequency point, in each frequency hopping time slot, the received signal sequence is slidingly correlated with the local synchronization training sequence to obtain the correlation value, and the obtained correlation value is compared with the high decision threshold and the low decision threshold. If the current correlation value is not greater than the low decision threshold, F is updated. cnt =F cnt +1, S cnt =S cnt ; Otherwise, update F cnt= 0, and according to the following formula, update S based on the relationship between the current correlation value and the high decision threshold and the low decision threshold cnt :

[0036]

[0037] Wherein, a and b are both preset step parameters, and satisfy a>b>0.

[0038] On the other hand, the present invention further provides an electronic device, comprising a processor and a memory; wherein the memory stores at least one instruction, and the instruction is loaded and executed by the processor to implement the above method.

[0039] In yet another aspect, the present invention further provides a computer-readable storage medium, wherein at least one instruction is stored in the storage medium, and the instruction is loaded and executed by a processor to implement the above method.

[0040] The beneficial effects brought about by the technical solution provided by the present invention include at least:

[0041] The present invention aims at the reliable synchronization problem of a frequency hopping communication system and provides a frequency hopping signal synchronization method based on a double decision threshold. The frequency hopping signal synchronization method sets two synchronization decision thresholds, high and low, and sets different step parameters according to the size of the correlation peak between the received signal and the local synchronization training sequence, thereby effectively improving the problems of difficult synchronization capture and slow synchronization speed under conditions of broadband interference, narrowband interference, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0043] Figure 1 Schematic diagram of single frequency hopping time slot design provided by an embodiment of the present invention;

[0044] Figure 2 It is a schematic diagram of a frequency hopping signal synchronization method based on double decision thresholds provided in an embodiment of the present invention;

[0045] Figure 3 is a schematic diagram of frequency hopping synchronization in the presence of narrowband interference provided by an embodiment of the present invention;

[0046] Figure 4 is a schematic diagram of frequency hopping synchronization performance under narrowband interference provided by an embodiment of the present invention;

[0047] Figure 5is a schematic diagram of average acquisition time under narrowband interference provided by an embodiment of the present invention;

[0048] Figure 6 is a schematic diagram of frequency hopping synchronization performance under full-band interference provided by an embodiment of the present invention;

[0049] Figure 7 is a schematic diagram of average capture time under full-band interference provided by an embodiment of the present invention;

[0050] Figure 8 It is a system block diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0051] In order to make the objectives, technical solutions and advantages of the present invention more clear, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.

[0052] First of all, it should be noted that in the embodiments of the present invention, words such as "exemplarily" and "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" in the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of the word "exemplarily" is intended to present the concept in a concrete way. In addition, in the embodiments of the present invention, the meaning expressed by "and / or" can be both, or it can be either of the two.

[0053] First embodiment

[0054] In order to solve the reliable synchronization problem of a frequency hopping communication system, this embodiment provides a frequency hopping signal synchronization method based on a double decision threshold to solve the problem of fast synchronization capture of frequency hopping signals under interference conditions.

[0055] The method can be implemented by an electronic device, and the method comprises the following steps:

[0056] S1, design single frequency hopping time slot, as well as high decision threshold and low decision threshold;

[0057] Among them, the frequency hopping communication system of this embodiment adopts Figure 1 As shown in the frame structure, each frequency hopping time slot consists of three parts: the starting protection, the synchronization training sequence and the data symbol. G 、T P and T data Respectively represent the time slot lengths of these three parts, the frequency hopping time slot length T hop =T G +T P +T data The synchronization decision threshold can be T = -2σ 2 ln(P fa ) is calculated, where Pfa represents the false alarm probability, 2σ 2 =L·N0, N0 is the noise power spectrum density, L is the length of the synchronization training sequence. Therefore, according to different false alarm probabilities, the high threshold T can be obtained. high = -2σ 2 ln(P fa1 ) and the lower threshold T low = -2σ 2 ln(P fa2 ), where P fa1 <P fa2 .

[0058] S2, in each frequency hopping time slot, calculates the correlation value between the synchronization training sequence and the local synchronization sequence, compares the calculated correlation value with the high decision threshold and the low decision threshold, determines the step length of the synchronization success count in the acquisition process based on the comparison result, and realizes frequency hopping signal synchronization in combination with the M / N synchronization decision strategy;

[0059] Specifically, the frequency hopping synchronization process is as follows: Figure 2 As shown, the specific implementation steps are as follows:

[0060] S21: In the initial listening phase, the receiver selects an initial frequency point f1, which lasts for mT hop , where m is the total number of frequency hopping points, and the synchronization count S is initialized cnt =0;

[0061] S22: Perform sliding correlation on the received signal sequence r(t) and the local synchronization training sequence x(n), 0≤n≤L-1, and obtain the correlation value If there exists a time C(t0) ≥ T high , then the initial capture is determined to be successful, and S is updated cnt =1, and enter the tracking and locking stage; otherwise, update the listening frequency to the next hopping frequency f2 of f1, and continue listening until the initial capture is successful;

[0062] S23: Initialize F in the tracking lock phase cnt =0, according to the initial capture result, at t0+T P +T data Switch the receiving frequency to the next frequency of the first successful capture frequency; slide the received signal sequence r(t) with the local synchronization training sequence. If C(t0+T hop )≤T low , then update F cnt =F cnt +1, S cnt =S cnt ; Otherwise, update F cnt =0, and according to the correlation value C(t0+Thop ) and the threshold value to update S cnt , the specific method is:

[0063]

[0064] Wherein, a and b are preset step parameters and satisfy a>b>0;

[0065] S24: During the tracking and locking phase, if F cnt ≥T fail , that is, continuous T fail If the synchronous training sequence is not found in each time slot, it is determined that the synchronization acquisition is lost and the initial listening phase is re-entered;

[0066] S25: During the tracking and locking phase, if S cnt Exceeding the synchronization threshold T syn , then enter the synchronous locking state;

[0067] S26: In the synchronous lock state, if the continuous T fail In the time slots, the correlation values ​​C(t) corresponding to the synchronization positions are all less than the lower threshold T low , it is determined that the frequency hopping has lost synchronization and re-enters the initial listening stage.

[0068] The implementation effect of the method of the present invention is described below in conjunction with practical application examples.

[0069] Example 1

[0070] Assume that a frequency hopping communication system adopts Figure 1 The frame structure shown in the figure has a frequency hopping time slot T hop =1ms, the frequency hopping range is [1GHz, 1.5GHz], the frequency interval is 10MHz, and the total number of frequency points is m=50. The synchronization training sequence uses a Zadoff-Chu sequence with a length of 128 and a root index of 127. Synchronization capture threshold T syn =20, synchronization failure threshold T fail =5, the interference form is narrowband interference, the interference bandwidth accounts for 40%, and the interference-signal ratio is 10dB. High decision threshold T high = -2σ 2 ln(0.0001), low threshold T low = -2σ 2 ln(0.001), synchronization step parameters a=2, b=1. Based on this, the frequency hopping synchronization process of this system is as follows Figure 3 As shown, the specific implementation steps are as follows:

[0071] Step 1: In the initial listening phase, the receiver selects an initial frequency point f1 = 1 GHz, and the duration is mT hop=50ms, where m=50 is the total number of frequency hopping points, and the synchronization count S is initialized cnt =0;

[0072] Step 2: Perform sliding correlation on the received signal sequence r(t) and the local synchronization training sequence x(n), 0≤n≤127 to obtain the correlation value Since the f1 frequency point is interfered, C(t0)≥T cannot be found within 50ms. high Corresponding time. Then the listening frequency is updated to the next frequency hopping frequency f2, and the listening continues;

[0073] Step 3: There is no interference at the corresponding frequency point f2, so in the process of listening to f2, we can find a moment C(t0)≥T high , so the first capture is successful, update S cnt =1, and enter the tracking and locking stage;

[0074] Step 4: Initialize F during the tracking and locking phase cnt =0, according to the initial capture result, at t0+T P +T data Switch the receiving frequency to the next frequency of the first successful capture frequency; slide the received signal sequence r(t) with the local synchronization training sequence x(n). If C(t0+T hop )≤T low , then update F cnt =F cnt +1, S cnt =S cnt ; Otherwise, update F cnt =0, and according to the correlation value C(t0+T hop ) and the threshold value to update S cnt , the specific method is:

[0075]

[0076] Step 5: During the tracking and locking phase, if F cnt ≥5, that is, if the synchronous training sequence is not found in 5 consecutive time slots, it is determined that the synchronization acquisition is lost and the initial listening phase is re-entered;

[0077] Step 6: During the tracking and locking phase, if S cnt Exceeding the synchronization threshold T syn =20, it enters the synchronous locking state;

[0078] Step 7: In the synchronous lock state, if the continuous T fail = Within 5 time slots, the correlation values ​​C(t) corresponding to the synchronization position are all less than the lower threshold T low, it is determined that the frequency hopping has lost synchronization and re-enters the initial listening stage.

[0079] Figure 4 The frequency hopping synchronization performance of the traditional M / N judgment method and the synchronization method proposed in the present invention is compared under narrowband interference conditions. It can be seen that the synchronization method designed by the present invention can achieve a detection probability close to 100% at -12dB, which is about 3dB higher than the performance of the traditional M / N synchronization judgment method. Figure 5 This is a performance comparison of the average acquisition time. It can be seen that in the case of 40% partial frequency band interference, the average acquisition time at a signal-to-noise ratio of -12dB is reduced from 47 frequency hopping time slots to 31 frequency hopping time slots, that is, the time required to achieve synchronization is shorter.

[0080] Example 2

[0081] Assume that a frequency hopping communication system adopts Figure 1 The frame structure shown in the figure has a frequency hopping time slot T hop =1ms, the frequency hopping range is [1GHz, 1.5GHz], the frequency interval is 10MHz, and the total number of frequency points is m=50. The synchronization training sequence uses a Zadoff-Chu sequence with a length of 128 and a root index of 127. Synchronization capture threshold T syn =20, synchronization failure threshold T fail =5, the interference form is a broadband interference signal and the interference-to-signal ratio is 10dB. The high decision threshold is set to T high = -2σ 2 ln(0.0001) and lower threshold T low = -2σ 2 ln(0.001), synchronous step parameters a=2, b1.

[0082] The frequency hopping synchronization process is as follows:

[0083] Step 1: In the initial listening phase, the receiver selects an initial frequency point f1 = 1 GHz, and the duration is mT hop =50ms, where m=50 is the total number of frequency hopping points, and the synchronization count S is initialized cnt =0;

[0084] Step 2: Perform sliding correlation on the received signal sequence r(t) and the local synchronization training sequence x(n), 0≤n≤127 to obtain the correlation value If there exists a time C(t0) ≥ T high , then the initial capture is determined to be successful, and S is updated cnt =1, and enter the tracking and locking stage; otherwise, update the listening frequency to the next hopping frequency f2 of f1, and continue listening until the initial capture is successful;

[0085] Step 3: Initialize F during the tracking and locking phase cnt =0, according to the initial capture result, at t0+T P +T data Switch the receiving frequency to the next frequency of the first successful capture frequency; slide the received signal sequence r(t) with the local synchronization training sequence x(n). If C(t0+T hop )≤T low , then update F cnt =F cnt +1, S cnt =S cnt ; Otherwise, update F cnt =0, and according to the correlation value C(t0+T hop ) and the threshold value to update S cnt , the specific method is:

[0086]

[0087] Step 4: During the tracking and locking phase, if F cnt ≥5, that is, if the synchronous training sequence is not found in 5 consecutive time slots, it is determined that the synchronization acquisition is lost and the initial listening phase is re-entered;

[0088] Step 5: During the tracking and locking phase, if S cnt Exceeding the synchronization threshold T syn =20, it enters the synchronous locking state;

[0089] Step 6: In the synchronous lock state, if the continuous T fail = Within 5 time slots, the correlation values ​​C(t) corresponding to the synchronization position are all less than the lower threshold T low , it is determined that the frequency hopping has lost synchronization and re-enters the initial listening stage.

[0090] Figure 6 The frequency hopping synchronization performance of the traditional M / N judgment method and the synchronization method proposed in the present invention is compared under full-band interference. It can be seen that the synchronization method designed by the present invention can achieve a detection probability close to 100% at -12dB, which is significantly improved over the traditional M / N synchronization judgment method. Figure 7 This is a performance comparison of the average capture time under full-band interference conditions. It can be seen that when the signal-to-noise ratio is -12dB, the average capture time of the method proposed in this case is 31 frequency hopping time slots, which is lower than the 47 frequency hopping time slots of the traditional M / N method, and is reduced by about 35%.

[0091] In summary, this embodiment provides a frequency hopping signal synchronization method based on dual decision thresholds for the reliable synchronization problem of the frequency hopping communication system. This method sets two high and low synchronization decision thresholds. In each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is compared with the high and low decision thresholds. Different step parameters are set according to the size of the correlation peak between the received signal and the local synchronization training sequence to determine the step length of the synchronization success count during the capture process. Combined with the M / N synchronization decision strategy, the problems of difficult synchronization capture and slow synchronization speed under conditions such as broadband interference and narrowband interference are effectively improved. Simulation verification shows that the method proposed in this embodiment has performance improvements in both synchronization detection probability and synchronization time.

[0092] Second embodiment

[0093] This embodiment provides an electronic device, such as Figure 8 As shown, the electronic device includes: a processor and a memory; wherein the processor and the memory can be connected via a communication bus; the memory stores at least one instruction, and the instruction is loaded and executed by the processor to implement the method of the first embodiment. In addition, the electronic device may also include a transceiver, the processor and the transceiver can be connected via a communication bus, and the transceiver is used to communicate with other devices.

[0094] Next, combine Figure 8 The following is a detailed introduction to the various components of the electronic device:

[0095] Among them, the processor is the control center of the electronic device, and the electronic device may include multiple processors, each of which may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor here may be a processor or a general term for multiple processing elements. For example, the processor is one or more central processing units (CPUs), or other general-purpose processors, application specific integrated circuits (ASICs), or one or more integrated circuits configured to implement an embodiment of the present invention, such as one or more microprocessors (digital signal processors, DSPs), or one or more field programmable gate arrays (field programmable gate arrays, FPGAs), or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor, etc. The processor may execute various functions of the electronic device by running or executing software programs stored in the memory and calling data stored in the memory.

[0096] In a specific implementation, as an embodiment, the processor may include one or more CPUs, such as Figure 8 The CPU0 and CPU1 shown in the figure are, of course, only exemplary.

[0097] The memory is used to store the software program for executing the solution of the present invention, and the execution is controlled by the processor. The specific implementation method can refer to the above method embodiment, which will not be repeated here.

[0098] Optionally, the memory may be a read-only memory (ROM) or other types of static storage devices that can store static information and instructions, a random access memory (RAM) or other types of dynamic storage devices that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital versatile discs, Blu-ray discs, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory may be integrated with the processor or exist independently and accessed through the interface circuit ( Figure 8 (not shown) is coupled to the processor, which is not specifically limited in this embodiment of the present invention.

[0099] The transceiver may include a receiver and a transmitter ( Figure 8 The receiver is used to implement the receiving function, and the transmitter is used to implement the sending function. The transceiver can be integrated with the processor or exist independently and communicate with the electronic device through the interface circuit ( Figure 8 (not shown) is coupled to the processor, which is not specifically limited in this embodiment of the present invention.

[0100] In addition, it should be noted that Figure 8 The structure of the electronic device shown in the figure does not constitute a limitation on the device, and the actual device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently. In addition, the technical effects achieved by the electronic device when executing the method of the first embodiment above can refer to the technical effects described in the first embodiment above, so they are not repeated here.

[0101] Third embodiment

[0102] This embodiment provides a computer-readable storage medium, which stores at least one instruction, and the instruction is loaded and executed by a processor to implement the method of the first embodiment. The computer-readable storage medium may be a ROM, a random access memory, a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, etc. The instructions stored therein may be loaded by a processor in a terminal to execute the method.

[0103] In addition, it should be noted that the present invention can be provided as a method, an apparatus or a computer program product. Therefore, the embodiment of the present invention can be in the form of a full or partial hardware embodiment, a full or partial software embodiment or an embodiment combining software and hardware. Moreover, when implemented using software, the embodiment of the present invention can be in the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program codes. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, the process or function described in the embodiment of the present invention is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable devices. The computer instructions can be stored in a computer-readable storage medium, or transmitted from one computer-readable storage medium to another computer-readable storage medium, for example, the computer instructions can be transmitted from one website site, computer, server or data center to another website site, computer, server or data center by wired (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center containing one or more available media sets. The available medium may be a magnetic medium (eg, a floppy disk, a hard disk, a magnetic tape), an optical medium (eg, a DVD), or a semiconductor medium. The semiconductor medium may be a solid state hard disk.

[0104] The embodiments of the present invention are described with reference to the flowcharts and / or block diagrams of the methods, terminal devices (systems), and computer program products according to the embodiments of the present invention. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, an embedded processor, or other programmable data processing terminal device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing terminal device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0105] These computer program instructions may also be stored in a computer readable memory capable of directing a computer or other programmable data processing terminal device to operate in a specific manner, so that the instructions stored in the computer readable memory produce a manufactured product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1These computer program instructions can also be loaded onto a computer or other programmable data processing terminal device, so that a series of operation steps are executed on the computer or other programmable terminal device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable terminal device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0106] It should also be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. The terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that the process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of more restrictions, the elements defined by the sentence "including one..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements. In addition, the term "and / or" is only an association relationship describing the associated objects, indicating that there can be three relationships, for example, A and / or B, which can represent: A exists alone, A and B exist at the same time, and B exists alone, wherein A and B can be singular or plural. In addition, the character " / " in this article generally indicates that the objects before and after are in an "or" relationship, but it may also indicate an "and / or" relationship. Please refer to the context for specific understanding. "At least one" means one or more, and "plurality" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b or c can be represented by: a, b, c, ab, ac, bc or abc, where a, b, c can be single or plural.

[0107] In addition, it can be understood that in various embodiments of the present invention, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0108] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0109] In several embodiments provided by the present invention, it should be understood that the disclosed equipment, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of functional modules / units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another device, or some features can be ignored or not executed. Another point, the coupling or direct coupling or communication connection between each other shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms. The unit described as a separate component may or may not be physically separated, and the component displayed as a unit may or may not be a physical unit, that is, it may be located in one place, or it may be distributed on multiple network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the scheme of this embodiment. In addition, each functional unit in each embodiment of the present invention can be integrated in a processing unit, or each unit can exist physically alone, or two or more units can be integrated in one unit.

[0110] If the method is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0111] Finally, it should be noted that the above is only a preferred embodiment of the present invention. It should be pointed out that although the preferred embodiment of the present invention has been described, for ordinary technicians in this technical field, once the basic creative concept of the present invention is known, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention. Therefore, the attached claims are intended to be interpreted as including the preferred embodiment and all changes and modifications that fall within the scope of the embodiments of the present invention.

Claims

1. A frequency hopping signal synchronization method based on double decision thresholds, used to achieve frequency hopping signal synchronization in a frequency hopping communication system under interference conditions, characterized in that: The frequency hopping signal synchronization method comprises: Design single frequency hopping time slot, as well as high and low decision thresholds; In each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the high decision threshold and the low decision threshold. Based on the comparison result, the step length of the synchronization success count in the capture process is determined, and combined with the M / N synchronization decision strategy, the frequency hopping signal synchronization is achieved.

2. The frequency hopping signal synchronization method based on double decision threshold as claimed in claim 1, characterized in that: The frame structure adopted by the frequency hopping communication system includes a hopping protection, a synchronization training sequence and a data symbol; A single frequency hopping time slot is expressed as: T hop =T G +T P +T data Among them, T hop Indicates the frequency hopping time slot length; T G Indicates the time slot length of the protection jump; T P Indicates the time slot length of the synchronization training sequence; T data Indicates the time slot length of the data symbol.

3. The frequency hopping signal synchronization method based on double decision threshold as claimed in claim 1, characterized in that: The high decision threshold is expressed as: T high =-2σ 2 ln(P fa1 ) The low decision threshold is expressed as: T low =-2σ 2 ln(P fa2 ) Among them, T high is the high decision threshold; T low is the low decision threshold; 2σ 2 =L·N0, N0 represents the noise power spectrum density, L represents the synchronization training sequence length; P fa1 and P fa2 Represent different false alarm probabilities, and P fa1 <P fa2 .

4. The frequency hopping signal synchronization method based on double decision threshold as claimed in claim 1, characterized in that: The method calculates the correlation value between the synchronization training sequence and the local synchronization sequence in each frequency hopping time slot, compares the calculated correlation value with the high decision threshold and the low decision threshold, determines the step length of the synchronization success count in the acquisition process based on the comparison result, and realizes frequency hopping signal synchronization in combination with the M / N synchronization decision strategy, including: In the initial listening stage, the selected listening frequency is used for listening until the initial capture is successful, the initial capture success frequency is determined, and the tracking and locking stage is entered; In the tracking and locking phase, in each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the upper decision threshold and the lower decision threshold. Based on the comparison result, the step length of the synchronization success count in the acquisition process is determined, and the number of synchronization failures and the number of synchronization acquisitions are determined; In the tracking lock phase, when the number of synchronization failures reaches the preset synchronization failure threshold T fail When , it is determined that the synchronization capture is lost, and the initial listening phase is re-entered; In the tracking lock phase, when the number of synchronization captures exceeds the preset synchronization capture threshold, it enters the synchronization lock state; In the synchronous lock state, if the continuous T fail If the correlation values ​​corresponding to the synchronization positions in a time slot are all smaller than the lower decision threshold, it is determined that the frequency hopping has lost synchronization, and the initial listening phase is re-entered at this time.

5. The frequency hopping signal synchronization method based on double decision threshold as claimed in claim 4, characterized in that: In the initial listening stage, the selected listening frequency is listened until the initial capture is successful, the initial capture success frequency is determined, and the tracking and locking stage is entered, including: Step 1: The receiver selects a frequency point as the initial listening frequency point and determines the duration as mT. hop , and initialize the number of synchronous captures S cnt =0; where m is the total number of frequency hopping points, T hop is the frequency hopping time slot length; Step 2: Starting from the current listening frequency point, during the duration, in each frequency hopping time slot, the received signal sequence is slidingly correlated with the local synchronization training sequence to obtain the correlation value, and the obtained correlation value is compared with the high decision threshold. When the correlation value obtained at a certain moment is not less than the high decision threshold, it is determined that the initial capture is successful, and S is updated at this time. cnt =1, and enter the tracking and locking stage; if the correlation value obtained at any time during the duration is less than the high decision threshold, execute step 3; Step 3: Use the next frequency hopping frequency of the current listening frequency as the new listening frequency, and return to step 2.

6. The frequency hopping signal synchronization method based on double decision threshold as claimed in claim 5, characterized in that: The synchronization training sequence is a Zadoff-Chu sequence.

7. The frequency hopping signal synchronization method based on double decision thresholds as claimed in claim 5, characterized in that: The correlation value between the received signal sequence r(t) and the local synchronization training sequence x(l), 0≤l≤L-1 is expressed as: Where C(t) represents the correlation value between the signal sequence received at time t and the local synchronization training sequence; L represents the length of the synchronization training sequence; r(t+l) represents the received signal at time t+l; x * (l) represents the conjugate of x(l).

8. The frequency hopping signal synchronization method based on double decision thresholds as claimed in claim 5, characterized in that: In the tracking and locking phase, in each frequency hopping time slot, the correlation value between the synchronization training sequence and the local synchronization sequence is calculated, and the calculated correlation value is compared with the upper decision threshold and the lower decision threshold. Based on the comparison result, the step length of the synchronization success count in the acquisition process is determined, and the number of synchronization failures and the number of synchronization acquisitions are determined, including: In the tracking lock phase, the number of initialization synchronization failures F cnt =0, and according to the initial capture result, at t0+T P +T data Switch the receiving frequency to the next frequency after the first successful capture; Starting from the receiving frequency point, in each frequency hopping time slot, the received signal sequence is slidingly correlated with the local synchronization training sequence to obtain the correlation value, and the obtained correlation value is compared with the high decision threshold and the low decision threshold. If the current correlation value is not greater than the low decision threshold, F is updated. cnt =F cnt +1, S cnt =S cnt ; Otherwise, update F cnt = 0, and according to the following formula, update S based on the relationship between the current correlation value and the high decision threshold and the low decision threshold cnt : Wherein, a and b are both preset step parameters, and satisfy a>b>0.

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