Processing method and device of intermediate representation IR and related equipment

Abstract

A processing method, device and system of an intermediate representation (IR), and related equipment, relate to the technical field of computers. A first IR of a first type generated by a first compiler is obtained, the first IR being obtained by compiling a source program, and a first code mapping set in a plurality of code mapping sets is used to translate the first IR to obtain a second IR of a second type, wherein the first code mapping set includes mapping relationships between entity names in different types of IRs, mapping relationships between code organization modes of different types of IRs, different code mapping sets are used to translate different types of IRs into the second type of IR, and finally the second IR is output, which is used to generate corresponding executable code. In this way, when a developer develops a new compilation tool based on different compilers, the developer can not need to learn different types of IRs in different compilers, and only needs to learn the second type of IR, thereby reducing the learning cost of the developer.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a method, apparatus and related equipment for processing intermediate representation IR. Background Technology

[0002] A compiler is a program used to compile source code. During the compilation process, the compiler typically first compiles the source code of a high-level programming language into an intermediate representation (IR), and optimizes the IR, such as performing constant folding, dead code elimination, and loop optimization. Then, the compiler converts the optimized IR into a machine language object program.

[0003] In practical applications, mainstream compilers include GCC (GNU Compiler Collection) and low-level virtual machine (LLVM) compilers. Developers typically build new compilation tools based on these mainstream compilers, often adding new features. However, the Instructions Representation (IRs) within different compilers often differ significantly, such as in code organization and naming conventions. This necessitates developers learning the IRs of different compilers when developing new compilation tools, resulting in a high learning curve and demanding a high level of technical expertise from developers. Summary of the Invention

[0004] This application provides a method for processing intermediate representation IR (Indirect Representation), which reduces the processing cost of intermediate representation IR and increases the total amount of data that can be stored in multiple storage spaces while ensuring the reliability of intermediate representation IR processing. Furthermore, this application also provides a corresponding intermediate representation IR processing apparatus, computing device, computer-readable storage medium, and computer program product.

[0005] Firstly, this application provides a method for processing an intermediate representation (IR). This method can be executed by a corresponding processing device. Specifically, when processing the IR, the processing device may obtain a first IR generated by a first compiler. The first IR is of a first type and is obtained by compiling a source program, which may be a program written in a high-level programming language (such as C or Java). Then, the processing device uses a first code mapping set from multiple code mapping sets to translate the first IR to obtain a second IR of a second type. The first code mapping set includes mapping relationships between entity names (such as function names in the IR) of the first type and entity names in the second type of IR, as well as mapping relationships between the code organization methods of the first type and the code organization methods of the second type of IR. Different code mapping sets from multiple code mapping sets are used to translate different types of IRs into second-type IRs. In this way, the processing device can output the translated second-type second IR, which is used to generate corresponding executable code, such as assembly language code or binary code.

[0006] Thus, the processing device, based on multiple different code mapping sets, can translate different types of IRs generated by different compilers into a second type of IR. This allows developers to create new compilation tools based on different compilers without needing to learn the different types of IRs from different compilers. Instead, they can learn only the second type of IR (i.e., only one type of IR) and develop new compilation tools based on it, thereby reducing the learning cost and lowering the technical threshold for developers. Furthermore, after developers create an extensible compilation tool based on the first compiler, if they need to integrate the same extensibility into compilation tools developed based on other compilers, since the developers are using a unified second type of IR, they can directly reuse the program code for that extensibility developed on the first compiler in compilation tools developed on other compilers. This avoids developers performing repetitive code development processes on other compilers, effectively improving the efficiency of developing new compilation tools. In addition, since different types of IRs generated by different compilers can all be translated into a unified second type of IR, IRs generated by different compilers can be mutually converted through this second type of IR as an intermediary, thereby enabling the integration of multiple compiler ecosystems.

[0007] In one possible implementation, the first IR is obtained by optimizing the IR generated from the source program by the first compiler. Furthermore, the multiple code mapping sets also include a second code mapping set. The processing device can then use the second code mapping set to translate the second IR of the second type to obtain a third IR that can be recognized by the second compiler. The type of this third IR is the third type, i.e., a type that the second compiler can recognize. The second code mapping set used for translating the IR includes the mapping relationship between entity names in the third type IR and entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR. Thus, the processing device can optimize the third IR using the second compiler to obtain a fourth IR, and generate the first executable code based on this fourth IR. In this way, the IR generated by the first compiler and the IR generated by the second compiler can be mutually converted through the second type IR as an intermediate medium. This not only enables the integration of the two compilers' ecosystems, but also ensures that the final IR (i.e., the fourth IR) has undergone optimization by multiple compilers, resulting in a high level of optimization in multiple aspects.

[0008] In one possible implementation, during the IR translation process, the processing device can also obtain a first intermediate representation tree of the first IR, which includes multiple nodes. Then, the processing device uses a first tree mapping set from multiple tree mapping sets to translate the first intermediate representation tree to obtain a second intermediate representation tree of the second IR. This second intermediate representation tree also includes multiple nodes, wherein the first tree mapping set includes the mapping relationship between nodes in the intermediate representation tree of the first type of IR and nodes in the intermediate representation tree of the second type of IR. In this way, the processing device can output the translated second intermediate representation tree so that the subsequent first compiler can use it to optimize the generation of the second IR. Thus, the processing device can not only translate the IR but also translate the intermediate representation tree using the tree mapping set to meet the supporting requirements of practical applications.

[0009] In one possible implementation, the multiple code mapping sets further include a second code mapping set. Then, the processing device can translate not only the IR generated by the first compiler into a second-type IR, but also the IR generated by the second compiler into the same second-type IR. Specifically, the processing device can obtain a fifth IR generated by the second compiler, the type of which is a third type recognizable by the second compiler. Then, the processing device uses the second code mapping set to translate the fifth IR to obtain a sixth IR, the type of which is a second type. The second code mapping set includes mappings between entity names in the third-type IR and entity names in the second-type IR, as well as mappings between the code organization methods of the third-type IR and the code organization methods of the second-type IR. Thus, the processing device can output the translated sixth IR, which is used to generate the second executable code. In this way, the processing device can translate the IR generated by the second compiler into a second-type IR based on the second code mapping set. This allows developers to develop new compilation tools based on the second compiler without needing to learn the IRs in the second compiler, thereby reducing the learning cost and lowering the technical threshold for developers.

[0010] In one possible implementation, the first compiler is a GCC compiler and the second compiler is an LLVM compiler.

[0011] In one possible implementation, when the processing device translates the fifth IR using the second code mapping set, it may first translate the fifth IR to obtain an intermediate IR of type third. Then, the processing device may use the second code mapping set to convert the IR to obtain a sixth IR. In this way, the processing device can obtain a sixth IR of type second through IR translation and IR conversion.

[0012] In one possible implementation, when the processing device acquires the first IR, it may first acquire the source program and analyze it to obtain an abstract syntax tree. This analysis includes lexical analysis, syntax analysis, and semantic analysis. Based on the obtained abstract syntax tree, the processing device can then generate the first IR. Correspondingly, after translating the first IR of the first type into a second IR of the second type, the processing device can perform preset customization operations on the second IR, such as instruction upgrade operations, to obtain a corresponding seventh IR of the second type. The processing device can then generate first executable code based on this seventh IR. Thus, the processing device can function as a newly developed compilation tool to compile the source program into executable code. Furthermore, this newly developed compilation tool has extensibility compared to the original first compiler, enabling it to perform corresponding customization operations and enriching the functionality of the compilation tool.

[0013] Secondly, this application provides an intermediate representation IR processing apparatus, the intermediate representation IR processing apparatus comprising various modules for performing the intermediate representation IR processing method in the first aspect or any possible implementation of the first aspect.

[0014] Thirdly, this application provides a computing device including a processor and a memory. The processor and the memory communicate with each other. The processor executes instructions stored in the memory to cause the computing device to perform an intermediate representation (IR) processing method as described in the first aspect or any implementation thereof. It should be noted that the memory can be integrated into the processor or can be independent of the processor. The computing device may also include a bus. The processor is connected to the memory via the bus. The memory may include readable storage and random access memory.

[0015] Fourthly, this application provides a computer-readable storage medium storing instructions that, when executed on a computing device, cause the computing device to perform the operation steps of the intermediate representation IR processing method described in the first aspect or any implementation thereof.

[0016] Fifthly, this application provides a computer program product containing instructions that, when run on a computing device, causes the computing device to perform the operational steps of the processing method for the intermediate representation IR described in the first aspect or any implementation thereof.

[0017] Based on the implementation methods provided in the above aspects, this application can be further combined to provide more implementation methods. Attached Figure Description

[0018] Figure 1 A schematic diagram of the structure of an exemplary data processing system provided in this application;

[0019] Figure 2 A flowchart illustrating a method for processing intermediate representation IR provided in this application;

[0020] Figure 3 This application provides mappings between entities and between nodes in different types of IRs.

[0021] Figure 4 A flowchart illustrating another method for processing intermediate representation IR provided in this application;

[0022] Figure 5 A schematic diagram of the structure of another intermediate IR processing device provided in this application;

[0023] Figure 6 This is a schematic diagram of the hardware structure of a computing device provided in this application. Detailed Implementation

[0024] To reduce the learning cost and technical threshold requirements for developers of intermediate representation (IR), this application provides a method for processing intermediate representation. By converting different types of IRs in different compilers into the same type of IR, developers only need to learn this common type of IR when developing new compilation tools based on different compilers. They do not need to learn multiple different types of IRs. In this way, the learning cost of intermediate representation IR for developers can also be reduced, thus lowering the technical threshold requirements for developing compilation tools.

[0025] To facilitate understanding of the technical solution of this application, the relevant technical terms involved in this application will be explained below.

[0026] A compiler, also known as a compiler, is used to compile source code written in a high-level programming language into an equivalent target program in a low-level programming language format. This low-level programming language can be, for example, assembly language or machine language. Typically, when compiling source code, the compiler first compiles it into an intermediate representation (IR), then optimizes the IR, and finally converts the optimized IR into a target program in machine language format.

[0027] In this application, source code refers to a program written in a high-level programming language, which is also the object compiled by the compiler. The high-level programming language can be, for example, C, C++, Java, Python, etc.

[0028] Intermediate representation (IR) is an intermediate code representation (data structure) that lies between high-level and low-level programming languages. It is closer to low-level programming languages ​​(such as machine language and assembly language) than high-level programming languages, but it is not the final machine language program.

[0029] An intermediate representation tree (IR tree) is a representation that is independent of specific programming languages ​​and computer architectures. It can be used to represent the code logic corresponding to the intermediate representation and typically includes multiple nodes, each containing information about the corresponding entity in the intermediate representation.

[0030] Executable code refers to code that a machine can directly execute, such as assembly language code and machine language code (binary code).

[0031] See Figure 1 The diagram shows a schematic representation of the structure of a data processing system provided in this application. Figure 1 The data processing system 10 shown includes multiple compilers. For ease of understanding and description, Figure 1 The following description uses compilers 101 and 102 as examples. For instance, compilers 101 and 102 can be, for example, a GCC compiler, an LLVM compiler, etc. Furthermore, the data processing system 10 also includes a processing unit 200, which can provide translation IR services for compilers 101 and 102 respectively.

[0032] Compiler 101 and Compiler 102 are different types or versions of compilers; correspondingly, different compilers can generate different types of IRs after compiling the source program, and the different types of IRs differ in entity naming and code organization. Processing device 200 can translate the different types of IRs generated by different compilers into the same type of IR.

[0033] In practical applications, developers can develop new compilation tools based on Compiler 101 or Compiler 102, such as extending the functionality of Compiler 101 and Compiler 102. Because the Instructions Representing (IRs) generated by different compilers differ significantly, developers need to learn multiple IRs from different compilers when developing different compilation tools. This results in high learning costs and a high technical threshold for developers. For example, if developers are unfamiliar with the code organization and naming conventions of the IRs in Compiler 102, they cannot develop new compilation tools based on Compiler 102.

[0034] Furthermore, when developers develop compilation tools with the same extensibility based on different compilers, even if the tool design logic is the same, the large differences in IR between different compilers make it impossible to reuse the program code for the extensibility part implemented based on compiler 101 on compiler 102. As a result, developers need to perform the same code development process on compiler 102 for the same tool design logic, which leads to low efficiency in developing new compilation tools.

[0035] Based on this, in the data processing system 10 provided in this application, the processing device 200 can perform corresponding processing through the IRs in compiler 101 and compiler 102, thereby reducing the learning cost for developers and improving their development efficiency. Specifically, taking the processing of the IR in compiler 101 as an example, the processing device 200 obtains the first IR generated by compiler 101 compiling the source program. Assuming the type of the first IR is a first type, the processing device 200 uses the first code mapping set from a variety of code mapping sets to translate the first IR, obtain a second IR of the second type, and output it. This second IR is used to generate corresponding executable code (such as assembly language code). The first code mapping set includes the mapping relationship between entity names in the first type IR and entity names in the second type IR, and also includes the mapping relationship between the code organization method in the first type IR and the code organization method in the second type IR.

[0036] Meanwhile, the multiple code mapping sets include multiple different code mapping sets, wherein different code mapping sets are used to translate different types of IRs into second type IRs, which enables the processing device 200 to translate the third type of third IR generated by the compiler 102 into second type IRs based on other code sets in the multiple code mapping sets.

[0037] Thus, the processing device 200, based on multiple different code mapping sets, can translate different types of IRs generated by different compilers into second-type IRs. This allows developers to develop new compilation tools based on different compilers without needing to learn the different types of IRs from different compilers; they can simply learn the second type of IR (i.e., only one type of IR) and develop new compilation tools based on it. This reduces the learning cost and lowers the technical threshold for developers. Correspondingly, the newly developed compilation tools can integrate the processing device 200, or the processing device 200 can be loaded during the compilation of the source program to achieve IR translation.

[0038] Furthermore, after developers develop an extensible compilation tool based on compiler 101, if they need to integrate the same extensible capability into a compilation tool developed based on compiler 102, since developers develop new compilation tools based on a unified second type of IR, they can directly reuse the program code for this extensible capability on compiler 101 in the compilation tool developed based on compiler 102. This avoids developers performing repetitive code development processes on compiler 102, thereby effectively improving the efficiency of developers in developing new compilation tools.

[0039] In addition, since the different types of IRs generated by compilers 101 and 102 can be translated into a unified second type of IR, the second type of IR can be used as an intermediate medium for mutual conversion between the IRs generated by compilers 101 and 102, thereby enabling the integration of the two compiler ecosystems.

[0040] For example, the processing device 200 described above can be implemented by software or hardware.

[0041] In the first example, when implemented in software, the processing device 200 can be implemented, for example, through program code in a computing device, such as through plugins, software development kits (SDKs), computing engines, etc. Exemplarily, the processing device 200 can be implemented based on a toolchain in a multi-level intermediate representation (MLIR), thereby enabling the processing device 200 to translate the IR by invoking the toolchain in the MLIR (as well as specific tools included within itself).

[0042] In the second example, when implemented in hardware, the processing device 200 can be implemented using at least one physical device including a processor, such as a server. The processor can be a central processing unit (CPU), or any combination thereof, including application-specific integrated circuits (ASICs), programmable logic devices (PLDs), complex programmable logical devices (CPLDs), field-programmable gate arrays (FPGAs), generic array logic (GALs), systems-on-chips (SoCs), software-defined infrastructure (SDI) chips, artificial intelligence (AI) chips, and data processing units (DPUs). Furthermore, the processing device 200 can include one or more processors, and the types of processors can be one or more. The specific number and types of processors can be determined according to the actual application's business requirements; this embodiment does not limit this.

[0043] It is worth noting that the above Figure 1 The data processing system 10 shown is merely an example. In other possible data processing systems, the number of compilers can be arbitrary. Alternatively, in other possible data processing systems, the processing device 200 may include multiple sub-devices, such as sub-device 1 and sub-device 2; wherein sub-device 1 is used to translate the IR generated by compiler 101 to obtain other types of IRs, and sub-device 2 is used to perform type conversion on the IR generated by compiler 102. Alternatively, in other possible data processing systems, other devices may also be included, such as devices for recording logs of the IR translation process, or devices to assist developers in developing compilation tools. This application does not limit the specific architecture of the data processing system.

[0044] Next, the processing method for intermediate representation IR provided in this application will be described with reference to the accompanying drawings.

[0045] See Figure 2 , Figure 2A flowchart illustrating an intermediate representation IR processing method provided in this application is provided. This method can be applied to... Figure 1 The data processing system 10 shown can be applied to other suitable data processing systems. For ease of explanation, this method is applied to... Figure 1 The data processing system 10 shown is illustrated with an example of the method being executed by the processing device 200.

[0046] in, Figure 2 The intermediate representation of IR processing methods shown can specifically include:

[0047] S201: Processing device 200 obtains a first IR generated by compiler 101, the first IR being of type first type, the first IR being obtained by compiling the source program.

[0048] In this embodiment, the first IR acquired by the processing device 200 is the IR that needs to be translated, specifically, the first IR is translated into a second type of second IR.

[0049] As an example of implementation, the processing device 200 can obtain the first IR from the compiler 101. Specifically, the compiler 101 can obtain a source program, which is a program written in a high-level programming language, such as a program written in C, C++, or Java. Since computers typically perform corresponding operations based on low-level programming languages ​​(such as machine language, assembly language, etc.) and cannot directly interpret programs written in high-level programming languages, the compiler 101 can be used to compile the source program to obtain executable code that the computer can directly interpret.

[0050] Compiler 101 can first analyze the source program, specifically by performing lexical analysis, syntax analysis, and semantic analysis on the source program in sequence.

[0051] Lexical analysis is used to determine all tokens in the source program, including keywords, relational operators, identifiers (such as variable names / function names), numeric constants, string constants, special symbols (such as parentheses, commas, quotation marks), etc. It can usually be done using the lexical analyzer component in compiler 101.

[0052] Syntax analysis, based on the lexical units determined by lexical analysis, checks whether the code in the source program conforms to grammatical rules, that is, whether the program code is syntactically correct. This is typically accomplished using the parser component in compiler 101. Furthermore, during syntax analysis, the parser can generate a corresponding abstract syntax tree (AST) based on the input lexical units. An abstract syntax tree is a tree-like data structure used to represent the abstract grammatical structure of source code. It includes multiple nodes, some of which are leaf nodes, and the rest are internal nodes. In the abstract syntax tree, each internal node represents an operation, and the child nodes of that internal node represent the components required for that operation.

[0053] Semantic analysis is used to check whether the source program is consistent with the semantics defined by the language using information in the syntax tree (and symbol table). It can usually be done using the semantic analyzer component in compiler 101.

[0054] After completing the analysis of the source program, compiler 101 obtains an abstract syntax tree and generates a corresponding IR based on the abstract syntax tree, hereinafter referred to as the first IR. The type of the first IR is the type of IR that compiler 101 can recognize, hereinafter referred to as the first type. Finally, compiler 101 can output the first IR to processing device 200.

[0055] In practical applications, the processing device 200 may also acquire the first IR of the first type through other means, and this embodiment does not limit this.

[0056] S202: The processing device 200 uses a first code mapping set from a plurality of code mapping sets to translate the first IR to obtain a second IR of the second type; wherein, the first code mapping set includes the mapping relationship between entity names in the first type of IR and entity names in the second type of IR, and the mapping relationship between the code organization method of the first type of IR and the code organization method of the second type of IR, and different code mapping sets in the plurality of code mapping sets are used to translate different types of IR into second type of IR.

[0057] As an implementation example, the processing device 200 can be pre-configured with multiple different code mapping sets, and each code mapping set is used to translate one type of IR into a second type of IR. In practical applications, the processing device 200 can be configured with multiple code mapping sets corresponding to multiple compilers according to the different IR types that multiple different compilers can recognize, so that the processing device 200 can use the multiple code mapping sets to translate IRs generated by different compilers into IRs of the same type.

[0058] In this embodiment, assuming that the first code mapping set among multiple code mapping sets can convert the first type of IR into the second type of IR, then the processing device 200 can translate the first IR using the first code mapping set after obtaining the first IR generated by the compiler 101.

[0059] Specifically, the first code mapping set includes two types of mapping relationships: entity mapping relationship and organization method mapping relationship.

[0060] The entity mapping relationship specifically refers to the mapping relationship between entity names in the first type of IR and entity names in the second type of IR. Here, an entity in IR refers to an independent entity, such as a function, basic block, or statement. A statement in IR can be a statement including variables and expressions, or it can be a statement used to define variable values. This embodiment does not limit the way statements in IR are expressed. In practical applications, different types of IR can define entity names based on different rules, which means that the same entity may have different names in different types of IR. For example, the same function may have different names in different IRs. Figure 3 As shown, mapping relationships between various entity names such as functions, basic blocks, and statements can be established in different types of IRs.

[0061] The mapping relationship between organization methods refers to the mapping relationship between the code organization methods in the first type of IR and the code organization methods in the second type of IR. Here, the organization method of IR refers to the execution order among the multiple entities included in the IR. The execution order between entities usually differs in different types of IR. Correspondingly, different types of IR typically employ different code organization methods; therefore, a mapping relationship (or conversion rule) can be established between different types of IR regarding code organization methods.

[0062] Then, the processing device 200 can use the mapping relationship between entities and the mapping relationship between code organization methods to convert the names of each entity in the first IR into entity names in the second type IR, and organize the code corresponding to the converted entity names according to the code organization form of the second type IR, thereby generating the second type of second IR.

[0063] In practical applications, the processing device 200 can translate the first IR on a function-by-function basis. For example, the processing device 200 can first traverse all functions in the first IR, assuming the number of functions is N (N is a positive integer). Then, for each function, the processing device 200 can traverse the basic blocks within that function. Each basic block is a sequence of statements (including multiple statements) executed sequentially within the function. Furthermore, a basic block typically has only one entry point and one exit point, where the entry point is the first statement in the basic block, and the exit point is the last statement in the basic block. Assume the number of basic blocks in the function currently being translated is M (M is a positive integer). Next, for each basic block, the processing device 200 can traverse each statement in the current basic block and translate each statement according to the first code mapping set, such as translating the entity name in the statement into an entity name (e.g., an expression) in the second type of IR, and converting the code organization method corresponding to the statement into the code organization method corresponding to the second type of IR. Thus, for each statement in the basic block, the processing device 200 can translate that statement into a statement in the second type of IR. After translating the statements in a basic block, the processing device 200 can translate the definitions in the basic block into definitions in a second-type IR based on the first code mapping set. In this way, the processing device 200 can translate a basic block in a first-type IR into a basic block in a second-type IR. For each basic block in the currently traversed function, the processing device 200 can translate it in the above manner, thereby translating a function in a first-type IR into a function in a second-type IR. Similarly, the processing device 200 can translate each function in a first-type IR into a corresponding function in a second-type IR using the above method, and organize the code corresponding to the converted entity names according to the code organization form of the second-type IR to generate a second-type IR, thus completing the translation from the first IR to the second IR.

[0064] In a further possible implementation, since the code logic corresponding to the intermediate representation can be indicated by the intermediate representation tree, the processing device 200 can also translate the nodes in the intermediate representation tree corresponding to the first IR of the first type. The first intermediate representation tree (hereinafter referred to as the first intermediate representation tree) includes multiple nodes for indicating multiple entities in the intermediate representation, and the relationship between the multiple entities is indicated by the connection between the nodes.

[0065] In a specific implementation, the processing device 200 may be configured with a first tree mapping set, which includes the mapping relationship between nodes in the intermediate representation tree of the first type of IR and nodes in the intermediate representation tree of the second type of IR. For example, assuming the first type of IR is GIMPLE (a three-address code intermediate representation) generated by the GCC compiler, and declaration operation classes can be defined in the second type of IR, then the nodes related to the "declaration" operation in the intermediate representation tree corresponding to GIMPLE can be mapped to the declaration operation classes in the intermediate representation tree corresponding to the second type of IR. Furthermore, the declaration operation class can include one or more subclasses, such as... Figure 3 As shown. Furthermore, in the second type of IR, type classes can also be defined. Then, the node related to "type" in the intermediate representation tree corresponding to GIMPLE can be mapped to the type class in the intermediate representation tree corresponding to the second type of IR. This type class can include one or more subclasses such as float, pointer, array, struct, function, and vector, for example... Figure 3 As shown.

[0066] In this way, when translating statements in each basic block, the processing device 200 can also utilize the mapping relationships between different nodes included in the first tree mapping set to translate the nodes in the intermediate representation tree corresponding to the statement into nodes in the intermediate representation tree of the second type of IR, thereby achieving node translation. Referring to a similar process, the processing device 200 can translate each node in the intermediate representation tree of the first type of IR into the corresponding node in the intermediate representation tree of the second type of IR, thereby achieving intermediate representation tree translation and obtaining a second intermediate representation tree. Finally, the processing device 200 can output the second intermediate representation tree so that the second IR can be optimized accordingly.

[0067] S203: The processing device 200 outputs a second IR of a second type, which is used to generate executable code.

[0068] After completing the translation of the first IR, the processing device 200 can output the generated second IR (and intermediate representation tree).

[0069] For example, the processing device 200 can output the second IR to the service device. Specifically, the processing device 200 can first serialize the second IR, such as converting it into a transmittable byte sequence, and then transmit the serialized data to the service device. Correspondingly, the service device can deserialize the received data, such as restoring the byte sequence to the second IR before transmission, thereby enabling the transmission of IR between the processing device 200 and the service device.

[0070] The service device can be configured with a customized strategy pre-developed by the developers. This customized strategy is used to indicate one or more customized operations, so that the service device can execute the customized operation indicated by the customized strategy on the second IR, such as performing an instruction upgrade on the second IR (optimizing the instruction execution performance in the IR), to obtain a seventh IR, wherein the type of the seventh IR is still the second type.

[0071] Then, the service device can output the seventh IR to the compiler 101, so that the compiler 101 can generate corresponding executable code based on the seventh IR (and the intermediate representation tree). The executable code can be, for example, machine language code or assembly language code. The specific implementation of the compiler 101 generating executable code based on the IR already exists in relevant application scenarios, and will not be elaborated here.

[0072] In practical applications, developers can build upon the second type of IR to develop service devices with extensibility capabilities. These extensibility capabilities can be implemented through customization strategies configured by the developers and the program code that executes those strategies. In this way, developers can integrate the service device and processing device 200 into the existing compiler 101 to develop new compilation tools (compilers).

[0073] For example, the service device can be implemented in software or hardware. When implemented in software, the service device can be, for example, a plugin. The compiler 101 can load this plugin to perform customized operations on the second IR output by the processing device 200, so that executable code can be generated subsequently based on the IR output by the plugin. When implemented in hardware, the service device can be, for example, a device including a processor. This processor can be implemented as at least one physical device, such as a server. The processor can be any type of processor, such as a CPU, ASIC, PLD, CPLD, FPGA, GAL, SoC, SDI, AI chip, DPU, or any combination thereof.

[0074] The above implementation method involves the processing device 200 translating the first type of IR into the second type of IR based on a code mapping set (and translating the intermediate representation tree based on a tree mapping set). In practical applications, the processing device 200 can refer to a similar method to support the conversion of multiple types of IR into the same type of IR.

[0075] Taking the translation of type III IR into type II IR as an example, such as Figure 2 As shown, the processing device 200 can also obtain a fifth IR of a third type generated by the compiler 102, which is a type that the compiler 102 can recognize. The specific implementation of the compiler 102 generating the fifth IR can be found in the description of the compiler 101 generating the first IR above, and will not be repeated here.

[0076] Then, the processing device 200 can translate the fifth IR based on the second code mapping set among the configured multiple code mapping sets. Specifically, it can translate each entity name in the fifth IR according to the mapping relationship between entity names in the third type of IR and entity names in the second type of IR included in the second code mapping set, and organize the translated entity names according to the code organization form of the second type of IR according to the mapping relationship between the code organization method of the third type of IR and the code organization method of the second type of IR. In this way, the processing device 200 can generate a sixth IR of the second type based on the fifth IR of the third type and output it, such as... Figure 2 As shown. The specific implementation process of the processing device 200 translating the fifth IR according to the second code mapping set can be found in the above description regarding the translation of the first IR according to the first code mapping set, and will not be repeated here. Furthermore, the processing device 200 can also translate the nodes in the intermediate representation tree of the fifth IR into corresponding nodes in the intermediate representation tree of the second IR according to the mapping relationship between the nodes in the intermediate representation tree of the third type of IR included in the second tree mapping set and the nodes in the intermediate representation tree of the second type of IR. For example, the mapping relationship between the nodes included in the second tree mapping relationship set can be as follows... Figure 3 As shown.

[0077] As an implementation example, the processing device 200 may include multiple plugins for translating IRs generated by various compilers. For instance, the processing device 200 may include plugin 1 and plugin 2, where plugin 1 converts the IR generated by compiler 101 into a second-type IR, and plugin 2 converts the IR generated by compiler 102 into a second-type IR. Thus, during the compilation of the source program, when the compiler reaches a call point for IR translation, it can load the corresponding plugin for that compiler by calling a callback function (e.g., compiler 101 loads plugin 1, compiler 102 loads plugin 2), and translate the compiler-generated IR into a second-type IR based on the loaded plugin. In this way, the processing device 200 can provide IR translation services to multiple different compilers simultaneously based on these multiple plugins.

[0078] Alternatively, when the compiler also utilizes the service device to perform customization operations on the IR, the compiler can send a message to the service device to perform customization operations on the IR when it reaches a call point for IR translation. Upon receiving this message, the service device can invoke the application programming interface (API) of the plugin corresponding to the compiler to instruct the plugin to translate the IR generated by the compiler. Then, the service device performs further customization operations on the translated IR returned by the plugin.

[0079] In practical applications, the processing device 200 can translate the IR generated by different compilers into other types of IRs using different methods. For example, for compiler 101 (such as a GCC compiler), the processing device 200 can directly translate the first type of IR generated by compiler 101 into a second type of IR based on the first code mapping set mentioned above. For compiler 102 (such as an LLVM compiler), the processing device 200 can first translate the fifth IR generated by compiler 102 to obtain an intermediate IR, which is still of the third type. At this time, the intermediate IR is a dialect form of IR. Then, the processing device 200 converts the intermediate IR according to the second code mapping set to obtain a sixth type of IR of the second type. In this way, the processing device 200 can transform the translation process between different types of IRs into a conversion process between IRs of different dialects, thereby improving the freedom and flexibility of the processing device 200 in IR translation.

[0080] Furthermore, when developers develop compilation tools with the same extensibility capabilities based on compiler 102, since the service device is developed based on a general type (i.e., the second type) IR, developers can directly integrate the service device and processing device 200 (or plugin 2 in processing device 200) into compiler 102, thus enabling the development of new compilation tools based on compiler 102. In this way, developers can develop new compilation tools by reusing the program code of the service device, avoiding the need for developers to perform repetitive code development processes based on the same program logic on compiler 102, thereby effectively improving the efficiency of developers in developing new compilation tools. That is, developers can perform a single development process for the service device, which can be enabled on multiple different compilers, achieving decoupling between the service device and the compiler ecosystem.

[0081] In this embodiment, the processing device 200, based on multiple different code mapping sets, can translate different types of IRs generated by different compilers into a second type of IR. This allows developers to develop new compilation tools based on different compilers without needing to learn the different types of IRs from different compilers. Instead, they can learn only the second type of IR (i.e., only one type of IR) and develop new compilation tools based on the second type of IR. This reduces the learning cost for developers and lowers the technical threshold requirements. Accordingly, the newly developed compilation tools can integrate the processing device 200, or the processing device 200 can be loaded during the compilation of the source program to implement the IR translation.

[0082] The above Figure 2 The intermediate representation of the IR processing method is illustrated by the example where the processing unit 200 translates the IRs generated by each compiler into the same type (i.e., the second type mentioned above) of IR. In practical applications, the processing unit 200 can also utilize the optimization capabilities of the integrated compiler 101 and compiler 102 of the second type of IR to generate executable code with better performance. The following section, in conjunction with... Figure 4 This will be explained in detail.

[0083] join Figure 4 This illustrates a flowchart of another intermediate IR processing method. For example... Figure 4 As shown, the method includes:

[0084] S401: Compiler 101 obtains the source program, which is written in a high-level programming language.

[0085] S402: Compiler 101 performs lexical analysis, syntax analysis, and semantic analysis on the source program to generate a raw IR of type 1.

[0086] For the specific implementation process of steps S401 and S402, please refer to the above. Figure 2 The relevant details of step S201 in the illustrated embodiment will not be repeated here.

[0087] In practical applications, the initial IR generated by compiler 101 based on the source program may contain issues such as code redundancy and redundant calculations (e.g., repeated calculations of expressions). This can lead to low execution efficiency, high storage space consumption, and high energy consumption in the executable code generated by compiler 101. Therefore, this embodiment can further optimize the IR by performing the following steps, resulting in higher execution efficiency and lower storage space consumption and energy consumption in the final generated executable code.

[0088] S403: Compiler 101 optimizes the original IR to obtain the first IR and provides the first IR to the processing device 200.

[0089] Among them, the type of the first IR is still the first type.

[0090] The specific implementation process of compiler 101 optimizing IR has already been applied in practice, so it will not be elaborated here.

[0091] S404: The processing device 200 translates the first IR using the first code mapping set to generate a second IR of the second type.

[0092] In a specific implementation, the processing device 200 can use the first code mapping set to translate the entity names in the first IR into entity names in the second IR, and translate the code organization method of the first IR into the code organization method of the second IR, thereby realizing the translation of the first IR.

[0093] For the specific implementation process of step S404, please refer to the above. Figure 2 The relevant details of step S202 in the illustrated embodiment are not repeated here.

[0094] S405: The processing device 200 translates the second IR using the second code mapping set, generates a third IR of the third type, and outputs the third IR to the compiler 102.

[0095] The second code mapping set includes the mapping relationship between entity names in the second type of IR and entity names in the third type of IR, as well as the mapping relationship between the code organization method of the second type of IR and the code organization method of the third type of IR.

[0096] The specific implementation process of the processing device 200 translating the second IR into the third IR can be found in the above description of the relevant parts of translating the first IR into the second IR, and will not be repeated here.

[0097] S406: Compiler 102 optimizes the third IR to obtain the fourth IR.

[0098] In practical applications, since different compilers 102 may have different optimization capabilities for IR, such as compiler 101 having a higher optimization effect on redundant code in IR, while compiler 102 has a higher optimization effect on the problem of repeated calculation in IR, the processing device 200 can realize the conversion of IR from the first IR to the third IR based on the second type of IR. Furthermore, after compiler 102 optimizes the third IR, the resulting fourth IR has undergone dual optimization by compiler 101 and compiler 102, and the optimization effect in different aspects can reach a high level.

[0099] S407: Compiler 102 generates the corresponding executable code based on the fourth IR.

[0100] For example, the generated executable code may be machine language code or assembly language code, etc.

[0101] In this way, the IR generated by compiler 101 and the IR generated by compiler 102 can be converted to each other through this second type of IR as an intermediate medium. This not only enables the connection between the two compilers, but also ensures that the final IR (i.e. the fourth IR) has been optimized by multiple compilers, so that the IR can achieve a high level of optimization in multiple aspects.

[0102] It is worth noting that other reasonable combinations of steps that can be conceived by those skilled in the art based on the above description also fall within the scope of protection of this application. Secondly, those skilled in the art should also be aware that the embodiments described in the specification are preferred embodiments, and the actions involved are not necessarily essential to this application.

[0103] The above combination Figures 1 to 4 The processing method for intermediate representation IR provided in the embodiments of this application will be introduced. Next, with reference to the accompanying drawings, the functions of the intermediate representation IR processing device provided in the embodiments of this application and the computing device for implementing the intermediate representation IR processing device will be introduced.

[0104] See Figure 5 The diagram shows a schematic representation of a processing device that uses intermediate IR elements. Figure 5 As shown, the processing device 500 includes:

[0105] The module 501 is used to obtain the first IR generated by the first compiler. The type of the first IR is the first type. The first IR is obtained by compiling the source program.

[0106] Translation module 502 is used to translate a first IR using a first code mapping set from multiple code mapping sets to obtain a second IR of type 2. The first code mapping set includes the mapping relationship between entity names in the first type IR and entity names in the second type IR, and the mapping relationship between the code organization method of the first type IR and the code organization method of the second type IR. Different code mapping sets from multiple code mapping sets are used to translate different types of IRs into second type IRs.

[0107] Output module 503 is used to output a second IR, which is used to generate the first executable code.

[0108] In one possible implementation, the first IR is obtained by optimizing the IR generated from the source program by a first compiler, and the multiple code mapping sets also include a second code mapping set;

[0109] Translation module 502 is also used to translate the second IR using the second code mapping set to obtain a third IR that can be recognized by the second compiler. The type of the third IR is the third type. The second code mapping set includes the mapping relationship between entity names in the third type IR and entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR.

[0110] The processing device 500 also includes:

[0111] Optimization module 504 is used to optimize the third IR using the second compiler to obtain the fourth IR;

[0112] Generation module 505 is used to generate the first executable code based on the fourth IR.

[0113] In one possible implementation, the acquisition module 501 is further configured to acquire a first intermediate representation tree of the first IR, the first intermediate representation tree including multiple nodes;

[0114] The translation module 502 is also used to translate the first intermediate representation tree using the first tree mapping set in the multiple tree mapping sets to obtain the second intermediate representation tree of the second IR. The second intermediate representation tree includes multiple nodes, and the first tree mapping set includes the mapping relationship between the nodes in the intermediate representation tree of the first type of IR and the nodes in the intermediate representation tree of the second type of IR.

[0115] Output module 503 is also used to output the second intermediate representation tree.

[0116] In one possible implementation, the multiple code mapping sets also include a second code mapping set;

[0117] The acquisition module 501 is also used to acquire the fifth IR generated by the second compiler, the type of which is the third type that the second compiler can recognize;

[0118] The translation module 502 is also used to translate the fifth IR using the second code mapping set to obtain the sixth IR, the sixth IR being of the second type; wherein, the second code mapping set includes the mapping relationship between entity names in the third type IR and entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR;

[0119] Output module 503 is also used to output a sixth IR, which is used to generate the second executable code.

[0120] In one possible implementation, the first compiler is the GCC compiler, and the second compiler is the underlying virtual machine LLVM compiler.

[0121] In one possible implementation, the translation module 502 is specifically used for:

[0122] The fifth IR is translated to obtain the intermediate IR, which is of type third.

[0123] Using the second code mapping set, the intermediate IR is transformed to obtain the sixth IR.

[0124] In one possible implementation, the acquisition module 501 is used for:

[0125] Obtain the source code;

[0126] The source program is analyzed to obtain an abstract syntax tree. The analysis includes lexical analysis, syntax analysis, and semantic analysis.

[0127] Generate the first IR based on the abstract syntax tree;

[0128] The processing device 500 also includes:

[0129] The customization module 506 is used to perform a preset customization operation on the second IR after obtaining the second IR to obtain the seventh IR, wherein the type of the seventh IR is the second type;

[0130] Generation module 505 is used to generate the first executable code based on the seventh IR.

[0131] In one possible implementation, the entity name in the second type of IR is the name of the independent individual in the second type of IR;

[0132] The code organization method of the second type of IR is the execution order among the multiple entities included in the second type of IR.

[0133] because Figure 5 The intermediate representation shown is the IR processing device 500 corresponding to Figure 2 as well as Figure 4 The method shown, therefore Figure 5 The specific implementation of the intermediate IR processing device 500 and its technical effects can be found in the relevant descriptions in the foregoing embodiments, and will not be repeated here.

[0134] The above Figure 2 as well as Figure 4 In the illustrated embodiment, the intermediate representation IR processing device 200 involved in the intermediate representation IR processing can be software configured on a computing device or a cluster of computing devices. Furthermore, by running this software on the computing device, the computing device can implement the functions of the intermediate representation IR processing device 200. Below, from the perspective of hardware implementation, the intermediate representation IR processing device 200 involved in the intermediate representation IR processing will be described in detail.

[0135] Figure 6 This application provides a schematic diagram of the hardware structure of a computing device 600, which, for example, can implement the above-described... Figure 2 as well as Figure 4 The processing device 200 in the illustrated embodiment, etc.

[0136] like Figure 6 As shown, the computing device 600 includes a processor 601, a memory 602, and a communication interface 603. The processor 601, memory 602, and communication interface 603 communicate via a bus 604, or via other means such as wireless transmission. The memory 602 stores instructions, and the processor 601 executes the instructions stored in the memory 602. Further, the computing device 600 may also include a memory unit 605, which is connected to the processor 601, the storage medium 602, and the communication interface 603 via the bus 604. The memory 602 stores program code, and the processor 601 can call the program code stored in the memory 602 to perform the following operations:

[0137] Obtain the first IR generated by the first compiler. The type of the first IR is the first type. The first IR is obtained by compiling the source program.

[0138] The first IR is translated using a first code mapping set from multiple code mapping sets to obtain a second IR of type 2. The first code mapping set includes mapping relationships between entity names in the first type IR and entity names in the second type IR, and mapping relationships between code organization methods of the first type IR and code organization methods of the second type IR. Different code mapping sets from the multiple code mapping sets are used to translate different types of IRs into the second type IR.

[0139] The second IR is output, and the second IR is used to generate the first executable code.

[0140] It should be understood that in the embodiments of this application, the processor 601 may be a CPU, or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete device assemblies, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0141] The memory 602 may include read-only memory and random access memory, and provides instructions and data to the processor 601. The memory 602 may also include non-volatile random access memory.

[0142] The memory 602 can be volatile memory or non-volatile memory, or it can include both. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static random access memory (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0143] The communication interface 603 is used to communicate with other devices connected to the computing device 600. The bus 604 may include a data bus, a power bus, a control bus, and a status signal bus, etc. However, for clarity, all buses are labeled as bus 604 in the figure.

[0144] It should be understood that the computing device 600 according to the embodiments of this application may correspond to the processing device 500 in the embodiments of this application, and may correspond to the execution of the embodiments of this application. Figure 2 as well as Figure 4 The method executed by the processing device 200 in the illustrated method, and the above-mentioned and other operations and / or functions implemented by the computing device 600, are respectively for the purpose of implementing... Figure 2 as well as Figure 4 The process of the corresponding methods in [the document] will not be elaborated here for the sake of brevity.

[0145] This application also provides a computer-readable storage medium. The computer-readable storage medium can be any available medium that a computing device can store, or a processing device such as a data center containing one or more available media that represents an intermediate representation of IR. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid-state drive). The computer-readable storage medium includes instructions that instruct the computing device to perform the aforementioned intermediate representation of IR processing method.

[0146] This application also provides a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computing device, all or part of the processes or functions described in this application are generated.

[0147] The computer instructions may be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions may be transmitted from one website, computer, or data center to another website, computer, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means.

[0148] The computer program product can be a software installation package. In cases where any of the aforementioned intermediate representation IR processing methods are required, the computer program product can be downloaded and executed on a computing device.

[0149] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to a computer or a processing device such as a server or data center containing one or more sets of available media that represents an intermediate IR. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0150] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A method for processing intermediate representations of IR, characterized in that, The method includes: Obtain the first IR generated by the first compiler. The type of the first IR is the first type. The first IR is obtained by compiling the source program. The first IR is translated using a first code mapping set from multiple code mapping sets to obtain a second IR of type 2. The first code mapping set includes mappings between entity names in the first type IR and entity names in the second type IR, and mappings between code organization methods in the first type IR and code organization methods in the second type IR. Different code mapping sets from the multiple code mapping sets are used to translate different types of IRs into the second type IR. The translation of the first IR using the first code mapping set to obtain the second IR includes: translating the entity names and code organization methods corresponding to statements in the first IR into the entity names and code organization methods corresponding to statements in the second IR based on the first code mapping set, to obtain the second IR, which includes the translated statements; and outputting the second IR, which is used to generate the first executable code.

2. The method according to claim 1, characterized in that, The first IR is obtained by optimizing the IR generated from the source program by the first compiler, and the multiple code mapping sets also include a second code mapping set; The method further includes: Using the second code mapping set, the second IR is translated to obtain a third IR that can be recognized by the second compiler. The type of the third IR is a third type. The second code mapping set includes the mapping relationship between the entity names in the third type IR and the entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR. The third IR is optimized using the second compiler to obtain the fourth IR; The first executable code is generated based on the fourth IR.

3. The method according to claim 1 or 2, characterized in that, The method further includes: Obtain the first intermediate representation tree of the first IR, wherein the first intermediate representation tree includes multiple nodes; The first intermediate representation tree is translated using the first tree mapping set among multiple tree mapping sets to obtain the second intermediate representation tree of the second IR. The second intermediate representation tree includes multiple nodes, and the first tree mapping set includes the mapping relationship between the nodes in the intermediate representation tree of the first type of IR and the nodes in the intermediate representation tree of the second type of IR. Output the second intermediate representation tree.

4. The method according to any one of claims 1 to 2, characterized in that, The multiple code mapping sets also include a second code mapping set, and the method further includes: Obtain the fifth IR generated by the second compiler, wherein the type of the fifth IR is the third type that the second compiler can recognize; Using the second code mapping set, the fifth IR is translated to obtain the sixth IR, the type of which is the second type; wherein, the second code mapping set includes the mapping relationship between the entity names in the third type IR and the entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR; The sixth IR is output, which is used to generate the second executable code.

5. The method according to claim 4, characterized in that, The first compiler is the GCC compiler, and the second compiler is the underlying virtual machine LLVM compiler.

6. The method according to claim 4, characterized in that, The process of translating the fifth IR using the second code mapping set to obtain the sixth IR includes: The fifth IR is translated to obtain an intermediate IR, and the type of the intermediate IR is the third type. The intermediate IR is transformed using the second code mapping set to obtain the sixth IR.

7. The method according to claim 1, characterized in that, The process of obtaining the first IR generated by the first compiler includes: Obtain the source program; The source program is analyzed to obtain an abstract syntax tree, and the analysis includes lexical analysis, syntax analysis and semantic analysis. The first IR is generated based on the abstract syntax tree; The method further includes: After obtaining the second IR, a preset customization operation is performed on the second IR to obtain the seventh IR, wherein the type of the seventh IR is the second type; The first executable code is generated based on the seventh IR.

8. The method according to any one of claims 1 to 2, characterized in that, The entity name in the second type of IR is the name of the independent individual in the second type of IR; The code organization method of the second type of IR is the execution order among the multiple entities included in the second type of IR.

9. A processing apparatus for intermediate representation of IR, characterized in that, The device includes: The acquisition module is used to acquire the first IR generated by the first compiler. The first IR is of type first and is obtained by compiling the source program. A translation module is used to translate the first IR using a first code mapping set from multiple code mapping sets to obtain a second IR of type second. The first code mapping set includes mapping relationships between entity names in the first type IR and entity names in the second type IR, and mapping relationships between code organization methods in the first type IR and code organization methods in the second type IR. Different code mapping sets from the multiple code mapping sets are used to translate different types of IRs into the second type IR. The translation of the first IR using the first code mapping set from multiple code mapping sets to obtain the second IR includes: translating the entity names and code organization methods corresponding to statements in the first IR into the entity names and code organization methods corresponding to statements in the second IR based on the first code mapping set, thereby obtaining the second IR, which includes the translated statements. The output module is used to output the second IR, which is used to generate the first executable code.

10. The apparatus according to claim 9, characterized in that, The first IR is obtained by optimizing the IR generated from the source program by the first compiler, and the multiple code mapping sets also include a second code mapping set; The translation module is further configured to use the second code mapping set to translate the second IR to obtain a third IR that can be recognized by the second compiler. The type of the third IR is a third type. The second code mapping set includes the mapping relationship between the entity names in the third type IR and the entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR. The device further includes: An optimization module is used to optimize the third IR using the second compiler to obtain a fourth IR; A generation module is used to generate the first executable code based on the fourth IR.

11. The apparatus according to claim 9 or 10, characterized in that, The acquisition module is further configured to acquire the first intermediate representation tree of the first IR, wherein the first intermediate representation tree includes multiple nodes; The translation module is further configured to translate the first intermediate representation tree using a first tree mapping set among multiple tree mapping sets to obtain a second intermediate representation tree of the second IR. The second intermediate representation tree includes multiple nodes, and the first tree mapping set includes the mapping relationship between nodes in the intermediate representation tree of the first type of IR and nodes in the intermediate representation tree of the second type of IR. The output module is also used to output the second intermediate representation tree.

12. The apparatus according to any one of claims 9 to 10, characterized in that, The multiple code mapping sets also include a second code mapping set; The acquisition module is further configured to acquire a fifth IR generated by the second compiler, wherein the type of the fifth IR is a third type that the second compiler can recognize; The translation module is further configured to use the second code mapping set to translate the fifth IR to obtain a sixth IR, wherein the type of the sixth IR is the second type; wherein the second code mapping set includes the mapping relationship between the entity names in the third type IR and the entity names in the second type IR, and the mapping relationship between the code organization method of the third type IR and the code organization method of the second type IR; The output module is also used to output the sixth IR, which is used to generate the second executable code.

13. The apparatus according to claim 12, characterized in that, The first compiler is the GCC compiler, and the second compiler is the underlying virtual machine LLVM compiler.

14. The apparatus according to claim 12, characterized in that, The translation module is specifically used for: The fifth IR is translated to obtain an intermediate IR, and the type of the intermediate IR is the third type. The intermediate IR is transformed using the second code mapping set to obtain the sixth IR.

15. The apparatus according to claim 9, characterized in that, The acquisition module is used for: Obtain the source program; The source program is analyzed to obtain an abstract syntax tree, and the analysis includes lexical analysis, syntax analysis and semantic analysis. The first IR is generated based on the abstract syntax tree; The device further includes: A customization module is used to perform a preset customization operation on the second IR after obtaining the second IR to obtain a seventh IR, wherein the type of the seventh IR is the second type; A generation module is used to generate the first executable code based on the seventh IR.

16. The apparatus according to any one of claims 9 to 10, characterized in that, The entity name in the second type of IR is the name of the independent individual in the second type of IR; The code organization method of the second type of IR is the execution order among the multiple entities included in the second type of IR.

17. A computing device, characterized in that, Including processor and memory; The processor is configured to execute instructions stored in the memory to cause the computing device to perform the steps of the method as described in any one of claims 1 to 8.

18. A computer-readable storage medium, characterized in that, Includes instructions that, when executed on a computing device, cause the computing device to perform the steps of the method as described in any one of claims 1 to 8.

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