Semiconductor device

By forming a dielectric layer with impurity concentration distribution in a semiconductor device, and controlling the diffusion of impurities by different deposition processes, the problem of limitation of electrical characteristics and reliability of existing semiconductor devices after reducing their size is solved, and the effect of improving electrical characteristics and reliability is achieved.

CN119697987APending Publication Date: 2025-03-25SAMSUNG ELECTRONICS CO LTD +1
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Patent Information

Application Number
CN202410770766.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-22
Filing Date
2024-06-14
Publication Date
2025-03-25

AI Technical Summary

Technical Problem

After the size of existing semiconductor devices is reduced, the electrical characteristics and reliability are limited, making it difficult to overcome the limitations caused by high integration.

Method used

By forming a dielectric layer with impurity concentration distribution in the semiconductor device, including a first portion and a second portion, the first portion close to the semiconductor pattern, and the second portion is located between the first portion and the conductive pattern, these portions are formed using different deposition processes to control the diffusion and distribution of impurities.

Benefits of technology

The electrical characteristics and reliability of semiconductor devices are improved, and the performance of the device is improved by effectively controlling the diffusion of impurities and preventing the negative impact of impurities on the semiconductor pattern.

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Abstract

A semiconductor device is provided. The semiconductor device includes a semiconductor pattern, a dielectric layer on the semiconductor pattern, and a conductive pattern on the dielectric layer. Each of the semiconductor pattern and the dielectric layer includes an impurity. The dielectric layer includes a concentration profile of an impurity, the concentration profile of the impurity including a first variation section including a first concentration of the impurity decreasing through the dielectric layer toward the semiconductor pattern, and a second variation section including a second concentration of the impurity decreasing through the dielectric layer toward the semiconductor pattern. The second varying section includes a second concentration of impurity that decreases through the dielectric layer toward the semiconductor pattern.
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