SiC-based GaN high-efficiency in-chip transverse micro-flow enhanced heat dissipation device and preparation method and application thereof

Abstract

The invention discloses a SiC-based GaN high-efficiency in-chip transverse micro-flow enhanced heat dissipation device and a preparation method and application thereof. The device sequentially comprises a SiN passivation layer, an AlGaN barrier layer, a GaN buffer layer, an AlN nucleating layer and a SiC substrate from bottom to top. The SiN passivation layer is provided with an active region in an embedded manner, the active region is a source, drain and gate functional layer, and the gate is of a T-shaped structure; a micro-flow structure is arranged on the SiC substrate, the micro-flow structure comprises a fixing groove and a plurality of micro-flow channels arranged in the fixing groove in parallel, the fixing groove is of a concave structure penetrating through the SiC substrate and the AlN nucleating layer until the GaN buffer layer, and the direction of the micro-flow channels is perpendicular to the length direction of a grid electrode of the active region. The heat dissipation device has the advantages of efficient heat dissipation capability and high working efficiency, and can be used for high-efficiency microwave devices with certain power, such as military or civil electronic communication systems.

Description

Technical Field

[0001] The present invention belongs to the technical field of GaN devices, and in particular relates to a SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device and a preparation method and application thereof. Background Art

[0002] Gallium nitride (GaN) materials have the characteristics of wide bandgap, high electron mobility, high breakdown voltage, high power density, strong radiation resistance, etc., and are widely used in high-power microwave devices. In the field of communications, with the upgrading of systems, the performance requirements of core components are getting higher and higher, which is specifically reflected in the improvement of performance and further reduction of volume. As a core component, the improvement of GaN power devices in efficiency and active heat dissipation capabilities is conducive to reducing the dissipated power and temperature rise of power devices, thereby effectively improving the reliability of chips. However, the passive heat dissipation form that relies on high thermal conductivity materials can no longer meet the heat dissipation requirements of power devices with high heat flux density. The active heat dissipation method of on-chip microflow enables the cooling medium to directly enter the chip and realize close heat exchange with the heat source, thereby achieving the effect of efficient heat dissipation. However, the microflow design in the prior art has the problem of large flow resistance, which affects the working efficiency of the device. Summary of the invention

[0003] In view of the deficiencies in the prior art, the present invention provides a SiC-based GaN high-efficiency on-chip lateral microfluidic enhanced heat dissipation device and a preparation method and application thereof. By covering the lateral on-chip microchannels in the active area and the cooperatively designed back-ground holes, the heat dissipation problem of high-efficiency GaN power devices with a certain power is effectively solved, the device performance is improved, the operating temperature is reduced, and its thermal reliability is effectively improved.

[0004] The present invention is achieved through the following technical solutions:

[0005] A SiC-based GaN high-efficiency on-chip lateral microfluidic enhanced heat dissipation device, the device comprises a SiN passivation layer, an AlGaN barrier layer, a GaN buffer layer, an AlN nucleation layer and a SiC substrate from bottom to top; the SiN passivation layer is embedded with an active region, the active region is a source, drain and gate functional layer, and the gate is a T-shaped structure; a microfluidic structure is provided on the SiC substrate, the microfluidic structure comprises a fixed groove and a plurality of microchannels arranged in parallel in the fixed groove, the fixed groove is a recessed structure penetrating the SiC substrate and the AlN nucleation layer to the GaN buffer layer, and the direction of the microchannel is perpendicular to the gate length direction of the active region.

[0006] Preferably, the area of ​​the microfluidic structure covers the entire active area.

[0007] Preferably, a row of source back-ground holes is provided at the bottom of the SiC substrate, and the source back-ground holes penetrate the entire device and are located on one side of the long side of the microfluidic structure.

[0008] Preferably, the diameter of the source back ground hole is 75 μm.

[0009] Preferably, the SiC-based GaN high-power on-chip lateral microflow enhanced heat dissipation device has a length of 9800 μm and a width of 3100 μm.

[0010] Preferably, the fixing groove has a length of 7840 μm and a width of 1100 μm.

[0011] Preferably, the length of the microchannel is 4840 μm, and the width is 225 μm or 287.5 μm; the distance between two adjacent microchannels is 150 μm.

[0012] Preferably, the thickness of the AlGaN barrier layer is 20-25 nm, the thickness of the GaN buffer layer is 1.5-2 μm, the thickness of the AlN nucleation layer is 200 nm, and the thickness of the SiC substrate layer is 130 μm.

[0013] The method for preparing the above-mentioned SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device comprises the following steps:

[0014] Step 1) Isolating the active area of ​​the device based on the traditional process;

[0015] Step 2) preparing source and drain functional areas by conventional evaporation process;

[0016] Step 3) using a conventional CVD process to perform a SiN passivation process;

[0017] Step 4) using evaporation technology to grow and prepare the gate functional area;

[0018] Step 5) coating the front of the device with paraffin for protection, and thinning the SiC substrate on the back of the device;

[0019] Step 6) A multi-step etching technique is used to first etch the back hole of the source electrode of the SiC substrate. After etching to a certain depth, the entire sheet is evenly coated with photoresist by spraying, and the evaporation of the seed layer metal and the electroplating of Ni metal are completed. The metal Ni is used as a mask layer to synchronously etch the back hole of the source electrode and the microfluidic structure. Since there is less Ni metal in the back hole, the etching depth of the back hole will be greater than the depth of the microfluidic structure. In this way, the back hole is connected to the source electrode while the microchannel depth is in the device structure. GaN buffer layer is obtained.

[0020] The above-mentioned SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device, or the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device prepared by the above-mentioned preparation method is used in military or civilian electronic communication systems.

[0021] The beneficial effects of the present invention are as follows:

[0022] In the SiC-based GaN high-efficiency on-chip lateral microfluidic enhanced heat dissipation device of the present invention, the SiC substrate has a high heat transfer effect, which effectively reduces the junction temperature of the GaN power device. The SiC substrate contains a heat dissipation microfluidic structure, which is in direct contact with the GaN buffer layer. At the same time, the design of multiple groups of lateral microchannels introduces fluid into the GaN device chip, which improves the heat dissipation capacity of the near-junction area in the chip and reduces the flow resistance. A row of source back-to-ground holes is designed in coordination with the microchannel to avoid additional circuit connection processes. At the same time, compared with the front gold wire bonding, the back-to-ground hole process can enable the microfluidic device to maintain the original frequency characteristics. Compared with traditional GaN devices, the introduction of the lateral microfluidic structure maintains the device frequency characteristics while enhancing the device heat dissipation effect, significantly reducing the thermal resistance, and solving the heat accumulation problem of the device. The addition of the back-to-ground hole process avoids additional gold wire bonding connections, greatly improving the reliability of the device. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device of the present invention has the advantages of efficient heat dissipation capability and high working efficiency, and can be used in high-efficiency microwave devices with a certain power, such as military or civilian electronic communication systems, including communication base stations and other fields, and has broad application prospects. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 The schematic diagram of the cross-sectional structure of the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device;

[0024] Figure 2 Schematic diagram of the back structure of the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device;

[0025] Figure 3 This is a back-side microscope image of a high-efficiency SiC-based GaN on-chip lateral microflow enhanced heat dissipation device;

[0026] Figure 4 Schematic diagram of the dimensions of the SiC-based GaN high-efficiency on-chip lateral microfluidic enhanced heat dissipation device in Example 1: A is the SiC substrate, B is the microfluidic structure;

[0027] In the figure: 1. source; 2. drain; 3. gate; 4. SiN passivation layer; 5. AlGaN barrier layer; 6. GaN buffer layer; 7. AlN nucleation layer; 8. SiC substrate; 9. microfluidic structure; 10. fixing groove; 11. microchannel; 12. source back ground hole. DETAILED DESCRIPTION

[0028] The present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0029] Example 1

[0030] A SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device, such as Figure 1-3 As shown, from bottom to top, it includes SiN passivation layer 4, AlGaN barrier layer 5, GaN buffer layer 6, AlN nucleation layer 7 and SiC substrate 8; the SiN passivation layer 4 is embedded with an active region, and the active region is a source 1, a drain 2, and a gate 3 functional layer, wherein the gate 3 is a T-shaped structure; a microfluidic structure 9 is provided on the SiC substrate 8, and the microfluidic structure 9 includes a fixed groove 10 and a plurality of microchannels 11 arranged in parallel in the fixed groove 10, and the fixed groove 10 is a concave structure that penetrates the SiC substrate 8 and the AlN nucleation layer 7 to the GaN buffer layer 6, and the direction of the microchannel 11 is perpendicular to the length direction of the gate 3 of the active region. The area of ​​the microfluidic structure 9 covers the entire active region.

[0031] like Figure 2 , 3 As shown, a row of source back holes 12 are provided at the bottom of the SiC substrate 8, and the source back holes 12 run through the entire device and are located on one side of the long side of the microfluidic structure 9. The microfluidic structure 9 is in direct contact with the GaN buffer layer 6, and the design of multiple groups of lateral microchannels 11 effectively reduces the flow resistance of the microfluid. At the same time, a row of source back holes 12 next to the microchannel 11 runs through the SiC substrate 8, avoiding additional gold wire bonding and greatly improving the reliability of the device.

[0032] A preferred solution is Figure 4 As shown in A and B, the length of the device in this embodiment is 9800 μm and the width is 3100 μm; the length of the fixed groove 10 is 7840 μm and the width is 1100 μm; the length of the microchannel 11 is 4840 μm and the width is 225 μm (middle area) or 287.5 μm (side areas), and the distance between two adjacent microchannels 11 is 150 μm.

[0033] In a preferred embodiment, the diameter of the source back hole 12 is 75 μm, the thickness of the AlGaN barrier layer 5 is 20-25 nm, the thickness of the GaN buffer layer 6 is 1.5-2 μm, the thickness of the AlN nucleation layer 7 is 200 nm, and the thickness of the SiC substrate layer 8 is 130 μm.

[0034] The preparation method of the above-mentioned SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device comprises the following specific steps:

[0035] (1) Based on the traditional process, the active area of ​​the device is first isolated.

[0036] (2) The source and drain functional areas are prepared using traditional evaporation technology.

[0037] (3) Use traditional CVD process for SiN passivation process.

[0038] (4) Evaporation technology is used to grow and prepare the gate functional area.

[0039] (5) The front side of the device is protected by wax coating and the SiC substrate on the back side of the device is thinned.

[0040] (6) Microchannels and source back holes are prepared on the SiC substrate using multi-step etching technology and electroplating technology, as follows:

[0041] (6-1) Simultaneous etching of microchannels and back holes:

[0042] (a) Photolithography of microchannels and back holes: including spin coating of photoresist, pre-baking, exposure, development, hardening and other processes to pattern the back hole area on the surface of the SiC substrate;

[0043] (b) Seed layer sputtering: sputtering WTi / Au seed layer metal, stripping with acetone, and ultrasonic cleaning with acetone and ethanol respectively;

[0044] (c) Mask layer electroplating: Spin-coat multiple layers of AZ701 photoresist to a thickness greater than 6 μm, and complete pre-baking, exposure, development, hardening and other processes; Electroplating thick Ni on the Au layer to a thickness greater than 12 μm to meet the etching mask requirements;

[0045] (d) RIE etching: The SiC substrate is deep-etched using the RIE technique in a combined gas atmosphere of SF6 / O2. Since the characteristic size of the microchannel area is much larger than the size of the back-ground hole, the SiC in the microchannel area will be etched faster to 130 μm, and the etching time will be further extended until the back-ground hole area penetrates the entire SiC substrate. After etching, the remaining metal Ni is removed by wet etching;

[0046] (6-2) Further etching of back hole:

[0047] (e) ECR (electron cyclotron resonance plasma) etching: The back of the device is uniformly sprayed with glue to obtain a 2.0 μm thick photoresist 7908, and the back hole area is photoetched again to complete the process steps of pre-baking, exposure, development, and hardening. Photoresist 7908 is used as a mask, and ECR technology is used to etch the AlN nucleation layer using SiCl4 / Cl2 / Ar, penetrating the entire AlN layer, with an etching depth of 200 nm. No treatment is done after this etching, and the etching of the next layer of material GaN is continued;

[0048] (f) ICP (inductively coupled plasma) etching: Using ICP technology, BCl3 / Cl2 is used to etch the GaN buffer layer to the back of the source metal, and then the glue is removed after etching to complete the penetration of the back hole;

[0049] (g) The entire back side is sputtered with WTi / Au seed layer metal, and then Ni / Au (1.6 μm / 3 μm) metal is electroplated, and the paraffin wax protecting the front side is removed by wet cleaning, thereby completing the preparation of the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device.

[0050] The implementation principle of the present invention: The present invention designs the lateral microchannel and the source back hole of the SiC substrate, introduces a multi-step etching technology to etch the back hole of the SiC substrate after the photolithography of the glue coating, and then evenly coats the entire sheet with photoresist by glue spraying after etching to a certain depth, completes the evaporation of the seed layer metal (WTi / Au / Ti) and the electroplating of Ni metal, and uses the metal Ni as a mask layer to synchronously etch the back hole and the microchannel. Since there is less Ni metal in the back hole, the back hole etching depth will be greater than the microchannel depth, so that the back hole is connected to the source while the microchannel depth is in the GaN buffer layer of the chip structure, and the source back hole and microchannel are compatible and synchronously prepared in the preparation process. This structure can improve the heat dissipation capacity inside the GaN device chip while achieving high device efficiency, and solve its heat accumulation problem.

[0051] Test Example 1

[0052] A device without a passive back hole design (control device 1, i.e., no back hole is etched, and other structures are the same as those of the present embodiment) and a conventional sample without a microfluidic channel (control device 2, i.e., without a microfluidic structure, and other structures are the same as those of the present embodiment) were used as controls for testing. The testing process is as follows:

[0053] (1) Sample assembly: The device of this embodiment, control device 1 and control device 2 are integrated with a shell test shell (the test shell of the sample with microfluidic channel contains liquid channels, and the external pump area is connected to provide microfluidic heat dissipation for the microfluidic device).

[0054] (2) Test system construction and connection: The solid-state amplifier, vector network, power meter, and power supply are connected in sequence to complete the test system connection.

[0055] (3) Place the device integrated with the test housing under the infrared thermal imager, connect the input and output ends to the test system, and complete the calibration of the infrared thermal imager.

[0056] (4) Power-on test: adjust the gate voltage so that the device can work normally, increase the drain voltage to 36V, adjust the input signal, record the device drain voltage and drain current displayed by the power supply, the input and output power displayed by the power meter, and the device junction temperature displayed by the infrared thermal imager, and calculate the device efficiency by the drain voltage and drain current. Test the device of this embodiment and the control test device in turn, and record and calculate the results.

[0057] The test results are shown in Table 1 below:

[0058] Table 1 Test results

[0059] Group Leakage voltage(V) efficiency Junction temperature(℃) The device of this embodiment 36 71％ 128 Comparative device 1 36 45％ 160 Comparative device 2 36 65％ 217

[0060] As can be seen from Table 1, the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device of this embodiment is realized through the coordinated design and process compatibility of the source back ground hole and the lateral microchannel. Compared with the control device 1, the efficiency is increased from 45% to 71%, and the junction temperature is also reduced from 160°C to 128°C; at the same time, compared with the conventional sample without microchannel design (control device 2), the junction temperature of the heat dissipation device of this embodiment is significantly reduced. Due to the reduction of thermal effect, the output power is increased, so the efficiency is improved. Therefore, the coordinated design of the back ground hole and the microchannel of the present invention not only effectively improves the heat dissipation effect, but also improves the working efficiency of the device at the same time.

[0061] The embodiments described above are only some embodiments of the present invention, rather than all embodiments. The detailed description of the embodiments of the present invention is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. The scope of protection of the present invention shall be subject to the scope required by the claims. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work shall fall within the scope of protection of the present invention.

Claims

1. A SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device, characterized in that: The device comprises, from bottom to top, a SiN passivation layer, an AlGaN barrier layer, a GaN buffer layer, an AlN nucleation layer and a SiC substrate; an active region is embedded in the SiN passivation layer, the active region is a source, drain and gate functional layer, and the gate is a T-shaped structure; a microfluidic structure is arranged on the SiC substrate, the microfluidic structure comprises a fixed groove and a plurality of microchannels arranged in parallel in the fixed groove, the fixed groove is a recessed structure penetrating through the SiC substrate and the AlN nucleation layer to the GaN buffer layer, and the direction of the microchannel is perpendicular to the gate length direction of the active region.

2. A SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 1, characterized in that: The area of ​​the microfluidic structure covers the entire active area.

3. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 1, characterized in that: A row of source back holes is arranged at the bottom of the SiC substrate, and the source back holes penetrate the entire device and are located on one side of the long side of the microfluidic structure.

4. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 3, characterized in that: The diameter of the source back ground hole is 75 μm.

5. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 1, characterized in that: The SiC-based GaN high-power on-chip lateral microflow enhanced heat dissipation device has a length of 9800 μm and a width of 3100 μm.

6. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 5, characterized in that: The fixing groove has a length of 7840 μm and a width of 1100 μm.

7. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 6, characterized in that: The length of the microchannel is 4840 μm, and the width is 225 μm or 287.5 μm; the distance between two adjacent microchannels is 150 μm.

8. The SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to claim 1, characterized in that: The thickness of the AlGaN barrier layer is 20-25 nm, the thickness of the GaN buffer layer is 1.5-2 μm, the thickness of the AlN nucleation layer is 200 nm, and the thickness of the SiC substrate layer is 130 μm.

9. A method for preparing a SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device according to any one of claims 1 to 8, characterized in that: The following steps are involved: Step 1) Isolating the active area of ​​the device based on the traditional process; Step 2) preparing source and drain functional areas by conventional evaporation process; Step 3) using a conventional CVD process to perform a SiN passivation process; Step 4) using evaporation technology to grow and prepare the gate functional area; Step 5) coating the front of the device with paraffin for protection, and thinning the SiC substrate on the back of the device; Step 6) A multi-step etching technique is used to first etch the back hole of the source electrode of the SiC substrate. After etching to a certain depth, the entire sheet is evenly coated with photoresist by spraying, and the evaporation of the seed layer metal and the electroplating of Ni metal are completed. The metal Ni is used as a mask layer to synchronously etch the back hole of the source electrode and the microfluidic structure. Since there is less Ni metal in the back hole, the etching depth of the back hole will be greater than the depth of the microfluidic structure. In this way, the back hole is connected to the source electrode while the microchannel depth is in the device structure. GaN buffer layer is obtained.

10. Application of the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device as described in any one of claims 1 to 8, or the SiC-based GaN high-efficiency on-chip lateral microflow enhanced heat dissipation device prepared by the preparation method as described in claim 9 in military or civilian electronic communication systems.

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