Battery module and electronic device

Abstract

This application discloses a battery module and an electronic device. The battery module includes: a battery cell, a battery protection chip, a first connector, a second connector, and a first switching unit. The first electrode of the battery cell is connected to the first connector and the second connector respectively through the first switching unit, and the second electrode of the battery cell is connected to the second connector through the battery protection chip. Alternatively, the first electrode of the battery cell is connected to the first connector and the second connector respectively, and the second electrode of the battery cell is connected to the second connector sequentially through the battery protection chip and the first switching unit. The battery protection chip is connected to the first switching unit. When the first connector and / or the second connector are not connected to the motherboard, the first switching unit is in an off state.

Description

Technical Field

[0001] This application relates to the field of electronic product technology, and in particular to a battery module and electronic device. Background Technology

[0002] To address the issue of wire burnout during connection caused by the battery cell connectors being constantly energized, a battery module shutdown solution is proposed. Specifically, when the battery module is not connected to the motherboard, the power supply terminal VDD of the battery protection chip in the battery module is not energized, the protection switch of the negative terminal of the cell is in the open state, and the connector in the battery module is not energized. When only one connector in the battery module is connected to the motherboard, the power supply terminal VDD of the battery protection chip is still not energized, the protection switch of the negative terminal of the cell remains in the open state, and the connector in the battery module remains not energized. When both connectors in the battery module are connected to the motherboard, the power supply terminal VDD of the battery protection chip is energized, and the protection switch of the negative terminal of the cell is in the on state, energizing the connectors in the battery module, thus connecting the battery module to the motherboard.

[0003] However, during the actual operation of connecting the battery module to the motherboard, there may be a situation where one of the connectors connects to the motherboard first. In this case, a leakage path may be created between the battery module and the motherboard. This can cause the power supply terminal VDD of the battery protection chip to be energized with the battery cell when the two connectors are not fully connected to the motherboard. This can cause the battery protection chip to malfunction, the protection switch of the negative terminal of the battery cell to be opened by mistake, or affect the control logic of the battery management chip in the motherboard. Summary of the Invention

[0004] This application provides a battery module and an electronic device to solve the problem that current battery modules may generate leakage paths when they are fastened to the motherboard, which can easily affect the control logic of the chips in the battery module and the motherboard, leading to malfunctions.

[0005] To solve the above-mentioned technical problems, this application is implemented as follows:

[0006] In a first aspect, embodiments of this application provide a battery module, including: a battery cell, a battery protection chip, a first connector, a second connector, and a first switching unit;

[0007] The first electrode of the battery cell is connected to the first connector and the second connector respectively through the first switching unit, and the second electrode of the battery cell is connected to the second connector through the battery protection chip;

[0008] or,

[0009] The first electrode of the battery cell is connected to the first connector and the second connector respectively, and the second electrode of the battery cell is connected to the second connector in sequence through the battery protection chip and the first switching unit;

[0010] The battery protection chip is connected to the first switching unit; when the first connector and / or the second connector are not connected to the motherboard, the first switching unit is in the off state.

[0011] Secondly, embodiments of this application also provide an electronic device, including the battery module as described above, and also including the motherboard.

[0012] Thus, the battery module in the above-mentioned solution of this application, by setting a first switching unit between the first electrode of the battery cell and the first connector and the second connector, or by setting a first switching unit between the battery protection chip and the second connector, and when the first connector and / or the second connector are not connected to the motherboard, the first switching unit is in the off state, that is, when the battery module and the motherboard are not fully connected, the first electrode of the battery cell and the first connector and the second connector will not conduct, or the battery protection chip and the second connector will not conduct, thus avoiding the generation of leakage paths that would cause the battery cell to supply power to the power supply terminal VDD of the battery protection chip, thereby avoiding affecting the control logic of the chip in the battery module and the motherboard, and thus avoiding malfunction. Attached Figure Description

[0013] Figure 1 One of the schematic diagrams illustrating the connection between the battery module and the motherboard in an embodiment of this application;

[0014] Figure 2 This is the second schematic diagram illustrating the connection between the battery module and the motherboard in an embodiment of this application.

[0015] Figure 3 This is one of the schematic diagrams illustrating the power-on path of the power supply terminal of the battery protection chip when the battery module is fastened to the motherboard according to an embodiment of this application.

[0016] Figure 4 This is the second schematic diagram showing the power-on path of the power supply terminal of the battery protection chip when the battery module is fastened to the motherboard according to an embodiment of this application.

[0017] Figure 5 This is a schematic diagram illustrating a boost circuit according to an embodiment of this application. Detailed Implementation

[0018] Exemplary embodiments of the present application will now be described in more detail with reference to the accompanying drawings. While exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be implemented in various forms and should not be limited to the embodiments set forth herein. Rather, these embodiments are provided so that this application will be thorough and complete, and will fully convey the scope of the present application to those skilled in the art.

[0019] like Figure 1 and Figure 2 As shown, this application provides a battery module that can solve the problem that current battery modules may generate leakage paths when they are fastened to the motherboard, which can easily affect the control logic of the chips in the battery module and the motherboard, leading to malfunctions.

[0020] Specifically, the battery module 1 includes: a battery cell 10, a battery protection chip 20, a first connector 30, a second connector 40, and a first switching unit 50;

[0021] The first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively through the first switching unit 50, and the second electrode of the battery cell 10 is connected to the second connector 40 through the battery protection chip 20.

[0022] or,

[0023] The first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively, and the second electrode of the battery cell 10 is connected to the second connector 40 in sequence through the battery protection chip 20 and the first switching unit 50.

[0024] The battery protection chip 20 is connected to the first switch unit 50; when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, the first switch unit 50 is in the off state.

[0025] Optionally, the first electrode of the battery cell 10 can be one of the positive and negative electrodes, and the second electrode of the battery cell 10 can be the other of the positive and negative electrodes.

[0026] Optionally, as one implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively through the first switching unit 50, and the second electrode of the battery cell 10 is connected to the second connector 40 through the battery protection chip 20. When the battery protection chip 20 is connected to the first switching unit 50, the first switching unit 50 is in the off state when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2.

[0027] In this configuration, the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively via the first switching unit 50. Specifically, the first electrode of the battery cell 10 is connected to the first connector 30 via the first switching unit 50, and also to the second connector 40 via the first switching unit 50. Thus, when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2 (i.e., the battery module 1 is not fully connected to the motherboard 2), since the first switching unit 50 is in the off state, there will be no electrical conduction between the first electrode of the battery cell 10 and the first connector 30 and the second connector 40. This prevents leakage paths from causing the battery cell 10 to supply power to the VDD terminal of the battery protection chip 20, thereby avoiding interference with the control logic of the chips in the battery module and motherboard, and preventing malfunctions.

[0028] Alternatively, as another implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively, and the second electrode of the battery cell 10 is connected to the second connector 40 in sequence through the battery protection chip 20 and the first switch unit 50. When the battery protection chip 20 is connected to the first switch unit 50, the first switch unit 50 is in the off state when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2.

[0029] The first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40, respectively, including: the first electrode of the battery cell 10 is directly connected to the first connector 30 and the second connector 40 (that is, the first electrode of the battery cell 10 is directly connected to the first connector 30 and the first electrode of the battery cell 10 is directly connected to the second connector 40), and / or the first electrode of the battery cell 10 is indirectly connected to the first connector 30 and the second connector 40 (for example, through other electrical devices or units connected in series with the first connector 30 and the second connector 40). Thus, when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2 (that is, the battery module 1 is not fully connected to the motherboard 2), since the first switching unit 50 is in the off state, there will be no electrical conduction between the battery protection chip 20 and the second connector 40. This avoids the generation of a leakage path that would cause the battery cell 10 to supply power to the VDD terminal of the battery protection chip 20, thereby avoiding affecting the control logic of the chips in the battery module and the motherboard, and preventing malfunctions.

[0030] In this embodiment of the application, the battery module 1 has a first switching unit 50 disposed between the first electrode of the battery cell 10 and the first connector 30 and the second connector 40, or between the battery protection chip 20 and the second connector 40. When the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, the first switching unit 50 is in an off state. That is, when the battery module 1 and the motherboard 2 are not fully connected, there is no conduction between the first electrode of the battery cell 10 and the first connector 30 and the second connector 40, or between the battery protection chip 20 and the second connector 40. This avoids the generation of a leakage path that would cause the battery cell 10 to supply power to the power supply terminal VDD of the battery protection chip 20, thereby avoiding affecting the control logic of the chips in the battery module and the motherboard, and thus avoiding malfunctions.

[0031] For example, as one implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively through the first switching unit 50; the second electrode of the battery cell 10 is connected to the second connector 40 through the battery protection chip 20. When the battery protection chip 20 is connected to the first switching unit 50, the specific connection method can be: the first electrode of the battery cell 10 is connected to the first terminal P1+ of the first connector 30 and the first terminal P2+ of the second connector 40 respectively through the first switching unit 50 (for example: the positive electrode of the battery cell 10 is indirectly connected to the first terminal P1+ of the first connector 30 and the first terminal P2+ of the second connector 40 respectively, that is, the first switching unit 50 is connected in series in the path where the positive electrode of the battery cell 10 is connected to the first terminal P1+ of the first connector 30 and the first terminal P2+ of the second connector 40), and the first electrode of the battery cell 10 also... The battery cell 10 is connected to the second terminal A of the first connector 30 (for example, the positive terminal of the battery cell 10 is also directly connected to the second terminal A of the first connector 30, or it can be indirectly connected to the second terminal A of the first connector 30 through other electrical components or units, etc.); the second electrode of the battery cell 10 is connected to the battery protection chip 20, and the power supply terminal VDD of the battery protection chip 20 is connected to the third terminal D of the second connector 40 (for example, the negative terminal of the battery cell 10 is connected to the ground terminal VSS of the battery protection chip 20, and the power supply terminal VDD of the battery protection chip 20 is connected to the third terminal D of the second connector 40), and the second electrode of the battery cell 10 is also connected to the second terminal P2- of the second connector 40 (for example, the negative terminal of the battery cell 10 is also directly connected to the second terminal P2- of the second connector 40, or it can be indirectly connected to the second terminal P2- of the second connector 40 through other electrical components or units, etc.).

[0032] For details, see Figure 3 As shown, when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2 (for example, the first connector 30 is not connected to the third connector 21 on the motherboard 2, and / or the second connector 40 is not connected to the fourth connector 22 on the motherboard 2), the arrow direction indicates the leakage path. Since the first switching unit 50 is in the off state at this time, that is, the dashed arrow part is not conductive, the power supply terminal VDD of the battery protection chip 20 is not powered (that is, there is no conductive connection between the power supply terminal VDD of the battery protection chip 20 and the positive terminal of the battery cell 10), the battery protection... When chip 20 is not working, the battery protection chip 20 will not output an electrical signal to the first switching unit 50. As a result, the first switching unit 50 remains in the off state, that is, the positive terminal of the battery cell 10 is disconnected from the first end P1+ of the first connector 30 and the first end P2+ of the second connector 40, thus preventing the leakage path from being connected. Since there is no voltage on the first end P1+ of the first connector 30 and the first end P2+ of the second connector 40, the power supply terminal VDD of the battery protection chip 20 will not be powered on, that is, the battery cell 10 is in a completely off state.

[0033] Optionally, when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery protection chip 20 outputs a first electrical signal to the first switching unit 50. The first switching unit 50 is in a conducting state under the action of the first electrical signal, and the battery cell 10 forms a power path with the battery management chip 23 in the motherboard 2 through the first connector 30 and the second connector 40. That is, when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20 sequentially through the second end A of the first connector 30, the motherboard 2, and the third end D of the second connector 40. When the battery cell 10 supplies power to the battery protection chip 20, the battery protection chip 20 outputs the first electrical signal to the first switching unit 50. The first switching unit 50 is in a conducting state under the action of the first electrical signal, forming a power path from the first electrode of the battery cell 10 sequentially through the first switching unit 50, the first end P1+ of the first connector 30, the battery management chip 23, and the second end P2- of the second connector 40 to the second electrode of the battery cell 10.

[0034] Specifically, when both the first connector 30 and the second connector 40 are connected to the motherboard 2 (for example, the first connector 30 is connected to the third connector 21 on the motherboard 2, and the second connector 40 is connected to the fourth connector 22 on the motherboard 2), since the second end A of the first connector 30 is connected to the connection end B of the third connector 21, and the third end D of the second connector 40 is connected to the connection end C of the fourth connector 22, and the connection end B of the third connector 21 and the connection end C of the fourth connector 22 on the motherboard 2 are connected by a wiring, the following conductive path is formed: positive terminal of cell 10 → second end A of first connector 30 → connection end B of third connector 21 → connection end C of fourth connector 22 → third end D of second connector 40 → power terminal VDD of battery protection chip 20, that is, the second end A of the first connector 30 and the third end D of the second connector 40 are connected, thereby powering on the power terminal VDD of battery protection chip 20 (that is, the power terminal VDD of battery protection chip 20 is connected to the positive terminal of cell 10), and battery protection chip 20 is in working state. When the battery protection chip 20 is in working state, it outputs voltage (i.e., first electrical signal) to the first switching unit 50, making the first switching unit 50 in a conducting state, thereby forming the following power path: positive terminal of cell 10 → first end P1+ of first connector 30 → battery voltage terminal VBAT of third connector 21 → battery management chip 23 on motherboard 2 → ground terminal GND of fourth connector 22 → first end P2+ of second connector 40 → voltage monitoring terminal VM of battery protection chip 20 and negative terminal of cell 10. Thus, cell 10 forms a power path with battery management chip 23 on motherboard 2 through first connector 30 and second connector 40. That is, battery module 1 is powered by battery management chip 23 on motherboard 2. Cell 10 can output power to motherboard through battery management chip 23, or be charged through battery management chip 23, etc.

[0035] For another example, as a further implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively; the second electrode of the battery cell 10 is connected to the second connector 40 sequentially through the battery protection chip 20 and the first switching unit 50. When the battery protection chip 20 is connected to the first switching unit 50, the specific connection method can be: the first electrode of the battery cell 10 is connected to the first terminal P1+ of the first connector 30, the first terminal P2+ of the second connector 40, and the second terminal A of the first connector 30 respectively (for example: the positive terminal of the battery cell 10 is directly connected to the first terminal P1+ of the first connector 30 and the first terminal P2+ of the second connector 40 respectively; the positive terminal of the battery cell 10 is directly connected to the second terminal A of the first connector 30; or the positive terminal of the battery cell 10 is indirectly connected to the second terminal A of the first connector 30 through other electrical components or units); the power supply terminal VDD of the battery protection chip 20 is connected to the third terminal D of the second connector 40. The voltage monitoring terminal VM of the battery protection chip 20 is connected to the second terminal P2- of the second connector 40 through the first switching unit 50 (for example, the negative terminal of the battery cell 10 is connected to the ground terminal VSS of the battery protection chip 20, the power terminal VDD of the battery protection chip 20 is directly connected to the third terminal D of the second connector 40, and the voltage monitoring terminal VM of the battery protection chip 20 is indirectly connected to the second terminal P2- of the second connector 40, that is, the first switching unit 50 is connected in series in the path from the voltage monitoring terminal VM to the second terminal P2- of the second connector 40); the second electrode of the battery cell 10 is also connected to the second terminal P2- of the second connector 40 (for example, the negative terminal of the battery cell 10 is directly connected to the second terminal P2- of the second connector 40, or the negative terminal of the battery cell 10 is indirectly connected to the second terminal of the second connector 40 through other electrical components or units, that is, other electrical components or units can be connected in series in the path from the negative terminal of the battery cell 10 to the second terminal P2- of the second connector 40).

[0036] For details, see Figure 4As shown, when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2 (for example, the first connector 30 is not connected to the third connector 21 on the motherboard 2, and / or the second connector 40 is not connected to the fourth connector 22 on the motherboard 2), the arrow direction indicates the leakage path. Since the first switch unit 50 is in the off state at this time, that is, the dashed arrow part is not conductive, the power supply terminal VDD of the battery protection chip 20 is not powered (that is, there is no conductive connection between the power supply terminal VDD of the battery protection chip 20 and the positive terminal of the cell 10), the battery protection chip 20 does not work, so the battery protection chip 20 will not output an electrical signal to the first switch unit 50, and the first switch unit 50 remains in the off state to prevent the leakage path from being connected. Since there is no conductive path from the positive terminal of the cell 10 to the motherboard 2 and then back to the inside of the battery protection chip 20 through the voltage monitoring terminal VM, the power supply terminal VDD of the battery protection chip 20 will not be powered, that is, the cell 10 is in a completely off state.

[0037] Optionally, when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery protection chip 20 outputs a first electrical signal to the first switching unit 50. The first switching unit 50 is in a conducting state under the action of the first electrical signal, and the battery cell 10 forms a power path with the battery management chip 23 in the motherboard 2 through the first connector 30 and the second connector 40. That is, when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20 sequentially through the second end A of the first connector 30, the motherboard 2, and the third end D of the second connector 40. When the battery cell 10 supplies power to the battery protection chip 20, the battery protection chip 20 outputs the first electrical signal to the first switching unit 50. The first switching unit 50 is in a conducting state under the action of the first electrical signal, forming a power path from the first electrode of the battery cell 10 sequentially through the first switching unit 50, the first end P1+ of the first connector 30, the battery management chip 23, and the second end P2- of the second connector 40 to the second electrode of the battery cell 10.

[0038] Specifically, when both the first connector 30 and the second connector 40 are connected to the motherboard 2 (for example, the first connector 30 is connected to the third connector 21 on the motherboard 2, and the second connector 40 is connected to the fourth connector 22 on the motherboard 2), since the second end A of the first connector 30 is connected to the connection end B of the third connector 21, and the third end D of the second connector 40 is connected to the connection end C of the fourth connector 22, and the connection end B of the third connector 21 and the connection end C of the fourth connector 22 on the motherboard 2 are connected by a wiring, the following conduction path is formed: positive terminal of cell 10 → second end A of first connector 30 → connection end B of third connector 21 → connection end C of fourth connector 22 → third end D of second connector 40 → power terminal VDD of battery protection chip 20, that is, the second end A of the first connector 30 and the third end D of the second connector 40 are connected, so the battery protection chip 20 is powered on (that is, the power terminal VDD of battery protection chip 20 is connected to the positive terminal of cell 10), and the battery protection chip 20 is in working state. When the battery protection chip 20 is in working state, it outputs voltage (i.e., first electrical signal) to the first switching unit 50, making the first switching unit 50 in a conducting state, thereby forming the following power path: positive terminal of battery cell 10 → first end P1+ of first connector 30 → battery voltage terminal VBAT of third connector 21 → battery management chip 23 on motherboard 2 → ground terminal GND of fourth connector 22 → first end P2+ of second connector 40 → negative terminal of battery cell 10 and voltage monitoring terminal VM of battery protection chip 20 through first switching unit 50. Thus, the battery cell 10 forms a power path with the battery management chip 23 in motherboard 2 through the first connector 30 and the second connector 40. That is, the battery module 1 is powered by the battery management chip 23 on motherboard 2. In other words, the battery cell 10 can output power to the motherboard through the battery management chip 23, or be charged through the battery management chip 23, etc.

[0039] In this embodiment of the battery module, a first switching unit 50 is provided in the path connecting the positive terminal of the battery cell 10 to the first terminal P1+ of the first connector 30 and the first terminal P2+ of the second connector 40, respectively; or the first switching unit 50 is provided in the path connecting the voltage monitoring terminal VM to the second terminal P2- of the second connector 40. This ensures that when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, the power supply terminal VDD of the battery protection chip is not powered (i.e., there is no conduction between the power supply terminal VDD of the battery protection chip 20 and the positive terminal of the battery cell 10), and the first switching unit 50 is in the off state, preventing leakage paths that could cause the power supply terminal VDD to be powered on, thus ensuring that the battery cell 10 is in a completely off state; and when both the first connector 30 and the second connector 40 are connected to the motherboard 2... The second end A of the first connector 30 is connected to the third end D of the second connector 40. The power supply terminal VDD of the battery protection chip 20 is powered on (i.e., the power supply terminal VDD of the battery protection chip 20 is connected to the positive terminal of the battery cell 10). The battery protection chip 20 is in working state and outputs voltage (i.e., the first electrical signal) to the first switching unit 50. Then the first switching unit 50 is in conducting state. The battery cell 10 forms a power path with the battery management chip 23 in the motherboard 2 through the first connector 30 and the second connector 40. That is, the battery module 1 is powered by the battery management chip 23 on the motherboard 2, realizing the normal operation of the battery module 1. This solves the problem that the current battery module 1 may generate a leakage path when it is fastened to the motherboard 2, which can easily affect the control logic of the chips in the battery module 1 and the motherboard 2, leading to malfunction.

[0040] Specifically, in practical applications, when assembling the battery module 1 and the motherboard 2, there may be situations where one pair of connectors is engaged before engaging the other pair. This embodiment avoids the leakage path that could cause the battery protection chip 20 to malfunction, as well as power-on timing and logic anomalies in the battery protection chip 20 and the battery management chip 23 on the motherboard, effectively mitigating the resulting device reliability risks. Furthermore, it ensures that the battery cell 10 is completely de-energized before the battery module 1 is fully assembled onto the motherboard 2. Even when testing the voltage of the battery cell 10 with an instrument, the voltage will not be measured as half-high due to voltage division caused by the internal resistance of the instrument and the internal resistance of the battery protection chip 20, thus affecting the assessment of battery quality.

[0041] Optionally, please continue to see Figure 1 The first switching unit 50 includes: a first power switch Q1 and a second power switch Q2;

[0042] The source of the first power switch Q1 is connected to the first electrode of the battery cell 10, the source of the second power switch Q2 is connected to the second connector 40, the gates of the first power switch Q1 and the second power switch Q2 are both connected to the battery protection chip 20, and the drain of the first power switch Q1 is connected to the drain of the second power switch Q2.

[0043] For example: the source of the first power switch Q1 is connected to the positive terminal of the battery cell 10, the gate of the first power switch Q1 is connected to the first voltage control terminal CO of the battery protection chip 20, the source of the second power switch Q2 is connected to the third terminal D of the second connector 40, the gate of the second power switch Q2 is connected to the second voltage control terminal DO of the battery protection chip 20, and the drain of the first power switch Q1 is connected to the drain of the second power switch Q2.

[0044] When the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, both the first power switch Q1 and the second power switch Q2 are in the off state; when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20, and the battery protection chip 20 outputs a first electrical signal to the first power switch Q1 and the second power switch Q2, and both the first power switch Q1 and the second power switch Q2 are in the on state under the action of the first electrical signal.

[0045] In this embodiment, by setting the first switching unit 50 to include a first power switch Q1 and a second power switch Q2, the generation of leakage current path can be effectively avoided when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2.

[0046] Optionally, the first switching unit 50 further includes: a first resistor R1 and a second resistor R2; the first resistor R1 is connected between the source and drain of the first power switch Q1, and the second resistor R2 is connected between the source and drain of the second power switch Q2.

[0047] In this embodiment, by setting a first resistor R1 between the source and drain of the first power switch Q1 and a second resistor R2 between the source and drain of the second power switch Q2, the first power switch Q1 and the second power switch Q2 can be kept in the off state before the power supply terminal VDD of the battery protection chip 20 is powered on.

[0048] Optionally, the battery module further includes at least one boost unit 60; the first switching unit 50 is connected to the battery protection chip 20 through the at least one boost unit 60.

[0049] Specifically, taking the first switching unit 50, which includes the first power switch Q1 and the second power switch Q2, as an example, the conduction of the first power switch Q1 and the second power switch Q2 requires satisfying V... CO -Vcell>VGS(th) and V DO -Vcell>VGS(th), where V CO It is the voltage output from the first voltage control terminal CO, V DO This is the voltage output from the second voltage control terminal DO. Vcell is the cell voltage, and VGS(th) is the turn-on voltage of Q1 and Q2. In other words, the turn-on of the first power switch Q1 and the second power switch Q2 requires satisfying V... CO >Vcell+VGS(th) and V CO >Vcell+VGS(th), therefore, the above requirements can be met by setting up a boost unit 60 on the voltage output path from the first voltage control terminal CO to the first power switch Q1 and the voltage output path from the second voltage control terminal DO to the second power switch Q2.

[0050] For example, the number of boost units 60 can be one, meaning the first switching unit 50 is connected to the battery protection chip 20 through one boost unit 60. For instance, the gate of the first power switch Q1 is connected to the first voltage control terminal CO of the battery protection chip 20 through this boost unit 60, and the gate of the second power switch Q2 is also connected to the second voltage control terminal DO of the battery protection chip 20 through this boost unit 60. That is, the voltages output from the first voltage control terminal CO and the second voltage control terminal DO of the battery protection chip 20 are boosted by the boost unit 60, and then input to the first power switch Q1 and the second power switch Q2 respectively, to ensure that the first power switch Q1 and the second power switch Q2 can be turned on under voltage drive.

[0051] For another example, the number of boost units 60 can be multiple, meaning the first switching unit 50 is connected to the battery protection chip 20 through multiple boost units 60. For instance, the gate of the first power switch Q1 is connected to the first voltage control terminal CO of the battery protection chip 20 through one boost unit 60, and the gate of the second power switch Q2 is connected to the second voltage control terminal DO of the battery protection chip 20 through another boost unit 60. That is, the voltage output from the first voltage control terminal CO of the battery protection chip 20 is boosted by one boost unit 60, and the boosted voltage is input to the first power switch Q1; and the voltage output from the second voltage control terminal DO of the battery protection chip 20 is boosted by another boost unit 60, and the boosted voltage is input to the second power switch Q2, ensuring that the first power switch Q1 and the second power switch Q2 can be turned on under voltage drive.

[0052] Optionally, see [link to relevant documentation] Figure 2 As shown, the first switching unit 50 includes a third power switch Q3; the source and gate of the third power switch Q3 are both connected to the battery protection chip 20, and the drain of the third power switch Q3 is connected to the second connector 40.

[0053] For example, the source of the third power switch Q3 is connected to the voltage monitoring terminal VM of the battery protection chip 20, the drain of the third power switch Q3 is connected to the second terminal P2- of the second connector 40, and the gate of the third power switch Q3 is connected to the power supply terminal VDD of the battery protection chip 20.

[0054] When the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, the third power switch Q3 is in the off state; when both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20, the battery protection chip 20 outputs a first electrical signal to the third power switch Q3, and the third power switch Q3 is in the on state under the action of the first electrical signal.

[0055] In this embodiment, by including a third power switch Q3 in the first switching unit 50, leakage current path can be effectively avoided when the first connector 30 and / or the second connector 40 are not connected to the motherboard 2.

[0056] Optionally, the first switching unit 50 further includes a third resistor R3; the third resistor R3 is connected between the source and drain of the third power switch Q3.

[0057] In this embodiment, a third resistor R3 is provided between the source and drain of the third power switch Q3 to ensure that the third power switch Q3 is always in the off state before the battery protection chip 20 is powered on.

[0058] Optionally, the battery module further includes at least one boost unit 60; the first switching unit 50 is connected to the battery protection chip 20 through the boost unit 60.

[0059] Specifically, taking the first switching unit 50, which includes the third power switch Q3, as an example, since the voltage at the voltage monitoring terminal VM is pulled up to the power supply terminal VDD inside the battery protection chip 20 under over-discharge protection, in order to ensure that the third power switch Q3 is always on, the third power switch Q3 needs to meet the Vg-V standard. VM >VGS(th), where Vg is the gate voltage of the third power switch Q3, V VM It is the voltage of the voltage monitoring terminal VM, so the above requirements can be met by setting a boost unit 60 at the gate of the third power switch Q3.

[0060] Optionally, the battery module further includes: a second switching unit 51; the second electrode of the battery cell 10 is also connected to the second connector 40 through the second switching unit 51;

[0061] The battery protection chip 20 is connected to the second switching unit 51. When the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, the second switching unit 51 is in the off state. When both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20, the battery protection chip 20 outputs a second electrical signal to the second switching unit 51, and the second switching unit 51 is in the on state under the action of the second electrical signal.

[0062] In one implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively through the first switching unit 50; the second electrode of the battery cell 10 is connected to the second connector 40 through the battery protection chip 20; when the battery protection chip 20 is connected to the first switching unit 50, the battery module may also include a second switching unit 51; the second electrode of the battery cell 10 is also connected to the second connector 40 through the second switching unit 51.

[0063] As another implementation: the first electrode of the battery cell 10 is connected to the first connector 30 and the second connector 40 respectively, and the second electrode of the battery cell 10 is connected to the second connector 40 in sequence through the battery protection chip 20 and the first switch unit 50. When the battery protection chip 20 is connected to the first switch unit 50, the battery module may also include a second switch unit 51; the second electrode of the battery cell 10 is also connected to the second connector 40 through the second switch unit 51.

[0064] Specifically, the second electrode of the battery cell 10 is also connected to the second connector 40 through the second switching unit 51. This can be achieved by connecting the second electrode of the battery cell 10 to the second terminal P2- of the second connector 40 through the second switching unit 51. For example, the negative electrode of the battery cell 10 can be directly connected to the second terminal P2- of the second connector 40 through the second switching unit 51, or the negative electrode of the battery cell 10 can be directly connected to the second terminal P2- of the second connector 40 through other electrical components, the second switching unit 51, etc.

[0065] In this embodiment, by setting a second switching unit between the second electrode of the battery cell 10 and the second connector 40, it is possible to prevent the positive terminal of the battery cell 10 from forming a circuit through the first connector and the second connector to the negative terminal of the battery cell 10 before the battery module 1 and the motherboard 2 are fully connected, which would cause the battery cell 10 to discharge and fail or be damaged. In other words, it is ensured that the battery cell 10 can always be kept in the off state before the battery module 1 and the motherboard 2 are fully connected.

[0066] Optionally, the second switching unit 51 includes a fourth power switch Q4 and a fifth power switch Q5; the source of the fourth power switch Q4 is connected to the second electrode of the battery cell 10, the source of the fifth power switch Q5 is connected to the second connector 40, the gates of the fourth power switch Q4 and the fifth power switch Q5 are respectively connected to the battery protection chip 20, and the drain of the fourth power switch Q4 is connected to the drain of the fifth power switch Q5.

[0067] For example: the source of the fourth power switch Q4 is connected to the second electrode of the battery cell 10, the gate of the fourth power switch Q4 is connected to the first voltage control terminal CO of the battery protection chip 20, the source of the fifth power switch Q5 is connected to the second terminal P2- of the second connector 40, the gate of the fifth power switch Q5 is connected to the second voltage control terminal DO of the battery protection chip 20, and the drain of the fourth power switch Q4 is connected to the drain of the fifth power switch Q5.

[0068] When the first connector 30 and / or the second connector 40 are not connected to the motherboard 2, both the fourth power switch Q4 and the fifth power switch Q5 are in the off state. When both the first connector 30 and the second connector 40 are connected to the motherboard 2, the battery cell 10 supplies power to the battery protection chip 20, and the battery protection chip 20 outputs a second electrical signal to the fourth power switch Q4 and the fifth power switch Q5. Under the action of the second electrical signal, both the fourth power switch Q4 and the fifth power switch Q5 are in the on state. For example, the battery protection chip 20 outputs a voltage (i.e., the second electrical signal) to the fourth power switch Q4 through the first voltage control terminal CO, and outputs a voltage (i.e., the second electrical signal) to the fifth power switch Q5 through the second voltage control terminal DO, so that both the fourth power switch Q4 and the fifth power switch Q5 are in the on state.

[0069] Optionally, the boost unit 60 may employ... Figure 5 The boost circuit shown is implemented as follows. Specifically, the input terminal Vin of the boost circuit can be used as the input terminal of the boost unit 60 (for example, the input terminal of the boost unit 60 can be one connected to the first voltage control terminal CO and / or the second voltage control terminal DO); the output terminal Vout of the boost circuit can be used as the output terminal of the boost unit 60 (for example, the output terminal of the boost unit 60 can be one connected to the gate of the first power switch Q1 and / or the gate of the second power switch Q2, or it can be one connected to the gate of the third power switch Q3).

[0070] Optionally, the boost circuit can be composed of power switches Q11, Q12, Q13, Q14, and capacitors C1 and C2; wherein, the first terminal of power switch Q11 is connected to the first terminal of power switch Q13, and the first terminal of power switch Q11 forms the input terminal Vin; the first terminal of power switch Q11 is connected to the first terminal of power switch Q12 and the first terminal of capacitor C1; the second terminal of power switch Q12 is connected to the first terminal of power switch Q14 through capacitor C2, and the second terminal of power switch Q12 forms the input terminal Vin. The output terminal is Vout; the second terminal of power switch Q14 is connected to the second terminal of power switch Q13 and the second terminal of capacitor C1 respectively; the control terminals of power switch Q11 and power switch Q14 are used to input the first clock signal CLK1, and the control terminals of power switch Q12 and power switch Q13 are used to input the second clock signal CLK2. By adjusting the duty cycle of the first clock signal CLK1 and the second clock signal CLK2, the boost regulation of the boost circuit can be realized to meet the corresponding boost requirements. This application does not make specific limitations on the embodiments.

[0071] Optionally, the battery module 1 may further include at least one of a fourth resistor R4, a fifth resistor R5, and a sixth resistor R6;

[0072] The first electrode of the battery cell 10 is connected to the first connector 30 via the fourth resistor R4. For example, the positive terminal of the battery cell 10 is connected to the second terminal A of the first connector 30 via the fourth resistor R4. The fourth resistor R4 can limit current.

[0073] The second electrode of the battery cell 10 is connected to the second connector 40 via the fifth resistor R5. For example, the negative electrode of the battery cell 10 is connected to the second terminal P2- of the second connector 40 via the fifth resistor R5. Optionally, when the battery module includes a second switching unit 51, the second electrode of the battery cell 10 is connected to the second connector 40 via the fifth resistor R5 and the second switching unit 51. For example, the negative electrode of the battery cell 10 is connected to the second terminal P2- of the second connector 40 via the fifth resistor R5 and the second switching unit 51. The fifth resistor R5 can be used for overcurrent detection.

[0074] When the first switching unit 50 is positioned between the first electrode of the battery cell 10 and the first connector 30 and the second connector 40, the voltage monitoring terminal VM of the battery protection chip 20 is connected to the second connector 40 through the sixth resistor R6. For example, the voltage monitoring terminal VM of the battery protection chip 20 is connected to the second terminal P2- of the second connector 40 through the sixth resistor R6. Alternatively, when the first switching unit 50 is positioned between the battery protection chip 20 and the second connector 40, the voltage monitoring terminal VM of the battery protection chip 20 is connected to the second connector 40 through the first switching unit 50 and the sixth resistor R6. For example, the voltage monitoring terminal VM of the battery protection chip 20 is connected to the second terminal P2- of the second connector 40 through the first switching unit 50 and the sixth resistor R6. The sixth resistor R6 acts as a voltage divider.

[0075] Optionally, the power switching transistor involved in the embodiments of this application may be a metal-oxide-semiconductor field-effect transistor (MOSFET), or other forms of transistors with power switching functions may be used, and the embodiments of this application are not limited thereto.

[0076] This application provides an electronic device, including the battery module as described above, and also including the motherboard.

[0077] Specifically, the battery module can be implemented using any of the above embodiments, and the specific structure of the motherboard can be referred to the above embodiments. The electronic device can achieve the effects that the battery module can achieve. To avoid repetition, it will not be described again here.

[0078] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0079] Although preferred embodiments of the present application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present application.

[0080] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0081] The above describes the preferred embodiments of this application. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principles described in this application, and these improvements and modifications are also within the protection scope of this application.

Claims

1. A battery module, characterized in that, include: Battery cell, battery protection chip, first connector, second connector, and first switching unit; The first electrode of the battery cell is connected to the first end of the first connector and the first end of the second connector respectively through the first switching unit; the second electrode of the battery cell is connected to the second end of the second connector through the battery protection chip, wherein the voltage monitoring end of the battery protection chip is connected to the second end of the second connector; or, The first electrode of the battery cell is connected to the first end of the first connector and the first end of the second connector, respectively; the second electrode of the battery cell is connected to the second end of the second connector in sequence through the battery protection chip and the first switching unit, wherein the voltage monitoring terminal of the battery protection chip is connected to the second end of the second connector through the first switching unit; The battery protection chip is connected to the first switching unit; when the first connector and / or the second connector are not connected to the motherboard, the first switching unit is in the off state.

2. The battery module according to claim 1, characterized in that, When both the first connector and the second connector are connected to the motherboard, the battery protection chip outputs a first electrical signal to the first switching unit. The first switching unit is in a conducting state under the action of the first electrical signal, and the battery cell forms a power path with the battery management chip in the motherboard through the first connector and the second connector.

3. The battery module according to claim 2, characterized in that, The first electrode of the battery cell is also connected to the second end of the first connector, the second electrode of the battery cell is also connected to the second end of the second connector, and the power supply terminal of the battery protection chip is connected to the third end of the second connector; When both the first connector and the second connector are connected to the motherboard, the battery cell supplies power to the battery protection chip sequentially through the second end of the first connector, the motherboard, and the third end of the second connector. When the battery cell supplies power to the battery protection chip, the battery protection chip outputs the first electrical signal to the first switching unit. The first switching unit is in a conducting state under the action of the first electrical signal, forming a power path from the first electrode of the battery cell through the first switching unit, the first end of the first connector, the battery management chip, the second end of the second connector, to the second electrode of the battery cell.

4. The battery module according to claim 1, characterized in that, The first switching unit includes: a first power switch and a second power switch; The source of the first power switch is connected to the first electrode of the battery cell, the source of the second power switch is connected to the second connector, the gates of both the first and second power switches are connected to the battery protection chip, and the drain of the first power switch is connected to the drain of the second power switch. When the first connector and / or the second connector are not connected to the motherboard, both the first power switch and the second power switch are in the off state; when both the first connector and the second connector are connected to the motherboard, the battery cell supplies power to the battery protection chip, and the battery protection chip outputs a first electrical signal to the first power switch and the second power switch, and both the first power switch and the second power switch are in the on state under the action of the first electrical signal.

5. The battery module according to claim 4, characterized in that, The first switching unit further includes: a first resistor and a second resistor; The first resistor is connected between the source and drain of the first power switch, and the second resistor is connected between the source and drain of the second power switch.

6. The battery module according to claim 1, characterized in that, The first switching unit includes: a third power switching transistor; The source and gate of the third power switch are both connected to the battery protection chip, and the drain of the third power switch is connected to the second connector. Specifically, when the first connector and / or the second connector are not connected to the motherboard, the third power switch is in the off state; when both the first connector and the second connector are connected to the motherboard, the battery cell supplies power to the battery protection chip, the battery protection chip outputs a first electrical signal to the third power switch, and the third power switch is in the on state under the action of the first electrical signal.

7. The battery module according to claim 6, characterized in that, The first switching unit further includes: a third resistor; The third resistor is connected between the source and drain of the third power switch.

8. The battery module according to claim 4 or 6, characterized in that, Also includes: At least one boost unit; The first switching unit is connected to the battery protection chip via the boost unit.

9. The battery module according to claim 6, characterized in that, Also includes: Second switching unit; The second electrode of the battery cell is also connected to the second connector via the second switching unit; The battery protection chip is connected to the second switching unit; when the first connector and / or the second connector are not connected to the motherboard, the second switching unit is in the off state. When both the first connector and the second connector are connected to the motherboard, the battery cell supplies power to the battery protection chip, and the battery protection chip outputs a second electrical signal to the second switching unit. The second switching unit is in a conducting state under the action of the second electrical signal.

10. The battery module according to claim 9, characterized in that, The second switching unit includes: a fourth power switch and a fifth power switch; The source of the fourth power switch is connected to the second electrode of the battery cell, the source of the fifth power switch is connected to the second connector, the gates of the fourth power switch and the fifth power switch are respectively connected to the battery protection chip, and the drain of the fourth power switch is connected to the drain of the fifth power switch. When the first connector and / or the second connector are not connected to the motherboard, both the fourth power switch and the fifth power switch are in the off state; when both the first connector and the second connector are connected to the motherboard, the battery cell supplies power to the battery protection chip, the battery protection chip outputs a second electrical signal to the fourth power switch and the fifth power switch, and both the fourth power switch and the fifth power switch are in the on state under the action of the second electrical signal.

11. An electronic device, characterized in that, The battery module includes any one of claims 1 to 10, and also includes the motherboard.

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