Analog to digital converter (ADC) dynamic logic flipping circuit, word line voltage selection circuit and storage unit circuit
By designing the ADC dynamic logic flip circuit, using the combination of multi-stage flip circuit and capacitor, the power supply and ground fluctuations caused by the CMOS image sensor during the logic flip are solved, and the image quality is improved.
CN119729248APending Publication Date: 2025-03-28GALAXYCORE SHANGHAI
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Patent Information
- Application Number
- CN202411614246.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2016-12-30
- Publication Date
- 2025-03-28
AI Technical Summary
Technical Problem
The existing CMOS image sensors cause fluctuations at the power supply and ground during logic flips, affecting image quality.
Method used
A dynamic logic flip circuit of ADC is designed. Through the combination of multi-stage flip circuit and capacitor, the control circuit disconnects the connection to the power supply terminal and the ground terminal during the flip process to avoid fluctuations in the power supply and ground.
Benefits of technology
It effectively avoids fluctuations in power supply and ground, improves the imaging quality of the image sensor, and prevents the influence on the ADC dynamic logic flip circuit by separating the control signals of the write operation and read operation of the memory unit.
✦ Generated by Eureka AI based on patent content.
Abstract
The invention relates to an ADC dynamic logic flipping circuit, a word line voltage selection circuit and a storage unit circuit. The ADC dynamic logic flipping circuit comprises a first PMOS transistor, a source electrode of which is connected with a first power supply end, a drain electrode of which is connected with a first node, and a grid electrode of which is connected with a first control end; the source electrode of the first NMOS transistor is connected with the second power supply end, the drain electrode is connected with the second node, and the grid electrode is connected with the third node; the multiple stages of turnover circuits are connected in sequence and are connected between the first node and the second node in parallel, and the output end of the previous stage of turnover circuit is connected to the input end of the next stage of turnover circuit; the input circuit is used for providing an input signal for the first-stage turnover circuit; the first capacitor is connected between the first node and the second node. In the invention, the logic flipping circuit and the storage unit are separated from the power supply end and the ground end, and the write operation of the storage unit is separated from the read operation or reset operation control signal, so that the influence of the circuit flipping process on the power supply end and the ground end is avoided, and the imaging quality is improved.
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