Semiconductor device and preparation method thereof, and storage system
By adopting a combined design of stacked structure and through structure in dynamic random memory, the problem of limited storage density improvement in the prior art is solved, and higher storage density and lower costs are achieved.
CN119730237APending Publication Date: 2025-03-28YANGTZE MEMORY TECH CO LTD
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Patent Information
- Application Number
- CN202311280286.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-28
- Publication Date
- 2025-03-28
AI Technical Summary
Technical Problem
The storage density improvement of existing dynamic random memory is limited by the process limits and it is difficult to meet higher storage capacity and density requirements.
Method used
Using a combined design of a stacked structure and a through structure, including an interlaced conductive layer and a first gate layer, an isolation layer between them, and a channel layer and a second gate layer in the through structure, the conductive layer comes into contact with the channel layer to form a three-dimensional memory cell.
Benefits of technology
It effectively improves the storage density of semiconductor devices and reduces the cost of unit storage capacity.
✦ Generated by Eureka AI based on patent content.
Abstract
The invention provides a semiconductor device and a preparation method thereof, and a storage system, the semiconductor device comprises a stacking structure, the stacking structure comprises a plurality of conductive layers and first gate layers located between the adjacent conductive layers, the first gate layers and the conductive layers are stacked in a staggered and spaced manner in the stacking direction of the stacking structure, an isolation layer is arranged between the conductive layer and the first gate layer; the through structure penetrates through the stacking structure, the through structure comprises a channel layer and a second gate layer which extend in the stacking direction of the stacking structure, the channel layer is located between the second gate layer and the conductive layer and between the second gate layer and the first gate layer, and the first gate layer is located between the first gate layer and the second gate layer. The conductive layer is in contact with the channel layer. The storage density of the semiconductor device is effectively improved.
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