ESD protection device and manufacturing method thereof
By setting and shorting the P-type region in the N-well and P-well of the ESD protection device, the structure of a parallel PNP transistor is realized, solving the problem of SCR latch effect in ESD protection, and improving the maintenance voltage and protection ability.
CN119730390APending Publication Date: 2025-03-28CSMC TECH FAB2 CO LTD
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Patent Information
- Application Number
- CN202311238491.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-25
- Publication Date
- 2025-03-28
AI Technical Summary
Technical Problem
Existing SCRs are prone to latching effects in ESD protection, resulting in circuit failure and maintaining low voltage, limiting their application.
Method used
The second P-type region and the third P-type region are arranged in the N-well and the P-well and shorted it is equivalent to connecting a PNP transistor in parallel to provide an additional current release path when the ESD pulse is incoming.
Benefits of technology
Improves the maintenance voltage of electrostatic protection devices, improves the latch effect, and enhances the ability of ESD protection.
✦ Generated by Eureka AI based on patent content.
Abstract
The invention relates to an ESD (Electro-Static Discharge) protection device and a manufacturing method thereof. The ESD protection device comprises an N well; a P well; the first P-type region is positioned in the N well; the second P-type region is positioned in the N well; the third P-type region is positioned in the P well; the first N-type region is positioned in the P well; wherein the second P-type region is in short circuit connection with the third P-type region; the first P-type region and the N well are used for being connected with an anode, and the first N-type region and the P well are used for being connected with a cathode. According to the invention, the second P-type region is arranged in the N well, the third P-type region is arranged in the P well, and the second P-type region and the third P-type region are in short circuit, which is equivalent to parallel connection of a PNP triode. Therefore, when the ESD pulse comes, the PNP triode can be used as a newly added current release path, so that the maintaining voltage of the electrostatic protection device is improved, and the latch-up effect is improved.
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