SiC light-operated bipolar power transistor with emitter region vertical shielding well

By designing vertically arranged intrinsic isolation traps and low-doped intrinsic shielding layers in the pressure bearing area of ​​SiC photocontrolled bipolar power transistors, the problems of easy breakdown and uneven current distribution of traditional SiC power transistors under high voltage are solved, and better resistance to high voltage and shutdown control capabilities are achieved.

CN119767866AActive Publication Date: 2025-04-04XIDIAN UNIV
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Patent Information

Application Number
CN202411791563.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-12-06
Publication Date
2025-04-04
Estimated Expiration
2044-12-06

AI Technical Summary

Technical Problem

Traditional SiC power transistors have problems such as complex base area connection electrodes, uneven current distribution, and easy breakdown, especially in high-voltage applications, which are difficult to take into account both breakdown resistance and power bearing.

Method used

A SiC photo-controlled bipolar power transistor with a vertical shielding well in the emission region is designed. The current distribution and breakdown resistance are optimized by distributing multiple intrinsic isolation wells in the pressure bearing area and providing a low-doped intrinsic shielding layer on the entire surface.

Benefits of technology

It improves the high voltage resistance of the power transistor, better control and shutdown capability, simpler circuit design, and significantly improves the breakdown voltage performance.

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Abstract

The invention discloses a SiC light-operated bipolar power transistor with an emitter region vertical shielding well, which comprises emitter metal, an n-type substrate, an n-type emitter region, an n-type pressure-bearing region, a plurality of isolation wells distributed at intervals in a top region of the n-type pressure-bearing region, and an n-type shielding layer arranged on the whole surface of the n-type pressure-bearing region, the p-type base region is arranged in the central region of the surface of the n-type shielding layer, the n-type collector region is positioned above the p-type base region, the collector metal is positioned in the central region of the surface of the n-type collector region, and the SiO2 oxide layer is arranged around the surface layer; the n-type substrate is made of a 4H-SiC material; the isolation well and the n-type shielding layer are in an eigenstate; and the SiO2 oxide layer is arranged on the surface of the p-type base region except the collector metal region, is arranged on the outer sides of the p-type base region and the n-type collector region, and is in contact with the surface of the n-type shielding layer. According to the invention, the high-voltage resistance of the power transistor can be improved, the turn-off control capability is better, and the circuit design is simpler.
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