Display panel and display device

Abstract

Embodiments of the present application disclose a display panel and a display device. The display panel comprises a display area, the display area comprising a plurality of pixel units arranged in an array, the pixel units being configured to perform image display according to data signals. Each pixel unit comprises a driving unit and an adjusting unit. The adjusting unit is connected to a scan line and a data line, configured to receive an image signal from the data line under the control of a scan signal output by the scan line during a data loading period, and transmit the image signal to the driving unit. The driving unit is connected to the scan line and a first power supply terminal, configured to receive the image signal from the adjusting unit under the control of the scan signal during the data loading period, and output a driving current to a light emitting element under the cooperation of the image signal and the first power supply during a light emitting period, so as to drive the light emitting element to emit light corresponding to the image signal to display an image, and cut off the transmission of a leakage current from the adjusting unit to the data line during the light emitting period, so that the display effect of the display panel and the display device is better.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel and a display device. BACKGROUND

[0002] Organic light-emitting diode (OLED) as a current light-emitting device has been more and more applied to high-performance display devices, and has become a mainstream display device due to its self-luminous, ultra-thin, bendable, bright color, wide viewing angle, high contrast and other advantages.

[0003] In the process of displaying the OLED display panel, the switching transistor for driving in the pixel unit drives the light-emitting device OLED to emit light according to the data signal. However, since the switching transistor for driving still has the phenomenon of leakage current transmission in the off state, the driving current provided for driving the light-emitting device OLED has poor stability, the luminous brightness is uneven, and thus the image display effect of the OLED display panel is poor. SUMMARY

[0004] In view of the above technical deficiencies, the present application provides a display panel and a display device with better image display effect.

[0005] The present application provides a display panel, comprising a display area, the display area comprising a plurality of pixel units arranged in an array, the pixel units being used to perform image display according to data signals, comprising, the pixel units comprising a driving unit and an adjusting unit, the adjusting unit being connected to a scan line and a data line, for receiving an image signal from the data line under the control of a scan signal output by the scan line in a data loading period, and transmitting the image signal to the driving unit, the driving unit being connected to the scan line and a first power supply terminal, for receiving the image signal from the adjusting unit under the control of the scan signal in the data loading period, cooperating with the first power supply in a light-emitting period to output a driving current to a light-emitting element, so as to drive the light-emitting element to emit light corresponding to the image signal to display an image, and cutting off the leakage current transmission from the adjusting unit to the data line in the light-emitting period.

[0006] In an embodiment of the present application, the adjusting unit is further used to provide a compensation current to the driving unit in the light-emitting period, the compensation current being the same in size as the leakage current transmitted by the driving unit to the adjusting unit.

[0007] In an embodiment of the present application, the driving unit comprises a control switch tube, a driving switch tube and a first energy storage element. The driving switch tube is connected to the control switch tube through a first node, connected to the first power supply end through a second node, and connected to the light emitting element through a driving node. The first energy storage element is connected to the first node and the second node. The control switch tube is connected to the scanning line, the first node and a third node. The control switch tube is used to receive the image signal from the adjusting unit under the control of the scanning signal during the data loading period. The image signal is directly stored as a data signal in the first energy storage element. The first energy storage element controls the voltage of the first node to be a data voltage corresponding to the data signal. The data voltage cooperates with the first power supply to output the driving current.

[0008] In an embodiment of the present application, the adjusting unit comprises at least one unidirectional conductive element between the data line and the third node. The unidirectional conductive element is used to control the data line to transmit the image signal to the third node, and to cut off the leakage current transmission from the adjusting unit to the data line.

[0009] In an embodiment of the present application, the adjusting circuit further comprises a data loading switch tube, an adjusting switch tube, a second energy storage element and a third energy storage element. The data loading switch tube is connected to the data line, the unidirectional conductive element and the scanning line, and is used to be turned on under the control of the scanning signal during the data loading period, so as to load the data voltage corresponding to the data signal from the data line to the third node through the unidirectional conductive element. The adjusting switch tube is connected to the scanning line, the third node and a buffer node, and is used to be turned on when the scanning signal is received during the data loading period, so as to transmit the data voltage received by the third node to the buffer node and the control switch tube. The energy storage element is connected to the buffer node, and is used to store the data voltage when the data voltage is loaded in the buffer node, and to maintain the voltage of the buffer node as the data voltage. The third energy storage element is connected between the buffer node and the first node, and is used to control the voltages of the buffer node and the first node to be the same, and to control the voltages of the buffer node and the first node to be greater than the voltage of the third node.

[0010] In an embodiment of the present application, the driving unit comprises a control switch tube, a driving switch tube and a first energy storage element. The driving switch tube is connected to the control switch tube through a first node, connected to the first power supply end through a second node, and connected to the light emitting element through a driving node. The first energy storage element is connected to the first node and the second node. The control switch tube is connected to a compensation scan line, the first node and a third node. The compensation scan line is used to output a compensation scan signal in a first time period of the data writing period. The control switch tube is used to receive a compensation data signal from the adjusting unit as the image signal under the control of the compensation scan signal in the first time period, convert the compensation data signal into a data signal and store the data signal in the first energy storage element, and control the voltage of the first node to be a data voltage corresponding to the data signal, which is used to cooperate with the driving power supply to provide the driving current corresponding to the data signal.

[0011] In an embodiment of the present application, the adjusting unit comprises at least one unidirectional conductive element between the data line and the third node. The unidirectional conductive element is used to control the data line to transmit the image signal to the third node, and cut off the leakage current transmission from the adjusting unit to the data line.

[0012] In an embodiment of the present application, the adjusting circuit further comprises a data loading switch tube, an adjusting switch tube and a second energy storage element. The data loading switch tube is connected to the data line, the unidirectional conductive element and the scan line, and is used to be turned on under the control of the scan signal in the first time period and the second time period of the data loading period, so as to load a compensation data voltage corresponding to the compensation data signal received from the data line to the third node through the unidirectional conductive element. The first time period and the second time period are sequentially arranged and continuous in time. The adjusting switch tube is connected to the scan line, the third node and a buffer node, and is used to be turned on when the scan signal is received in the first time period and the second time period, so as to transmit the compensation data voltage received by the third node to the buffer node and the control switch tube. In the first time period, the compensation data voltage is converted into a data voltage by the control switch tube and the first energy storage element and loaded to the first node. The second energy storage element is connected to the buffer node, and is used to store the data voltage when the data voltage is loaded to the buffer node, and maintain the voltage of the buffer node to be a compensation data voltage corresponding to the compensation data signal.

[0013] In an embodiment of the present application, the compensation data voltage corresponding to the compensation data signal is greater than the data voltage.

[0014] In an embodiment of the present application, the compensation scanning signal is a pulse signal with the same potential as the compensation signal, wherein the pulse signal of the compensation scanning signal has a first duration, and the pulse signal of the scanning signal has a duration of the first duration plus the second duration.

[0015] The compensation data signal corresponds to the threshold voltage variation of the driving switch tube, and in the light emitting period, the adjustment switch tube provides a compensation current corresponding to the drain current transmitted by the driving switch tube according to the compensation data voltage.

[0016] In a second aspect, the present application provides a display device, comprising a power module and the display panel as described above, wherein the power module is used to provide driving power for the display panel to display images.

[0017] Compared with the prior art, since the pixel unit in the present application can cut off the drain current transmitted by the driving unit to the data line in the light emitting period when the light emitting element performs light emitting to display images, the driving unit can accurately provide driving current to the light emitting element according to the data signal, the driving current output to the light emitting element is relatively stable, the pixel unit can accurately perform image display, the uniformity of the image display brightness of the display panel is ensured, and the effect is better.

[0018] Further, the adjustment unit also provides the driving unit with a compensation current, further ensuring the working stability and reliability of the adjustment unit, and ensuring that the output driving current is more stable. BRIEF DESCRIPTION OF DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced as follows. Obviously, the drawings in the following description are some embodiments of the present application, and other drawings can also be obtained by those skilled in the art without creative labor.

[0020] Figure 1 A structural schematic diagram of a display device provided by the present application is shown in the figure.

[0021] Figure 2 A structural schematic diagram of a display device provided by the present application is shown in the figure. Figure 1 A planar layout structural schematic diagram of the display panel is shown in the figure.

[0022] Figure 3 A structural schematic diagram of a display device provided by the present application is shown in the figure. Figure 1 A circuit structural schematic diagram of any one of the pixel units is shown in the figure.

[0023] Figure 4 A driving timing diagram of the pixel unit during image display is shown in the figure. Figure 3

[0024] ​Figure 5 Fig. 1 shows a schematic diagram of a current flow in a pixel unit during an image display process; Figure 3

[0025] Figure 6 Fig. 2 shows a schematic diagram of a current-voltage change in a control switch during operation in the pixel unit shown in Fig. 1; Figure 5

[0026] Figure 7 Fig. 3 shows a circuit block diagram of a pixel unit in a display panel shown in Fig. 1; Figure 2

[0027] Figure 8 Fig. 4 shows a timing diagram of the operation of the pixel unit shown in Fig. 1; Figure 7

[0028] Figure 9 Fig. 5 shows a schematic diagram of a planar layout structure of a display panel shown in Fig. 1; Figure 1

[0029] Figure 10 Fig. 6 shows a schematic diagram of a circuit structure of a pixel unit in a display panel shown in Fig. 1; Figure 9

[0030] Figure 11 Fig. 7 shows a timing diagram of the operation of the pixel unit shown in Fig. 1; Figure 10

[0031] Figure 12 Fig. 8 shows a schematic diagram of an operating state of the pixel unit shown in Fig. 1. Figure 10

[0032] BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Display device - 100, display panel - 10, power supply module - 20, support frame - 30, display area - 10a, non-display area - 10b, pixel unit - P, first direction - F1, second direction - F2, data line - D1 ~ Dm, data line - Di, scan line - G1 ~ Gn, scan signal - Gsi, compensation scan line - Gct1 ~ Gctn, data line - D1 ~ Dm, timing control circuit - 11, data drive circuit - 12, scan drive circuit - 13, control switch - M1, drive switch - M2, first energy storage element - C1, first node - N1, second node - N2, drive node - Nd, third node - N3, first power supply terminal - VDD, second power supply terminal - VSS, light emitting element - L, data loading stage - Td, light emitting period - Te, leakage current - I leak ​​​​​​​​, compensation current -Icp, data voltage -Vdata, voltage of the first node -Va, driving unit -200, adjusting unit -300, data loading switch tube -M3, data loading control end -M30, first data loading conductive end -M31, second data loading conductive end -M32, adjusting switch tube -M4, adjusting control end -M40, first adjusting conductive end -M41, second adjusting conductive end -M42, unidirectional conductive element D1, first conductive end -D11, second conductive end -D12, second energy storage element -C2, third energy storage element -C3, buffer node -Nh. DETAILED DESCRIPTION

[0034] For the purpose of promoting an understanding of the application, the application will now be described in greater detail with reference to the figures. The preferred embodiments of the application are illustrated in the figures. However, the application can be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and fully convey the scope of the application to those skilled in the art.

[0035] The following description of several embodiments with reference to the additional drawings is used to illustrate specific embodiments in which the application can be implemented. The serial numbers of the components in this paper, such as "first", "second", etc., are only used to distinguish the described objects, and do not have any order or technical meaning. The "connection" and "coupling" mentioned in this application, unless otherwise specified, include direct and indirect connection (coupling). The direction of the terms mentioned in this application, such as "up", "down", "front", "back", "left", "right", "inside", "outside", "side" and the like, are only with reference to the direction of the additional drawings. Therefore, the direction of the terms used is to better, more clearly illustrate and understand the application, and is not intended to indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as a limitation on the application.

[0036] In the description of the application, it should be noted that unless otherwise specified and limited, the terms "mounting", "connection" and "connection" should be broadly understood, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected; it can be directly connected, or indirectly connected through an intermediate medium; it can be the communication between two elements. For those skilled in the art, the specific meaning of the above terms in this application can be understood according to the specific circumstances. It should be noted that the terms "first", "second" and the like in the specification and claims of the application and the drawings are used to distinguish different objects, and are not used to describe a specific order.

[0037] Further, the terms "include", "may include", "comprise", or "may comprise" used in the present application indicate the presence of the corresponding function, operation, element, etc. disclosed in the specification, and do not limit other one or more functions, operations, elements, etc. Further, the terms "include" or "comprise" indicate the presence of the corresponding feature, number, step, operation, element, component, or combination thereof disclosed in the specification, and do not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, components, or combinations thereof, and are intended to cover non-exclusive inclusion. Further, when describing embodiments of the present application, "may" is used to indicate "one or more embodiments of the present application". Also, the term "exemplary" is intended to mean example or an illustration.

[0038] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which the present application belongs. The terminology used in the description of the present application herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present application.

[0039] Referring to Figure 1 , Figure 1 A structural schematic diagram of a display device is provided in the present application. The display device 100 comprises a display panel 10 and a power module (not labeled), which is arranged on the back of the display panel 10, i.e. the non-display surface of the display panel 10. The power module is used to provide a power voltage for the display panel 10 to display images. In other embodiments of the present application, the display device 100 can be a desktop computer, a portable electronic device, such as a mobile phone, a tablet computer, etc.

[0040] Referring to Figure 2 , Figure 2 A structural schematic diagram of a planar layout of the display panel 10 is shown. Figure 1

[0041] As shown in Figure 2 , the display area 10a of the display panel 10 comprises a plurality of n*m pixel units P arranged in a matrix, m data lines D1-Dm, and n scan lines G1-Gn, where m and n are natural numbers greater than 1.

[0042] Among them, the n scan lines G1-Gn extend along the first direction F1 and are insulated and arranged in parallel along the second direction F2, the m data lines D1-Dm extend along the second direction F2 and are insulated and arranged in parallel along the first direction F1, and the first direction F1 and the second direction F2 are perpendicular to each other.

[0043] ​Corresponding to the non-display area 10b of the display panel 10, the display device 100 further comprises a timing control circuit 11, a data driving circuit 12 and a scan driving circuit 13 arranged in the display panel 10 for driving the pixel unit P to display images.

[0044] The timing control circuit 11 is electrically connected to the data driving circuit 12 and the scan driving circuit 13, for receiving the encoded image signals of RGB from outside, and outputting corresponding clock signals, synchronization signals and decoded image signals (data signals Data) to the data driving circuit 12 and the scan driving circuit 13, so as to control the working timing of the two, specifically, the timing control circuit 11 outputs corresponding timing control signals to the data driving circuit 12 and the scan driving circuit 13, so as to control when the scan driving circuit 13 outputs corresponding scan signals and control when the data driving circuit 12 outputs corresponding image signals Data.

[0045] The data driving circuit 12 is electrically connected to the m data lines D1-Dm, for transmitting the image signals to be displayed to the plurality of pixel units P in the form of data voltages corresponding to the analog form of the data signals Data through the m data lines D1-Dm.

[0046] The scan driving circuit 13 is electrically connected to the n scan lines G1-Gn, for outputting scan signals to the pixel units P through the n scan lines G1-Gn, so as to control when the pixel units P receive the data signals Data. The scan driving circuit 13 outputs scan signals from the scan lines G1, G2, …, Gn in turn according to the time-continuous scan periods within each frame image display period, from the scan lines G1, G2, …, Gn in the order of the position arrangement sequence.

[0047] Please refer to Figure 3 , Figure 3 for Figure 1 the circuit structure diagram of any one of the pixel units, as Figure 3 shown, the pixel unit P comprises a control switch tube M1, a driving switch tube M2 and a first energy storage element C1.

[0048] The driving switch tube M2 is connected to the control switch tube M1 through a first node N1, and the driving switch tube M2 is also connected to a first power supply end VDD through a second node N2, and connected to a light emitting element L through a driving node Nd. The light emitting element L is connected to the driving node Nd and a second power supply end VSS. The first energy storage element C1 is connected to the first node N1 and the second node N2. In this embodiment, the light emitting element L is a light emitting diode, wherein the anode of the light emitting diode as the light emitting element L is connected to the driving node Nd, and the cathode is connected to the second power supply end VSS, and the second power supply end VSS can be a ground end GND.

[0049] The control switch Ml is connected to the data line Dj, the scan line Gi and the first node Nl, and is used to receive the scan signal Gsi and the data signal Data during the data writing period of a frame image display period, and the scan signal Gsi is used to control the corresponding control switch Ml to transmit the received data signal Data to the first energy storage element C l, and the data signal Data is used to control the drive switch M2 to output the corresponding drive current to the light emitting element L from the drive power Ids provided by the first power supply end VDD during the light emitting period of a frame image display period, so as to drive the light emitting element L to emit light and display images.

[0050] In this embodiment, the control switch Ml and the drive switch M2 are P-type low temperature poly-silicon (LTPS) thin film transistors. Of course, in other embodiments of the present application, the control switch Ml and the drive switch M2 can also be N-type LTPS thin film transistors.

[0051] Please refer to Figures 4-6 together, Figure 4 for Figure 3 the driving timing diagram during the image display process of the pixel unit shown, Figure 5 for Figure 3 the current flow direction diagram of the pixel unit shown during the image display process; Figure 6 for Figure 5 the current-voltage change diagram of the control switch Ml in the pixel unit shown during operation.

[0052] As Figure 4 shown, in any frame image period, each pixel unit includes at least a data loading stage Td and a light emitting stage Te which are continuous in time and arranged in sequence.

[0053] As Figure 5 shown, in the data loading stage Td, the scan line Gi outputs the scan signal Gsi to the control switch Ml, and the control switch Ml is turned on under the control of the scan signal Gsi, and the data signal Data is transmitted to the first energy storage element C l connected to the first node Nl through the control switch Ml for storage. It can be understood that the first energy storage element C l can maintain the voltage of the first node Nl as the data voltage Vdata corresponding to the data signal Data within a predetermined period.

[0054] During the light-emitting period Te, the scan line Gi stops outputting the scan signal Gsi, controlling the switch M1 to turn off, and driving the switch M2 to turn on under the control of the data voltage Vdata at the first node N1. The driving power supply VDD, in conjunction with the data voltage, continuously provides the driving current Ids to the light-emitting element L. The driving current Ids provided to the light-emitting element L is controlled by the driving transistor M2, and it satisfies the following formula (1):

[0055]

[0056] Where VDD is the voltage provided by the driving power supply, W and L are the width and length of the conductive channel of the driving switch M2, μ is the effective carrier mobility of the driving switch M2, Cox is the capacitance per unit area of ​​the gate oxide layer in the driving switch M2, Vdata is the data voltage Vdata corresponding to the input data signal Data, and Vth is the threshold voltage of the driving switch M2.

[0057] During the data loading phase Td, after the control switch M1 is turned on, the data signal Data provided by the data line Dj is transmitted along the arrow direction to the first energy storage element C1 connected to the first node N1, making the voltage Va of the first node N1 the same as the data voltage Vdata of the data signal Data. At this time, the voltage Va of the first node N1 serves as the turn-off voltage (Voff) for driving the switch M2. That is, the voltage Va of the first node N1 has not yet reached the threshold voltage for driving the switch M2, and the drive switch M2 is in the off state and not turned on.

[0058] like Figures 5-6 As shown, during the light-emitting stage Te, when the scan line Gi does not output the scan signal Gsi, the control switch M1 is turned off, and the first energy storage element C1 maintains the voltage Va of the first node N1, causing the drive switch M2 to be in the conducting state. The voltage Va of the first node N1 reaches the turn-on voltage (Von) of the drive switch M2. Due to the characteristics of the control switch M1 itself, there are turn-on delay and turn-off delay during the light-emitting stage Te.

[0059] However, because the control switch M1 still has some leakage current I when it is turned off. leak If the data voltage Vdata in data line Dj is greater than the voltage Va of the first node N1, then the leakage current I... leak The flow direction is from data line Dj to the first energy storage element C1. If the voltage Va of the first node N1 is greater than the data voltage Vdata in data line Dj, then the leakage current I... leak The energy flows from the first energy storage element C1 to the control switch M1, thereby reducing the leakage current I of the control switch M1. leak It will transmit data on line Dj. Therefore, it controls the leakage current I of switching transistor M1.leak The voltage across the first energy storage element C1 will be affected, and thus the voltage Va of the first node N1 will change, which directly affects the opening degree of the driving switch M2 and the size of the driving current Ids, and thus affects the brightness accuracy of the light emitted by the light emitting element L. At the same time, the drain current I leak will affect the data voltage Vdata on the data line Dj, thereby affecting the accurate transmission of the data signal Data. It can be understood that the drain current I leak is the current transmitted between the drain and the source of the control switch M1 when the control switch M1 is turned off.

[0060] It can be seen that due to the large drain current of the thin film transistor of LTPS, especially in the low-frequency (low refresh rate) display state, the large drain current easily causes the gate and source potential difference of the driving transistor M2 to be unstable, causing the driving current Ids of the OLED light emitting element to be unstable, and the display device 100 to flicker. At the same time, the drain current I leak will affect the data voltage Vdata on the data line Dj, thereby affecting the accurate transmission of the data signal Data, causing the image to be unable to be normally and accurately displayed, and the display effect to be poor.

[0061] The pixel unit P provided by the embodiments of the present application can effectively slow down or eliminate the drain current I leak of the control switch M1, thereby affecting the driving current Ids and the data signal Data on the data line Dj, so that the brightness of each pixel unit P in the display area 10a of the entire display panel 10 is more uniform, and the display effect is better.

[0062] Specifically, please refer to Figure 7 , which is a circuit structure schematic diagram of the pixel unit P in the display panel 10 as shown in Figure 2 . As shown in Figure 7 , the pixel unit P includes a driving unit 200 and an adjusting unit 300, wherein the adjusting unit 300 is connected between the driving unit 200 and the data line Dj, and the adjusting unit 300 and the driving unit 200 are connected to the scan line Gi together, and the adjusting unit 300 is used to provide a compensation current Icp to the driving unit 200 during the light emitting period Te( Figure 8 ) to compensate for the drain current I leak generated by the driving unit 200 when working, thereby improving the working stability and accuracy of the driving unit 200.

[0063] Specifically, the driving unit 200 comprises a control switch tube M1, a driving switch tube M2 and a first energy storage element C1. The driving switch tube M2 is connected to the control switch tube M1 through a first node N1, and is also connected to a first power terminal VDD through a second node N2, and is connected to the light emitting element L through a driving node Nd. The light emitting element L is connected to the driving node Nd and a second power terminal VSS. The first energy storage element C1 is connected to the first node N1 and the second node N2.

[0064] The control switch tube M1 is connected to the first node N1 and a scan line Gi, and is connected to the adjusting unit 300 through a third node N3, for receiving a scan signal Gsi from the scan line Gi and a data signal Data from the adjusting unit 300 in a data loading stage Td of a frame image display period. The scan signal Gsi is used to control the corresponding control switch tube M1 to transmit the received data signal Data to the first energy storage element C1. The data signal Data is used to control the driving switch tube M2 to output a corresponding driving current Ids to the light emitting element L from the driving power provided by the first power terminal VDD in a light emitting stage Te of the frame image display period, so as to drive the light emitting element L to emit light and display images.

[0065] In the embodiment, the control switch tube M1 and the driving switch tube M2 can be low temperature polysilicon (LTPS) thin film transistors of N type or P type. The gate of the control switch tube M1 and the driving switch tube M2 can be used as a control terminal, and the source and the drain can be used as conductive terminals respectively. Specifically, the gate of the control switch tube M1 is connected to the scan line Gi as a control terminal, and the source and the drain are connected to the data line Dj and the first node N1 as conductive terminals respectively. The gate of the driving switch tube M2 is connected to the first node N1 as a control terminal, and the source and the drain are connected to the second node N2 and the driving node Nd as conductive terminals respectively.

[0066] The adjusting unit 300 comprises a data loading switch tube M3, an adjusting switch tube M4, a unidirectional conductive element D1, a second energy storage element C2 and a third energy storage element C3.

[0067] The data loading switch tube M3 is connected to the data line Dj, the unidirectional conductive element D1 and the scan line Gi, for receiving the data signal Data from the data line Dj in the data loading stage Td, and transmitting the data signal Data to the driving unit 200 through the unidirectional conductive element D1 and the third node N3.

[0068] The data loading switch tube M3 includes a data loading control end M30, a first data loading conductive end M31, and a second data loading conductive end M32. The data loading control end M30 is connected to the scan line Gi. The first data loading conductive end M31 is connected to the data line Dj. The second data loading conductive end M32 is connected to the unidirectional conductive element D1. The data loading switch tube M3 is turned on under the control of the scan signal Gsi output by the scan line Gi. When the data loading switch tube M3 is turned on, the data signal Data provided by the data line Dj is transmitted to the unidirectional conductive element D1 through the data loading switch tube M3.

[0069] In this embodiment, the data loading switch tube M3 is an N-type LTPS thin film transistor. The gate of the data loading switch tube M3 is connected to the data loading control end M30. The source and the drain of the data loading switch tube M3 are connected to the first data loading conductive end M31 and the second data loading conductive end M32, respectively. When the data loading switch tube M3 is an N-type transistor, the corresponding scan signal Gsi is a high-potential pulse signal.

[0070] In other embodiments of the present application, the data loading switch M3 can also be a P-type LTPS thin film transistor. In this case, the corresponding scan signal Gsi is a low-potential pulse signal.

[0071] The unidirectional conductive element D1 is connected between the data loading switch M3 and the third node N3. The unidirectional conductive element D1 is used to unidirectionally transmit the data signal Data to the third node N3 and the driving unit 200, and prevent the current in the driving unit 200 from being transmitted to the data loading switch M3 and the data line Dj through the third node N3.

[0072] The unidirectional conductive element D1 includes a first conductive end D11 and a second conductive end D12. The first conductive end D11 is connected to the second data loading conductive end M32 of the data loading switch tube M3. The second conductive end D12 is connected to the third node N3. The unidirectional conductive element D1 is used to limit the current direction to be from the first conductive end D11 to the second conductive end D12, and block the current from flowing from the second conductive end D12 to the first conductive end D11, so as to block the leakage current transmitted by the driving unit 200 from the data line Dj.

[0073] In this embodiment, the unidirectional conductive element D1 is a diode. The first conductive end D11 is the anode of the diode. The second conductive end D12 is the cathode of the diode.

[0074] The adjustment switch tube M4 is connected to the scan line Gi, the third node N3, and the buffer node Nh. The adjustment switch tube M4 is used to transmit the data voltage Vdata received by the third node N3 to the buffer node Nh when the scan signal Gsi is received.

[0075] The adjusting switch M4 includes an adjusting control terminal M40, a first adjusting conductive terminal M41 and a second adjusting conductive terminal M42. The adjusting control terminal M40 is connected to the scan line Gi. The first adjusting conductive terminal M41 is connected to the third node N3. The second adjusting conductive terminal M42 is connected to the buffer node Nh. The adjusting switch M4 is turned on under the control of the scan signal Gsi output by the scan line Gi. When the adjusting switch M4 is turned on, the data voltage Vdata loaded by the third node N3 is transmitted to the buffer node Nh through the adjusting switch M4. Correspondingly, when the adjusting switch M4 stops receiving the scan signal Gsi, it is turned off.

[0076] In the embodiment, the adjusting switch M3 is an N-type LTPS thin film transistor. The gate of the adjusting switch M3 can be directly connected to the adjusting control terminal M40. The source and the drain of the adjusting switch M3 are respectively the first adjusting conductive terminal M51 and the second adjusting conductive terminal M42. The source and the drain of the adjusting switch M3 are respectively directly connected to the first adjusting conductive terminal M51 and the second adjusting conductive terminal M42. When the adjusting switch M4 is an N-type transistor, the corresponding scan signal Gsi is a high potential pulse signal.

[0077] In other embodiments of the present application, the adjusting switch M4 can also be a P-type LTPS thin film transistor. The corresponding scan signal Gsi is a low potential pulse signal.

[0078] The second energy storage element C2 is connected between the buffer node Nh and the ground terminal GND. The second energy storage element C2 is used to maintain the voltage of the buffer node Nh as the data voltage Vdata for a preset period after the adjusting switch M4 receives the data signal Data. In the embodiment, the second energy storage element C2 is a capacitor.

[0079] The third energy storage element C3 is connected between the buffer node Nh and the first node N1. The third energy storage element C3 is used to maintain the voltage of the buffer node Nh same as that of the first node N1. In the embodiment, the third energy storage element C3 is a capacitor.

[0080] Please refer to Figures 7-8 , wherein, Figure 8 is as shown in the pixel unit P working timing diagram. Figure 7

[0081] ​In the data loading stage Td, the scan line Gi outputs a scan signal Gsi to the control switch tube M1, the data loading switch tube M3 and the adjusting switch tube M4, and the control switch tube M1, the data loading switch tube M3 and the adjusting switch tube M4 are turned on under the control of the scan signal Gsi, the data signal Data is transmitted to the third node N3 through the data loading switch tube M3 and the unidirectional conducting element D1, and is transmitted to the first node N1 and the buffer node Nh respectively through the third node N3, and the first energy storage element C1 and the second energy storage element C2 store the data voltage Vdata corresponding to the data signal Data respectively, so that the voltages of the first node N1, the third node N3 and the buffer node Nh are all the data voltage Vdata.

[0082] In the light emitting stage Te, the scan line Gi stops outputting the scan signal Gsi, and the control switch tube M1, the data loading switch tube M3 and the adjusting switch tube M4 are all turned off, the drive switch tube M2 is turned on under the control of the data voltage Vdata of the first node N1, and the first power supply end VDD provides the driving power source to continuously provide the driving current Ids to the light emitting element L in cooperation with the data voltage.

[0083] At the same time, since the third energy storage element C3 is connected between the buffer node Nh and the first node N1, the voltages of the buffer node Nh and the first node N1 are the same and are the data voltage Vdata, and the drain current of the adjusting switch tube M4 flows from the buffer node Nh to the third node N3 as the compensation current Icp, at the same time, the drain current I leak of the control switch tube M1 in the drive unit 200 also flows from the first node N1 to the third node N3. Among them, the compensation current Icp transmitted from the buffer node Nh to the third node N3 through the adjusting switch tube M4 and the drain current I leak transmitted from the drive unit 200 to the third node N3 are basically the same in size, but opposite in direction, so as to be offset at the third node N3, and further to ensure that the voltage Va of the first node N1 does not change, that is, the compensation current Icp provided by the adjusting switch tube M4 offsets the drain current I leak transmitted from the drive unit 200 to the data line Dj, so as to maintain the voltage of the first node N1 at the data voltage Vdata, so that the gate-source voltage of the drive switch tube M2 in the drive unit 200 is stable, and the output driving current Ids is also relatively stable.

[0084] Please refer to Figure 9 , Figure 9 the planar layout structure diagram of the display panel 20 shown in FIG. 2B. Figure 1

[0085] In this embodiment, Figure 9 ​The structure of the display panel 20 shown is substantially the same as Figure 2 The structure of the display panel 10 shown is substantially the same as the display panel 20, with the difference being that in the display area 10a, n compensation scan lines Gc1-Gcn are connected to the pixel units P, and the data lines D1-Dm are used to output compensation data signals Tdata corresponding to the image signals to the pixel units P. In response to the compensation data signals Tdata, the pixel units P can obtain data voltages Vdata corresponding to the data signals Data according to the compensation data signals Tdata, and obtain corresponding drive currents Ids in cooperation with the drive power supply. It can be understood that in this embodiment, the compensation data voltages Vcp corresponding to the compensation data signals Tdata are greater than the data voltages Vdata corresponding to the data signals Data.

[0086] Specifically, as shown in Figure 9 The display area 10a of the display panel 10 includes a plurality of n*m pixel units P arranged in a matrix, m data lines D1-Dm, n scan lines G1-Gn, and n compensation scan lines Gc1-Gcn, where m and n are natural numbers greater than 1.

[0087] The n scan lines G1-Gn and the n compensation scan lines Gc1-Gcn extend along a first direction F1 and are arranged in parallel and insulated from each other along a second direction F2, the m data lines D1-Dm extend along the second direction F2 and are arranged in parallel and insulated from each other along the first direction F1, and the first direction F1 and the second direction F2 are perpendicular to each other. The pixel units P are located at the intersection positions of the scan lines and the data lines, and each pixel unit P is connected to at least one scan line Gi, one data line Dj, and one compensation scan line Gci.

[0088] Corresponding to the non-display area 10b of the display panel 20, further includes a timing control circuit 11 for driving the pixel units P to display images, a data driving circuit 12, and a scan driving circuit 13 arranged in the display panel 20.

[0089] The timing control circuit 11 is electrically connected to the data driving circuit 12 and the scan driving circuit 13, and is used to control the reception of the encoded image data signals RGB from the outside, which are used to output corresponding clock signals, synchronization signals, and decoded data signals Data to the data driving circuit 12 and the scan driving circuit 13, respectively, to control the working timing of the two, specifically, the timing control circuit 11 outputs corresponding timing control signals to the data driving circuit 12 and the scan driving circuit 13, to control when the scan driving circuit 13 outputs corresponding scan signals and to control when the data driving circuit 12 outputs compensation data signals (Tdata) corresponding to the image signals.

[0090] The data driving circuit 12 is electrically connected with the m data lines D1-Dm, and is configured to transmit the compensation data signal (Tdata) to be displayed to the plurality of pixel units P in the form of data voltage corresponding to the analog form of the data signal through the m data lines D1-Dm. In the embodiment, the compensation data signal Tdata is a compensation data signal provided according to the threshold voltage drift of the driving switch tube M2 in the pixel unit P, that is, the compensation data signal Tdata corresponds to the threshold voltage change of the driving switch tube M2.

[0091] The pixel unit P obtains the data signal Data corresponding to the expected target according to the compensation data signal Tdata, so that the data signal Data cooperates with the driving power supply to provide the driving current Ids for the light emitting element L.

[0092] The scan driving circuit 13 is electrically connected with the n scan lines G1-Gn and the n compensation scan lines Gc1-Gcn, and is configured to output the scan signal through the n scan lines G1-Gn and output the compensation scan signal through the n compensation scan lines Gc1-Gcn to the pixel unit P, so as to control when the pixel unit P receives the compensation data signal Tdata.

[0093] Specifically, referring to Figure 10 , which is a schematic diagram of the circuit structure of the pixel unit P in the display panel 20 as shown in Figure 9 . In the embodiment, Figure 10 , the pixel unit P and Figure 7 the circuit structure of the pixel unit P are basically the same, and the only difference is that the adjustment unit 300 does not include the third energy storage element C3, and at the same time, the scan signal received by the control switch tube M1 in the driving unit 200 is different.

[0094] The pixel unit P includes the driving unit 200 and the adjustment unit 300, wherein the adjustment unit 300 is connected between the driving unit 200 and the data line Dj, and the adjustment unit 300 and the driving unit 200 are respectively connected to the different scan line Gi and the compensation scan line Gci, and the adjustment unit 300 is configured to compensate the leakage current generated when the driving unit 200 works, so as to improve the working stability and accuracy of the driving unit 200.

[0095] As shown in Figure 10 , the driving unit 200 includes the control switch tube M1, the driving switch tube M2, the light emitting element L, and the first energy storage element C1. The control switch tube M1 is connected with the compensation scan line Gci, the third node N3, and the first node N1. The driving switch tube M2 is connected to the control switch tube M1 through the first node N1, and the driving switch tube M2 is also connected to the first power supply end VDD through the second node N2, and is connected to the light emitting element L. The light emitting element L is also connected to the second power supply end VSS. The first energy storage element C1 is connected between the first node N1 and the second node N2.

[0096] More specifically, the control switch Ml is connected to the first node Nl, the compensation scan line Gci and the adjusting unit 300, for receiving the scan signal Gti from the compensation scan line Gci and the compensation data signal Tdata from the adjusting unit 300 in the data loading stage Td of the image display period, and for providing the data voltage Vdata corresponding to the data signal Data to the first node Nl through the adjusting unit 300 and the control switch Ml cooperating with the scan signal Gsi and the compensation scan signal Gti, and for storing the data voltage Vdata corresponding to the data signal Data through the first energy storage element Cl, the data signal Data being used for controlling the drive switch M2 to provide the driving current corresponding to the driving power output from the first power supply end VDD to the light emitting element L in the light emitting stage Te of the image display period, so as to drive the light emitting element L to emit light for displaying images.

[0097] In the embodiment, the control switch Ml and the drive switch M2 can be N-type or P-type low temperature polysilicon (LTPS) thin film transistors.

[0098] The adjusting unit 300 comprises a data loading switch M3, an adjusting switch M4, a unidirectional conductive element Dl and a second energy storage element C2.

[0099] The data loading switch M3 is connected to the data line Dj, the third node N3 and the scan line Gi, for receiving the data signal Data from the data line Dj and transmitting the data signal Data to the drive unit 200 through the unidirectional conductive element Dl and the third node N3 in the data loading stage Td.

[0100] The data loading switch M3 comprises a data loading control end M30, a first data loading conductive end M31 and a second data loading conductive end M32, wherein the data loading control end M30 is connected to the scan line Gi, the first data loading conductive end M31 is connected to the data line Dj, and the second data loading conductive end M32 is connected to the unidirectional conductive element Dl. The data loading switch M3 is turned on under the control of the scan signal Gsi output from the scan line Gi, and the data signal Data provided by the data line Dj is transmitted to the unidirectional conductive element Dl through the data loading switch M3 when the data loading switch M3 is turned on.

[0101] In the embodiment, the data loading switch transistor M3 is an N-type LTPS thin film transistor, the gate of which can be directly connected to the data loading control terminal M30, and the source and the drain of which are directly connected to the first data loading conductive terminal M31 and the second data loading conductive terminal M32 respectively. When the data loading switch transistor M3 is an N-type transistor, the corresponding scanning signal Gsi is a high potential pulse signal.

[0102] In other embodiments of the present application, the data loading switch M3 can also be a P-type LTPS thin film transistor, and the corresponding scanning signal Gsi is a low potential pulse signal.

[0103] The unidirectional conductive element D1 is connected between the data loading switch M3 and the third node N3, and is used for unidirectionally transmitting the data signal Data to the third node N3 and the driving unit 200, and preventing the current in the driving unit 200 from being transmitted to the data loading switch M3 and the data line Dj through the third node N3.

[0104] The unidirectional conductive element D1 includes a first conductive terminal D11 and a second conductive terminal D12, the first conductive terminal D11 is connected to the second data loading conductive terminal M32 of the data loading switch transistor M3, and the second conductive terminal D12 is connected to the third node N3. The unidirectional conductive element D1 is used for limiting the current direction to be only from the first conductive terminal D11 to the second conductive terminal D12, and cutting off the current from the second conductive terminal D12 to the first conductive terminal D11, so as to cut off the leakage current transmitted by the driving unit 200 from the data line Dj.

[0105] In the embodiment, the unidirectional conductive element D1 is a diode, wherein the first conductive terminal D11 is the anode of the diode, and the second conductive terminal D12 is the cathode of the diode.

[0106] The adjusting switch transistor M4 is connected to the scanning line Gi, the third node N3 and the buffer node Nh, and is used for transmitting the data voltage Vdata received by the third node N3 to the buffer node Nh when the scanning signal Gsi is received.

[0107] The adjusting switch transistor M4 includes an adjusting control terminal M40, a first adjusting conductive terminal M41 and a second adjusting conductive terminal M42, wherein the adjusting control terminal M40 is connected to the scanning line Gi, the first adjusting conductive terminal M41 is connected to the third node N3, and the second adjusting conductive terminal M42 is connected to the buffer node Nh. The adjusting switch transistor M4 is turned on under the control of the scanning signal Gsi output by the scanning line Gi. When the adjusting switch transistor M4 is turned on, the data voltage Vdata loaded by the third node N3 is transmitted to the buffer node Nh through the adjusting switch transistor M3.

[0108] In the embodiment, the adjusting switch tube M3 is an N-type LTPS thin film transistor, the gate of which can be directly connected to the adjusting control terminal M40, or the gate of which is the adjusting control terminal M40, the source and the drain of which are respectively the first adjusting conductive terminal M51 and the second adjusting conductive terminal M42, or the source and the drain of which are directly connected to the first adjusting conductive terminal M51 and the second adjusting conductive terminal M42. When the adjusting switch tube M4 is an N-type transistor, the corresponding scanning signal Gsi is a high potential pulse signal.

[0109] In other embodiments of the present application, the adjusting switch M4 can also be a P-type LTPS thin film transistor, and the corresponding scanning signal Gsi is a low potential pulse signal.

[0110] The second energy storage element C2 is connected to the buffer node Nh and the ground terminal GND, and is used to maintain the voltage of the buffer node Nh as the data voltage Vdata for a preset period after the adjusting switch tube M4 receives the data signal Data. In the embodiment, the second energy storage element C2 is a capacitor.

[0111] Please refer to Figure 11 and Figure 12 , Figure 11 the working timing diagram of the pixel unit P shown in Figure 10 , and Figure 12 the working state diagram of the pixel unit P shown in Figure 10 .

[0112] In the embodiment, the data loading stage Td includes a first period Td1 and a second period Td2 which are continuous in time and arranged in sequence. In the first period Td1 of the data loading stage Td, the compensation scanning line Gci outputs the compensation scanning signal Gci to the control switch tube M1, and the scanning line Gi outputs the scanning signal Gsi to the data loading switch tube M3 and the adjusting switch tube M4, the control switch tube M1 is turned on under the control of the compensation scanning signal Gti, the data loading switch tube M3 and the adjusting switch tube M4 are turned on under the control of the scanning signal Gsi, the data signal Data is transmitted to the third node N3 through the data loading switch tube M3 and the unidirectional conductive element D1, and is transmitted to the first node N1 and the buffer node Nh through the third node N3, respectively, the first energy storage element C1 and the second energy storage element C2 are stored, respectively, so that the voltages of the first node N1, the third node N3 and the buffer node Nh are all the compensation data voltage Vcp. In the embodiment, the compensation data voltage Vcp is greater than the data voltage Vdata corresponding to the data signal Data.

[0113] In the second period Td2 of the data loading stage Td, the compensation scan line Gci stops outputting the compensation scan signal Gci to the control switch tube M1, and the scan line Gi continues to output the scan signal Gsi. At this time, the data loading switch tube M3 and the adjustment switch tube M4 maintain the conductive state, and the control switch tube M1 is cut off, that is, the control switch tube M1 is cut off earlier than the data loading switch tube M3 and the adjustment switch tube M4.

[0114] In the embodiment, as shown in the figure, Figure 11 The compensation scan signal Gci and the compensation signal Gsi are both pulse signals with the same potential, wherein the pulse signal of the compensation scan signal Gci has a duration of the first period T1, and the pulse signal of the scan signal Gsi has a duration of the sum of the first period T1 and the second period T2.

[0115] Since the data loading switch tube M3 and the adjustment switch tube M4 are conductive, the voltage of the buffer node Vh will continue to charge to the compensation data voltage Vdata.

[0116] During the charging process of the first energy storage element C1 as a capacitor, the voltage between the two poles will gradually increase over time. The formula for charging the capacitor voltage is a formula describing the change of the voltage between the two poles of the capacitor over time, and the formula is as follows:

[0117] Vc = V0(1 - e^(-t / RC)) (2).

[0118] Wherein, Vc represents the voltage between the two poles of the capacitor, V0 represents the voltage value when the capacitor starts charging, t is the charging time, R is the resistance value of the capacitor, C is the capacitance value of the capacitor, and e is the natural constant logarithmic function. R and C are known quantities at the beginning of the design and known, then the voltage Vc of the third node N3 = Vdata(1 - e^(-t / RC)) = VDD - VA, and the voltage VA of the first node N1 = VDD - Vdata(1 - e^(-t / RC)), so the voltage VA of the first node N1 is related to the charging time, that is, related to the duration of the second period Td2.

[0119] Therefore, the time of the second period Td2 is determined according to the required data voltage Vdata of the first node N1, the duration of the control switch M1 closing earlier than the data loading switch tube M3, the charging time of the first energy storage element C1 is Td1, and the charging time of the second energy storage element C2 is Td1 + Td2. Therefore, by setting the duration of the second period Td2, the data voltage Vdata corresponding to the data signal Data can be accurately obtained.

[0120] In the light emitting period Te, the scan line Gi also stops outputting the scan signal Gsi, the data load switch tube M3 and the adjustment switch tube M4 are all turned off, the drive switch tube M2 is turned on under the control of the data voltage Vdata at the first node N1, and the drive power source VDD continuously provides the drive current Ids to the light emitting element L in cooperation with the data voltage.

[0121] At the same time, as shown in Figure 12 , the buffer node Nh is at the compensation data voltage Vcp under the energy storage of the second energy storage element C2, the voltage Va of the first node N1 is the data voltage Vdata, and the adjustment switch tube M4 provides the drain current corresponding to the compensation data voltage Vcp as the compensation current Icp to the third node N3. The compensation current Icp will offset the drain current I leak of the drive switch tube M2 from the first node N1 to the third node N3. Correspondingly, or the same size, but opposite directions, so as to offset at the third node N3, and thus ensure that the voltage Va of the first node N1 does not change, that is, through the adjustment of the switch tube M4 to offset the drain current I leak of the drive unit 200, so as to maintain the voltage Va of the first node N1 accurately at the data voltage Vdata, and thus stabilize the gate-source voltage of the drive switch tube M2 in the drive unit 200, ensure that the output drive current Ids is also relatively stable, so that the light emitting element L can accurately emit light according to the brightness of the data voltage Vdata corresponding to the data signal Data to display the image.

[0122] Since the compensation data voltage Vcp is a real-time adjusted voltage according to the drive switch tube M2, it is not a fixed value, that is, the compensation data voltage Vcp is related to the aging degree, gate-source voltage, and source-drain voltage of the drive switch tube M2 itself. At the same time, the size of the drain current of the drive switch tube M2 is also related to the aging degree, gate-source voltage, and source-drain voltage of the drive switch tube M2 itself. Then when the compensation data voltage Vcp provided by the drive switch tube M2 can effectively adjust the drain current of the adjustment switch tube M4, and thus dynamically compensate the size of the drain current I leak of the drive switch tube M2, ensure that the voltage Va of the first node N1 is accurately maintained at the data voltage Vdata.

[0123] At the same time, since the voltage Vc of the third node N3 is greater than the voltage VA of the first node N1, that is, the potential of the third node N3 is higher than the voltage of the first node N1, so as to cut off the drain current I leak flowing to the third node N3, and thus accurately maintain the voltage VA of the first node N1 at the data voltage Vdata, and ensure that the drive current Ids output to the light emitting element L is also relatively stable, so that the pixel unit P accurately performs image display, and ensures that the display effect of the display panel 20 is better.

[0124] It is to be understood that the application is not limited to the examples described above, which can be modified or adapted in several ways by those skilled in the art without departing from the scope of the present application, as defined by the appended claims.

Claims

1. A display panel, comprising a display area, the display area comprising a plurality of pixel units arranged in an array, the pixel units being configured to perform image display according to a data signal, characterized in that, The pixel unit comprises a driving unit and an adjusting unit. The adjusting unit is connected with a scanning line and a data line, and is configured to receive an image signal from the data line under the control of a scanning signal output by the scanning line during a data loading period, and transmit the image signal to the driving unit. The driving unit is connected with the scanning line and a first power supply terminal, and is configured to receive the image signal from the adjusting unit under the control of the scanning signal during the data loading period, and output a driving current to a light emitting element in cooperation with the first power supply terminal during a light emitting period, so as to drive the light emitting element to emit light corresponding to the image signal to display an image. During the light emitting period, the adjusting unit is configured to cut off the transmission of a leakage current from the driving unit to the data line, and the adjusting unit is configured to provide a compensation current to the driving unit, the compensation current having the same magnitude and opposite direction as the leakage current transmitted from the driving unit to the adjusting unit, so as to compensate for the leakage current generated by a switch in the driving unit and ensure the stability of the driving current.

2. The display panel of claim 1, wherein, The driving unit comprises a control switch, a driving switch and a first energy storage element. The driving switch is connected to the control switch through a first node, connected to the first power supply terminal through a second node, and connected to the light emitting element through a driving node. The first energy storage element is connected to the first node and the second node. The control switch is connected to the scanning line, the first node and a third node. The control switch is configured to receive the image signal from the adjusting unit under the control of the scanning signal during the data loading period. The image signal is directly stored as a data signal in the first energy storage element. The first energy storage element controls the voltage of the first node to be a data voltage corresponding to the data signal, and the data voltage cooperates with the first power supply terminal to output the driving current.

3. The display panel of claim 2, wherein, The adjusting unit comprises at least one unidirectional conductive element between the data line and the third node. The unidirectional conductive element is configured to control the data line to transmit the image signal to the third node, and cut off the transmission of a leakage current from the adjusting unit to the data line.

4. The display panel of claim 3, wherein, The adjusting unit further comprises a data loading switch, an adjusting switch, a second energy storage element and a third energy storage element. The data loading switch is connected to the data line, the unidirectional conductive element and the scanning line, and is configured to be turned on under the control of the scanning signal during the data loading period, so as to load a data voltage corresponding to the data signal from the data line to the third node through the unidirectional conductive element. The adjusting switch is connected to the scanning line, the third node and a buffer node, and is configured to be turned on when the scanning signal is received during the data loading period, so as to transmit the data voltage received by the third node to the buffer node and the control switch. The second energy storage element is connected to the buffer node, and is used for storing the data voltage and maintaining the voltage of the buffer node as the data voltage when the buffer node is loaded with the data voltage. The third energy storage element is connected between the buffer node and the first node, and is used for controlling the voltages of the buffer node and the first node to be the same, and controlling the voltages of the buffer node and the first node to be greater than the voltage of the third node.

5. The display panel of claim 1, wherein, The driving unit comprises a control switch tube, a driving switch tube and a first energy storage element, the driving switch tube is connected to the control switch tube through a first node, connected to the first power supply end through a second node, and connected to the light emitting element through a driving node, the first energy storage element is connected to the first node and the second node, and the control switch tube is connected to a compensation scan line in the scan line, the first node and a third node, wherein the compensation scan line is used for outputting a compensation scan signal in a first time period of the data loading period, the control switch tube is used for receiving a compensation data signal as the image signal from the adjusting unit under the control of the compensation scan signal in the first time period, and converting the compensation data signal into a data signal and storing the data signal in the first energy storage element, and controlling the voltage of the first node to be a data voltage corresponding to the data signal, the data voltage being used for cooperating with a driving power supply to provide the driving current corresponding to the data signal.

6. The display panel of claim 5, wherein, The adjusting unit comprises at least one unidirectional conductive element between the data line and the third node, and the unidirectional conductive element is used for controlling the data line to transmit the image signal to the third node, and cutting off the leakage current transmission of the adjusting unit to the data line.

7. The display panel of claim 6, wherein, The adjusting unit further comprises a data loading switch tube, an adjusting switch tube and a second energy storage element. The data loading switch tube is connected to the data line, the unidirectional conductive element and a scan line in the scan line for loading a data signal, the scan line for loading the data signal is used for outputting the scan signal, and is turned on under the control of the scan signal in the first time period and the second time period of the data loading period, so as to load a compensation data voltage corresponding to the compensation data signal received from the data line to the third node through the unidirectional conductive element, and the first time period and the second time period are sequentially arranged and continuous in time. The adjusting switch tube is connected to the scan line, the third node and a buffer node, and is used for being turned on when receiving the scan signal in the first time period and the second time period, so as to transmit the compensation data voltage received by the third node to the buffer node and the control switch tube, and in the first time period, the compensation data voltage is converted into a data voltage by the control switch tube and the first energy storage element and is loaded to the first node. The second energy storage element is connected to the buffer node, and is configured to store the data voltage and maintain the voltage of the buffer node as a compensation data voltage corresponding to the compensation data signal when the buffer node is loaded with the data voltage.

8. The display panel of claim 7, wherein, The compensation data voltage corresponding to the compensation data signal is greater than the data voltage. The compensation scan signal and the scan signal are pulse signals with the same potential, and a pulse signal duration of the compensation scan signal is a duration of the first time period, and a pulse signal duration of the scan signal is a sum of durations of the first time period and the second time period. The compensation data signal corresponds to a threshold voltage variation of the driving switch tube, and in the light emitting time period, the adjusting switch tube provides a compensation current according to the compensation data voltage, and the compensation current corresponds to a drain current transmitted by the driving switch tube.

9. A display device comprising: The display panel comprises a power supply module and the display panel according to any one of claims 1-8, and the power supply module is configured to provide a driving power for image display of the display panel.

Images