Integrated circuit side channel leakage and hardware Trojan horse detection system

Abstract

The invention provides an integrated circuit side channel leakage and hardware Trojan horse detection system. The system comprises an acquisition device and a terminal system. The acquisition device comprises a micro-control unit and a field programmable gate array, and the micro-control unit is used for receiving a connection signal sent by the terminal system, returning power consumption data to the terminal system and storing an acquisition program for performing power consumption data acquisition on the chip to be tested. The field programmable gate array is used for collecting the power consumption data of the to-be-tested chip according to the collection program. And the terminal system is used for sending a connection signal for connecting the to-be-tested chip to the acquisition device, receiving the power consumption data of the to-be-tested chip returned by the acquisition device and inputting the power consumption data into the power consumption model to obtain a detection result of whether the to-be-tested chip has side channel leakage or hardware Trojan horse. The power consumption data of the to-be-detected chip is directly acquired by the acquisition device, so that the terminal system can analyze the power consumption data to obtain a detection result of whether side channel leakage or hardware Trojan exists, and rapid and safe detection of the to-be-detected chip is realized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and particularly to an integrated circuit side-channel leakage and hardware Trojan detection system. Background Art

[0002] With the development of artificial intelligence and Internet of Things (AIoT) technology, information technology has penetrated into daily work and life. While people enjoy various conveniences brought by information technology, information security has also become an important technical and social issue. Without the guarantee of information security, it will seriously affect many industries supported by information systems, such as finance, communication, power, and medical care. As the cornerstone of information security, integrated circuit chips play a crucial role in many emerging industries. However, chip security is undergoing a profound transformation. Hardware attack technologies represented by physical side-channel attacks and hardware Trojan attacks are constantly expanding and changing the concept of chip security, and also continuously impacting traditional security protection methods.

[0003] Physical side-channel attacks (SCA), also known as side-channel cryptanalysis, are a type of physical attack method against cryptographic implementations (including cryptographic chips, cryptographic modules, cryptographic systems, etc.). Physical side-channel attacks extract passwords by detecting side-channel leakage to recover the key. Typical side-channels include power consumption, electromagnetic radiation, and running time. A hardware Trojan is a general term for malicious circuits implanted during the integrated circuit design or manufacturing process, first proposed by Agrawal et al. in 2007. Its circuit structure generally includes two parts: a trigger and a load. Hardware Trojan attacks are the product of the globalization development of the integrated circuit design and manufacturing supply chain. The globalization development of the supply chain has refined and separated each industrial link. Third-party IP core providers or process manufacturers can implant malicious circuits at various stages of design or manufacturing to steal confidential information, monitor or control core functions, causing the system to fail and resulting in serious consequences.

[0004] However, there is currently a lack of effective methods for detecting side-channel leakage and hardware Trojans. Summary of the Invention

[0005] In view of this, the purpose of the present application is to provide an integrated circuit side-channel leakage and hardware Trojan detection system, which can detect side-channel leakage and hardware Trojans of a chip and improve the security of the chip.

[0006] The present application provides an integrated circuit side-channel leakage and hardware Trojan detection system, including a collection device and a terminal system;

[0007] The terminal system is used to send a connection signal for connecting to the chip under test to the acquisition device, receive the power consumption data of the chip under test returned by the acquisition device, and input the power consumption data into a power consumption model to obtain a detection result on whether there is side-channel leakage or hardware Trojan in the chip under test;

[0008] The acquisition device includes a microcontroller unit and a field programmable gate array. The microcontroller unit is used to receive the connection signal sent by the terminal system, return the power consumption data to the terminal system, and store an acquisition program for acquiring the power consumption data of the chip under test; the field programmable gate array is used to acquire the power consumption data of the chip under test according to the acquisition program.

[0009] Optionally, the acquisition device includes a programmable signal amplifier;

[0010] The programmable signal amplifier is used to amplify the power consumption data signal, and the field programmable gate array is used to control the gain of the programmable signal amplifier.

[0011] Optionally, the acquisition device includes a high-speed analog-to-digital ADC converter;

[0012] The high-speed ADC converter is used to convert the analog signal of the power consumption data into a digital signal and transmit the digital signal to the field programmable gate array.

[0013] Optionally, the acquisition device includes a power management module;

[0014] The power management module is used to supply power to the microcontroller unit and the field programmable gate array respectively.

[0015] Optionally, the power management module includes multiple voltage conversion chips, and the voltage conversion chips are used to perform voltage conversion and supply the converted voltage to the microcontroller unit and the field programmable gate array respectively.

[0016] Optionally, the terminal system is used to set acquisition parameters for acquiring the power consumption data and send an instruction to start or end acquisition to the acquisition device.

[0017] Optionally, the field programmable gate array is used to start acquiring the power consumption data of the chip under test according to a trigger trig signal sent by the chip under test.

[0018] Optionally, the microcontroller unit receives the connection signal sent by the terminal system and returns the power consumption data to the terminal system according to a universal serial bus USB interface.

[0019] Optionally, debug the acquisition program for collecting the power consumption data of the field programmable gate array according to the joint test working group interface.

[0020] Optionally, the field programmable gate array is used to receive an external clock signal input.

[0021] This application provides an integrated circuit side-channel leakage and hardware Trojan detection system, including an acquisition device and a terminal system. The acquisition device includes a micro control unit and a field programmable gate array. The micro control unit is used to receive a connection signal sent by the terminal system, return power consumption data to the terminal system, and store an acquisition program for collecting power consumption data of a chip under test. The field programmable gate array is used to collect the power consumption data of the chip under test according to the acquisition program. The terminal system is used to send a connection signal for connecting the chip under test to the acquisition device, receive the power consumption data of the chip under test returned by the acquisition device, and input the power consumption data into a power consumption model to obtain a detection result on whether there is side-channel leakage or a hardware Trojan in the chip under test. That is to say, according to the micro control unit and the field programmable gate array, the power consumption data of the chip under test can be directly collected, and the terminal system can obtain the detection result on whether there is side-channel leakage or a hardware Trojan through the analysis of the power consumption data, realizing the fast and safe detection of the chip under test. Description of the Drawings

[0022] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are some embodiments of the present application. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0023] Figure 1 Shows a schematic structural diagram of an integrated circuit side-channel leakage and hardware Trojan detection system provided by an embodiment of the present application;

[0024] Figure 2 Shows a schematic structural diagram of another integrated circuit side-channel leakage and hardware Trojan detection system provided by an embodiment of the present application. Detailed Embodiments

[0025] In order to enable those skilled in the art to better understand the solutions of the present application, the following will clearly and completely describe the technical solutions in the embodiments of the present application with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.

[0026] In the following description, many specific details are set forth in order to provide a thorough understanding of the present application. However, the present application may also be implemented in other ways different from those described herein. Those skilled in the art can make similar extensions without departing from the connotation of the present application. Therefore, the present application is not limited by the specific embodiments disclosed below.

[0027] Currently, the security of chips is undergoing a profound transformation. Hardware attack technologies represented by physical side-channel attacks and hardware Trojan attacks are continuously expanding and changing the concept of chip security, and are also continuously impacting traditional security protection methods.

[0028] Currently, there is a lack of products related to side-channel leakage detection and hardware Trojan detection.

[0029] Based on this, the present application provides an integrated circuit side-channel leakage and hardware Trojan detection system, including a collection device and a terminal system. The collection device includes a microcontroller unit and a field-programmable gate array. The microcontroller unit is used to receive the connection signal sent by the terminal system, return power consumption data to the terminal system, and store the collection program for collecting the power consumption data of the chip to be tested. The field-programmable gate array is used to collect the power consumption data of the chip to be tested according to the collection program. The terminal system is used to send a connection signal for connecting to the chip to be tested to the collection device, receive the power consumption data of the chip to be tested returned by the collection device, and input the power consumption data into the power consumption model to obtain the detection result of whether there is side-channel leakage or a hardware Trojan in the chip to be tested. That is to say, according to the microcontroller unit and the field-programmable gate array, the power consumption data of the chip to be tested can be directly collected, and the terminal system can obtain the detection result of whether there is side-channel leakage or a hardware Trojan through the analysis of the power consumption data, realizing the rapid and safe detection of the chip to be tested.

[0030] In order to better understand the technical solutions and technical effects of the present application, the following will describe specific embodiments in detail with reference to the accompanying drawings.

[0031] See Figure 1 , which is a schematic structural diagram of an integrated circuit side-channel leakage and hardware Trojan detection system provided by an embodiment of the present application.

[0032] The integrated circuit side-channel leakage and hardware Trojan detection system provided by this embodiment includes a collection device 110 and a terminal system 120.

[0033] In an embodiment of the present application, the terminal system 120 may be a computer. Software for detecting integrated circuit side-channel leakage and hardware Trojans is installed in the terminal system 120, and the software may include an instruction sending program, a data receiving program, and a data analysis program.

[0034] Specifically, the chip 130 to be tested is an integrated circuit chip that needs to be tested for side-channel leakage or hardware Trojans. The terminal system 120 is used to send a connection signal for connecting to the chip 130 to be tested to the acquisition device 110, use the acquisition device 110 to acquire the power consumption data of the chip 130 to be tested, and the terminal system 120 can receive the power consumption data of the chip 130 to be tested returned by the acquisition device 110 and input the power consumption data into the power consumption model to obtain the detection result of whether there is side-channel leakage or hardware Trojans in the chip 130 to be tested.

[0035] That is to say, the terminal system 120 can use the data receiving program to receive the power consumption data and use the data analysis program to analyze the power consumption data. Specifically, the data analysis program is used to construct a power consumption model, and iterative training and cross-validation experiments of the power consumption model are carried out in combination with the machine learning classification algorithm. The classification results under multi-parameter constraint conditions are analyzed and compared to improve the detection performance, so as to obtain a more accurate detection result of the chip 130 to be tested. Specifically, the power consumption model can be a multi-parameter fingerprint model.

[0036] In practical applications, by collecting the power consumption data of the chip 130 to be tested, it is possible to use the power consumption data to support differential power analysis attacks, correlation power analysis attacks and side-channel leakage detection on the chip 130 to be tested. The hardware Trojan detection solution based on the multi-parameter side-channel fingerprint learning of integrated circuits can perform hardware Trojan detection under the "weak golden model".

[0037] In the embodiment of the present application, the terminal system 120 can also set the acquisition parameters for collecting power consumption data and send instructions to start or end the acquisition to the acquisition device 110, so as to better control the data acquisition process.

[0038] In the embodiment of the present application, the acquisition device 110 includes a micro control unit (MCU) 111 and a field programmable gate array (FPGA) 112. The micro control unit 111 can communicate with the terminal system 120. The micro control unit 111 is used to receive the connection signal sent by the terminal system 120 and establish a connection with the chip 130 to be tested, so as to collect the power consumption data of the chip 130 to be tested. After the acquisition device 110 obtains the power consumption data of the chip 130 to be tested, the micro control unit 111 can also return the power consumption data to the terminal system 120.

[0039] In practical applications, the microcontroller unit 111 can communicate with the terminal system 120 according to the Universal Serial Bus (USB) interface, that is, the microcontroller unit 111 can receive the connection signal sent by the terminal system 120 according to the universal serial bus interface and return the power consumption data to the terminal system 120. The acquisition device 110 may further include a test signal input interface, and the test signal input interface can be used to receive the signal of the chip 130 to be tested.

[0040] In the embodiment of the present application, the microcontroller unit 111 can also write and store an acquisition program for acquiring the power consumption data of the chip 130 to be tested, so that the field programmable gate array 112 can acquire the power consumption data of the chip 130 to be tested according to the acquisition program.

[0041] The microcontroller unit 111 uses an ARM microcontroller (Advanced RISC Machines) ATSAM3U2CA. The ATSAM3U2CA is a flash microcontroller based on a high-performance 32-bit ARM Cortex-M3 Reduced Instruction Set Computer (RISC) processor. Its maximum operating speed is 96 MHz, with up to 256 KB of flash memory and up to 52 KB of Static Random-Access Memory (SRAM). The SAM3U architecture is specifically designed to support high-speed data transmission. The microcontroller unit 111 includes a high-speed USB interface with an embedded transceiver, a Universal Synchronous / Asynchronous Receiver / Transmitter (USART), and a Pulse width modulation wave (PWM) timer, etc. Among them, the USB interface can also be used to power the acquisition device 110.

[0042] The field programmable gate array 112 can be a SPARTAN-6, capable of implementing functions such as information transmission, system control, data acquisition, data processing, and data storage. The SPARTAN-6 provides high-capacity logic design, digital signal processing (DSP) design for consumers, and integrated software and hardware components. The SPARTAN-6 has dual registers, 6-input look-up tables (LUTs), and rich built-in system-level blocks, including 18KB block random access memories (RAMs), second-generation DSP48A1 slices, synchronous dynamic random access memory (SDRAM) interfaces, enhanced hybrid clock management modules, select input / output (IO) technologies, optimized high-speed serial transceiver modules, peripheral component interconnect express (PCIE) interfaces, advanced system-level power management modes, automatic detection configuration options, enhanced IP security, and advanced encryption standard (AES).

[0043] In an embodiment of the present application, the field programmable gate array 112 can start collecting power consumption data of the chip under test 130 according to a trigger (trig) signal sent by the chip under test 130. Among them, the field programmable gate array 112 can include a trigger signal interface, and use the trigger signal interface to receive the trigger signal.

[0044] The field programmable gate array 112 can also include a Joint Test Action Group (JTAG) interface and a clock signal (clk) interface. The collection program for the field programmable gate array 112 to collect power consumption data can be burned and debugged according to the JTAG interface. The clk interface can receive an external clock signal input.

[0045] In an embodiment of the present application, the acquisition device 110 can also include a programmable signal amplifier 113. The programmable signal amplifier 113 is used to communicate with the chip under test 130, condition the power consumption data, convert the single-ended signal into a differential signal, and amplify the signal. The field programmable gate array 112 can control the gain of the programmable signal amplifier 113, thereby improving the data acquisition efficiency of the chip under test 130.

[0046] The model of the programmable signal amplifier 113 may be AD8331. Considering that the voltage signal of the chip under test 130 changes slightly, the voltage signal may be amplified by the programmable signal amplifier 113. AD8331 is a single-channel, ultra-low noise, linear dB variable gain amplifier (VGA) that can be used as a low-noise variable gain element with a maximum frequency of 120 MHz. The programmable signal amplifier 113 provides a wide gain range LO gain mode: -4.5 dB to +43.5 dB, HI gain mode: 7.5 dB to 55.5 dB.

[0047] In an embodiment of the present application, the acquisition device 110 may further include a high-speed analog-to-digital converter (ADC) 114. The high-speed ADC converter 114 may be used to convert the analog signal of the power consumption data into a digital signal, and transmit the digital signal to the field programmable gate array 112. In other words, the power consumption data is amplified by the programmable signal amplifier 113, and then the analog signal is converted into a digital signal by the high-speed ADC converter 114, and then the converted power consumption data is transmitted to the field programmable gate array 112.

[0048] The model of the high-speed ADC converter can be AD9233, which is a 12-bit high-speed analog-to-digital converter with a conversion rate of up to 125MSPS. It is powered by a single 1.8V power supply and has a built-in high-performance sample-and-hold amplifier (SHA) and an on-chip reference voltage reference. The high-speed ADC converter adopts a multi-stage differential pipeline architecture, built-in output error correction logic, and guarantees no missing code over the full operating temperature range. A differential clock input is used to control the internal conversion cycle. A duty cycle stabilizer (DCS) is used to compensate for large clock duty cycle fluctuations while maintaining excellent overall ADC performance.

[0049] In an embodiment of the present application, the acquisition device 110 may further include a power management module 115 , which may supply power to the microcontroller unit 111 , the field programmable gate array 112 , the programmable signal amplifier 113 and the high-speed ADC converter 114 , respectively.

[0050] Specifically, since different devices require different power supply voltages, the power management module 115 may include multiple voltage conversion chips, which are used to perform voltage conversion and supply the converted voltage to the microcontroller unit 111, the field programmable gate array 112, the programmable signal amplifier 113 and the high-speed ADC converter 114 respectively.

[0051] In the embodiment of the present application, the input voltage of the acquisition device 110 is 5V. The power management module 115 stabilizes the input voltage to the operating voltages of each device in the system. The required voltages are mainly four voltages: 5V, 3.3V, 1.8V, and 1.2V. The 5V voltage is supplied to the voltage conversion chip and the programmable signal amplifier 113. In order to separate the power supplies of the field programmable gate array 112 and the micro control unit 111 and reduce the influence of mutual interference, they are supplied separately. The 1.8V voltage is supplied to the high-speed ADC converter 114, and the 1.2V voltage is used to supply power to the field programmable gate array 112.

[0052] As an example, the model of the voltage conversion chip can be LTC3419EMS, which can convert the 5V voltage into 3.3V or 1.2V voltage.

[0053] As another example, the model of the voltage conversion chip can be TPS65261, which can convert the 5V voltage into 1.8V voltage.

[0054] As yet another example, the model of the voltage conversion chip can be TC1262-3.3VDBTR, which can convert the 5V voltage into 3.3V voltage.

[0055] From the above description, it can be seen that the embodiment of the present application provides a system specifically for detecting integrated circuit side-channel leakage and hardware Trojans. It consists of two parts: an acquisition device and a terminal system. It is a collaborative design of software and hardware, which can better meet the current needs of detecting integrated circuit side-channel leakage and hardware Trojans. It provides a complete solution from "acquisition-detection-analysis" and supports the detection of integrated circuit pre-silicon side-channel leakage and hardware Trojans. The terminal system judges whether the chip to be tested may have a hardware Trojan that leaks information through the power consumption side-channel by learning the multi-parameter fingerprint model through a classifier, which can filter the influence of part of the noise and process fluctuations and improve the detection accuracy and efficiency.

[0056] The system embodiments described above are only illustrative. The units and modules described as separate components may or may not be physically separated. In addition, part or all of the units and modules can be selected according to actual needs to achieve the purpose of the solution of this embodiment. The system embodiments described above are only illustrative, and those of ordinary skill in the art can understand and implement them without creative work.

[0057] The above are only the preferred embodiments of the present application. Although the present application has been disclosed above with preferred embodiments, it is not intended to limit the present application. Any person skilled in the art can make many possible changes and modifications to the technical solution of the present application, or modify it into an equivalent embodiment with equivalent changes, without departing from the scope of the technical solution of the present application. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application without departing from the content of the technical solution of the present application still fall within the scope of protection of the technical solution of the present application.

Claims

1. An integrated circuit side channel leakage and hardware Trojan detection system, It is characterized in that Including collection devices and terminal systems; The terminal system is used to send a connection signal to the acquisition device to connect to the chip under test, receive the power consumption data of the chip under test returned by the acquisition device and input the power consumption data into the power consumption model to obtain a detection result of whether the chip under test has a side channel leak or a hardware Trojan; The acquisition device includes a micro control unit and a field programmable gate array, wherein the micro control unit is used to receive a connection signal sent by the terminal system, return the power consumption data to the terminal system, and store an acquisition program for collecting power consumption data of the chip to be tested; The field programmable gate array is used to collect power consumption data of the chip to be tested according to the collection program.

2. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The acquisition device includes a programmable signal amplifier; The programmable signal amplifier is used to amplify the power consumption data, and the field programmable gate array is used to control the gain of the programmable signal amplifier.

3. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The acquisition device includes a high-speed analog-to-digital ADC converter; The high-speed ADC converter is used to convert the analog signal of the power consumption data into a digital signal, and transmit the digital signal to the field programmable gate array.

4. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The acquisition device includes a power management module; The power management module is used to supply power to the micro control unit and the field programmable gate array respectively.

5. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 4, It is characterized in that The power management module includes a plurality of voltage conversion chips, and the voltage conversion chips are used to perform voltage conversion and supply the converted voltage to the micro control unit and the field programmable gate array respectively.

6. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The terminal system is used to set the collection parameters for collecting the power consumption data and send an instruction to the collection device to start or end collection.

7. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The field programmable gate array is used to start collecting power consumption data of the chip under test according to a trigger trig signal sent by the chip under test.

8. The integrated circuit side channel leakage and hardware Trojan detection system according to claim 1, It is characterized in that The micro control unit receives a connection signal sent by the terminal system through a universal serial bus (USB) interface and returns the power consumption data to the terminal system.

9. The integrated circuit side channel leakage and hardware Trojan detection system according to any one of claims 1 to 8, It is characterized in that The collection program for collecting power consumption data of the field programmable gate array is debugged according to the joint test working group interface.

10. The integrated circuit side channel leakage and hardware Trojan detection system according to any one of claims 1 to 8, It is characterized in that The field programmable gate array is used for receiving an external clock signal input.

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