Overlapped structure comb-finger capacitive z-axis acceleration sensitive chip and manufacturing method thereof

Abstract

The application discloses an overlapping structure comb tooth capacitive Z-axis acceleration sensitive chip and a manufacturing method thereof, and belongs to the technical field of MEMS sensors. The sensitive chip is composed of a comb tooth capacitive layer and an elastic beam structure layer which are placed in an overlapping manner, and are bonded together through an oxide layer. In addition to the advantage of small damping coefficient, the sensitive chip has the following three advantages: 1. The structure of the comb tooth capacitive layer and the elastic beam structure layer placed in an overlapping manner does not need to occupy additional chip area, is beneficial to miniaturization, and can also reduce the chip cost; 2. The structure of the comb tooth capacitive layer and the elastic beam structure layer placed in an overlapping manner avoids the occupation of the space of the comb tooth distributed around the mass by the elastic beam when placed in a plane, greatly increases the number of the comb tooth, and effectively increases the capacitance of the comb tooth structure; and 3. The overlapping structure enables the elastic beam to be symmetrically distributed around the mass, and significantly reduces the cross-coupling influence in the X-axis and Y-axis directions.

Description

Technical Field

[0001] This invention relates to a technical method for improving the performance of capacitive accelerometer chips and a method for manufacturing such chips, belonging to the sensor technology field of micro-electromechanical systems (MEMS). This invention proposes a design and manufacturing method for a comb-tooth capacitive accelerometer chip to improve its performance. It can effectively reduce the area of ​​the comb-tooth capacitive accelerometer chip and has the advantages of high output linearity and low cross-coupling. Background Technology

[0002] Microelectromechanical systems (MEMS) is a cutting-edge research field involving multiple disciplines such as electronics, mechanics, physics, and biomedicine. MEMS sensors, with their advantages of miniaturization, low cost, low power consumption, and compatibility with integration technologies for easy intelligentization, are widely used in aerospace, medical devices, automotive electronics, and smart terminals. MEMS sensors can be divided into various types, including accelerometers, temperature sensors, pressure sensors, sound sensors, humidity sensors, and gas sensors. Among them, accelerometers can be further classified into various types based on their detection methods, such as capacitive, resonant, piezoelectric, piezoresistive, and optical accelerometers. Capacitive micro-accelerometers are one of the most common micro-accelerometers. Their principle is to reflect the magnitude of acceleration by detecting the change in capacitance caused by motion due to inertial forces. Capacitive accelerometers feature high sensitivity and measurement accuracy, good stability, low temperature drift, and low power consumption, and are widely used in commercial fields such as automotive electronics and consumer electronics. They are particularly highly valued in fields such as inertial measurement and defense.

[0003] Currently, based on their structural forms, MEMS capacitive accelerometers can be roughly divided into three types: sandwich-type capacitive accelerometers, torsional capacitive accelerometers, and comb-type capacitive accelerometers. Sandwich-type capacitive accelerometers generally feature complex manufacturing processes, high sensitivity, good detection accuracy, good linearity, low temperature sensitivity, and a certain degree of overload resistance. Torsional capacitive accelerometers have a simple structure, good integration, and can achieve multi-axis detection. However, their detection sensitivity is weaker than that of sandwich-type capacitive accelerometers. Furthermore, the torsional structure exhibits an asymmetrical sensitive mass, making it less suitable for resisting regional stresses caused by large impacts. Compared to the first two structures, comb-type capacitive accelerometers, based on their comb-like structure, can better eliminate coupling between accelerations along different axes, exhibiting lower cross-coupling.

[0004] Comb-type accelerometers typically have two structural types: surface-mount and bulk silicon. Surface-mount structures are fabricated using surface MEMS technology, including movable comb teeth on a mass block and fixed comb teeth around the perimeter. Structures requiring bulk silicon MEMS fabrication are bulk silicon structures. Surface-mount structures have good compatibility with IC processes, but are difficult to fabricate Z-axis sensitive accelerometers due to generally high cross-coupling. Another weakness of surface-mount structures is that measurements are achieved by changing the capacitance of the comb teeth due to variations in the gap between them, resulting in significant air damping. Vacuum encapsulation is generally required to reduce this damping. Bulk silicon comb-type accelerometers maintain a constant gap between the comb teeth during measurement. Measurement is achieved by the relative sliding of the fixed and movable comb teeth, causing changes in the comb tooth capacitance. This results in lower air damping, lower thermomechanical noise, and eliminates the need for vacuum encapsulation. However, bulk silicon structures have longer elastic beams, occupying a larger chip area, which is detrimental to miniaturization.

[0005] To improve the performance of capacitive accelerometers and reduce the problem of excessive chip size occupied by bulk silicon structures, this invention proposes an overlapping structure comb-type capacitive Z-axis accelerometer chip, which has the advantage of low air damping. Its key feature is that the elastic beam is located below the comb-type capacitor to form an overlapping structure, which does not require additional chip area, thus facilitating miniaturization and reducing chip cost. Summary of the Invention

[0006] To address the aforementioned problems, an overlapping structure comb-tooth capacitive Z-axis accelerometer chip and its manufacturing method are provided. A brief overview of the invention is given below to provide a basic understanding of certain aspects of the invention. It should be understood that this overview is not an exhaustive summary of the invention. It is not intended to identify key or essential parts of the invention, nor is it intended to limit the scope of the invention.

[0007] The technical solution of this invention:

[0008] A Z-axis accelerometer chip with an overlapping structure and a comb-like capacitive layer comprises a comb-like capacitor layer and an elastic beam structure layer, which are bonded together to form an integral structure. The integral structure includes a mass block and a frame. The comb-like capacitor layer is made of n-type or p-type single-crystal silicon, with a first region distributed on it. Fixed comb teeth connected to the frame are formed in the first region, and movable comb teeth connected to the mass block are formed in the first region. A metal layer is distributed on the comb-like capacitor layer, and vias communicating with the SOI top silicon layer on the elastic beam structure layer are etched in the region. An elastic beam is formed on the elastic beam structure layer, and the mass block is connected to the frame through the elastic beam. The fixed and movable comb teeth are connected to an external circuit through the metal-deposited region to form an acceleration detection circuit, which converts the acceleration signal into an electrical signal output.

[0009] Preferably, the first region is a p-type or n-type region.

[0010] Preferably, the comb-shaped capacitor layer has a region on which a vapor-deposited metal layer is distributed.

[0011] Preferably, the elastic beam structure layer has symmetrically distributed elastic beams.

[0012] Preferably, the comb-tooth capacitor layer and the elastic beam structure layer are bonded together by an oxide layer.

[0013] The manufacturing method of an overlapped structure comb-type capacitive Z-axis accelerometer chip includes the following main process steps and sequence:

[0014] Step 1: Use an SOI substrate and a single-crystal silicon wafer A to fabricate an elastic beam structure layer. Use etching technology to fabricate the elastic beam on the top silicon layer of the SOI substrate.

[0015] Step 2: The elastic beam of the SOI substrate is bonded to the single crystal silicon wafer A through an oxide layer. After bonding, the silicon wafer A is thinned to the required thickness. Then, a groove is made above the elastic beam by etching technology to expose the elastic beam.

[0016] Step 3: Use monocrystalline silicon wafer B to fabricate the comb-tooth capacitor layer. Bond monocrystalline silicon wafer B to the slotted side of the elastic beam structure layer through the oxide layer, and thin it to the required thickness.

[0017] Step 4: Based on Step 3, perform localized doping to form the first region;

[0018] Step 5: Based on Step 4, thin the back side of the corresponding area of ​​the mass block to leave a suitable movement gap for the mass block to move downward;

[0019] Step Six: After thinning the back side in Step Five, the elastic beam is released using etching technology;

[0020] Step 7: Using wet etching technology, etch the vias to expose the single-crystal silicon layer where the elastic beam is located at the vias, and then etch the lead hole in the first region.

[0021] Step 8: A layer of metal is deposited on the structure with through holes formed in Step 7, and the metal area is etched out. Then, an alloying process is used to make the metal layer and the underlying semiconductor form a good ohmic contact.

[0022] Step 9: Based on Step 8, anodize the back side of the overall structure to a suitable glass sheet;

[0023] Step 10: Using etching technology, create fixed comb teeth and movable comb teeth on the first area.

[0024] Preferably, the process also includes step eleven: using a single-crystal silicon wafer C to fabricate a cover plate, on which an opening for releasing the metal layer is etched and a thinning region is etched to provide a suitable movement gap for the upward displacement of the mass block; finally, the cover plate is bonded to the main structure by BCB bonding to complete the main process fabrication.

[0025] Preferred option: In step three, an n-type or p-type monocrystalline silicon wafer B is used to fabricate the comb-tooth capacitor layer.

[0026] The present invention has the following beneficial effects:

[0027] The sensitive chip of this invention adopts a bulk silicon structure, which has the advantages of Z-axis sensitivity and low damping coefficient;

[0028] The present invention uses a structure in which comb-tooth capacitors and elastic beams are stacked, so that the elastic beams do not need to occupy additional chip area, which is beneficial for miniaturization and can also reduce chip costs.

[0029] The structure of the comb-tooth capacitor and the elastic beam of the present invention avoids the space occupied by the elastic beam around the comb teeth when the plane is placed, so that the distribution space of the comb-tooth capacitor around the mass block is larger, the number of comb teeth is greatly increased, and the capacitance of the comb-tooth structure is effectively increased.

[0030] The overlapping structure of this invention allows the elastic beams to be symmetrically distributed around the mass block, thereby significantly reducing the cross-coupling effects in the X and Y axes. Attached Figure Description

[0031] Figure 1 A schematic diagram of the overlapping structure comb-tooth capacitive z-axis acceleration sensing chip structure of the present invention;

[0032] Figure 2 Appendix to this invention Figure 1 Exploded view;

[0033] Figure 3 Appendix to this invention Figure 1 A magnified view of a section at point I;

[0034] Figure 4.(a) Schematic diagram of step 1 of the preparation method of the present invention;

[0035] Figure 4.(b) Schematic cross-sectional view of AA' in step 1 of the preparation method of the present invention;

[0036] Figure 5 A schematic diagram of the cross-section of AA' after bonding and thinning in step 2 of the preparation method of the present invention;

[0037] Figure 6.(a) Schematic diagram of the structure of the elastic beam exposed by etching in step 2 of the preparation method of the present invention;

[0038] Figure 6.(b) Schematic diagram of the AA' cross-section of the elastic beam exposed by etching in step 2 of the preparation method of the present invention;

[0039] Figure 7 A schematic cross-sectional view of AA' after bonding and thinning in step 3 of the preparation method of the present invention;

[0040] Figure 8.(a) Schematic diagram of step 4 of the preparation method of the present invention;

[0041] Figure 8.(b) Schematic cross-sectional view of AA' in step 4 of the preparation method of the present invention;

[0042] Figure 9 A schematic diagram of the cross-section of AA' after thinning in step 5 of the preparation method of the present invention;

[0043] Figure 10 A schematic cross-sectional view of AA' after releasing the elastic beam in step 6 of the preparation method of the present invention;

[0044] Figure 11.(a) Schematic diagram of step 7 of the preparation method of the present invention;

[0045] Figure 11.(b) Schematic cross-sectional view of BB' in step 7 of the preparation method of the present invention;

[0046] Figure 12.(a) Schematic diagram of step 8 of the preparation method of the present invention;

[0047] Figure 12.(b) Schematic cross-sectional view of BB' in step 8 of the preparation method of the present invention;

[0048] Figure 13 A schematic diagram of the BB' cross-section after anodic bonding of the glass sheet in step 9 of the preparation method of the present invention;

[0049] Figure 14.(a) Schematic diagram of the structure of step 10 of the preparation method of the present invention;

[0050] Figure 14.(b) Schematic cross-sectional view of BB' in step 10 of the preparation method of the present invention;

[0051] Figure 15 A schematic diagram of the structure after etching the back of the cover plate in step 11 of the preparation method of the present invention;

[0052] Figure 16.(a) Schematic diagram of the structure after bonding the cover plate in step 11 of the preparation method of the present invention;

[0053] Figure 16.(b) Schematic cross-sectional view of BB' after bonding the cover plate in step 11 of the preparation method of the present invention;

[0054] Figure 17 A schematic diagram illustrating the dimensions of the elastic beam structure layer of this invention;

[0055] Figure 18.(a) Schematic diagram of the dimensioning of the present invention;

[0056] Figure 18.(b) Schematic diagram of the CC' cross-sectional dimensions of the sensitive structure of the present invention;

[0057] Figure 19 In this embodiment of the invention, the measuring range is ±5g (g = 9.8m / s). 2 Simulated output characteristic curve of sensitive capacitor C1;

[0058] Figure 20 In this embodiment of the invention, the measuring range is ±5g (g = 9.8m / s). 2 Simulated output characteristic curve of sensitive capacitor C2;

[0059] Figure 21 In this embodiment of the invention, the measuring range is ±5g (g = 9.8m / s). 2 Simulated output characteristic curves of sensitive capacitors (C1-C2).

[0060] In the diagram: 1-Comb-tooth capacitor layer; 2-Elastic beam structure layer; 3-Mass block; 4-Frame; 5-First region; 6-Fixed comb teeth; 7-Modible comb teeth; 8-First metal electrode; 9-Second metal electrode; 10-Third metal electrode; 11-First through hole; 12-Second through hole; 13-Elastic beam; 14-Lead hole; 31-First mass block; 32-Second mass block; 33-Third mass block; 41-First frame; 42-Second frame; 43-Third frame; 111-First frame through hole; 113-Third frame through hole; 121-First mass block through hole; 123-Third mass block through hole. Detailed Implementation

[0061] To make the objectives, technical solutions, and advantages of this invention clearer, the invention is described below with reference to specific embodiments shown in the accompanying drawings. However, it should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0062] Specific implementation method one: Combining Figure 1-2This embodiment describes a stacked structure comb-type capacitive Z-axis accelerometer chip, comprising a comb-type capacitor layer 1 and an elastic beam structure layer 2. The comb-type capacitor layer 1 is disposed on the elastic beam structure layer 2, and the two are connected by an oxide layer to form an integral structure. A mass block 3 and a frame 4 are fabricated on the integral structure using bulk silicon MEMS processing technology. The comb-type capacitor layer 1 is made of n-type or p-type single-crystal silicon, and p-type or n-type regions (first region 5) are distributed on it. Solid-state components connected to the frame 4 are fabricated on the p-type or n-type regions. The fixed comb tooth 6 and the movable comb tooth 7 are connected to the mass block 3. The comb tooth capacitor layer 1 also has regions 8, 9 and 10 with evaporated metal layers distributed on it. Through holes 11 and 12 communicating with the SOI top silicon layer on the elastic beam structure layer 2 are etched on regions 9 and 10. The elastic beam structure layer 2 has symmetrically distributed elastic beams 13. The mass block 3 is connected to the frame 4 through the elastic beams 13. The fixed comb tooth 6 and the movable comb tooth 7 are connected to the external circuit through the regions 8 and 9 with evaporated metal layers to form an acceleration detection circuit, which converts the acceleration signal into an electrical signal output.

[0063] Specific Implementation Method Two: Combining Figure 1-1 6. Description of this embodiment: The manufacturing method of the overlapping structure comb-tooth capacitive Z-axis accelerometer chip of this embodiment is used to prepare the overlapping structure comb-tooth capacitive Z-axis accelerometer chip described in Specific Embodiment 1. The main process steps and sequence are as follows:

[0064] Step 1: Use an SOI substrate and a single-crystal silicon wafer A to fabricate an elastic beam structure layer 2, and use etching technology to fabricate an elastic beam 13 on the top silicon layer of the SOI substrate;

[0065] Step 2: The elastic beam of the SOI substrate is bonded to the single crystal silicon wafer A through an oxide layer. After bonding, the silicon wafer A is thinned to the required thickness. Then, a groove is made above the elastic beam using an etching technique to expose the elastic beam 13.

[0066] Step 3: Use an n-type (or p-type) monocrystalline silicon wafer B to fabricate the comb-tooth capacitor layer 1. Bond the silicon wafer B to the slotted side of the elastic beam structure layer 2 through the oxide layer, and thin it to the required thickness.

[0067] Step 4: Based on Step 3, perform local doping to form the first region 5;

[0068] Step 5: Based on Step 4, thin the back side of the corresponding area of ​​mass block 3 to leave a suitable movement gap for the downward displacement of mass block 3;

[0069] Step Six: After thinning the back side in Step Five, the elastic beam 13 is released by etching technology;

[0070] Step 7: Using wet etching technology, etch through holes 11 and 12 to expose the single crystal silicon layer where the elastic beam 13 is located, and then etch the lead hole 14 on the first region 5.

[0071] Step 8: A layer of metal is deposited on the structure with through holes formed in Step 7, and metal regions 8, 9 and 10 are etched out. Then, an alloying process is used to make the metal layer and the underlying semiconductor form a good ohmic contact.

[0072] Step 9: Based on Step 8, anodize the back side of the overall structure to a suitable glass sheet;

[0073] Step 10: Using etching technology, fixed comb teeth 6 and movable comb teeth 7 are fabricated on the first region 5;

[0074] Step 11: A cover plate is fabricated using a single-crystal silicon wafer C. The cover plate has openings for releasing the metal layer regions 8 and 9, and thinning regions are etched to provide a suitable movement gap for the upward displacement of the mass block 3. Finally, the cover plate is bonded to the main structure using BCB bonding to complete the main fabrication process.

[0075] In addition to the advantage of a small damping coefficient, this invention also has the following three advantages: First, the structure of overlapping comb capacitors and elastic beams does not require additional chip area, which is beneficial for miniaturization and can also reduce chip costs; Second, the structure of overlapping comb capacitors and elastic beams avoids the space occupied by the elastic beams around the mass block when the plane is placed, which greatly increases the number of comb teeth and effectively increases the capacitance of the comb structure; Third, the overlapping structure allows the elastic beams to be symmetrically distributed around the mass block, which significantly reduces the cross-coupling effect in the X and Y axis directions.

[0076] Example 1:

[0077] Combination Figure 1-21As shown: The overlapping structure comb-type capacitive Z-axis accelerometer chip refers to the accelerometer chip or similar chip shown in the attached figures of this invention and its manufacturing method. The chip includes a comb-type capacitor layer 1 and an elastic beam structure layer 2, which are connected by an oxide layer to form an integral structure. The integral structure includes a mass block 3 and a frame 4. A p-type or n-type region (first region 5) is formed on the comb-type capacitor layer 1 using a doping process. Fixed comb teeth 6 connected to the frame 4 and connected to the mass block 3 are formed on the p-type or n-type region. The movable comb teeth 7, the comb tooth capacitor layer 1 also has regions 8, 9 and 10 with evaporated metal layers distributed on them, and through holes 11 and 12 are etched on regions 9 and 10 to communicate with the SOI top silicon layer on the elastic beam structure layer 2; the elastic beam structure layer 2 has symmetrically distributed elastic beams 13, and the mass block 3 is connected to the frame 4 through the elastic beams 13; the fixed comb teeth 6 and the movable comb teeth 7 are connected to the external circuit through the regions 8 and 9 with evaporated metal layers to form an acceleration detection circuit, which converts the acceleration signal into an electrical signal output;

[0078] Using the overlapping comb-type capacitive Z-axis acceleration sensing structure proposed in this invention, two ranges with a range of ±5g (g = 9.8 m / s²) are designed. 2 The acceleration-sensitive structure chip has two capacitances, C1 and C2, respectively. C1 has a fixed comb tooth set to low-profile and a movable comb tooth set to high-profile; C2 has a fixed comb tooth set to high-profile and a movable comb tooth set to low-profile. All other dimensions of the two are identical. (C1-C2) represents the difference between the two capacitances, which changes linearly with the applied acceleration. This invention measures acceleration by measuring this difference. By processing the difference between the output capacitance values ​​of the two complementary structures, C1 and C2, nonlinear errors can be effectively offset, thereby significantly improving the linearity of the output characteristic curve.

[0079] The dimensions of the acceleration-sensitive structure of C1 are as follows: Figure 17 As shown in Figure 18, where l1, w1, and h1 are the length, width, and height of the overall structure; h2 is the height of the elastic beam structure layer; l2 and w2 are the length and width of the frame connection; l3 and w3 are the length and width of the mass block connection; l4, w4, and h4 are the length, width, and height of the elastic beam; h5 is the distance from the bottom surface of the elastic beam to the bottom surface of the sensitive structure; l5 is the length of the folded part of the elastic beam; w5 is the width of the mass block; w6 is the distance between the elastic beam and the frame; w7 is the distance between the elastic beam and the mass block; w8 is the width of the comb teeth; h6 and h7 are the heights of the fixed and movable comb teeth; h8 is the thickness of the oxide layer; h9 is the depth of thinning at the bottom of the mass block; w9 is the width of the doped region; h3 is the thickness of the metal layer; w 10 w is the width of the through-hole electrode of the mass block. 11 For the width of the through hole in the mass block, l6 and w 12w represents the length and width of the border electrode. 13 w is the width of the through hole in the border. 14 This represents the width of the doped electrode. Its main structural parameters are shown in Table 1:

[0080] Table 1 shows the sensitive structural parameters using a high-low misalignment distribution.

[0081]

[0082]

[0083] The dimensions of the acceleration-sensitive structure of C2 are exactly the same as those of C1, except that the fixed comb height (h5) and the movable comb height (h6) are swapped from 50 and 62 in C1 to 62 and 50; the thickness of the oxide layer contained in the sensitive structures of C1 and C2 is 1 μm.

[0084] For the two acceleration-sensitive chips with the above-mentioned size parameters, the finite element method was used to perform simulation analysis, and the response characteristic curves of their capacitance changing with the loading acceleration were obtained. Figure 19 The simulation output characteristic curve of the sensitive chip C1 (fixed comb teeth are low comb teeth, movable comb teeth are high comb teeth); Figure 20 The image shows the simulated output characteristic curve of the sensitive chip C2 (fixed comb teeth are high-quality comb teeth, movable comb teeth are low-quality comb teeth); this invention measures acceleration by measuring the difference (C1-C2), and its output characteristic curve can be obtained from... Figure 19 and Figure 20 Obtain, such as Figure 21 As shown; when measuring acceleration using the difference (C1-C2), the output difference capacitance exhibits a good linear relationship with the acceleration, with a nonlinearity of approximately 0.126% FS, a sensitivity of approximately 0.364 pF / g, and a lateral cross-coupling coefficient of approximately 0.1923%; Figure 21 and Figure 19 and Figure 20 As can be seen from the comparison, the difference method effectively cancels out the nonlinear errors of C1 and C2, and significantly improves the linearity of the output characteristic curve;

[0085] The manufacturing method of the overlapping structure comb-type capacitive Z-axis acceleration sensing chip proposed in this invention is as follows:

[0086] Step 1: Referring to Figure 4, use an SOI substrate and a double-polished single-crystal silicon wafer A to fabricate the elastic beam structure layer 2, and use etching technology to fabricate the elastic beam 13 on the top silicon layer of the SOI substrate.

[0087] Step Two: Refer to Figure 5As shown in Figure 6, one side of the elastic beam of the SOI substrate is bonded to the single crystal silicon wafer A through an oxide layer. After bonding, the silicon wafer A is thinned to the required thickness. Then, a groove is made above the elastic beam through etching technology to expose the elastic beam 13.

[0088] Step 3: Refer to Figure 7 The comb-tooth capacitor layer 1 is fabricated using an n-type (or p-type) double-polished single crystal silicon wafer B. The silicon wafer B is bonded to the slotted side of the elastic beam structure layer 2 through an oxide layer and then thinned to the required thickness.

[0089] Step 4: Referring to Figure 8, based on Step 3, perform local doping to form p-type (or n-type) regions;

[0090] Step 5: Refer to Figure 9 Based on step four, the back side of the corresponding area of ​​mass block 3 is thinned to a depth of about 8μm to leave a suitable movement gap for the downward displacement of mass block 3.

[0091] Step Six: Refer to Figure 10 After thinning the back side in step five, the elastic beam 13 is released by etching technology;

[0092] Step 7: Referring to Figure 11, use wet etching technology to etch through holes 11 and 12 to expose the single crystal silicon layer where the elastic beam 13 is located. Then etch the lead hole 14 on the p-type (or n-type) region.

[0093] Step 8: Referring to Figure 12, a layer of metal (Au / Al) is deposited on the structure with through holes formed in Step 7, and metal regions 8, 9 and 10 are etched out. Then, an alloying process is used to make the metal layer and the underlying semiconductor form a good ohmic contact.

[0094] Step Nine: Refer to Figure 13 Based on step (8), the back side of the overall structure is anodicly bonded to the electrostatic bonding glass sheet;

[0095] Step 10: Referring to Figure 14, using etching technology, fixed comb teeth 6 and movable comb teeth 7 are fabricated on the p-type (or n-type) region. The height difference between the fixed comb teeth 6 and the movable comb teeth 7 is 12μm.

[0096] Step Eleven: Refer to Figure 15 As shown in Figure 16, a cover plate is fabricated using a double-polished single-crystal silicon wafer C. The cover plate is etched with openings corresponding to the metal layer regions 8 and 9, and a thinning region is etched with a thinning depth of about 8 μm to provide a suitable movement gap for the upward displacement of the mass block 4. Finally, the cover plate is bonded to the main structure with BCB adhesive to complete the main process fabrication.

[0097] The overlapping comb-tooth capacitive Z-axis accelerometer structure and its manufacturing method proposed in this invention can be designed with structural parameters that meet the performance requirements of different application fields to manufacture the sensitive chip. The fabricated overlapping comb-tooth capacitive accelerometer chip can be used in various fields such as automotive, consumer electronics, industry, geological exploration, earthquake monitoring, and national defense.

[0098] Example 2:

[0099] Combination Figure 1-21 As shown:

[0100] The overlapping structure comb-capacitive Z-axis acceleration sensing chip includes a comb-capacitive layer 1, an elastic beam structure layer 2, a first metal region 8, a second metal region 9, and a third metal region 10. The lower part of the comb-capacitive layer 1 is connected to the upper part of the elastic beam structure layer 2. The right side of the comb-capacitive layer 1 has a first region 5. The center of the first region 5 of the comb-capacitive layer 1 is located in the third metal region 10. The upper left side of the comb-capacitive layer 1 has a second metal region 9 and a first metal region 8 arranged front to back. The first metal region 8 is connected to the first region 5. A first through-hole 11 is provided at metal region 9, and a second through-hole 12 is provided at the third metal region 10; the comb capacitor layer 1 is made of n-type (or p-type) single crystal silicon, and a first region 5 of p-type (or n-type) is distributed on it. The first region 5 is provided with fixed comb teeth 6 connected to the frame 4 and movable comb teeth 7 connected to the mass block 3. Regions 8, 9, and 10 with evaporated metal layers are also distributed on the comb capacitor layer 1. A first through-hole 11 and a second through-hole 12 communicating with the SOI top silicon layer on the elastic beam structure layer 2 are etched on regions 9 and 10.

[0101] The comb-tooth capacitor layer 1 is made of silicon wafer B (monocrystalline silicon wafer). The comb-tooth capacitor layer 1 includes a third mass block 33, a third frame 43, fixed comb teeth 6 and movable comb teeth 7. The third mass block 33 is set in the third mounting port inside the third frame 43. The third mounting port is located inside the first region 5. The fixed comb teeth 6, movable comb teeth 7, third mass block 33 and the edge of the third mounting port of the third frame 43 form the first region 5. Movable comb teeth 7 are evenly arranged on the four sides of the square third mass block 33. Fixed comb teeth 6 are arranged on the inner sidewall of the third frame 43 corresponding to the movable comb teeth 7. The movable comb teeth 7 and the fixed comb teeth 6 are arranged intersectingly.

[0102] The first metal area 8 is connected to the edge of the third mounting port of the third frame 43, and the connection part is provided with a lead wire hole 14.

[0103] The elastic beam structure layer 2 includes a silicon wafer A (monocrystalline silicon wafer) and an SOI substrate, and the comb capacitor layer 1, silicon wafer A, and SOI substrate are connected sequentially from top to bottom;

[0104] The silicon wafer A includes a first mass block 31 and a first frame 41. The first frame 41 has a first mounting port that corresponds to the third mounting port of the third frame 43. The first frame 41 has a first mass block 31 inside the first mounting port. The first frame 41 is connected to the third frame 43, and the third mass block 33 is connected to the first mass block 31.

[0105] The SOI substrate includes a second mass block 32, a second frame 42, and an elastic beam 13. The second mass block 32 is disposed in the second mounting port of the second frame 42. The upper side of the second frame 42 is connected to the upper side of the second mass block 32 through the elastic beam 13. The second frame 42 is correspondingly connected to the first frame 41, and the second mass block 32 is correspondingly connected to the first mass block 31. The elastic beam structure layer 2 is fabricated with symmetrically distributed elastic beams 13. The mass block 3 is connected to the frame 4 through the elastic beam 13. The fixed comb teeth 6 and the movable comb teeth 7 are connected to the external circuit through the areas 8 and 9 of the metal layer to form an acceleration detection circuit, which converts the acceleration signal into an electrical signal output.

[0106] The second frame 42 has a first protrusion at each of the four corners of the second mounting port, and the second mass block 32 has a second protrusion at the center of each of the four sides. The elastic beam 13 has a zigzag structure (similar to a Z-shape). An elastic beam 13 is provided between adjacent first and second protrusions. The thickness of the elastic beam 13 is less than the thickness of the second mass block 32 or the second frame 42.

[0107] The third mass block 33 has a third mass block through hole 123, the first mass block 31 has a first mass block through hole 121, and the third mass block through hole 123 and the first mass block through hole 121 are correspondingly arranged to form a second through hole 12. The third frame 43 has a third frame through hole 113, the first frame 41 has a first frame through hole 111, and the third frame through hole 113 and the first frame through hole 111 are correspondingly arranged to form a first through hole 11. The third mass block 33, the first mass block 31, and the second mass block 32 are arranged in sequence to form a mass block 3, and the third frame 43, the first frame 41, and the second frame 42 are arranged in sequence to form a frame 4. The comb-tooth capacitor layer 1 is disposed on the elastic beam structure layer 2, and the two are connected by an oxide layer to form an integral structure. The mass block 3 and the frame 4 are fabricated in the integral structure using bulk silicon MEMS processing technology.

[0108] The inner walls of the second through hole 12 and the first through hole 11 have a metal layer. The second mass block 32 has a metal layer at the position corresponding to the second through hole 12. The second frame 42 has a metal layer at the position corresponding to the first through hole 11. The metal plating of the second through hole 12 is connected to the third metal region 10. The metal plating of the first through hole 11 is connected to the second metal region 9.

[0109] Both the second through hole 12 and the first through hole 11 are trapezoidal, wider at the top and narrower at the bottom;

[0110] This invention improves the performance of capacitive accelerometers and reduces the problem of excessive chip volume occupied by bulk silicon structures. This invention proposes an overlapping structure comb-type capacitive Z-axis accelerometer chip, which has the advantage of low air damping. The elastic beam is located under the comb-type capacitor to form an overlapping structure, which does not require additional chip area, which is conducive to miniaturization and can also reduce chip cost.

[0111] The method for fabricating an overlapping structure comb-type capacitive Z-axis accelerometer chip includes the following steps:

[0112] Step 1: Referring to Figure 4, use an SOI substrate and a double-polished single-crystal silicon wafer A to fabricate the elastic beam structure layer 2, and use etching technology to fabricate the elastic beam 13 on the top silicon layer of the SOI substrate.

[0113] Step Two: Refer to Figure 5 As shown in Figure 6, one side of the elastic beam of the SOI substrate is bonded to the single crystal silicon wafer A through an oxide layer. After bonding, the single crystal silicon wafer A is thinned to the required thickness. Then, a groove is made on the single crystal silicon wafer A above the elastic beam 13 using an etching technique to expose the elastic beam 13.

[0114] In step two, silicon wafer A is divided into an outer first frame 41 and an inner first mass block 31 that are not connected to each other;

[0115] Step 3: Refer to Figure 7 The comb-tooth capacitor layer 1 is made by using a double-polished monocrystalline silicon wafer B. The monocrystalline silicon wafer B is bonded to one side of the slotted elastic beam structure layer 2 through an oxide layer, and the monocrystalline silicon wafer B is thinned to the required thickness.

[0116] In step three, the double-polished single-crystal silicon wafer B is an n-type or p-type double-polished single-crystal silicon wafer B;

[0117] Step 4: Referring to Figure 8, based on Step 3, perform local doping to form the first region 5;

[0118] In step four, the double-polished single-crystal silicon wafer B is locally doped, and the first region 5 formed is the n-type region or p-type region corresponding to step three.

[0119] Step 5: Refer to Figure 9 Based on step four, the back side of the SOI substrate in the region corresponding to mass block 3 is thinned;

[0120] In step five, the thinning depth is approximately 8 μm, leaving a suitable movement gap for the downward displacement of mass block 3;

[0121] Step Six: Refer to Figure 10 After thinning the back side in step five, the elastic beam 13 is released by etching technology;

[0122] In step six, a groove is made on the bottom silicon of the SOI substrate at the position corresponding to the elastic beam 13 to expose the elastic beam 13. Then, the top silicon of the SOI substrate is separated from the frame portion of the SOI substrate. In this step, the SOI substrate is divided into an outer second frame 42 and an inner second mass block 32. The second frame 42 and the second mass block 32 are connected by the elastic beam 13, which is elastic.

[0123] Step 7: Referring to Figure 11, use wet etching technology to etch the first through hole 11 and the second through hole 12 to expose the single crystal silicon layer where the elastic beam 13 is located. Then etch the lead hole 14 on the first region 5.

[0124] In step seven, through holes are processed on monocrystalline silicon wafer B and monocrystalline silicon wafer A to form the first through hole 11 and the second through hole 12;

[0125] Step 8: Referring to Figure 12, a layer of metal is deposited on the structure formed in Step 7 with the first through hole 11 and the second through hole 12, and the first metal region 8, the second metal region 9 and the third metal region 10 are etched on the comb capacitor layer 1. Then, the metal layer and the semiconductor underneath are made to form a good ohmic contact through an alloying process, and the first metal region 8 is connected to the lead hole 14 of the first region 5.

[0126] In step eight, the metal is Au / Al, and it is vapor-deposited on the inner walls of the first through hole 11 and the second through hole 12 and on the SOI substrate at the positions corresponding to the through holes.

[0127] Step Nine: Refer to Figure 13 Based on step eight, the back side of the overall structure (the back side of the SOI substrate) is anodicly bonded to the electrostatic bonding glass sheet;

[0128] Step 10: Referring to Figure 14, use etching technology to create fixed comb teeth 6 and movable comb teeth 7 in the second region;

[0129] In step ten, similar to steps three and four, the second region is a p-type or n-type region. The height difference between the fixed comb teeth 6 and the movable comb teeth 7 is 12μm. The height of the fixed comb teeth 6 is less than the height of the movable comb teeth 7. The second region divides the comb tooth capacitor layer 1 into an outer third frame 43 and an inner third mass block 33 that are not connected to each other. Fixed comb teeth 6 are uniformly processed on the inner wall of the third frame 43, and movable comb teeth 7 are uniformly processed on the outer wall of the third mass block 33. The fixed comb teeth 6 and the movable comb teeth 7 are arranged in a cross pattern. The third mass block 33, the first mass block 31, and the second mass block 32 are sequentially arranged to form the mass block 3. The third frame 43, the first frame 41, and the second frame 42 are sequentially arranged to form the frame 4.

[0130] Step Eleven: Refer to Figure 15As shown in Figure 16, a cover plate is made using a double-polished single-crystal silicon wafer C. The cover plate is etched with openings corresponding to the first metal region 8 and the second metal region 9, and a thinning region corresponding to the mass block 3 is etched at the bottom. Finally, the cover plate is bonded to the main structure (comb capacitor layer 1) using BCB adhesive to complete the main process fabrication.

[0131] In step eleven, the depth of the thinning zone is approximately 8 μm, providing a suitable movement gap for the upward displacement of mass block 3;

[0132] This invention relates to a technical method for improving the performance of capacitive accelerometer chips and a method for manufacturing such chips. It belongs to the sensor technology in the field of micro-electromechanical systems (MEMS). Improving the performance of comb-tooth capacitive accelerometer chips can effectively reduce their area and has the advantages of high output linearity and low cross-coupling.

[0133] It should be noted that in the above embodiments, as long as the technical solutions are not contradictory, they can be permuted and combined. Those skilled in the art can exhaust all possibilities based on the mathematical knowledge of permutation and combination. Therefore, the present invention will not describe the technical solutions after permutation and combination one by one, but it should be understood that the technical solutions after permutation and combination have been disclosed by the present invention.

[0134] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. An overlapped structure comb-type capacitive Z-axis acceleration sensing chip, characterized in that: The structure includes a comb-tooth capacitor layer (1) and an elastic beam structure layer (2), which are bonded together to form an integral structure. The integral structure includes a mass block (3) and a frame (4). The comb-tooth capacitor layer (1) is made of n-type or p-type monocrystalline silicon, and a first region (5) is distributed on it. Fixed comb teeth (6) connected to the frame (4) are formed on the first region (5), and movable comb teeth (7) connected to the mass block (3) are formed on the first region (5). The comb-tooth capacitor layer (1) is divided into The regions (8, 9, 10) with metal layers are etched with vias (11, 12) that communicate with the top layer silicon of SOI on the elastic beam structure layer (2); an elastic beam (13) is fabricated on the elastic beam structure layer (2), and the mass block (3) is connected to the frame (4) through the elastic beam (13); the fixed comb teeth (6) and the movable comb teeth (7) are connected to the external circuit through the regions (8, 9) with metal layers to form an acceleration detection circuit, which converts the acceleration signal into an electrical signal output; The elastic beam structure layer (2) is fabricated with symmetrically distributed elastic beams (13); The comb-shaped capacitor layer (1) and the elastic beam structure layer (2) are bonded together through an oxide layer.

2. The overlapping structure comb-type capacitive Z-axis acceleration sensing chip according to claim 1, characterized in that: The first region (5) is a p-type or n-type region.

3. The overlapping structure comb-type capacitive Z-axis acceleration sensing chip according to claim 1, characterized in that: The comb capacitor layer (1) has regions (8, 9, 10) where vapor-deposited metal layers are distributed.

4. The manufacturing method of the overlapping structure comb-type capacitive Z-axis acceleration sensing chip according to any one of claims 1-3, characterized in that: Includes the following steps: Step 1: Use an SOI substrate and a single-crystal silicon wafer A to fabricate an elastic beam structure layer (2), and use etching technology to fabricate an elastic beam on the top silicon layer of the SOI substrate (13). Step 2: The elastic beam of the SOI substrate is bonded to the single crystal silicon wafer A through an oxide layer. After bonding, the single crystal silicon wafer A is thinned to the required thickness. Then, a groove is made above the elastic beam by etching technology to expose the elastic beam (13). Step 3: Use monocrystalline silicon wafer B to fabricate the comb-tooth capacitor layer (1), bond the monocrystalline silicon wafer B to the slotted side of the elastic beam structure layer (2) through the oxide layer, and thin it to the required thickness; Step 4: Based on step 3, perform local doping to form the first region (5); Step 5: Based on step 4, the back side of the corresponding area of ​​the mass block (3) is thinned to leave a suitable movement gap for the downward displacement of the mass block (3); Step 6: After thinning the back side in step 5, the elastic beam (13) is released by etching technology. Step 7: Using wet etching technology, etch through holes (11, 12) to expose the single crystal silicon layer where the elastic beam (13) is located at the through holes, and then etch the lead hole (14) on the first region (5). Step 8: A layer of metal is deposited on the structure with through holes formed in Step 7, and the metal areas (8, 9, 10) are etched out. Then, an alloying process is used to make the metal layer and the underlying semiconductor form a good ohmic contact. Step 9: Based on Step 8, anodize the back side of the overall structure to a suitable glass sheet; Step 10: Using etching technology, fixed comb teeth (6) and movable comb teeth (7) are made on the first region (5).

5. The manufacturing method of the overlapping structure comb-type capacitive Z-axis acceleration sensing chip according to claim 4, characterized in that: It also includes step eleven: using a single-crystal silicon wafer C to make a cover plate, on which openings for releasing the metal layer region (8, 9) are etched and thinning regions are etched to provide a suitable movement gap for the mass block (3) to move upward; finally, the cover plate is bonded to the main structure by BCB to complete the main process fabrication.

6. The method for manufacturing the overlapping structure comb-type capacitive Z-axis acceleration sensing chip according to claim 4, characterized in that: In step three, the comb-tooth capacitor layer is fabricated using an n-type or p-type single-crystal silicon wafer B (1).

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