A startup circuit for ultra-low power consumption BGR circuit
By adopting the design of current mirror and intrinsic tube in the BGR circuit, combined with bipolar junction transistor and capacitor, the problem that the startup circuit of the existing ultra-low power BGR circuit cannot be completely shut down is solved, and low power consumption and stable operation within a wide power supply voltage range are achieved.
Patent Information
- Application Number
- CN202511022923.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-24
- Publication Date
- 2025-09-23
- Estimated Expiration
- 2045-07-24
AI Technical Summary
The existing ultra-low power BGR circuit startup circuit cannot be completely shut down when the BGR is working normally, resulting in high power consumption and instability in a wide power supply voltage range. In particular, there is a risk that the startup circuit will not work in the 1.62-3.63V voltage range.
PMOS tubes P1-P5 are used to form a current mirror, and NMOS tubes N1-N4 provide high resistance for the intrinsic tube. The total gate length is increased by connecting NMOS tubes in series to increase the resistance value. The collector and base of the bipolar junction pnp transistors Q1-Q3 are grounded. Combined with the design of capacitors C1 and C2, the startup circuit is turned off when the BGR is working normally, consuming only very small power consumption, and it works not only in the power-up stage.
The startup circuit is turned off when the BGR is working normally, which consumes very little power, reduces the risk of the circuit in a wide power supply voltage range, and ensures that the circuit works stably in the voltage range of 1.62-3.63V.