Display panel and display device

Abstract

The invention discloses a display panel and a display device. The display panel comprises a pixel circuit and a light-emitting element. The pixel circuit comprises a driving transistor and a plurality of switching transistors; a first gate of the driving transistor is located on one side of the first active layer, and a second gate is located on one side of the first active layer away from the first gate; the first gate is used for receiving data signals, and the second gate is used for receiving first control signals; the driving transistor is used for selectively providing driving current for the light-emitting element; the switch transistor comprises a third grid electrode and a second active layer, the second active layer and the first active layer are arranged on the same layer, the third grid electrode is located on one side of the second active layer and arranged on the same layer with the first grid electrode, and the third grid electrode is used for receiving scanning signals; the display brightness of the display panel comprises first display brightness and second display brightness; the first control signal under the first display brightness is a first voltage, and the first control signal under the second display brightness is a second voltage; the first voltage is different from the second voltage.

Description

Technical Field

[0001] This invention relates to the field of display technology, and more particularly to a display panel and display device. Background Technology

[0002] With the development of display technology, people have higher and higher requirements for display quality. Organic light-emitting display panels are widely used in various real devices because of their advantages such as self-illumination, low power consumption, thinner and lighter weight, and high color gamut.

[0003] Currently, organic light-emitting display panels typically use current driving, which requires the placement of driving transistors in the pixel circuits of the organic light-emitting display panel to convert the received data voltage signals into driving current.

[0004] To ensure a stable drive current output from the driving transistor, a dual-gate structure is sometimes used, with the bottom gate receiving a fixed voltage signal. However, this fixed voltage signal causes a shift in the output characteristics of the driving transistor, resulting in inaccurate drive current output. Consequently, this leads to inaccurate brightness readings on the display panel, negatively impacting its display performance. Summary of the Invention

[0005] This invention provides a display panel and display device to improve the accuracy and stability of the drive current output by the driving transistor, thereby improving the display effect of the display panel.

[0006] According to one aspect of the present invention, a display panel is provided, comprising: pixel circuitry and light-emitting elements;

[0007] The pixel circuit includes a driving transistor and multiple switching transistors;

[0008] The driving transistor includes a first gate, a second gate, and a first active layer. The first gate is located on one side of the first active layer, and the second gate is located on the side of the first active layer away from the first gate. The first gate is used to receive a data signal, and the second gate is used to receive a first control signal. The driving transistor is used to selectively provide driving current to the light-emitting element.

[0009] The switching transistor includes a third gate and a second active layer. The second active layer is disposed on the same layer as the first active layer. The third gate is located on one side of the second active layer and is disposed on the same layer as the first gate. The third gate is used to receive a scan signal.

[0010] The display brightness of the display panel includes a first display brightness and a second display brightness; the first control signal under the first display brightness is a first voltage, and the first control signal under the second display brightness is a second voltage;

[0011] The first voltage is different from the second voltage.

[0012] According to another aspect of the present invention, a display device is provided, comprising the display panel described above.

[0013] The technical solution of this invention includes a pixel circuit comprising a driving transistor and multiple switching transistors. The switching transistors provide corresponding signals to the driving transistor for initialization, data writing, and threshold compensation, enabling the driving transistor to selectively provide driving current to the light-emitting element to drive it to emit light. The driving transistor comprises a first gate, a second gate, and a first active layer, with the first and second gates located on opposite sides of the first active layer. The first gate serves as a fine control terminal for the driving transistor to control the generation of a corresponding current, while the second gate serves as an auxiliary control terminal for the driving transistor to receive the first control signal. This improves the stability of the driving current generated by the driving transistor and allows the second gate to act as an electrostatic shielding layer and a light-shielding layer, ensuring the accuracy of the driving transistor's output characteristics and reducing leakage current. Furthermore, by setting the first voltage of the first control signal at a first display brightness to be different from the second voltage at a second display brightness, the voltage of the first control signal is adjusted according to the display brightness. This is particularly effective during high-brightness displays, preventing the voltage of the first control signal from causing characteristic shifts in the driving transistor, thus improving the accuracy of the display panel's brightness and ultimately enhancing the display effect.

[0014] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the film structure of a pixel circuit in the prior art;

[0017] Figure 2 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention;

[0018] Figure 3 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention;

[0019] Figure 4 This is a schematic diagram of the film layer structure of a display panel provided in an embodiment of the present invention.

[0020] Figure 5 This is a schematic diagram illustrating the relationship between display brightness and a first control signal according to an embodiment of the present invention;

[0021] Figure 6 This is a schematic diagram illustrating another relationship between display brightness and the first control signal provided in an embodiment of the present invention;

[0022] Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention;

[0023] Figure 8 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0024] Figure 9 This is a schematic diagram of the film structure of a switching transistor provided in an embodiment of the present invention;

[0025] Figure 10 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0026] Figure 11 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0027] Figure 12 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0028] Figure 13 This is a schematic diagram of another film structure of a switching transistor provided in an embodiment of the present invention;

[0029] Figure 14 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention;

[0030] Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention. Detailed Implementation

[0031] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0032] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0033] Figure 1 This is a schematic diagram of the film layer structure of a pixel circuit in the prior art, for reference. Figure 1 As described in the background section, the display panel 10' includes a pixel circuit 12' and a light-emitting element 13' sequentially disposed on a substrate 11'. The pixel circuit 12' includes a driving transistor M0', which includes a top gate G01', a bottom gate G02', and an active layer 121', with the top gate G01' and the bottom gate G02' located on opposite sides of the active layer 121'. The bottom gate G02' receives a high-level fixed voltage Pvdd' to regulate the threshold voltage of the driving transistor M0', thereby enhancing the driving capability of the driving transistor M0'. This ensures that the driving current generated by the driving transistor M0' is not significantly disturbed, resulting in strong stability. Especially for low grayscale display images, this provides strong driving force for the driving transistor M0', leading to a stable image and excellent display effect.

[0034] However, if the bottom gate G02′ is kept at a fixed voltage Pvdd′ for an extended period, the electric field of the fixed voltage Pvdd′ will cause the active layer 121′ to form an inversion layer. This results in a negative bias in the output characteristics of the driving transistor M0′, leading to a decrease in the driving current when the top gate G01′ receives the same data voltage. Consequently, the brightness of the light-emitting element 13′ decreases, resulting in inaccurate display brightness on the display panel. This is particularly noticeable in the high-brightness mode (HBM) and average pixel level (APL) brightness, failing to meet the high-brightness display requirements and affecting the display effect.

[0035] To address the aforementioned technical problems, embodiments of the present invention provide a display panel, comprising: a pixel circuit and a light-emitting element; the pixel circuit includes a driving transistor and a plurality of switching transistors; the driving transistor includes a first gate, a second gate, and a first active layer, the first gate being located on one side of the first active layer, and the second gate being located on the side of the first active layer away from the first gate; the first gate is used to receive a data signal, and the second gate is used to receive a first control signal; the driving transistor is used to selectively provide driving current to the light-emitting element; the switching transistor includes a third gate and a second active layer, the second active layer being disposed on the same layer as the first active layer, the third gate being located on one side of the second active layer and disposed on the same layer as the first gate, and the third gate being used to receive a scan signal; the display brightness of the display panel includes a first display brightness and a second display brightness; the first control signal at the first display brightness is a first voltage, and the first control signal at the second display brightness is a second voltage; the first voltage and the second voltage are different.

[0036] The above technical solution involves a pixel circuit comprising a driving transistor and multiple switching transistors. The switching transistors provide corresponding signals to the driving transistor for initialization, data writing, and threshold compensation, enabling the driving transistor to selectively provide driving current to the light-emitting element to drive it to emit light. The driving transistor includes a first gate, a second gate, and a first active layer, with the first and second gates located on opposite sides of the first active layer. The first gate serves as a fine control terminal for the driving transistor to control the generation of corresponding current, while the second gate serves as an auxiliary control terminal receiving the first control signal. This improves the stability of the driving current generated by the driving transistor and allows the second gate to act as an electrostatic shielding layer and a light-shielding layer, ensuring the accuracy of the driving transistor's output characteristics and reducing leakage current. Furthermore, by setting the first voltage of the first control signal at a first display brightness level to be different from the second voltage at a second display brightness level, the voltage of the first control signal is adjusted according to the display brightness. This is particularly effective during high-brightness displays, preventing the voltage of the first control signal from causing characteristic deviations in the driving transistor, thus improving the accuracy of the display panel's brightness and ultimately enhancing the display effect.

[0037] The above outlines the core ideas of this application. The technical solutions in the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are merely some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0038] Figure 2 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Figure 3 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the film layer structure of a display panel provided in an embodiment of the present invention, in conjunction with reference to the reference. Figure 2 , Figure 3 and Figure 4 This invention provides a display panel 100, which includes a pixel circuit 10 and a light-emitting element 20. The pixel circuit 10 includes a driving transistor T0 and a plurality of switching transistors T1. The driving transistor T0 includes a first gate G1, a second gate G2 and a first active layer 11. The first gate G1 is located on one side of the first active layer 11, and the second gate G2 is located on the side of the first active layer 11 away from the first gate G1. The first gate G1 is used to receive a data signal Vdata, and the second gate G2 is used to receive a first control signal Vc. The driving transistor T0 is used to selectively provide driving current to the light-emitting element 20. The switching transistors T1 include a third gate G3 and a second active layer 12. The second active layer 12 is disposed on the same layer as the first active layer 11, and the third gate G3 is located on one side of the second active layer 12 and disposed on the same layer as the first gate G1. The third gate G3 is used to receive a scan signal S.

[0039] It is understood that the display panel 100 may include an array of pixel circuits 10 and light-emitting elements 20 electrically connected to each pixel circuit 10. By providing data signals to each pixel circuit 10, the driving transistor T0 in the pixel circuit 10 can selectively provide driving current to the light-emitting element 20 to drive the light-emitting element 20 to display light emission, so that the display panel 100 can present the corresponding display image.

[0040] Specifically, the display panel 100 may further include a substrate 30, with pixel circuitry 10 and light-emitting elements 20 sequentially disposed on the substrate 30. Pixel circuitry 10 may include a driving transistor T0 and a plurality of switching transistors T1, wherein the driving transistor T0 is used to selectively generate a driving current to drive the light-emitting elements 20 to emit light, and the switching transistors T1 are used to provide corresponding signals to the driving transistor T0 to control the voltage between the first gate G1 and the source and drain of the driving transistor T0, thereby controlling the magnitude of the driving current output by the driving transistor T0.

[0041] The driving transistor T0 includes a first gate G1, a second gate G2, and a first active layer 11. The first gate G1 can be located on the side of the first active layer 11 furthest from the substrate 30, serving as the top gate of the driving transistor T0. The second gate G2 can be located on the side of the first active layer 11 closest to the substrate 30, serving as the bottom gate of the driving transistor T0. That is, the first gate G1 and the second gate G2 are located on opposite sides of the first active layer 11. The first gate G1 can serve as a fine control terminal for the driving transistor T0, receiving a data signal Vdata, so that a corresponding drive current is generated between the source Se and drain De of the driving transistor T0 according to the data signal Vdata. The second gate G2 can serve as an auxiliary control terminal for the driving transistor T0, receiving a first control signal Vc to enhance the driving capability of the driving transistor T0. It is understood that one of the source Se and drain De of the driving transistor T0 is coupled to the positive power supply signal terminal to receive the positive power supply signal PVDD, and the other can be coupled to the anode of the light-emitting element 20. The cathode of the light-emitting element 20 is electrically connected to the negative power supply signal terminal to receive the negative power supply signal PVEE. This allows the driving transistor T0 to generate a corresponding driving current based on the voltage difference between the potential of its first gate G1 and the positive power supply signal PVDD, as well as the threshold voltage of the driving transistor T0, and provide it to the light-emitting element 20 to drive the light-emitting element 20 to emit light at a corresponding brightness.

[0042] For example, the second gate G2 can be reused as an electrostatic shielding layer. As the bottom gate of the driving transistor T0, the second gate G2 can act as an electrostatic shield when receiving the first control signal Vc, preventing static electricity from entering the first active layer 11 and causing a shift in the output characteristics of the driving transistor T0. In another feasible embodiment, the second gate G2 can also be reused as a light-shielding layer, effectively reducing the amount of light incident on the active layer 11 from below the substrate 30, thereby improving the leakage current phenomenon of the driving transistor T0.

[0043] It is understood that the material of the first active layer 11 of the driving transistor T0 may include low-temperature polysilicon (LTPS), enabling the driving transistor T0 to have a high carrier mobility, thereby meeting the requirements of high response speed and low power consumption. In this case, the driving transistor T0 can be a PMOS type transistor. In other optional embodiments, the active layer material of the driving transistor T0 may also include an oxide semiconductor material, in which case the driving transistor T0 can be an NMOS type transistor. Provided that the core inventive points of the embodiments of the present invention can be achieved, the embodiments of the present invention do not specifically limit the material and type of the driving transistor T0.

[0044] It should be noted that the source and drain of a transistor are not constant, but change as the state of the transistor changes. Figure 3 and Figure 4 The example shown is only for the case where the driving transistor T0 is a PMOS type transistor. In this case, the drain De of the driving transistor T0 is coupled to the light-emitting element 20. For the PMOS type driving transistor T0, the driving current I generated by the driving transistor T0 is positively correlated with (PVDD-Vdata). The positive power supply signal PVDD is usually a constant value. When PVDD is always greater than Vdata, the smaller Vdata is, the larger the driving current I is, and the greater the display brightness of the light-emitting element 20 is.

[0045] For ease of description, unless otherwise specified, the embodiments of the present invention all use PMOS transistors as an example to illustrate the technical solutions of the embodiments of the present invention.

[0046] Figure 5 This is a schematic diagram illustrating the relationship between display brightness and a first control signal according to an embodiment of the present invention. The horizontal axis represents display brightness L (unit: nits), and the vertical axis represents the first control signal Vc (unit: V). (Refer to reference...) Figures 3-5 The display brightness L of the display panel 100 includes a first display brightness L1 and a second display brightness L2; ​​under the first display brightness, the first control signal Vc of L1 is a first voltage V1, and under the second display brightness L2, the first control signal Vc is a second voltage V2; the first voltage V1 and the second voltage V2 are different.

[0047] The voltage of the first control signal Vc can vary under different display brightness levels. For example, the first control signal Vc can be set to a first voltage V1 at a first display brightness L1 and a second voltage V2 at a second display brightness L2, where V1 ≠ V2. By setting the voltage of the first control signal Vc to be different under different display brightness levels, the voltage of the first control signal Vc can be adjusted according to the display brightness. In particular, during high-brightness display, the voltage of the first control signal Vc prevents the output characteristics of the driving transistor T0 from shifting, ensuring that the drive current output by the driving transistor T0 matches the data signal. This guarantees accurate display brightness of the display panel 100, thereby improving the display effect of the display panel 100.

[0048] For example, the first display brightness is greater than the second display brightness; the first voltage V1 is less than the second voltage V2.

[0049] Specifically, the higher the display brightness, the greater the gate-source voltage difference Vgs of the driving transistor T0, which means the lower the potential of the first gate G1. This results in a larger driving current generated by the driving transistor T0. In this case, the first control signal Vc can be set to a smaller voltage, i.e., the first voltage V1, to avoid the second gate G2 voltage being too large, causing the output characteristics of the driving transistor T0 to be negatively biased. This ensures that the driving current generated by the driving transistor T0 matches the data voltage, guaranteeing the accuracy of the display brightness when the display panel 100 is in high brightness, thereby improving the display effect of the display panel. Conversely, when the display brightness is low, the voltage of the second gate G2 has little effect on the display brightness. In this case, the first control signal Vc can be set to a larger voltage, i.e., the second voltage V2, to improve the stability of the driving current output by the driving transistor T0 and to improve the electrostatic shielding capability of the second gate G2.

[0050] The switching transistor T0 can be a single-gate transistor, referring to the reference. Figure 3 Figure 4 The switching transistor T1 may include a third gate G3 and a second active layer 12. The third gate G3 may be located on the side of the second active layer 12 away from the substrate 30, and the third gate G3 may be disposed on the same layer as the first gate G1. It should be noted that, for ease of illustration, Figure 4 The diagram illustrates only one example of the connection between the switching transistor T1 and the driving transistor T0. (Refer to the reference...) Figure 3 and Figure 4 The first terminal of the switching transistor T1 is electrically connected to the source of the driving transistor T0. The third gate G3 can receive a scan signal S, allowing it to be turned on or off under the control of the scan signal S. When on, it outputs the signal received at its second terminal to the driving transistor T0. It is understood that other switching transistors T1 can also be electrically connected to the first gate G1 or drain of the driving transistor T0 to provide corresponding signals to the driving transistor T0 at different stages.

[0051] For example, the plurality of switching transistors T1 includes a data writing transistor M1, so as to Figure 4 Taking the data writing transistor M1 as an example, the first terminal of the data writing transistor M1 is electrically connected to the source of the driving transistor T0. The second terminal of the data writing transistor M1 receives the data signal, and the third gate of the data writing transistor M1 receives the first scan signal S1. Then, the data writing transistor M1 is turned on or off under the control of the first scan signal S1, and when it is turned on, it transmits the data signal to the source of the driving transistor T0.

[0052] For example, continue to refer to Figure 3The multiple switching transistors T1 also include a first initialization transistor M21 and a first threshold compensation transistor M31; the first initialization transistor M21 is used to provide an initialization signal Vini to the first gate of the driving transistor T0 when it is turned on; the first threshold compensation transistor M31 is used to provide a compensation voltage to the first gate G1 of the driving transistor T0 when it is turned on.

[0053] Specifically, the first terminal of the first initialization transistor M21 receives the initialization signal Vini, the second terminal of the first initialization transistor M21 is electrically connected to the first gate of the driving transistor T0, and the third gate of the first initialization transistor M21 receives the second scan signal S2. Therefore, the first initialization transistor M21 can be turned on or off under the control of the second scan signal S2, and when turned on, it transmits the initialization signal Vref to the first gate of the driving transistor T0, thus initializing the signal at the first gate of the driving transistor M1. The first terminal of the first threshold compensation transistor M31 is electrically connected to the drain of the driving transistor T0, the second terminal of the first threshold compensation transistor M31 is electrically connected to the first gate of the driving transistor T0, and the third gate of the first threshold compensation transistor M31 receives the third scan signal S3. Therefore, the first threshold compensation transistor M31 can be turned on or off under the control of the third scan signal S3, and when turned on, it provides a corresponding compensation voltage to the first gate of the driving transistor T0. In a feasible embodiment, the third scan signal S3 can reuse the first scan signal S1, which enables the data signal Vdata to be written from the source of the driving transistor T0 through the drain to the first gate of the driving transistor T0, so that the driving transistor T0 can generate a corresponding driving current according to the data signal Vdata, thereby controlling the light-emitting element 20 to emit light at a corresponding brightness. This reduces the number of signals provided by the driving IC and simplifies the control process of the driving IC.

[0054] Based on the above embodiments, for example, the plurality of switching transistors T1 may further include: a first light-emitting control transistor M4, a second light-emitting control transistor M5, and a reset transistor M6; the first light-emitting control transistor M4, the driving transistor T0, and the second light-emitting control transistor M5 are sequentially electrically connected between the positive power supply terminal and the negative power supply terminal; the reset transistor M6 is used to provide a reset signal Vref to the light-emitting element 20 when it is turned on.

[0055] Specifically, the first terminal of the first light-emitting control transistor M4 can be electrically connected to the positive power supply terminal to receive the positive power supply signal PVDD; the second terminal of the first light-emitting control transistor M4 can be electrically connected to the source of the driving transistor T0; and the third gate of the first light-emitting control transistor M4 can receive the light-emitting control signal EM. The first terminal of the second light-emitting control transistor M5 can be electrically connected to the drain of the driving transistor T0; the second terminal of the second light-emitting control transistor M5 can be electrically connected to the anode of the light-emitting element 20; and the third gate of the second light-emitting control transistor M5 can receive the light-emitting control signal EM. The cathode of the light-emitting element 20 can be electrically connected to the negative power supply terminal to receive the negative power supply signal PVEE. When both the first light-emitting control transistor M4 and the second light-emitting control transistor M5 are turned on, a current path is formed between the positive and negative power supply terminals, allowing the driving current generated by the driving transistor T0 to flow through the light-emitting element 20, thereby driving the light-emitting element 20 to emit light.

[0056] The first terminal of the reset transistor M6 receives the reset signal Vref, the second terminal of the reset transistor M6 is electrically connected to the anode of the light-emitting element 20, and the third gate of the reset transistor M6 receives the fourth scan signal S4. Therefore, the reset transistor M6 can be turned on or off under the control of the fourth scan signal S4, and when turned on, it transmits the reset signal Vref to the anode of the light-emitting element 20, thus resetting the anode potential of the light-emitting element 20. In a feasible embodiment, the fourth scan signal S4 multiplexes the first scan signal S1, enabling the anode of the light-emitting element 20 to be reset simultaneously with writing the data signal Vdata to the driving transistor T0. This reduces the number of signals provided by the driving IC and simplifies the control process of the driving IC.

[0057] For example, the pixel circuit 10 also includes a storage capacitor Cst, which is electrically connected between the positive power supply terminal and the first gate of the driving transistor T0 to store the potential of the first gate of the driving transistor T0, thereby ensuring that the driving transistor T0 generates a stable driving current for a long time.

[0058] The display panel provided in this embodiment of the invention includes a pixel circuit comprising a driving transistor and multiple switching transistors. The switching transistors provide corresponding signals to the driving transistor for initialization, data writing, and threshold compensation, enabling the driving transistor to selectively provide driving current to the light-emitting element to drive it to emit light. The driving transistor includes a first gate, a second gate, and a first active layer, with the first and second gates located on opposite sides of the first active layer. The first gate serves as a fine control terminal for the driving transistor to control the generation of a corresponding current, while the second gate serves as an auxiliary control terminal for the driving transistor to receive the first control signal. This improves the stability of the driving current generated by the driving transistor and allows the second gate to act as an electrostatic shielding layer and a light-shielding layer, ensuring the accuracy of the driving transistor's output characteristics and reducing leakage current. Furthermore, by setting the first voltage of the first control signal at a first display brightness to be different from the second voltage at a second display brightness, the voltage of the first control signal is adjusted according to the display brightness. This is particularly effective during high-brightness displays, preventing the voltage of the first control signal from causing characteristic shifts in the driving transistor, thus improving the accuracy of the display panel's brightness and ultimately enhancing the display effect.

[0059] Optional, continue to refer to the references Figures 3-5 When the display brightness L of the display panel 100 is the first display brightness L1, the display panel 100 is in the high brightness display mode Mode-H; in the high brightness display mode Mode-H, the first voltage V1 is less than or equal to zero.

[0060] Specifically, in the high-brightness display mode (Mode-H), if the first control signal Vc is a positive voltage signal greater than zero, the second gate G2 will be positively charged. Under the influence of the electric field of the second gate G2, the output characteristics of the driving transistor T0 will be negatively biased. Therefore, when the first gate G1 receives the data signal Vdata, the driving current between the source and drain will not match the data signal Vdata, and will be reduced compared to the driving current it should generate. This reduces the brightness of the light-emitting element 20, thus failing to meet the brightness requirements of the high-brightness display mode (Mode-H). Based on the above reasons, the first voltage V1 can be set to be less than or equal to zero in the high-brightness display mode (Mode-H). This can effectively avoid the negative bias of the output characteristics of the driving transistor T0 and further positively bias the output characteristics of the driving transistor M0, thereby further improving the display brightness in the high-brightness display mode (Mode-H). Alternatively, it can compensate for the reduced driving current of the driving transistor T0 due to leakage current, thus improving the display effect of the display panel 100 in the high-brightness display mode (Mode-H).

[0061] Optional, continue to refer to Figures 3-5When the display brightness L of the display panel 100 is the second display brightness L2, the display panel 100 is in the low brightness display mode Mode-L; in the low brightness display mode Mode-L, the second voltage V2 is greater than zero.

[0062] Specifically, in the low-brightness display mode (Mode-L), the driving current generated by the driving transistor T0 is relatively small, resulting in a lower brightness of the light-emitting element 20. Therefore, the first control signal Vc can be set to be greater than zero. At this time, the second gate G2 is positively charged, causing the output characteristics of the driving transistor T0 to be negatively biased, which will further reduce the display brightness of the light-emitting element 20, thus meeting the low-brightness display requirements of the display panel 100. Furthermore, setting the first control signal Vc to be greater than zero can improve the driving capability and electrostatic shielding capability of the driving transistor T0, which is beneficial to improving the display effect of the low-brightness display mode (Mode-L).

[0063] Optional, continue to refer to Figure 5 The voltage of the first control signal Vc is negatively correlated with the display brightness L. Specifically, the first control signal Vc can be made to have a continuous linear negative correlation with the display brightness L. This allows the first control signal Vc to have different voltages under different display brightness L, ensuring a point-to-point correspondence between the display brightness L and the voltage of the first control signal Vc. This enables precise control of the output characteristics of the driving transistor T0 under different display brightness levels, ensuring that the driving current generated by the driving transistor T0 can meet the different display brightness requirements and effectively improve the display effect of the display panel 100.

[0064] Optional, Figure 6 This is another schematic diagram illustrating the relationship between display brightness and the first control signal provided in an embodiment of the present invention, such as... Figure 6 As shown, the display panel 100 includes multiple display brightness ranges LA; the multiple display brightness ranges LA include a first display brightness range LA1 and a second display brightness range LA2; the first display brightness L1 is located in the first display brightness range LA1, and the second display brightness L2 is located in the second display brightness range LA2.

[0065] Specifically, the display brightness L of the display panel 100 can be divided into multiple display brightness ranges LA, such that the first control signal Vc has the same voltage at each display brightness L within the same display brightness range LA, and the voltage of the first control signal Vc is different in different display brightness ranges LA. This simplifies the adjustment process of the first control signal Vc while increasing display brightness.

[0066] The above embodiments only exemplify the case where the pixel circuit 10 is a "7T1C" circuit. "7T1C" refers to a pixel circuit that includes one driving transistor T0, six switching transistors T1, and one storage capacitor, but is not limited thereto. In other feasible embodiments of the present invention, the pixel circuit 10 may also include more switching transistors T1 to drive the light-emitting element 20 to achieve a better light-emitting effect.

[0067] Optional, Figure 7 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, such as... Figure 7 As shown, the multiple switching transistors T1 also include a second initialization transistor M22 and a second threshold compensation transistor M32; the third gate of the second initialization transistor M22 and the third gate of the first initialization transistor M21 receive the same scan signal, and when both the first initialization transistor M21 and the second initialization transistor M22 are turned on, the initialization signal Vini is provided to the first gate of the driving transistor T0; the third gate of the second threshold compensation transistor M32 and the third gate of the first threshold compensation transistor M31 receive the same scan signal, and when both the first threshold compensation transistor M31 and the second threshold compensation transistor M32 are turned on, the compensation voltage is provided to the first gate of the driving transistor T0.

[0068] Specifically, the first initialization transistor M21 and the second initialization transistor M22 can be electrically connected sequentially between the initialization signal terminal and the first gate of the driving transistor T0. That is, the first terminal of the first initialization transistor M22 can be electrically connected to the initialization signal terminal to receive the initialization signal Vini, the first terminal of the second initialization transistor M22 can be electrically connected to the second terminal of the first initialization transistor M22, and the second terminal of the second initialization transistor M22 can be electrically connected to the first gate of the driving transistor T0. Furthermore, the third gate of both the second and first initialization transistors receives the second scan signal S2. Under the control of the second scan signal S2, the first initialization transistor M21 and the second initialization transistor M22 can be simultaneously turned on or off. When both the first and second initialization transistors M21 and M22 are on, the initialization signal Vini can be transmitted sequentially through the first and second initialization transistors M21 and M22 to the first gate of the driving transistor T0. It can solve the problem of severe leakage current when only one initialization transistor is set, which leads to unstable signal of the first gate of the driving transistor T0. It is beneficial to improve the accuracy and stability of the light emission of the light-emitting element 20, thereby improving the display effect of the display panel 100.

[0069] Alternatively, a first threshold compensation transistor M31 and a second threshold compensation transistor M32 can be sequentially electrically connected between the drain and the first gate of the driving transistor T0. Specifically, the first terminal of the first threshold compensation transistor M31 is electrically connected to the drain of the driving transistor T0, the first terminal of the second threshold compensation transistor M32 is electrically connected to the second terminal of the first threshold compensation transistor M31, and the second terminal of the second threshold compensation transistor M32 is electrically connected to the first gate of the driving transistor T0. Both the third gates of the first threshold compensation transistor M31 and the second threshold compensation transistor M32 receive the third scan signal S3. Under the control of the third scan signal S3, the first threshold compensation transistor M31 and the second threshold compensation transistor M32 are simultaneously turned on or off. When both are turned on, the voltage at the drain of the driving transistor T0 can be transmitted to its first gate, providing a compensation voltage to the first gate of the driving transistor T0. In this way, the problem of severe leakage current when only one threshold compensation transistor is set can be further solved, which leads to unstable signal of the first gate of the driving transistor T0. This is beneficial to improve the accuracy and stability of the light emission of the light-emitting element 20, thereby further improving the display effect of the display panel 100.

[0070] Optional, Figure 8 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention, such as... Figure 8 As shown, the multiple switching transistors T1 include: a bias adjustment transistor M7; the bias adjustment transistor M7 is used to provide a bias adjustment signal DVH to the driving transistor T0 when it is turned on.

[0071] Specifically, the first terminal of the bias adjustment transistor M7 can be configured to receive the bias adjustment signal DVH, the second terminal of the bias adjustment transistor M7 can be electrically connected to the source of the driving transistor T0, and the third gate of the bias adjustment transistor M7 can receive the fifth scan signal S5. Thus, the bias adjustment transistor M7 can be turned on or off under the control of the fifth scan S5, and when on, it transmits the bias adjustment signal DVH to the source of the driving transistor T0, enabling bias adjustment of the driving transistor T0. This solves the problem of output characteristic deviation caused by prolonged conduction of the driving transistor T0, improves the stability and accuracy of the output drive current of the driving transistor T0, and thereby improves the display effect of the display panel.

[0072] For example, in the above embodiments, each switching transistor T1 can be a PMOS transistor or an NMOS transistor, and the channel type of each switching transistor can be the same or different. The embodiments of the present invention do not specifically limit this. Unless otherwise specified, each switching transistor T1 in the above embodiments can be a PMOS transistor, then the channel type of each switching transistor T1 is the same as the channel type of the driving transistor T0, which can simplify the fabrication process of the pixel circuit 10.

[0073] In addition, the above embodiments illustrate the case where only the driving transistor is a transistor with top and bottom dual gates, and each switching transistor is a single-gate transistor. In other feasible embodiments of the present invention, at least one of the switching transistors may also be configured as a transistor with top and bottom dual gates. The following embodiments provide exemplary descriptions.

[0074] Optional, Figure 9 This is a schematic diagram of the film structure of a switching transistor provided in an embodiment of the present invention, as shown below. Figure 9 As shown, the switching transistor T1 also includes a fourth gate G4; the fourth gate G4 is located on the side of the second active layer 12 away from the third gate G3, and the fourth gate G4 is disposed on the same layer as the second gate G2.

[0075] Specifically, the fourth gate G4 can be located on the side of the second active layer 12 away from the third gate G3. Then the third gate G3 is the top gate of the switching transistor T1, which can be used as a fine control terminal of the switching transistor T1 to control the switching transistor T1 to turn on or off. The fourth gate G4 is the bottom gate of the switching transistor T1, which can be used as an auxiliary control terminal of the switching transistor T1 to improve the mobility of carriers in the second active layer 12 of the switching transistor T1.

[0076] For example, the fourth gate G4 can be reused as a light-shielding layer, which can effectively reduce the light emitted from below the substrate 30 toward the active layer 11, thereby preventing light from affecting the mobility of the switching transistor T1.

[0077] Optional, see reference Figure 9 At least one switching transistor T1 is a first-type switching transistor T11, and the fourth gate G4 of the first-type transistor T11 receives a positive power supply signal PVDD.

[0078] Specifically, the first type of switching transistor T11 can be a PMOS transistor, meaning the material of the second active layer 12 of the first type of switching transistor T11 can include low-temperature polycrystalline silicon, giving it a high carrier mobility to meet the requirements of high response speed and low power consumption. When the switching transistor T1 is the first type of switching transistor T11, the fourth gate G4 of the first type of switching transistor T11 can receive a positive power supply signal. The positive power supply signal of the fourth gate G4 can control the speed at which the carriers in the second active layer 12 form an inversion layer, increasing the carrier movement speed in the electric field, thereby enabling the switching transistor T1 to have high mobility and improving the conductivity and switching speed of the switching transistor T1.

[0079] Optional, Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, specifically a schematic diagram of a "7T1C" pixel circuit structure, see reference. Figure 10 Both the first initialization transistor M21 and the first threshold compensation transistor M31 are first-type transistors T11. Thus, by setting the first initialization transistor M21 to a first-type transistor T11, its fourth gate can receive a positive power supply signal, improving its conductivity and switching speed, thereby enabling the initialization signal Vini to be quickly written to the first gate of the driving transistor T0. Similarly, by setting the first threshold compensation transistor M31 to a first-type transistor T11, its fourth gate can receive a positive power supply signal PVDD, improving its conductivity and switching speed, thereby enabling the compensation voltage to be quickly transmitted to the first gate of the driving transistor T0.

[0080] For example, refer to Figure 10 The data writing transistor M1, the first light-emitting control transistor M4, the second light-emitting control transistor M5, and the reset transistor M6 are all first-type transistors T11.

[0081] Specifically, by setting the data writing transistor M1, the first light-emitting control transistor M4, the second light-emitting control transistor M5, and the reset transistor M6 to all be first-type transistors T11, the fourth gate of each of the aforementioned switching transistors T0 receives a positive power supply signal PVDD. This improves the conductivity and switching speed of the data writing transistor M1, the first light-emitting control transistor M4, the second light-emitting control transistor M5, and the reset transistor M6, thereby increasing the writing speed of the data signal Vdata and the reset signal Vref, as well as the transmission speed of the drive current. This, in turn, helps the light-emitting element 20 to respond quickly to the drive current and emit light accurately.

[0082] Optional, Figure 11 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention, for reference. Figure 11 When the pixel circuit 10 includes a second initialization transistor M22 and a second threshold compensation transistor M32, the second initialization transistor M22 and the second threshold compensation transistor M32 can also be a first-type switching transistor T11. In this way, the writing speed of the initialization signal Vini and the transmission speed of the compensation voltage can be guaranteed.

[0083] For example, one of the first initialization transistor M21 and the second initialization transistor M22 can be a first-type initialization transistor T11, and the other can be a single-gate transistor that only includes a third gate. Alternatively, both the first initialization transistor M21 and the second initialization transistor M22 can be first-type switching transistors T11. When both the first initialization transistor M21 and the second initialization transistor M22 are first-type transistors T11, the conductivity and switching speed of the first initialization transistor M21 and the second initialization transistor M22 are comparable, ensuring that the initialization signal Vini is written to the first gate of the driving transistor T0 at a relatively fast speed.

[0084] Similarly, one of the first threshold compensation transistor M31 and the second threshold compensation transistor M32 can be a first-type switching transistor T11, and the other can be a single-gate transistor including only a third gate. Alternatively, both the first threshold compensation transistor M31 and the second threshold compensation transistor M32 can be first-type transistors T11. When both the first threshold compensation transistor M31 and the second threshold compensation transistor M32 are first-type transistors T11, the conductivity and switching speed of the first threshold compensation transistor M31 and the second threshold compensation transistor M32 are comparable, ensuring that the compensation voltage is written to the first gate of the driving transistor T0 at a relatively fast speed.

[0085] Optional, Figure 12 This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention, for reference. Figure 12 When the pixel circuit 10 includes a bias adjustment transistor M7, the bias adjustment transistor M7 can also be a first-type transistor T11. In this way, the fourth gate of the bias adjustment transistor M7 receives a positive power supply signal PVDD, which can improve the conductivity and switching speed of the bias adjustment transistor M7, thereby enabling the bias adjustment signal DVH to be quickly written to the driving transistor T0.

[0086] In other feasible embodiments of the present invention, the types of switching transistors in the pixel circuit may also be different; optionally, Figure 13 This is a schematic diagram of another film structure of a switching transistor provided in an embodiment of the present invention. Figure 14This is a schematic diagram of another pixel circuit provided in an embodiment of the present invention, in conjunction with reference to the reference. Figure 13 and Figure 14 At least one switching transistor T1 is a second type switching transistor T12, and the third gate G3 and the fourth gate G4 of the second type transistor T12 both receive the same scan signal S.

[0087] Specifically, the second type of switching transistor T12 can be an NMOS transistor. That is, the material of the second active layer 12 of the second type of switching transistor T12 can include indium gallium zinc oxide (IGZO), making the switching transistor T12 an oxide transistor. In this case, the switching transistor T1 is an NMOS transistor, which has advantages such as low leakage current. When the switching transistor T1 is the second type of switching transistor T12, its third gate G3 and fourth gate G4 can be electrically connected to receive the same scan signal S. When the switching transistor T1 is turned on, its transconductance increases, significantly improving the switching speed and thus increasing the signal transmission speed.

[0088] Optionally, at least one switching transistor T1 includes an initialization transistor M2 and a threshold compensation transistor M3; the initialization transistor M2 is used to provide an initialization signal to the first gate of the driving transistor T0 when it is turned on; the threshold compensation transistor M3 is used to provide a compensation voltage to the first gate of the driving transistor T0 when it is turned on; both the initialization transistor M2 and the threshold compensation transistor M3 are second type switching transistors T12.

[0089] Specifically, the initialization transistor M2 and the threshold compensation transistor M3 can be configured as second-type switching transistors T12, which can reduce leakage current and thus improve the stability and accuracy of the first gate signal of the driving transistor T0, enabling the light-emitting element 20 to emit light accurately. Furthermore, by configuring the initialization transistor M2 and the threshold compensation transistor M3 as second-type transistors T12, the third and fourth gates of the initialization transistor M2 can both receive the second scan signal S2, and the third and fourth gates of the threshold compensation transistor M3 can both receive the third scan signal S3. This can improve the switching speed of the initialization transistor M2 and the compensation transistor M3, thereby increasing the writing speed of the initialization signal Vini and the transmission speed of the compensation voltage.

[0090] For example, the fourth gate G4 can be reused as an electrostatic shielding layer to prevent static electricity from entering the second active layer 12 and causing the output characteristics of the switching transistor T1 to shift, thereby avoiding the problem of the switching transistor T1 failing to switch normally due to static electricity.

[0091] Based on the same inventive concept, the technical solution of this invention also provides a display device. Figure 15 This is a schematic diagram of the structure of a display device provided in an embodiment of the present invention, for reference. Figure 15 The display device 200 includes the display panel 100 provided in any of the above embodiments. Therefore, the display device 200 also has the beneficial effects of the display panel in the above embodiments. The similarities can be understood with reference to the explanation of the display panel 100 above, and will not be repeated below.

[0092] The display device 200 provided in this embodiment of the invention can be Figure 15 The mobile phone shown can also be any electronic product with display function, including but not limited to the following categories: television, laptop, desktop monitor, tablet computer, digital camera, smart bracelet, smart glasses, in-vehicle display, industrial control equipment, medical display screen, touch interactive terminal, etc. The embodiments of the present invention do not make any special limitations on this.

[0093] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A display panel, characterized in that, include: Pixel circuits and light-emitting elements; The pixel circuit includes a driving transistor and multiple switching transistors; The driving transistor includes a first gate, a second gate, and a first active layer. The first gate is located on one side of the first active layer, and the second gate is located on the side of the first active layer away from the first gate. The first gate is used to receive a data signal, and the second gate is used to receive a first control signal. The driving transistor is used to selectively provide driving current to the light-emitting element. The switching transistor includes a third gate and a second active layer. The second active layer is disposed on the same layer as the first active layer. The third gate is located on one side of the second active layer and is disposed on the same layer as the first gate. The third gate is used to receive a scan signal. The display brightness of the display panel includes a first display brightness and a second display brightness; the first control signal under the first display brightness is a first voltage, and the first control signal under the second display brightness is a second voltage; The first voltage is different from the second voltage.

2. The display panel according to claim 1, characterized in that, The first display brightness is greater than the second display brightness; the first voltage is less than the second voltage.

3. The display panel according to claim 2, characterized in that, When the display brightness of the display panel is the first display brightness, the display panel is in high brightness display mode; In the high-brightness display mode, the first voltage is less than or equal to zero.

4. The display panel according to claim 2, characterized in that, When the display brightness of the display panel is the second display brightness, the display panel is in low brightness display mode; In the low-brightness display mode, the second voltage is greater than zero.

5. The display panel according to claim 1, characterized in that, The voltage of the first control signal is negatively correlated with the display brightness.

6. The display panel according to claim 1, characterized in that, The display panel includes multiple display brightness ranges; The plurality of display brightness ranges include a first display brightness range and a second display brightness range; The first display brightness is located within the first display brightness range, and the second display brightness is located within the second display brightness range.

7. The display panel according to claim 1, characterized in that, The switching transistor further includes a fourth gate; the fourth gate is located on the side of the second active layer away from the third gate, and the fourth gate is disposed on the same layer as the second gate.

8. The display panel according to claim 7, characterized in that, At least one of the switching transistors is a first type of switching transistor, and the fourth gate of the first type of transistor receives a positive power supply signal.

9. The display panel according to claim 8, characterized in that, The multiple switching transistors include a first initialization transistor and a first threshold compensation transistor; The first initialization transistor is used to provide an initialization signal to the first gate of the driving transistor when it is turned on; the first threshold compensation transistor is used to provide a compensation voltage to the first gate of the driving transistor when it is turned on.

10. The display panel according to claim 9, characterized in that, The multiple switching transistors also include a second initialization transistor and a second threshold compensation transistor; The third gate of the second initialization transistor and the third gate of the first initialization transistor receive the same scan signal. When both the first initialization transistor and the second initialization transistor are turned on, the initialization signal is provided to the first gate of the driving transistor. The third gate of the second threshold compensation transistor and the third gate of the first threshold compensation transistor receive the same scan signal. When both the first threshold compensation transistor and the second threshold compensation transistor are turned on, the compensation voltage is provided to the first gate of the driving transistor.

11. The display panel according to claim 10, characterized in that, Both the first initialization transistor and the first threshold compensation transistor are transistors of the first type; And / or, the second initialization transistor and the second threshold compensation transistor are both transistors of the first type.

12. The display panel according to claim 8, characterized in that, The plurality of said switching transistors include: a data writing transistor, a first light-emitting control transistor, a second light-emitting control transistor, and a reset transistor; The data writing transistor is used to provide a data signal to the driving transistor when it is turned on; The first light-emitting control transistor, the driving transistor, and the second light-emitting control transistor are sequentially electrically connected between the positive power supply terminal and the negative power supply terminal; The reset transistor is used to provide a reset signal to the light-emitting element when it is turned on.

13. The display panel according to claim 12, characterized in that, The data writing transistor, the first light-emitting control transistor, the second light-emitting control transistor, and the reset transistor are all transistors of the first type.

14. The display panel according to claim 8, characterized in that, The plurality of said switching transistors include: a bias adjustment transistor; The bias adjustment transistor is used to provide a bias adjustment signal to the driving transistor when it is turned on.

15. The display panel according to claim 14, characterized in that, The bias adjustment transistor is the first type of transistor.

16. The display panel according to claim 7, characterized in that, At least one of the switching transistors is a second type of switching transistor, wherein the third gate and the fourth gate of the second type of transistor both receive the same scan signal.

17. The display panel according to claim 16, characterized in that, At least one switching transistor includes an initialization transistor and a threshold compensation transistor; The initialization transistor is used to provide an initialization signal to the first gate of the driving transistor when it is turned on; the threshold compensation transistor is used to provide a compensation voltage to the first gate of the driving transistor when it is turned on. Both the initialization transistor and the threshold compensation transistor are second-type switching transistors.

18. The display panel according to claim 8 or 16, characterized in that, The second gate is reused as an electrostatic shielding layer; and / or, the fourth gate is reused as an electrostatic shielding layer.

19. A display device, characterized in that, include: The display panel according to any one of claims 1 to 18.

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