Solder ball arrangement structure and method in chip packaging substrate, chip and electronic device

Abstract

Embodiments of the present application disclose a solder ball arrangement structure, a method, a chip and an electronic device in a chip packaging substrate. The solder ball arrangement structure in the chip packaging substrate comprises ground solder balls, positive differential signal solder balls and negative differential signal solder balls; the ground solder balls are used for transmitting ground signals; the positive differential signal solder balls and the negative differential signal solder balls constitute differential pair signals and are used for transmitting differential signals; in the chip packaging substrate, adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; and adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls. By arranging the solder balls as differential signal solder balls with only ground solder balls or opposite signal differential signal solder balls beside the differential signal solder balls in the chip packaging substrate, a return path can be provided for the differential signal, crosstalk is reduced, and signal quality is improved.

Description

Technical Field

[0001] This invention relates to the field of chip design technology, and in particular to a solder ball arrangement structure, method, chip, and electronic device in a chip packaging substrate. Background Technology

[0002] In chip packaging design, the number of fan-out signals is increasing, leading to a continuous increase in the size of the entire chip package and the number of solder balls. For example, a central processing unit (CPU) or graphics processing unit (GPU) often has thousands of signals. At the same time, the signal rates are also getting higher and higher, with many differential signals reaching rates of tens of gigahertz (GHz) or even tens of GHz.

[0003] In the prior art, a grounding solder ball (GND) is provided for each pair of differential signals to facilitate the exit of the substrate. Figure 1 This is a schematic diagram of an exemplary solder ball arrangement structure in a chip packaging substrate provided in the prior art. For example... Figure 1 As shown, a grounding solder ball is added above the output ball of each pair of differential lines, but there is significant interference between the positive differential signal solder ball (D+) and the negative differential signal solder ball (D-), resulting in low differential signal speed.

[0004] Therefore, there is an urgent need to provide a solder ball arrangement structure in a chip packaging substrate to improve the quality of differential signals. Summary of the Invention

[0005] This invention provides a solder ball arrangement structure, method, chip, and electronic device in a chip packaging substrate to provide a return path for differential signals, reduce crosstalk, and improve signal quality.

[0006] According to one aspect of the present invention, a solder ball arrangement structure in a chip packaging substrate is provided, the chip packaging substrate including ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; wherein:

[0007] The grounding solder ball is used to transmit grounding signals;

[0008] The positive differential signal solder ball and the negative differential signal solder ball form a differential pair signal for transmitting differential signals;

[0009] In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder ball are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder ball are ground solder balls or positive differential signal solder balls.

[0010] Optionally, when arranging positive differential signal solder balls and negative differential signal solder balls, adjacent differential signal solder balls can form a "U"-shaped signal arrangement.

[0011] The differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls;

[0012] A grounding solder ball is placed outside the adjacent differential signal solder ball.

[0013] Optionally, a solder ball arrangement structure group is formed every N layers from the edge of the chip packaging substrate to the inside;

[0014] In each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and the adjacent solder balls of the positive differential signal solder balls are either ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder balls are either ground solder balls or positive differential signal solder balls.

[0015] In each solder ball arrangement structure group, the Nth layer is the ground solder ball; where N is a positive integer greater than or equal to 2.

[0016] Optionally, in each solder ball arrangement structure group, every M columns constitute a solder ball arrangement structure subgroup;

[0017] Each solder ball arrangement subgroup includes M×(N-1) / 2 positive differential signal solder balls and M×(N-1) / 2 negative differential signal solder balls; where M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is an even number;

[0018] In each solder ball arrangement structure subgroup, the adjacent solder balls of the positive differential signal solder balls are negative differential signal solder balls, and the adjacent solder balls of the negative differential signal solder balls are positive differential signal solder balls.

[0019] Each solder ball arrangement subgroup is arranged laterally along the chip packaging substrate.

[0020] Optionally, grounding solder balls can be installed between each solder ball arrangement structure subgroup.

[0021] Optional, N is 4, M is 2;

[0022] Each solder ball arrangement subgroup includes: three positive differential signal solder balls and three negative differential signal solder balls;

[0023] Specifically, the first positive differential signal solder ball and the first negative differential signal solder ball constitute the first pair of differential signals; the second positive differential signal solder ball and the second negative differential signal solder ball constitute the second pair of differential signals; and the third positive differential signal solder ball and the third negative differential signal solder ball constitute the third pair of differential signals.

[0024] Optionally, the arrangement of differential signal solder balls in each layer of the solder ball arrangement structure subgroup is as follows: the first layer consists of the second positive differential signal solder ball and the second negative differential signal solder ball from left to right; the second layer consists of the first negative differential signal solder ball and the third positive differential signal solder ball from left to right; and the third layer consists of the first positive differential signal solder ball and the third negative differential signal solder ball from left to right.

[0025] Optionally, in the solder ball arrangement adjacent to the edge of the chip package substrate, the grounding solder balls set in the first layer can be removed.

[0026] According to another aspect of the present invention, a method for arranging solder balls in a chip packaging substrate is provided, the chip packaging substrate including ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; the method includes:

[0027] The grounding signal is transmitted through the grounding solder ball;

[0028] The differential signal is transmitted by forming a differential pair signal through the positive differential signal solder ball and the negative differential signal solder ball;

[0029] In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder ball are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder ball are ground solder balls or positive differential signal solder balls.

[0030] According to another aspect of the present invention, a chip is provided, the chip comprising a chip packaging substrate configured with a solder ball arrangement structure as provided in any embodiment of the present invention.

[0031] According to another aspect of the present invention, a motherboard is provided, the motherboard including the chip provided in the embodiments of the present invention.

[0032] According to another aspect of the present invention, an electronic device is provided, the electronic device including the chip or motherboard provided in the embodiments of the present invention.

[0033] In the technical solution of this invention, the chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls. The ground solder balls are used to transmit ground signals. The positive and negative differential signal solder balls form a differential signal pair for transmitting differential signals. In the chip packaging substrate, the solder balls adjacent to the positive differential signal solder balls are either ground solder balls or negative differential signal solder balls; the solder balls adjacent to the negative differential signal solder balls are either ground solder balls or positive differential signal solder balls. By arranging the solder balls in the chip packaging substrate such that only ground solder balls or differential signal solder balls with opposite signals are next to the differential signal solder balls, the problem of crosstalk between differential signal pairs is solved, providing a return path for the differential signals, reducing crosstalk, and improving signal quality.

[0034] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0035] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0036] Figure 1 This is a schematic diagram of an exemplary solder ball arrangement structure in a chip packaging substrate provided in the prior art;

[0037] Figure 2 This is a schematic diagram of the solder ball arrangement structure in a chip packaging substrate according to Embodiment 1 of the present invention;

[0038] Figure 3 This is a schematic diagram of the solder ball arrangement structure in a chip packaging substrate according to Embodiment 2 of the present invention;

[0039] Figure 4 This is a schematic diagram of the lead-out wire under the solder ball arrangement structure provided in Embodiment 2 of the present invention;

[0040] Figure 5 This is an enlarged schematic diagram of the lead wire under the solder ball arrangement structure provided in Embodiment 2 of the present invention;

[0041] Figure 6 This is a schematic diagram of a chip structure provided according to Embodiment 3 of the present invention;

[0042] Figure 7 This is a schematic diagram of a motherboard structure provided according to an embodiment of the present invention;

[0043] Figure 8 This is a schematic diagram of the structure of an electronic device provided according to an embodiment of the present invention. Detailed Implementation

[0044] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0045] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0046] Example 1

[0047] Figure 2 This is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to Embodiment 1 of the present invention. This embodiment is applicable to solder ball arrangement during substrate wiring in chip packaging. The solder ball arrangement structure in this chip packaging substrate can be used for substrate generation in chip packaging. After the substrate has solder balls arranged, signal lines can be connected, and a chip is formed by connecting the signal lines with wire connection structures such as gold fingers. Furthermore, the chip can be placed on a motherboard for electronic device generation.

[0048] like Figure 2 As shown, the solder ball arrangement structure in this chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls. The ground solder balls are used to transmit ground signals. The positive and negative differential signal solder balls form a differential pair signal, used to transmit differential signals. In the chip packaging substrate, the adjacent solder ball of a positive differential signal solder ball is either a ground solder ball or a negative differential signal solder ball; the adjacent solder ball of a negative differential signal solder ball is either a ground solder ball or a positive differential signal solder ball.

[0049] By arranging the solder balls in the chip packaging substrate such that differential signal solder balls are placed next to ground solder balls or differential signal solder balls with opposite signals, a return path for differential signals can be provided, crosstalk can be reduced, and signal quality can be improved.

[0050] For example, such as Figure 2 As shown, by having adjacent solder balls of positive differential signal solder balls be ground solder balls or negative differential signal solder balls, and adjacent solder balls of negative differential signal solder balls be ground solder balls or positive differential signal solder balls, the board trace sequence can also be guaranteed.

[0051] For example, when arranging positive and negative differential signal solder balls, adjacent differential signal solder balls can be arranged in a "U"-shaped signal pattern. This increases the ratio of signal solder balls to ground solder balls while maintaining the board's trace order, allowing for more differential signals to be implemented within a limited board space. Specifically, in adjacent differential signal solder balls, starting from the positive terminal of the first pair of differential signals, the circuit is connected in series to the negative terminal of the Qth pair of differential signals. By using a layout where adjacent differential signal solder balls have opposite signals, various "U"-shaped signal arrangements can be formed. Here, Q is a positive integer greater than or equal to 2.

[0052] like Figure 2 As shown, taking three pairs of adjacent differential signals as an example, starting from the positive terminal of the first pair of differential signals, the signals are connected in series to the negative terminal of the third pair of differential signals. By using a layout where adjacent solder balls of the differential signals are opposite signals, a U-shaped opening with the top facing up (shaped like a "U") and a U-shaped opening with the bottom facing down (shaped like an "n") can be formed. Figure 2 (not shown in the image), the "U"-shaped opening faces right (shaped like a " ), and the U-shaped opening to the left (shaped like a " " Figure 2 Various "U"-shaped signal arrangement methods (not shown in the image) are available. Figure 2 The "U"-shaped dashed line is only for illustrating the arrangement of solder balls; this line does not exist in the actual arrangement of solder balls.

[0053] When actually arranging differential signal solder balls on the substrate, the above-mentioned "U"-shaped signal arrangement with any opening direction can be selected according to the actual wiring requirements.

[0054] like Figure 2 As shown, in addition to placing differential signal solder balls (including positive differential signal solder balls and negative differential signal solder balls) in the substrate, ground solder balls can also be placed to reduce crosstalk between differential signal pairs and improve signal quality. For example, ground solder balls can be placed outside the "U"-shaped signal arrangement described above.

[0055] like Figure 2 The solder ball arrangement shown can be expanded horizontally or vertically to achieve a multi-channel differential signal layout.

[0056] Optionally, a solder ball arrangement structure group is formed every N layers from the edge of the chip packaging substrate to the inside; in each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and the adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls; in each solder ball arrangement structure group, the Nth layer is a ground solder ball; where N is a positive integer greater than or equal to 2.

[0057] By using adjacent differential signal solder balls with opposite signals in the first N-1 layers, and placing ground solder balls outside the differential signal solder balls, with the Nth layer consisting entirely of ground solder balls, crosstalk between differential signals can be significantly reduced, improving differential signal quality. Optionally, in each solder ball arrangement group, the first N-1 layers can use adjacent differential signal solder balls to form a "U"-shaped signal arrangement, with adjacent differential signal solder balls having opposite signals; ground solder balls are placed outside the adjacent differential signal solder balls; and the Nth layer consists entirely of ground solder balls.

[0058] Optionally, to avoid the need for printed circuit board (PCB) traces to be routed through a bottleneck mode in layers adjacent to the edge of the chip package substrate (BGA), in an optional embodiment of the present invention, the grounding solder balls disposed in the first layer are removed from the solder ball arrangement structure adjacent to the edge of the chip package substrate (BGA). For example... Figure 2 As shown in the figure, the blank circle in the first layer starting from the edge of the BGA indicates the removal of the grounding solder ball at that location.

[0059] Neck mode is a routing method with relatively small line width and spacing, which temporarily narrows the line width and reduces the line spacing to accommodate dense pad areas. However, using neck mode restricts PCB routing, causing a sudden change in impedance of the traces below the BGA when the differential signals of the inner layers are fanned out of the PCB, affecting the differential signal transmission quality. The technical solution of this invention removes the grounding solder balls set in the first layer in the solder ball arrangement structure adjacent to the edge of the chip package substrate. This allows the PCB traces to exit at this location without using neck mode routing, avoiding the impedance abrupt change caused by neck mode, thereby improving the differential signal quality of the inner layers.

[0060] Optionally, in the outermost solder ball arrangement structure group of the chip packaging substrate, the Nth layer ground solder ball can correspond one by one with the differential signal solder ball of the N-1th layer, which facilitates PCB routing.

[0061] In this embodiment, the chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls. The ground solder balls are used to transmit ground signals. The positive differential signal solder balls and the negative differential signal solder balls constitute a differential pair signal for transmitting differential signals. In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder balls are either ground solder balls or negative differential signal solder balls. The adjacent solder balls of the negative differential signal solder balls are either ground solder balls or positive differential signal solder balls. By arranging the solder balls in the chip packaging substrate such that differential signal solder balls are adjacent to ground solder balls or differential signal solder balls with opposite signals, the problem of crosstalk between differential signal pairs is solved. This ensures the board trace order, provides a return path for differential signals, reduces crosstalk, and improves signal quality. By arranging adjacent differential signal solder balls with opposite signals in a "U"-shaped signal arrangement, the board trace order can be guaranteed, and the ratio of signal solder balls to ground solder balls can be increased, allowing more differential signals to be implemented within a limited board. Placing ground solder balls outside adjacent differential signal solder balls can reduce differential signal crosstalk and improve signal quality. By removing the ground solder ball on the first layer at the edge of the BGA, the use of neck mode routing is eliminated, avoiding impedance abrupt changes in the routing and improving differential signal quality.

[0062] Example 2

[0063] Figure 3 This is a schematic diagram of a solder ball arrangement structure in a chip packaging substrate according to Embodiment 2 of the present invention. This embodiment is a further refinement of the above technical solution. The technical solution in this embodiment can be combined with various optional solutions in one or more of the above embodiments.

[0064] like Figure 3 As shown, the chip packaging substrate includes a ground solder ball (GND), a positive differential signal solder ball, and a negative differential signal solder ball; wherein: the ground solder ball is used to transmit a ground signal; the positive differential signal solder ball and the negative differential signal solder ball constitute a differential pair signal for transmitting a differential signal; in the chip packaging substrate, the solder ball adjacent to the positive differential signal solder ball is either a ground solder ball or a negative differential signal solder ball; the solder ball adjacent to the negative differential signal solder ball is either a ground solder ball or a positive differential signal solder ball.

[0065] Optionally, when arranging positive differential signal solder balls and negative differential signal solder balls, adjacent differential signal solder balls form a "U"-shaped signal arrangement; wherein, the differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls; and ground solder balls are arranged outside the adjacent differential signal solder balls.

[0066] Optionally, in the solder ball arrangement adjacent to the edge of the chip package substrate, the grounding solder balls set in the first layer can be removed, such as... Figure 3 The blank circle in the first layer.

[0067] Optionally, a solder ball arrangement structure group is formed every N layers from the edge of the chip packaging substrate to the inside; in each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and the adjacent solder balls of the positive differential signal solder balls are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder balls are ground solder balls or positive differential signal solder balls; in each solder ball arrangement structure group, the Nth layer is a ground solder ball; where N is a positive integer greater than or equal to 2.

[0068] Based on the above implementation methods, such as Figure 3 As shown, optionally, in each solder ball arrangement structure group, every M columns constitute a solder ball arrangement structure subgroup; each solder ball arrangement structure subgroup includes M×(N-1) / 2 positive differential signal solder balls and M×(N-1) / 2 negative differential signal solder balls; where M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is an even number; in each solder ball arrangement structure subgroup, the adjacent solder balls of the positive differential signal solder balls are negative differential signal solder balls, and the adjacent solder balls of the negative differential signal solder balls are positive differential signal solder balls; each solder ball arrangement structure subgroup is arranged laterally along the chip packaging substrate; grounding solder balls are provided between each solder ball arrangement structure subgroup.

[0069] By ensuring that at least one of M and (N-1) is even, the number of differential signal solder balls in the solder ball arrangement subgroup is even, thus forming differential signal pairs. The differential signal solder balls in the solder ball arrangement subgroup can use adjacent solder balls with opposite signals. The differential signal solder balls in the solder ball arrangement subgroup can form a "U"-shaped signal arrangement. That is, in the solder ball arrangement subgroup, starting from the positive terminal of the first pair of differential signals, passing through the negative terminal of the first pair of differential signals, the positive terminal of the second pair of differential signals, the negative terminal of the second pair of differential signals, and so on, until connected in series to the negative terminal of the last pair of differential signals, forming a "U" shape; or, starting from the negative terminal of the first pair of differential signals and connected in series to the positive terminal of the last pair of differential signals, forming a "U" shape.

[0070] By arranging the solder ball arrangement subgroups laterally, free differential signal expansion can be achieved to meet the needs of different information volumes. By placing only differential signal solder balls within the solder ball arrangement subgroups and placing ground solder balls between the subgroups, the ratio of signal solder balls to ground solder balls can be increased, such as... Figure 3 As shown, the number of signal solder balls and the number of GND solder balls are almost 1:1, which saves on the number of solder balls in the substrate design, reduces the substrate area, and greatly facilitates PCB routing. Moreover, the quality of high-speed signals has made a huge leap compared to the existing arrangement methods.

[0071] For example, N is 4 and M is 2; each solder ball arrangement subgroup includes: three positive differential signal solder balls and three negative differential signal solder balls; wherein, the first positive differential signal solder ball and the first negative differential signal solder ball constitute the first pair of differential signals; the second positive differential signal solder ball and the second negative differential signal solder ball constitute the second pair of differential signals; and the third positive differential signal solder ball and the third negative differential signal solder ball constitute the third pair of differential signals.

[0072] like Figure 3 As shown, in the first solder ball arrangement subgroup from left to right, the first positive differential signal solder ball is D0+, the first negative differential signal solder ball is D0-, the second positive differential signal solder ball is D1+, the second negative differential signal solder ball is D1-, and the third positive differential signal solder ball is D2+ and the third negative differential signal solder ball is D2-. In the second solder ball arrangement subgroup, the first positive differential signal solder ball is D3+, the first negative differential signal solder ball is D3-, the second positive differential signal solder ball is D4+, the second negative differential signal solder ball is D4-, and the third positive differential signal solder ball is D5+ and the third negative differential signal solder ball is D5-.

[0073] For example, the arrangement of differential signal solder balls in each layer of the solder ball arrangement structure subgroup is as follows: the first layer consists of the second positive differential signal solder ball and the second negative differential signal solder ball from left to right; the second layer consists of the first negative differential signal solder ball and the third positive differential signal solder ball from left to right; and the third layer consists of the first positive differential signal solder ball and the third negative differential signal solder ball from left to right.

[0074] That is, such as Figure 3 As shown, in the first solder ball arrangement subgroup from left to right, D1+ and D1- are arranged from left to right in the first layer, D0- and D2+ in the second layer, and D0+ and D2- in the third layer. A "U"-shaped signal arrangement is formed by connecting D0+, D0-, D1+, D1-, D2+, and D2- in series. In the second solder ball arrangement subgroup from left to right, D4+ and D4- are arranged from left to right in the first layer, D3- and D5+ in the second layer, and D3+ and D5- in the third layer. A "U"-shaped signal arrangement is formed by connecting D3+, D3-, D4+, D4-, D5+, and D5- in series. Figure 3 The "U"-shaped dashed line is only for illustrating the arrangement of solder balls; this line does not exist in the actual arrangement of solder balls.

[0075] Through such Figure 3 The solder ball arrangement interface shown allows for sequential output of PCB traces, ensuring a one-to-one correspondence between the traces and the gold finger interface. Specifically, on the PCB, the differential signal pairs from left to right are 0, 1, 2, 3, 4, 5, 6, 7... Figure 4This is a schematic diagram of the lead-out wires under the solder ball arrangement structure provided in Embodiment 2 of the present invention. Figure 4 As shown, the solder ball arrangement structure provided in this embodiment of the invention enables sequential PCB trace output, allowing the PCB traces to connect to the gold fingers one by one without needing to be wound. Figure 4 The bottommost point corresponds to the perfect wiring method.

[0076] Figure 5 This is an enlarged schematic diagram of the lead-out wire under the solder ball arrangement structure provided in Embodiment 2 of the present invention. Figure 5 As shown, by removing the grounding solder balls set in the first layer in the solder ball arrangement close to the edge of the chip packaging substrate, the line width can be made uniform, eliminating the need to use the neck mode for line output, thus maintaining impedance continuity and improving differential signal quality.

[0077] In the ball arrangement structure provided in this embodiment of the invention, compared with the prior art, the return loss (SDD RL) of the differential transmission S-parameter in the prior art is -15dB at 8GHz; while the SDD RL of this embodiment of the invention is -26.5dB at 8GHz, which significantly improves the differential transmission quality of high-speed differential signals.

[0078] The technical solution of this invention solves the problems of differential signal crosstalk and impedance abrupt changes caused by inconsistent linewidths in existing solder ball arrangements by setting differential signal solder balls in a "U" shape within the solder ball arrangement subgroups of the chip packaging substrate, placing ground solder balls on the outside of each solder ball arrangement subgroup, and removing the ground solder balls placed in the first layer in the solder ball arrangement adjacent to the edge of the chip packaging substrate. Specifically, by removing the ground solder balls placed in the first layer in the solder ball arrangement adjacent to the edge of the chip packaging substrate, the problem of impedance abrupt changes in PCB traces is solved, improving signal quality. By designing the signal pads so that each differential signal solder ball is surrounded by differential signal solder balls or GND solder balls of opposite polarity, the return path for high-speed signals is increased, crosstalk is reduced, and signal quality is improved. By arranging differential signal solder balls in a "U" shape within the solder ball arrangement subgroups and placing ground solder balls on the outside of each subgroup, a near 1:1 ratio of signal solder balls to ground solder balls is achieved in the package substrate while maintaining signal integrity. This increases the density of differential signal solder balls in the substrate's output, allowing for a larger number of signal solder balls to be placed on a limited substrate, ensuring stable and reliable operation of high-speed differential signals at frequencies of tens of GHz. By restricting the arrangement order of differential signal solder balls within the solder ball arrangement subgroups, PCB traces can be routed strictly according to the gold finger requirements, resulting in a more compact and aesthetically pleasing chip package design.

[0079] Example 3

[0080] Figure 6 This is a schematic diagram of a chip structure provided according to Embodiment 3 of the present invention. Figure 6 As shown, the chip includes a chip packaging substrate, wherein the chip packaging substrate is generated using the solder ball arrangement structure design of the chip packaging substrate provided in any embodiment of the present invention.

[0081] Figure 7 This is a schematic diagram of a motherboard structure provided according to an embodiment of the present invention. Figure 7 As shown, the motherboard contains the following: Figure 6 The chip shown.

[0082] Figure 8 This is a schematic diagram of the structure of an electronic device according to an embodiment of the present invention. Figure 8 As shown, the electronic device includes, for example Figure 6 The chip shown or such Figure 7 The motherboard shown.

[0083] Electronic devices are intended to represent various forms of digital computers, such as laptops, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframes, and other suitable computers. Electronic devices can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices.

[0084] In addition to the chip or motherboard provided in the embodiments of the present invention, the electronic device may also include at least one processor and a memory, such as a read-only memory (ROM) or a random access memory (RAM), communicatively connected to the at least one processor. The memory stores computer programs executable by the at least one processor. The processor can perform various appropriate actions and processes based on the computer programs stored in the ROM or loaded into the RAM from memory cells. The RAM may also store various programs and data required for the operation of the electronic device. The processor, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0085] Multiple components in an electronic device are connected to an I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the electronic device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0086] A processor can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processors include, but are not limited to, central processing units (CPUs), graphics processing units (GPUs), various special-purpose artificial intelligence (AI) computing chips, various processors that run machine learning model algorithms, digital signal processors (DSPs), and any suitable processor, controller, microcontroller, etc.

[0087] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0088] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0089] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0090] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A solder ball arrangement structure in a chip packaging substrate, characterized in that, The chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; wherein: The grounding solder ball is used to transmit grounding signals; The positive differential signal solder ball and the negative differential signal solder ball form a differential pair signal for transmitting differential signals; In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder ball are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder ball are ground solder balls or positive differential signal solder balls. When arranging positive differential signal solder balls and negative differential signal solder balls, in adjacent differential signal solder balls, starting from the positive terminal of the first pair of differential signals, the connection is connected in series to the negative terminal of the Qth pair of differential signals, and a "U"-shaped signal arrangement is formed by using a layout in which adjacent differential signal solder balls have opposite signals; where Q is a positive integer greater than or equal to 2; The differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls; A grounding solder ball is placed outside the adjacent differential signal solder ball.

2. The solder ball arrangement structure according to claim 1, characterized in that, From the edge of the chip packaging substrate to the inside, every N layers form a solder ball arrangement structure group; In each solder ball arrangement structure group, the first N-1 layers include positive differential signal solder balls, negative differential signal solder balls, and ground solder balls, and the adjacent solder balls of the positive differential signal solder balls are either ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder balls are either ground solder balls or positive differential signal solder balls. In each solder ball arrangement structure group, the Nth layer is the ground solder ball; where N is a positive integer greater than or equal to 2.

3. The solder ball arrangement structure according to claim 2, characterized in that, In each ball arrangement structure group, every M columns constitute a ball arrangement structure subgroup; Each solder ball arrangement subgroup includes M×(N-1) / 2 positive differential signal solder balls and M×(N-1) / 2 negative differential signal solder balls; where M is a positive integer greater than or equal to 2, and at least one of M and (N-1) is an even number; In each solder ball arrangement structure subgroup, the adjacent solder balls of the positive differential signal solder balls are negative differential signal solder balls, and the adjacent solder balls of the negative differential signal solder balls are positive differential signal solder balls. Each solder ball arrangement subgroup is arranged laterally along the chip packaging substrate; grounding solder balls are placed between each solder ball arrangement subgroup.

4. The solder ball arrangement structure according to claim 3, characterized in that, N is 4, M is 2; Each solder ball arrangement subgroup includes: three positive differential signal solder balls and three negative differential signal solder balls; Specifically, the first positive differential signal solder ball and the first negative differential signal solder ball constitute the first pair of differential signals; the second positive differential signal solder ball and the second negative differential signal solder ball constitute the second pair of differential signals; and the third positive differential signal solder ball and the third negative differential signal solder ball constitute the third pair of differential signals.

5. The solder ball arrangement structure according to claim 4, characterized in that, In the solder ball arrangement structure subgroup, the arrangement structure of the differential signal solder balls in each layer is as follows: the first layer from left to right consists of the second positive differential signal solder ball and the second negative differential signal solder ball; the second layer from left to right consists of the first negative differential signal solder ball and the third positive differential signal solder ball; and the third layer from left to right consists of the first positive differential signal solder ball and the third negative differential signal solder ball.

6. The solder ball arrangement structure according to claim 1, characterized in that, In the solder ball arrangement adjacent to the edge of the chip packaging substrate, the grounding solder balls set in the first layer are removed.

7. A method for arranging solder balls in a chip packaging substrate, characterized in that, The chip packaging substrate includes ground solder balls, positive differential signal solder balls, and negative differential signal solder balls; the method includes: The grounding signal is transmitted through the grounding solder ball; The differential signal is transmitted by forming a differential pair signal through the positive differential signal solder ball and the negative differential signal solder ball; In the chip packaging substrate, the adjacent solder balls of the positive differential signal solder ball are ground solder balls or negative differential signal solder balls; the adjacent solder balls of the negative differential signal solder ball are ground solder balls or positive differential signal solder balls. When arranging positive differential signal solder balls and negative differential signal solder balls, in adjacent differential signal solder balls, starting from the positive terminal of the first pair of differential signals, the connection is connected in series to the negative terminal of the Qth pair of differential signals, and a "U"-shaped signal arrangement is formed by using a layout in which adjacent differential signal solder balls have opposite signals; where Q is a positive integer greater than or equal to 2; The differential signal solder balls include positive differential signal solder balls and negative differential signal solder balls; A grounding solder ball is placed outside the adjacent differential signal solder ball.

8. A chip, characterized in that, The chip includes a chip packaging substrate configured with a solder ball arrangement structure as described in any one of claims 1 to 6; or, the chip performs a solder ball arrangement method as described in claim 7.

9. An electronic device, characterized in that, The electronic device includes the chip as described in claim 8.

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