A high-speed data transmission method, device and medium based on a silicon photon chip

Abstract

The application discloses a high-speed data transmission method and device based on a silicon photon chip and a medium, relates to the technical field of data transmission, and comprises the following steps: a plurality of wavelength mode physical channels are constructed by utilizing a micro comb light source, a wavelength demultiplexing structure and a double-mode waveguide on a silicon photon chip; a training sequence is sent under default transmission of a programmable interference network, channel gain and noise are estimated to obtain state information; the number of virtual channels is determined and combination parameters are calculated according to the state information; virtual-real channel mapping is established, and on-chip optical path configuration is completed; a service forward error correction code is encoded on the sending side, and a multidimensional optical signal is generated by cross-virtual channel bit interleaving in the encoding block; after demultiplexing and equalization, the signal is transformed to a virtual channel domain on the receiving side, soft decision demodulation and error correction decoding are performed, a quality index is calculated, and channel state is updated; and linear combination parameter matrix and modulation parameters are further jointly optimized to realize low-error and high-throughput adaptive transmission under a dynamic link.

Description

Technical Field

[0001] This invention relates to the field of data transmission technology, and in particular to a high-speed data transmission method, device and medium based on silicon photonic chips. Background Technology

[0002] With the increasing demands for bandwidth and energy efficiency from applications such as data center interconnects, high-performance computing, and artificial intelligence training, traditional high-speed data transmission based on electrical interconnects is gradually facing bottlenecks such as bandwidth limitations, excessive power consumption, and decreased signal integrity. Silicon photonics technology, by integrating optical devices such as light sources, modulators, waveguides, and detectors on silicon substrates, enables optoelectronic coordinated transmission, providing an important technological path for high-speed, high-capacity, and low-power data transmission. In recent years, high-speed data transmission schemes based on silicon photonic chips have gradually introduced wavelength division multiplexing, mode multiplexing, and on-chip programmable interference structures, enabling the parallel transmission of multidimensional optical signals within a single chip, significantly improving the number of physical channels and the utilization rate per unit bandwidth. Simultaneously, combining digital signal processing technology to compensate for distortion, crosstalk, and noise in optical links has become a key development direction for improving the performance of silicon photonic communication systems.

[0003] Despite the progress made in the number and integration of physical channels in existing silicon photonics high-speed data transmission technologies, significant shortcomings remain. First, existing technologies typically use fixed wavelength channels or mode channels as independent carrier units, lacking the ability to reconstruct between channels based on real-time link states. Second, existing technologies mostly perform modulation, equalization, and error correction processing separately in the electrical or optical domains, lacking cross-channel joint optimization mechanisms for multidimensional optical signals, and are particularly difficult to achieve adaptive reconstruction in collaboration with digital signal processing within on-chip programmable interferometric networks. Summary of the Invention

[0004] In view of the aforementioned existing problems, the present invention is proposed.

[0005] Therefore, this invention provides a high-speed data transmission method based on silicon photonic chips to solve the problems of the lack of reconstruction mechanism between channels and the difficulty in adaptive and coordinated optimization of modulation and channel configuration in the prior art.

[0006] To solve the above-mentioned technical problems, the present invention provides the following technical solution:

[0007] In a first aspect, the present invention provides a high-speed data transmission method based on a silicon photonic chip, comprising: establishing a wavelength mode physical channel on the silicon photonic chip through a micro-comb light source, a wavelength demultiplexing structure and a dual-mode waveguide; sending a training sequence and estimating the equivalent complex gain and noise variance of each physical channel on the receiving side with the programmable interferometer network set to default transmission; and obtaining physical channel state information.

[0008] The number of virtual channels is determined by physical channel status information, a linear combination parameter matrix is ​​constructed, and the optical path configuration of the virtual channels on the silicon photonic chip is performed.

[0009] The transmitting-side digital signal processing circuit performs forward error correction coding on the upper-layer services, performs bit interleaving across virtual channels within the coding block, and obtains multidimensional optical signals based on the linear combination parameter matrix.

[0010] The multidimensional optical signal is demultiplexed and equalized, the physical channel received symbols are transformed to the virtual channel domain, the virtual channel symbols are soft-decision demodulation and forward error correction decoding are performed, and the quality index vector of each virtual channel and the updated physical channel state information are calculated.

[0011] The linear combination parameter matrix and modulation parameters are jointly optimized using the quality index vector and the updated physical channel state information.

[0012] As a preferred embodiment of the high-speed data transmission method based on silicon photonic chips described in this invention, the specific steps for establishing a wavelength mode physical channel on the silicon photonic chip using a micro-comb light source, a wavelength demultiplexing structure, and a dual-mode waveguide are as follows.

[0013] A micro-comb light source is integrated on a silicon photonic chip, and multiple carrier waves are extracted through an array of waveguide gratings. The wavelength channel with optical power not lower than the channel optical power threshold is selected as the effective wavelength channel.

[0014] A mode multiplexing structure is set after each effective wavelength channel to couple the single-mode waveguide optical field into a dual-mode waveguide that only supports TE0 and TE1 modes, and the corresponding two mode paths are identified as wavelength mode physical channels.

[0015] As a preferred embodiment of the high-speed data transmission method based on silicon photonic chips described in this invention, the steps of sending training sequences and estimating the equivalent complex gain and noise variance of each physical channel on the receiving side, and obtaining physical channel state information, with the programmable interferometer network set to default transmission, are as follows:

[0016] When the programmable interferometer network is configured to the default transmission state, the transmitting side sequentially loads the BPSK training sequence with a pre-agreed training sequence preamble pattern on each wavelength mode physical channel.

[0017] The receiving side obtains the aligned training symbol sequence by detection, calculates the equivalent complex gain based on the received training symbols and the transmitted training symbols, calculates the noise variance based on the power of the error sequence, obtains the linear signal-to-noise ratio of each physical channel, and forms the physical channel state information.

[0018] As a preferred embodiment of the high-speed data transmission method based on silicon photonics chips described in this invention, the specific steps for determining the number of virtual channels through physical channel state information, constructing a linear combination parameter matrix, and configuring the optical paths of the virtual channels on the silicon photonics chip are as follows.

[0019] Sort the linear signal-to-noise ratio of each physical channel in the physical channel status information by size, select candidate physical channels, fix the number of virtual channels to be the same as the number of candidate physical channels, and construct a linear combination parameter matrix based on the candidate physical channels;

[0020] Based on the physical channel state information, the linear combination parameter matrix is ​​iteratively optimized to construct a cost function and calculate the cost value. After the cost value converges, the converged linear combination parameter matrix is ​​decomposed into a target transmission matrix of multi-level interferometric units according to the Clements structure.

[0021] For each interferometer element, the corresponding phase control quantity and coupling ratio control quantity are calculated based on the amplitude ratio and phase difference of the target transmission matrix elements obtained by decomposition. The phase control quantity and coupling ratio control quantity are then written into the corresponding phase adjustment electrode and tunable coupling electrode on the silicon photonic chip to complete the optical path configuration.

[0022] As a preferred embodiment of the high-speed data transmission method based on silicon photonics chips described in this invention, the transmitting-side digital signal processing circuit performs forward error correction coding on the upper-layer services, performs bit interleaving across virtual channels within the coding block, and obtains multidimensional optical signals based on a linear combination parameter matrix. The specific steps are as follows.

[0023] The transmitting-side digital signal processing circuit receives a continuous service bit stream, divides the arriving service bits into input blocks of fixed length, and inputs each input block to the forward error correction encoder for encoding to form an encoded block;

[0024] The bit ratio of the virtual channel during the interleaving process is calculated based on the virtual channel signal-to-noise ratio. The bit ratio of the coding block is obtained, and the product of the bit ratio of the coding block and the total number of bits in the coding block is used as the target number of bits.

[0025] Based on the target number of bits for each virtual channel, write the bit queue of each virtual channel to form a bit sequence after interleaving across virtual channels;

[0026] Modulation mapping is performed on the bit queues of each virtual channel according to the linear combination parameter matrix to obtain complex symbol sequences. The complex symbol sequences of each virtual channel are then sent to the corresponding digital-to-analog converter and driving circuit for electro-optic modulation and optical domain linear combination to obtain multidimensional optical signals.

[0027] As a preferred embodiment of the high-speed data transmission method based on silicon photonic chips described in this invention, the specific steps of demultiplexing and equalizing the multidimensional optical signal, transforming the physical channel received symbols to the virtual channel domain, and performing soft-decision demodulation and forward error correction decoding on the virtual channel symbols are as follows.

[0028] Multidimensional optical signals are coupled into the input waveguide, optical demultiplexing is performed through a mode demultiplexing structure and an arrayed waveguide grating, the analog-to-digital converter samples at twice the symbol rate, and digital down-conversion, matched filtering and timing recovery are performed on each sampled data to obtain a 16-dimensional physical channel receive vector.

[0029] Multiple-input multiple-output linear equalization is performed on the 16-dimensional physical channel received vector. The physical channel equalization output vector at each symbol time is transformed to the virtual channel domain through a linear combination parameter matrix to obtain a predetermined number of virtual channel received symbol sequences.

[0030] Using a preset 16QAM constellation and bit marking rules, soft decision demodulation is performed on each received symbol sequence of the virtual channel. The log-likelihood ratio of each bit corresponding to the received symbol is calculated as the soft information of the bit. The soft information is iteratively decoded, and the decoded bit stream and the flag indicating whether the check field passes are output.

[0031] As a preferred embodiment of the high-speed data transmission method based on silicon photonic chips described in this invention, the specific steps for calculating the quality index vector of each virtual channel and the updated physical channel state information are as follows:

[0032] Calculate the overall quality index for each virtual channel, arrange the overall quality indices of all virtual channels in order, and obtain the quality index vector of the virtual channels.

[0033] For each physical channel, re-estimate the channel complex gain, receive the CRC-verified coded block, read the training symbol sequence through the coded block, and read out the ideal symbol value corresponding to the training symbol sequence;

[0034] The channel complex gain estimates are calculated based on the training symbol sequence and the ideal symbol values. The channel complex gain estimates of all physical channels are combined to obtain the updated physical channel state information.

[0035] As a preferred embodiment of the high-speed data transmission method based on silicon photonic chips described in this invention, the specific steps of jointly optimizing the linear combination parameter matrix and modulation parameters using the quality index vector and updated physical channel state information are as follows.

[0036] The set of virtual channels that need to be prioritized for improvement is obtained through the quality index vector of the virtual channels;

[0037] The cost is recalculated based on the updated physical channel state information and the linear combination parameter matrix. The standard gradient descent algorithm is used to iteratively update each matrix element in the linear combination parameter matrix to obtain a new linear combination parameter matrix.

[0038] The modulation parameters of the virtual channel are updated based on the quality index vector of the virtual channel.

[0039] In a second aspect, the present invention provides a computer device including a memory and a processor, wherein the memory stores a computer program, wherein when the computer program is executed by the processor, it implements any step of the high-speed data transmission method based on silicon photonics chips as described in the first aspect of the present invention.

[0040] Thirdly, the present invention provides a computer-readable storage medium having a computer program stored thereon, wherein: when the computer program is executed by a processor, it implements any step of the high-speed data transmission method based on silicon photonics chips as described in the first aspect of the present invention.

[0041] The beneficial effects of this invention are as follows: by estimating the gain and noise of each physical channel through training sequences, the channel quality is made perceptible and quantifiable, providing a basis for adaptive configuration; by optimizing the linear combination parameter matrix based on channel state information and downloading it to a programmable interferometer network to construct a virtual channel, the physical channel reconstruction gain is realized, the influence of channel correlation and crosstalk is reduced, and the effective signal-to-noise ratio and net transmission capability are improved; by bit interleaving across the virtual channel and soft-decision decoding in the virtual channel domain, and by jointly optimizing the combination parameters and modulation parameters, adaptive transmission with low bit error rate and high throughput under dynamic links is achieved. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1 This is a flowchart of a high-speed data transmission method based on silicon photonic chips.

[0044] Figure 2 A flowchart for establishing a wavelength mode physical channel and acquiring physical channel status information.

[0045] Figure 3 A flowchart for configuring the optical path of a virtual channel and generating multidimensional optical signals.

[0046] Figure 4 A flowchart for receiving, processing, quality assessment, and joint optimization. Detailed Implementation

[0047] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0048] Many specific details are set forth in the following description in order to provide a full understanding of the invention. However, the invention may also be practiced in other ways different from those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the invention. Therefore, the invention is not limited to the specific embodiments disclosed below.

[0049] Secondly, the term "one embodiment" or "embodiment" as used herein refers to a specific feature, structure, or characteristic that may be included in at least one implementation of the present invention. The phrase "in one embodiment" appearing in different places in this specification does not necessarily refer to the same embodiment, nor is it a single or selective embodiment that is mutually exclusive with other embodiments.

[0050] Reference Figures 1-4 This is one embodiment of the present invention, which provides a high-speed data transmission method based on a silicon photonic chip, comprising the following steps:

[0051] S1. A wavelength mode physical channel is established on a silicon photonic chip using a micro-comb light source, a wavelength demultiplexing structure, and a dual-mode waveguide. With the programmable interferometer network set to default transmission, a training sequence is sent and the equivalent complex gain and noise variance of each physical channel are estimated at the receiving side to obtain the physical channel state information.

[0052] A microcomb light source based on a silicon nitride microring resonator is integrated on a silicon photonic chip. The output light of the microcomb is injected into the main waveguide of the chip through an optical fiber. The control circuit increases the pump laser power at a preset slope and adjusts the microring heating electrode to form a stable, equally spaced frequency comb spectrum. The output of the microcomb is introduced into an array waveguide grating. Each output waveguide extracts carrier light of a different center wavelength. The on-chip optical power monitoring circuit detects the carrier light and selects a fixed number (e.g., 16) wavelength channels whose optical power is not lower than the channel optical power threshold as the effective wavelength channel set. After each effective wavelength channel, a set of mode multiplexing structures is arranged to couple the optical field in the single-mode waveguide into the dual-mode waveguide. Only two modes, TE0 and TE1, are supported in the dual-mode waveguide. The mode selectivity monitoring structure arranged on the sidewall of the dual-mode waveguide detects the power ratio of TE0 and TE1. When the power ratio of the two modes is close to the design value and the crosstalk is lower than the predetermined crosstalk threshold, the two mode paths at the current wavelength are marked as wavelength mode physical channels.

[0053] It should be noted that the preset slope is determined by the control circuit sequentially starting the microcomb light source with various different pump power rise times, monitoring the output power fluctuations and spectral stability during each startup process in real time, and determining the power rise slope corresponding to the startup configuration with optimal stability as the preset slope; the channel optical power threshold is determined by the control circuit performing a complete measurement of the optical power at each output end of the arrayed waveguide grating, statistically analyzing the noise floor and the maximum / average output power of each channel, and setting a fixed power value that is several times higher than the noise floor and not lower than a certain proportion of the current maximum channel power as the channel optical power threshold, generally ranging from [−30dBm, −8dBm]; The calculation involves scanning the geometric parameters of the mode multiplexing structure to calculate the insertion loss, mode crosstalk, equalization complexity, and estimated bit error rate under different TE0 / TE1 power ratio distributions. The TE0 / TE1 power ratio corresponding to the optimal overall performance is determined as the target value of the mode power ratio distribution and recorded as the design value. The crosstalk predetermined threshold is determined by establishing a correlation curve between the inter-mode crosstalk level and the received bit error rate and equalization convergence performance. The maximum crosstalk level allowed in the correlation curve that still meets the target bit error rate and the equalizer converges stably is selected as the crosstalk predetermined threshold. Generally, the value range is [−25dBm, −12dBm].

[0054] The programmable interferometer network on the silicon photonic chip is set to the default transmission state. Specifically, the control circuit applies a zero bias voltage to each phase adjustment electrode in the interferometer network and sets each coupling arm to an approximately 50%:50% coupling ratio, so that the transmission matrix of the entire interferometer network is approximately equal to the identity matrix. This allows each input wavelength mode physical channel to be transmitted to the corresponding output waveguide along a fixed path. Low-power continuous light is injected into a single channel and the power of the output port is read one by one to confirm that there is no abnormal insertion loss or cross-coupling in the one-to-one mapping relationship between each input port and the output port. After confirmation, the default transmission configuration is locked.

[0055] After the interferometric network is fixed at the default transmission, the transmitting-side digital signal processing circuit generates a binary training sequence of a preset length (e.g., 1024) from the pseudo-random sequence generator, and uses a fixed BPSK mapping method to map logic bits 0 and 1 to amplitudes of [missing value]. and The transmitting side loads training symbols onto the electro-optic modulator corresponding to a selected wavelength mode physical channel via digital-to-analog conversion and driving amplification circuits. This allows the wavelength mode physical channel to carry continuous BPSK symbols within a training cycle, while the other physical channels remain silent, transmitting only DC bias light. After training, the transmitting side switches to the next physical channel and continues training until all physical channels have completed training and transmission. Simultaneously with the transmission of the training sequence, the receiving side performs optical demultiplexing of the incident multidimensional optical signal using mode demultiplexing and an arrayed waveguide grating. The optical signals of each wavelength mode physical channel are coupled to the corresponding photodetectors, then converted into analog voltage signals by a transimpedance amplification circuit and sent to the analog-to-digital converter. The analog-to-digital converter samples at twice the symbol rate, and the digital signal processing circuit performs matched filtering and timing recovery on each physical channel to align the sampling points to the symbol center. Correlation detection is performed using a pre-agreed training sequence preamble pattern to determine the starting sample position of the training sequence. This allows a 1024-bit received symbol sequence to be extracted from each physical channel and aligned with the transmitting end's training sequence to obtain the aligned training sequence.

[0056] It should be noted that the pre-agreed training sequence preamble pattern is formed by extracting a bit sequence that meets the frame synchronization requirements from a standard pseudo-random sequence (e.g., a fixed-order PN sequence) through the digital signal processing circuit on the transmitting side, and mapping the bit sequence through a fixed BPSK to form a unique preamble symbol pattern.

[0057] After obtaining the aligned training sequence, the receiving-side digital signal processing circuit, for each physical channel, multiplies the received training symbol sequence with the known training symbol sequence from the transmitting side symbol by symbol at the symbol level and sums them over the entire sequence length to obtain the channel's equivalent complex gain. The received training symbols are reconstructed using the equivalent complex gain, and the error sequence between the reconstructed symbols and the actual received symbols is calculated. The noise variance of the physical channel is obtained by averaging the power of the error sequence. The ratio of the channel gain power to the noise variance is used as the linear signal-to-noise ratio of the physical channel. The channel gain, noise variance, and signal-to-noise ratio of each channel are recorded by channel index to form the physical channel state information.

[0058] S2. Determine the number of virtual channels through physical channel status information, construct a linear combination parameter matrix, and configure the optical path of the virtual channels on the silicon photonic chip.

[0059] The linear signal-to-noise ratio (SNR) of each physical channel in the physical channel state information is sorted by magnitude. Several physical channels with the highest SNR (e.g., 8 channels) are selected as candidate physical channels. The number of virtual channels is fixed to a constant equal to the number of candidate physical channels. The control circuit constructs a linear combination parameter matrix based on the candidate physical channels. Each virtual channel is initially mapped one-to-one with a corresponding high SNR physical channel, resulting in a set of combination parameters. The combination parameters are optimized using the physical channel state information, ensuring that the constructed virtual channels have a high overall SNR and low error correlation among themselves. The expression is:

[0060] ;

[0061] in, Indicates value, Indicates the total number of virtual channels. Integer index representing the index used to traverse the virtual channels. Integer representing the index of the second virtual channel. Indicates the first Linear signal-to-noise ratio estimates for each virtual channel Indicates the first The virtual channel and the first Normalized correlation coefficients between virtual channels This indicates the adjustment weighting coefficient.

[0062] It should be noted that, After the control circuit reads the current linear combination parameters and physical channel status information, the digital signal processing circuit, according to the first... Given the physical channel gain and noise variance corresponding to each virtual channel, first calculate the equivalent signal power and equivalent noise power after linear combination of the virtual channels. Then, use the ratio of the equivalent signal power to the equivalent noise power as the value of the first virtual channel. Linear signal-to-noise ratio estimates for each virtual channel; The receiving side digital signal processing circuit extracts the first signal from each observation window. The virtual channel and the first The received symbol sequences of each virtual channel are processed to remove DC from each sequence, the covariance between the two sequences is calculated, and the normalized correlation coefficient is obtained by normalizing the two sequences using the square root of their respective variances. By testing multiple candidate channels under different channel operating conditions The values ​​are used for performance evaluation, comparing each candidate. Under a given bit error rate constraint, the achievable net transmission rate and convergence stability will be determined by the configuration that simultaneously satisfies the target bit error rate and yields the highest net rate in most operating conditions. As an adjustment weight coefficient.

[0063] The standard gradient descent algorithm is adopted. Starting from the current combined parameter matrix, the cost value and the gradient estimate of each combined parameter are repeatedly calculated. In each iteration, the combined parameters are slightly adjusted along the negative gradient direction. At the same time, each row of the combined vector is normalized so that the energy is kept at 1, until the cost value converges to the predetermined convergence threshold. The converged linear combined parameter matrix is ​​used as the final mapping relationship between the virtual channel and the physical channel.

[0064] It should be noted that the predetermined convergence threshold is determined by finding the position in each set of working conditions where the target pre-correction bit rate is first met and the improvement in bit error rate is less than a preset proportion (e.g., less than 10%) after further iterations, and obtaining the cost value corresponding to the position as the predetermined convergence threshold.

[0065] The converged linear combination parameter matrix is ​​decomposed into a target transmission matrix of multi-level 2×2 interferometric units according to the Clements structural decomposition rule. For each interferometric unit, the corresponding phase control quantity and coupling ratio control quantity are calculated based on the amplitude ratio and phase difference of the target transmission matrix elements obtained by decomposition. These control quantities are written into the corresponding phase adjustment electrode and tunable coupling electrode on the silicon photonic chip, so that the optical signal transmitted by the programmable interferometric network is linearly combined with each physical channel according to the converged linear combination parameter matrix, thereby forming a predetermined number of virtual channels on the silicon photonic chip and realizing the optical path configuration of the virtual channels within the chip.

[0066] S3. The transmitting-side digital signal processing circuit performs forward error correction coding on the upper-layer services, performs bit interleaving across virtual channels within the coding block, and obtains multidimensional optical signals based on the linear combination parameter matrix.

[0067] The transmitting-side digital signal processing circuit receives a continuous service bit stream and divides the arriving service bits into several input blocks of fixed length. Each input block contains a fixed number of information bits (e.g., 3072 bits). Each input block is then fed into a forward error correction encoder for encoding, forming a fixed-length (e.g., 4096-bit) encoded block. The transmitting side first calculates the proportion of bits that each virtual channel should handle during the interleaving process based on the signal-to-noise ratio of each virtual channel, defining the first... The bit ratio of each virtual channel is expressed as follows:

[0068] ;

[0069] in, Indicates the first The proportion of coding block bits that each virtual channel should bear during the interleaving process.

[0070] Will The product of the number of bits in the coded block and the total number of bits in the coded block is the amount to be allocated to the first... The target number of bits for each virtual channel ensures that bits within the same coding block are distributed across different virtual channels according to their virtual channel quality, rather than being concentrated in a single virtual channel with poor quality.

[0071] Based on the number of bits in each virtual channel, the bit order within the coding block is renumbered, and then arranged from virtual channel 1 to virtual channel 2. In the order of writing, the bits in the coded block are written into the bit queues of each virtual channel in sequence, forming a bit sequence after interleaving across virtual channels.

[0072] Modulation mapping is performed on the bit queues of each virtual channel. Specifically, 16QAM modulation is uniformly selected for each virtual channel, and every 4 bits are sequentially mapped to a complex plane constellation point to obtain the complex symbol sequence corresponding to each virtual channel. During the symbol mapping process, the transmitting side ensures that the symbol sequence of each virtual channel corresponds one-to-one with the optical port in the linear combination parameter matrix according to the final mapping relationship between the virtual channel and the physical channel. This ensures that when linearly combined through the programmable interferometer network, the symbols of each virtual channel can be correctly loaded into the corresponding physical channel input waveguide.

[0073] The transmitting side sends the complex symbol sequence of each virtual channel to the corresponding digital-to-analog converter and driving circuit, converts the symbol sequence into two analog voltage waveforms, and drives the electrodes of the electro-optic modulator corresponding to the virtual channel, so that the electrical signal of each virtual channel is modulated onto the optical carrier of the wavelength mode physical channel. After the electro-optic modulation is completed, the optical domain is linearly combined in the network according to the linear combination parameters to form the output optical field distribution. The output optical field is multiplexed in both wavelength and mode dimensions through the arrayed waveguide grating and mode multiplexing structure, forming a multidimensional optical signal at the output port of the silicon photonic chip.

[0074] S4. Demultiplex and equalize the multidimensional optical signal, transform the physical channel received symbols to the virtual channel domain, perform soft decision demodulation and forward error correction decoding on the virtual channel symbols, and calculate the quality index vector of each virtual channel and the updated physical channel state information.

[0075] Multidimensional optical signals are coupled into the input waveguide of the silicon photonic receiver chip. Optical demultiplexing is performed through a mode demultiplexing structure and an arrayed waveguide grating, so that optical signals of different wavelengths and modes are respectively assigned to the output waveguides of the corresponding wavelength mode physical channels. Each output waveguide is connected to a photodetector and a transimpedance amplifier. The optical signal is converted into an analog voltage signal and then sent to the analog-to-digital converter. The analog-to-digital converter samples at twice the symbol rate. The receiver-side digital signal processing circuit performs digital down-conversion, matched filtering, and timing recovery on each sampled data, and uses the synchronization sequence in the frame header to complete frame synchronization, so that the sampling points of each physical channel are aligned at the symbol time, resulting in a 16-dimensional physical channel receiving vector for each symbol time.

[0076] The receiving-side digital signal processing circuit performs multiple-input multiple-output linear equalization on the 16-dimensional physical channel received vector in the physical channel domain. The equalization matrix constructed using the updated physical channel state information eliminates linear crosstalk and frequency-selective distortion between different wavelength-mode physical channels, so that each component of the equalization output vector corresponds to the compensated physical channel received symbol. The physical channel equalization output vector at each symbol time is transformed to the virtual channel domain through a linear combination parameter matrix to obtain a predetermined number of virtual channel received symbol sequences.

[0077] For each virtual channel, the receiving-side digital signal processing circuit employs a preset 16QAM constellation and bit marking rule (e.g., using Gray marking to uniquely map each 4 bits to 16 constellation points on the complex plane) to perform soft-decision demodulation on each received symbol. Specifically, within an observation window, the equalized received symbol sequence for each virtual channel is extracted and subtracted symbol by symbol from the corresponding hard-decision constellation point. The squares of the real and imaginary parts of these error vectors are then averaged within the window, and the resulting average error power is used as the estimated equivalent noise variance of the virtual channel. For the ... The first virtual channel For each received symbol, based on the equivalent noise variance estimate, the log-likelihood ratio of each bit corresponding to the received symbol is calculated as the soft information of the bit. The soft information of all virtual channels is written into the buffer according to the code block number and the virtual channel number. The pre-stored interleaving mapping table is called to rearrange the soft information from different virtual channels and different symbol times, restoring it to the soft information vector in the original bit order of the transmitting end coding block. The soft information vector is sent to the LDPC forward error correction decoder for iterative decoding, and the decoded bit stream of each coding block and the flag indicating whether the check field has passed are output.

[0078] It should be noted that the pre-stored interleaving mapping table is calculated based on the code block length, the number of virtual channels, and the proportion of bits each virtual channel should carry. This calculation establishes a one-to-one correspondence between which bit in the code block should be sent to which virtual channel and which symbol position. This correspondence is then used to generate a fixed index lookup table as the interleaving mapping table. The flag indicating whether the check field passes is a CRC check result flag bit set for each code block. After the LDPC decoding output bit stream, the receiving side recalculates a set of CRC check values ​​for the decoded information bits according to the same CRC polynomial. The calculated CRC check value is then compared bit by bit with the CRC check field carried in the decoded bit stream. When the two are completely consistent, the check flag of the code block is set to pass. If any bit is inconsistent, the check flag of the code block is set to fail.

[0079] To quantify the actual transmission quality of each virtual channel, a comprehensive quality index is calculated for each virtual channel. The comprehensive quality indices of all virtual channels are then arranged in order to obtain a virtual channel quality index vector, expressed as:

[0080] ;

[0081] in, Indicates the first Each virtual channel at time Comprehensive quality indicators Indicates the first Linear signal-to-noise ratio estimates for each virtual channel within the current observation window. Indicates the first The estimated bit error rate of each virtual channel within the current observation window.

[0082] It should be noted that, Within the current observation window, first extract the results belonging to the first [interleaving] from all decoding results according to the interleaving mapping table. For the known bits of the virtual channel (e.g., frame header test bits), compare these bits one by one with the reference bits stored locally, and count the... The number of erroneous bits corresponding to each virtual channel and the total number of bits participating in the comparison are used as the ratio of the number of erroneous bits to the total number of bits as the estimated bit error rate for pre-correction.

[0083] For each physical channel, the channel complex gain is re-estimated. Whenever a CRC-verified coded block is received, the receiving side reads a training symbol sequence specifically for channel estimation from a fixed position in the coded block according to the pre-agreed frame structure, and reads the ideal symbol value corresponding to the training symbol sequence from the local memory. For a certain physical channel, the receiving side performs complex division on each of the received training symbols with the corresponding ideal symbol to obtain multiple sets of complex ratios. The arithmetic mean of the complex ratios is taken over the symbol sequence length range, and the average value is used as the estimated channel complex gain of the physical channel at the corresponding moment of the current coded block. After all physical channels have been updated, the matrix composed of the latest channel complex gains is recorded as the physical channel state information at the current moment.

[0084] It should be noted that the pre-agreed frame structure means that each LDPC coded block is organized in a uniform format before transmission. The bit positions are fixed and divided into frame synchronization field, configuration version identifier field, channel estimation training field, service data field and CRC check field. The length of each field and its start and end positions in the coded block are fixed. The sending end always writes bits according to this format, and the receiving end always reads the corresponding field at the corresponding position according to the same format.

[0085] S5. Perform joint optimization of the linear combination parameter matrix and modulation parameters using the quality index vector and the updated physical channel state information.

[0086] The average and minimum values ​​of the overall quality index of all virtual channels are calculated using the quality index vector of the virtual channels. The average value is compared with the lower limit of quality, and the minimum value is compared with the lower limit of single-channel protection. When the average value is lower than the lower limit of quality or the minimum value is lower than the lower limit of single-channel protection, the current state is marked as needing reconfiguration; otherwise, the existing linear combination parameters and modulation parameters remain unchanged. When marked as needing reconfiguration, the indices of all virtual channels whose virtual channel quality index is lower than the lower limit of single-channel protection are recorded to form a set of virtual channels that need to be focused on improvement.

[0087] It should be noted that the quality lower limit and the single-channel protection lower limit are determined by fixing the overall pre-correction code rate upper limit to a certain value. The upper limit of the pre-correction code rate for a single virtual channel is fixed at 1. We select the linear signal-to-noise ratio lower limit values ​​corresponding to the two upper limits of bit error rate, and calculate the comprehensive quality index. The two calculated comprehensive quality indices are used as the quality lower limit and the single-channel protection lower limit, respectively.

[0088] The cost value is recalculated based on the current linear combination parameter matrix and physical channel state information. The standard gradient descent algorithm is used to iteratively update each matrix element in the linear combination parameter matrix until the change in cost value is less than the preset cost change difference. The converged linear combination matrix is ​​then recorded as the new linear combination parameter matrix.

[0089] It should be noted that each matrix element in the linear combination parameter matrix represents the linear combination coefficient of a certain virtual channel to a certain physical channel, and each matrix element is the linear combination parameter of the virtual channel; the preset cost change difference is calculated by first calculating the cost value before the initial iteration when performing linear combination optimization for the first time, taking the difference between the cost value before the initial iteration and zero and dividing it into one hundred equal parts, and taking the ratio of the cost value before the initial iteration to 100 as the preset cost change difference.

[0090] Based on the virtual channel quality index vector, the modulation parameters of each virtual channel in the set of virtual channels that need to be improved are updated. Specifically, for virtual channels with an overall quality index not lower than the quality index threshold, the modulation format is set to 16QAM, with 4 bits per symbol; for virtual channels with an overall quality index lower than the quality index threshold, the modulation format is set to QPSK, with 2 bits per symbol. The modulation bit count corresponding to each virtual channel is arranged into a modulation parameter vector in index order, and the modulation parameter vector is written into the modulation mapping configuration registers on the transmitting and receiving sides. On the transmitting side, it is used to determine the bit grouping and constellation mapping method of each virtual channel, and on the receiving side, it is used to select the corresponding soft decision demodulation and LLR calculation method.

[0091] It should be noted that the quality index threshold is calculated by setting the lower limit of linear signal-to-noise ratio (SNR) to 10, and then using the calculated comprehensive quality index as the quality index threshold. The lower limit of SNR is set to 10 by consulting the publicly available error performance curves of LDPC codes when determining the upper limit of the pre-correction bit rate to determine the corresponding minimum SNR.

[0092] The currently used linear combination parameter matrix is ​​read, and the Clements structural decomposition rule is used to decompose both the currently used linear combination parameter matrix and the new linear combination parameter matrix into a list of 2×2 interferometric submatrices arranged in a fixed order. The differences between the submatrices at each position are compared. For each interferometric unit, the target control voltage of the phase adjustment electrode and the coupling ratio adjustment electrode is calculated based on the difference between the old and new submatric parameters. The voltage is gradually transitioned from the old voltage value to the new voltage value in several equally spaced steps within a fixed transition time. The phase control voltage and coupling control voltage of each interferometric unit are respectively added with the increment calculated according to the number of steps, so that the transmission matrix of the entire programmable interferometric network continuously changes from the currently used linear combination parameter matrix to the new linear combination parameter matrix, avoiding link interruption caused by instantaneous changes.

[0093] By updating the modulation parameters and the linear combination parameter matrix, the virtual channel optical path configuration and modulation mode are adaptively adjusted, thereby maintaining a high overall transmission rate and low bit error rate.

[0094] This embodiment also provides a computer device applicable to the high-speed data transmission method based on silicon photonic chips, comprising: a memory and a processor; the memory is used to store computer-executable instructions, and the processor is used to execute the computer-executable instructions to realize the high-speed data transmission method based on silicon photonic chips as proposed in the above embodiment.

[0095] The computer device can be a terminal, comprising a processor, memory, communication interface, display screen, and input devices connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, carrier networks, NFC (Near Field Communication), or other technologies. The display screen can be an LCD screen or an e-ink screen. The input devices can be a touch layer covering the display screen, buttons, a trackball, or a touchpad on the computer device's casing, or an external keyboard, touchpad, or mouse.

[0096] This embodiment also provides a storage medium storing a computer program, which, when executed by a processor, implements the high-speed data transmission method based on silicon photonic chips as proposed in the above embodiments. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0097] In summary, this invention estimates the gain and noise of each physical channel through training sequences, achieving perceptible and quantifiable channel quality and providing a basis for adaptive configuration. By optimizing the linear combination parameter matrix based on channel state information and downloading it to a programmable interferometer network to construct a virtual channel, it achieves physical channel reconstruction gain, reduces channel correlation and crosstalk effects, and improves effective signal-to-noise ratio and net transmission capability. Through cross-virtual channel bit interleaving and virtual channel domain soft-decision decoding, and jointly optimizing combination and modulation parameters, it achieves adaptive transmission with low bit error rate and high throughput under dynamic links.

[0098] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A high-speed data transmission method based on a silicon photonic chip, characterized in that: include, A wavelength mode physical channel is established on a silicon photonic chip using a micro-comb light source, a wavelength demultiplexing structure, and a dual-mode waveguide. With the programmable interferometer network set to default transmission, a training sequence is sent and the equivalent complex gain and noise variance of each physical channel are estimated at the receiving side to obtain the physical channel state information. The number of virtual channels is determined by physical channel status information, a linear combination parameter matrix is ​​constructed, and the optical path configuration of the virtual channels on the silicon photonic chip is performed. The transmitting-side digital signal processing circuit performs forward error correction coding on the upper-layer services, performs bit interleaving across virtual channels within the coding block, and obtains multidimensional optical signals based on the linear combination parameter matrix. The multidimensional optical signal is demultiplexed and equalized, the physical channel received symbols are transformed to the virtual channel domain, the virtual channel symbols are soft-decision demodulation and forward error correction decoding are performed, and the quality index vector of each virtual channel and the updated physical channel state information are calculated. The linear combination parameter matrix and modulation parameters are jointly optimized using the quality index vector and the updated physical channel state information.

2. The high-speed data transmission method based on silicon photonic chips as described in claim 1, characterized in that: The specific steps for establishing a wavelength mode physical channel on a silicon photonic chip using a micro-comb light source, a wavelength demultiplexing structure, and a dual-mode waveguide are as follows: A micro-comb light source is integrated on a silicon photonic chip, and multiple carrier waves are extracted through an array of waveguide gratings. The wavelength channel with optical power not lower than the channel optical power threshold is selected as the effective wavelength channel. A mode multiplexing structure is set after each effective wavelength channel to couple the single-mode waveguide optical field into a dual-mode waveguide that only supports TE0 and TE1 modes, and the corresponding two mode paths are identified as wavelength mode physical channels.

3. The high-speed data transmission method based on silicon photonic chips as described in claim 2, characterized in that: With the programmable interferometer network set to default transmission, the training sequence is sent, and the equivalent complex gain and noise variance of each physical channel are estimated at the receiving side to obtain the physical channel state information. The specific steps are as follows: When the programmable interferometer network is configured to the default transmission state, the transmitting side sequentially loads the BPSK training sequence with a pre-agreed training sequence preamble pattern on each wavelength mode physical channel. The receiving side obtains the aligned training symbol sequence by detection, calculates the equivalent complex gain based on the received training symbols and the transmitted training symbols, calculates the noise variance based on the power of the error sequence, obtains the linear signal-to-noise ratio of each physical channel, and forms the physical channel state information.

4. The high-speed data transmission method based on silicon photonic chips as described in claim 3, characterized in that: The specific steps for determining the number of virtual channels through physical channel status information, constructing a linear combination parameter matrix, and configuring the optical path of the virtual channels on the silicon photonic chip are as follows: Sort the linear signal-to-noise ratio of each physical channel in the physical channel status information by size, select candidate physical channels, fix the number of virtual channels to be the same as the number of candidate physical channels, and construct a linear combination parameter matrix based on the candidate physical channels; Based on the physical channel state information, the linear combination parameter matrix is ​​iteratively optimized to construct a cost function and calculate the cost value. After the cost value converges, the converged linear combination parameter matrix is ​​decomposed into a target transmission matrix of multi-level interferometric units according to the Clements structure. For each interferometer element, the corresponding phase control quantity and coupling ratio control quantity are calculated based on the amplitude ratio and phase difference of the target transmission matrix elements obtained by decomposition. The phase control quantity and coupling ratio control quantity are then written into the corresponding phase adjustment electrode and tunable coupling electrode on the silicon photonic chip to complete the optical path configuration.

5. The high-speed data transmission method based on silicon photonic chips as described in claim 4, characterized in that: The transmitting-side digital signal processing circuit performs forward error correction coding on the upper-layer services, performs bit interleaving across virtual channels within the coding block, and obtains multidimensional optical signals based on a linear combination parameter matrix. The specific steps are as follows: The transmitting-side digital signal processing circuit receives a continuous service bit stream, divides the arriving service bits into input blocks of fixed length, and inputs each input block to the forward error correction encoder for encoding to form an encoded block; The bit ratio of the virtual channel during the interleaving process is calculated based on the virtual channel signal-to-noise ratio. The bit ratio of the coding block is obtained, and the product of the bit ratio of the coding block and the total number of bits in the coding block is used as the target number of bits. Based on the target number of bits for each virtual channel, write the bit queue of each virtual channel to form a bit sequence after interleaving across virtual channels; Modulation mapping is performed on the bit queues of each virtual channel according to the linear combination parameter matrix to obtain complex symbol sequences. The complex symbol sequences of each virtual channel are then sent to the corresponding digital-to-analog converter and driving circuit for electro-optic modulation and optical domain linear combination to obtain multidimensional optical signals.

6. The high-speed data transmission method based on silicon photonic chips as described in claim 5, characterized in that: The specific steps for demultiplexing and equalizing the multidimensional optical signal, transforming the received symbols from the physical channel to the virtual channel domain, and performing soft-decision demodulation and forward error correction decoding on the virtual channel symbols are as follows: Multidimensional optical signals are coupled into the input waveguide, optical demultiplexing is performed through a mode demultiplexing structure and an arrayed waveguide grating, the analog-to-digital converter samples at twice the symbol rate, and digital down-conversion, matched filtering and timing recovery are performed on each sampled data to obtain a 16-dimensional physical channel receive vector. Multiple-input multiple-output linear equalization is performed on the 16-dimensional physical channel received vector. The physical channel equalization output vector at each symbol time is transformed to the virtual channel domain through a linear combination parameter matrix to obtain a predetermined number of virtual channel received symbol sequences. Using a preset 16QAM constellation and bit marking rules, soft decision demodulation is performed on each received symbol sequence of the virtual channel. The log-likelihood ratio of each bit corresponding to the received symbol is calculated as the soft information of the bit. The soft information is iteratively decoded, and the decoded bit stream and the flag indicating whether the check field passes are output.

7. The high-speed data transmission method based on silicon photonic chips as described in claim 6, characterized in that: The specific steps for calculating the quality index vector of each virtual channel and the updated physical channel state information are as follows: Calculate the overall quality index for each virtual channel, arrange the overall quality indices of all virtual channels in order, and obtain the quality index vector of the virtual channels. For each physical channel, re-estimate the channel complex gain, receive the CRC-verified coded block, read the training symbol sequence through the coded block, and read out the ideal symbol value corresponding to the training symbol sequence; The channel complex gain estimates are calculated based on the training symbol sequence and the ideal symbol values. The channel complex gain estimates of all physical channels are combined to obtain the updated physical channel state information.

8. The high-speed data transmission method based on silicon photonic chips as described in claim 7, characterized in that: The specific steps for jointly optimizing the linear combination parameter matrix and modulation parameters using the quality index vector and updated physical channel state information are as follows: The set of virtual channels that need to be prioritized for improvement is obtained through the quality index vector of the virtual channels; The cost is recalculated based on the updated physical channel state information and the linear combination parameter matrix. The standard gradient descent algorithm is used to iteratively update each matrix element in the linear combination parameter matrix to obtain a new linear combination parameter matrix. The modulation parameters of the virtual channel are updated based on the quality index vector of the virtual channel.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that: When the processor executes the computer program, it implements the steps of the high-speed data transmission method based on silicon photonic chips as described in any one of claims 1 to 8.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by the processor, it implements the steps of the high-speed data transmission method based on silicon photonic chips as described in any one of claims 1 to 8.

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