Real-time on-chip traffic monitoring in automotive network devices

Abstract

A network device (18) for an automotive network (20) includes a semiconductor die, network device circuitry, and an on-chip traffic monitor (76). Network device circuitry is disposed on the semiconductor die and is configured to transmit traffic of the automotive network. An on-chip traffic monitor is disposed on the semiconductor die and is configured to monitor traffic through the network device circuitry from one or more sources in the automotive network to one or more destinations in the automotive network, and to detect performance degradation in the network device circuitry by analyzing the monitored traffic.

Description

Cross Reference to Related Applications

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 535,159, filed August 29, 2023, and U.S. Provisional Patent Application No. 63 / 656,375, filed June 5, 2024, the disclosures of which are incorporated by reference herein. TECHNICAL FIELD

[0002] The present disclosure relates generally to network communications, and in particular to methods and systems for traffic monitoring in network devices. BACKGROUND

[0003] Communication networks are sometimes used for critical task applications, and thus need to meet high reliability standards. One typical example is an automotive network used for communication between sensors, electronic control units (ECUs), and other units in a vehicle. Since network reliability in a vehicle is directly related to driver safety, components of an automotive network need to be highly reliable. For example, a network device can need to meet a specified Failure Tolerant Time Interval (FTTI) - the maximum time allowed from a failure until a transition to a safe state.

[0004] The above description is presented to enable a general understanding of the context of the relevant art prior to the disclosure, and should not be construed as an acknowledgment or admission that any of the information contained therein constitutes prior art to the disclosure. SUMMARY

[0005] Embodiments described herein provide a network device for use in an automotive network. The network device includes a semiconductor die, network device circuitry, and an on-chip traffic monitor. The network device circuitry is disposed on the semiconductor die and is configured to transmit traffic of the automotive network. The on-chip traffic monitor is disposed on the semiconductor die and is configured to monitor traffic from one or more sources in the automotive network to one or more destinations in the automotive network that passes through the network device circuitry, and to detect a performance degradation in the network device circuitry by analyzing the monitored traffic.

[0006] In some embodiments, the on-chip traffic monitor is configured to select a traffic flow from within the traffic, and to detect the performance degradation in the selected traffic flow.

[0007] In some embodiments, the network device circuitry includes (i) a plurality of port circuits disposed on a semiconductor die and configured to send and receive packets over an automotive network, (ii) a switch fabric disposed on the semiconductor die and configured to forward packets between the port circuits, and (iii) interconnect circuitry disposed on the semiconductor die and configured to connect the switch fabric to a host via a peripheral bus. An on-chip traffic monitor can be coupled to the interconnect circuitry.

[0008] In example embodiments, the on-chip traffic monitor is configured to identify, in the traffic, a traffic flow associated with a given bus function of the peripheral bus, and to detect a performance degradation by analyzing the identified traffic flow separately from one or more other traffic flows.

[0009] In another embodiment, the interconnect circuitry includes a plurality of direct memory access (DMA) engines, and the on-chip traffic monitor is configured to identify, in the traffic, a traffic flow associated with a given DMA engine of the plurality of DMA engines, and to detect a performance degradation by analyzing the identified traffic flow separately from one or more other traffic flows.

[0010] In yet another embodiment, the on-chip traffic monitor is configured to: identify, in the traffic, a traffic flow associated with one of (i) a virtual circuit, (ii) a port circuit among the plurality of port circuits, (iii) time sensitive network (TSN) traffic, (iv) a defined memory region in a memory of the host, and (v) message signaling interrupt (MSI) traffic; and to detect a performance degradation by analyzing the identified traffic flow separately from one or more other traffic flows.

[0011] In yet another embodiment, the on-chip traffic monitor includes one or more hardware counters, the on-chip traffic monitor being configured to designate a hardware counter among the plurality of hardware counters for measuring a traffic throughput of a selected traffic flow within the traffic. In example embodiments, the on-chip traffic monitor is configured to measure the traffic throughput by counting, using the hardware counter, a volume of traffic of the selected traffic flow over a defined measurement period.

[0012] In disclosed embodiments, the on-chip traffic monitor is configured to notify the host in response to detecting a performance degradation. In embodiments, the on-chip traffic monitor is configured to notify the host of the performance degradation within less than 100 microseconds from when the performance degradation occurs. In example embodiments, the on-chip traffic monitor is configured to detect the performance degradation by analyzing one or more of a delay exhibited in the monitored traffic, a change in an interval within a packet, a dropped packet, data corruption, and a traffic throughput.

[0013] A method of performing traffic monitoring in a network device of an automotive network is also provided in accordance with the embodiments described herein. The method includes transmitting traffic of the automotive network using network device circuitry disposed on a semiconductor die. Traffic passing through the network device circuitry from one or more sources in the automotive network to one or more destinations in the automotive network is monitored using an on-chip traffic monitor disposed on the semiconductor die. Performance degradation in the network device circuitry is detected using the on-chip traffic monitor by analyzing the monitored traffic.

[0014] The present disclosure will become more fully understood from the following detailed description, taken in conjunction with the accompanying drawings, in which: BRIEF DESCRIPTION OF DRAWINGS

[0015] Figure 1 is a block diagram schematically illustrating an automotive communication system including an automotive network switch having an on-chip traffic monitor in accordance with the embodiments described herein; and

[0016] Figure 2 is a flow diagram schematically illustrating a method of on-chip traffic monitoring in a network switch of Figure 1 . DETAILED DESCRIPTION

[0017] Network devices used in automotive networks typically need to detect faults and take action on detected faults within very short time periods of approximately 10ms-100ms.

[0018] The embodiments described herein provide improved techniques for detecting performance degradation in network devices. In this context, the term "performance degradation" includes intermittent faults, permanent faults, as well as minor or severe drops in performance metrics of a network device or portions thereof. One illustrative example of performance degradation is a reduction in bandwidth of data transmitted via a certain switch port. Such performance degradation can be problematic in itself, and it can also be indicative of an impending fault. Performance degradation can be defined in any suitable manner, such as a performance deviation from a defined baseline performance that is of a defined magnitude.

[0019] By detecting performance degradation before it develops into a fault, the disclosed techniques significantly reduce the time required for fault detection and repair. As an example, the embodiments described herein primarily relate to Ethernet switches in automotive networks. However, the disclosed techniques are generally applicable to other suitable network devices, network types, and applications.

[0020] In some embodiments, an automotive network device includes a switch implemented in a system on a chip (SoC). The switch communicates with a host over a peripheral bus (e.g., a Peripheral Component Interconnect Express (PCIe)). The SoC includes network device circuitry disposed on a semiconductor die. The network device circuitry can include, for example, a plurality of port circuits (“ports”) for sending and receiving packets over the automotive network, a switch fabric to forward packets between the port circuits, and interconnect circuitry to connect the switch fabric to the host via the PCIe bus.

[0021] In some embodiments, the network device further includes an on-chip traffic monitor disposed on the die of the switch SoC. The on-chip traffic monitor is configured to monitor traffic passing through the network device circuitry from a source in the automotive network to a destination in the automotive network, and to detect performance degradation in the network device circuitry by analyzing the monitored traffic. In various embodiments, the on-chip traffic monitor is disposed at some intermediate location between a data source in the automotive network (such as a camera, a distance sensor, a thermal sensor, an audio sensor, or other suitable sensor) and a destination in the automotive network (such as a vehicle CPU or a storage device).

[0022] In example implementations, the on-chip traffic monitor is hardware-implemented and coupled to the interconnect circuitry of the SoC. In monitoring traffic, the on-chip traffic monitor is able to detect performance degradation in selected traffic flows of interest with fine granularity. For example, in some embodiments, the on-chip traffic monitor is configurable to monitor traffic flows associated with selected virtual channels (VCs), PCIe bus functions (physical functions - PFs and / or virtual functions - VFs), direct memory access (DMA) engines of the SoC, Ethernet ports, memory regions in the host’s memory, interrupt events, and time-sensitive network (TSN) traffic flows. Each traffic flow is typically analyzed individually, without regard to other traffic flows.

[0023] Such fine granularity enables the network device to detect even slight degradation in performance with high sensitivity and reliability, and to initiate appropriate responsive actions. Moreover, the disclosed technology analyzes traffic in an intermediate node (the network device) rather than at an end node (e.g., the destination of the traffic). Analyzing traffic in an intermediate node is generally superior to analysis at an end node, because traffic at an end node can be affected by multiple degradations that are difficult to distinguish. Identifying degradations at an intermediate node can be faster because detection is closer to the system elements where degradations occur. Detection speed can be critical in automotive networks because it can have a direct impact on safety.

[0024] Figure 1is a block diagram schematically illustrating a car communication system 10 according to embodiments described herein, which includes one or more car network switches 18. In the present example, the switches 18 are part of an Ethernet network 20 installed in a vehicle. However, in general, the switches 18 can be used in other suitable network environments. The disclosed technology can also be implemented in other types of network devices, such as routers.

[0025] In embodiments, the vehicle includes a plurality of electronic subsystems 12 of various types. Some of the plurality of electronic subsystems 12 include sensors, such as video cameras, speed sensors, accelerometers, audio sensors, infrared sensors, radar sensors, lidar sensors, ultrasonic sensors, range finders or other proximity sensors, and / or any other suitable type of sensor. Other subsystems include, for example, advanced driver assistance systems (ADAS) and / or in-vehicle infotainment (IVN) systems. Other subsystems include electronic control units (ECUs) that control vehicle elements such as engines, bodies, steering devices, etc. Additionally or alternatively, the vehicle can include any other suitable type of electronic subsystem 12.

[0026] In some embodiments, the vehicle is divided into a plurality of zones, and the electronic subsystems 12 of each zone are controlled by a respective “zone ECU” 14. The various zone ECUs 14 communicate with a central computer 16 of the vehicle.

[0027] The electronic subsystems 12, ECUs 14, and central computer 16 communicate with each other by sending and receiving communication packets via the network 20. In the present example, the network 20 operates according to one of the IEEE 802.3 Ethernet standards (e.g., IEEE 802.3bw-2015 cited above). The network 20 includes a plurality of car network switches 18, which in the present example are Ethernet switches. Communication among the switches 18, between the switches 18 and the ECUs 14, and between the ECUs 14 and the electronic subsystems 12 is performed over network links 19. Depending on the applicable Ethernet standard, the links 19 can include any suitable physical medium, such as twisted-pair copper links, optical links, waveguides, etc.

[0028] In embodiments, Figure 1 The lower left portion of illustrates the internal structure of an example switch 18. In some embodiments, all of the switches 18 of the network 20 have a similar internal structure. In other embodiments, only a subset of the switches 18 (possibly only a single switch 18) will have this structure.

[0029] In embodiments, switch 18 is implemented in a system on a chip (SoC). The terms "switch," "SoC," and "switch SoC" are used interchangeably herein. In embodiments, switch 18 communicates with host 28 over a peripheral component interconnect express (PCIe) bus 32. Switch 18 includes a semiconductor die on which is disposed electronic circuitry (referred to as "network device circuitry"). Generally speaking, the network device circuitry is configured to perform various packet processing tasks of switch 18.

[0030] In Figure 1 embodiments, network device circuitry of switch 18 includes the following: -- a plurality of Ethernet port circuits 36, also referred to as "ports" for brevity. -- a switch fabric 40. -- interconnect circuitry 44 including (i) a media access control (MAC) module 48, (ii) a plurality of direct memory access (DMA) engines 52, and (iii) a routing and interconnect matrix 56.

[0031] In Figure 1 embodiments, Ethernet ports 36 seen at the bottom are configured to communicate over an Ethernet network of the vehicle. Among other tasks, ports 36 are configured to apply physical layer (PHY) processing to packets in accordance with the applicable IEEE 802.1 standards. One of Ethernet ports 36 is designated for communication with interconnect circuitry 44. Switch fabric 40 is configured to forward Ethernet packets between ports 36.

[0032] Interconnect circuitry 44 is configured to transfer packets, portions of packets, and other information between switch fabric 40 and host 28. In embodiments, MAC module 48 is configured to apply MAC layer processing to packets in accordance with the applicable IEEE 802.1 standards. DMA engines 52 operate in parallel. To transfer a packet from host 28 to switch fabric 40, one of DMA engines 52 reads packet data directly from memory of host 28 (over PCIe bus 32) and sends the read packet data to switch fabric 40. To transfer a packet from switch fabric 40 to host 28, one of DMA engines 52 receives packet data from switch fabric 40 and writes the packet data directly (over PCIe bus 72) to memory of host 28. Routing and interconnect matrix 56 routes packets between DMA engines 52 and PCIe bus 32.

[0033] In Figure 1In the example of FIG. 1, the switch 18 supports single-root input-output virtualization (SR-IOV). According to SR-IOV, the host 28 can run various applications implemented as virtual machines (VMs). The applications running on the host 28 can include, for example, infotainment applications, advanced driver assistance systems (ADAS), etc.

[0034] To service the various applications and other entities in the host 28 (such as a hypervisor), the physical resources of the PCIe bus 32 are partitioned into multiple PCIe functions (or, more generally, into multiple bus functions). A function can include one or more physical functions (PFs) and / or one or more virtual functions (VFs). The host 28 runs one or more PF software (PFSW) drivers 60 and / or one or more VF software (VFSW) drivers 64. A given application or other entity in the host 28 that is assigned a particular PCIe function (PF or VF) accesses the PCIe bus 32 by accessing the corresponding driver (PFSW or VFSW driver).

[0035] In embodiments, the switch SoC 18 also includes an on-chip traffic monitor 76 (also referred to simply as “the monitor” for brevity herein). The monitor 76 is disposed on the same semiconductor die as the network device circuitry of the SoC 18. The on-chip traffic monitor 76 monitors traffic (e.g., traffic between the electronic subsystems 12 and the central computer 16) that traverses the network device circuitry from one or more sources in the automotive network to one or more destinations in the automotive network.

[0036] In the present example, the monitor 76 is coupled to the routing and interconnection matrix 56. By monitoring traffic that flows through the routing and interconnection matrix 56, the monitor 76 detects performance degradation using the techniques described herein. The performance degradation can include network-level degradation, component-level degradation, or any other type of performance degradation.

[0037] In embodiments, the on-chip traffic monitor 76 includes monitoring logic 80 and one or more hardware counters 84. The monitoring logic 80 performs various monitoring functions of the monitor 76, including controlling the hardware HW counters 84.

[0038] In a typical mode of operation, the monitoring logic 80 can be configured to monitor one or more traffic flows selected from the traffic that traverses the matrix 56. The selected traffic flows can include, for example, flows associated with selected virtual channels (VCs), flows associated with selected PCIe bus functions (PFs or VFs), flows associated with certain DMA engines 52, flows associated with selected Ethernet ports 36, flows associated with selected memory regions in the memory of the host 28, flows associated with selected interrupt events, time-sensitive network (TSN) flows, or any other suitable type of flow.

[0039] The monitoring logic 80 allocates a respective hardware counter 84 to each traffic flow that is selected for monitoring. A given counter 84 measures the actual bandwidth (throughput) of the corresponding traffic flow by counting the traffic of the flow (e.g., in bytes or other suitable units) over a defined measurement period. At the end of each measurement period, the monitoring logic 80 reads the counter value (which indicates the throughput of the traffic flow during the measurement period), resets the counter, and allows the counter to begin counting the traffic of the next measurement period. In this way, the monitor 76 obtains a sequence of throughput measurements for the selected traffic flows in real time.

[0040] Such a sequence enables rapid and accurate detection and localization of performance degradation. For example, a drop in throughput associated with a traffic flow associated with a given DMA engine 52 can indicate an impending failure in that DMA engine. A complete, sustained loss of throughput in a particular traffic flow can indicate an actual failure.

[0041] In some embodiments, the measurement period of each hardware counter 84 can be configured separately from the other counters 84. This feature enables the monitoring logic 80 to match the measurement period to the characteristics of the traffic flow being monitored. For example, a traffic flow with large throughput fluctuations can be allocated a longer measurement period for additional averaging. As another example, a traffic flow characterized by very low throughput can be allocated a longer measurement period for collecting sufficient statistics.

[0042] In some embodiments, the switch SoC 18 further includes a safety monitor (SM) 68. The SM 68 generally controls the on-chip traffic monitor 76, e.g., configures the monitor 76 with the appropriate traffic flows to monitor, receives the monitoring results from the monitor 76, and initiates appropriate response actions.

[0043] In example embodiments, the SM 68 reads the monitoring results (e.g., counter values) from the monitor 76, compares the monitoring results to thresholds or evaluates specific criteria on the monitoring results, and notifies the host 28 whether the results indicate performance degradation, and possibly triggers appropriate responses. Examples of response actions can include applying user-defined actions that are predefined for returning the switch 18 to a safe state, adjusting hardware resources of the switch 18, re-allocating bandwidth in the switch 18, etc.

[0044] Further aspects of the SM 68 are described in U.S. Patent Application 17 / 949,231, filed September 21, 2022, entitled “Automotive Network Switch with Hardware-Implemented Safety Monitor,” assigned to the assignee of the present disclosure, and the disclosure of which is incorporated herein by reference.

[0045] In some embodiments, SoC 18 also includes an Interrupt Control Unit (ICU) 72 configured to issue an interrupt to host 28. Interrupts issued by ICU 72 typically include message signaling interrupts (MSI or MSI-X) transmitted via PCIe bus 32. In embodiments, monitoring logic 80 and / or SM 68 issue an interrupt using ICU 72 in response to a detected performance degradation. Additionally or alternatively, monitoring logic 80 and / or SM 68 may notify host 28 of the detected performance degradation in any other suitable manner. In an example embodiment, monitoring logic 80 and / or SM 68 notify host 28 of a performance degradation occurring within tens of microseconds, typically less than 100 μsec (microseconds) from the occurrence of the performance degradation.

[0046] like Figure 1 The configurations of system 20, switch 18, and host 28 shown are example configurations depicted for clarity only. In alternative embodiments, any other suitable configuration may be used. For example, the above description presents a specific "division of labor," or task allocation, among the on-chip service monitor 76, SM 68, and host 28. In alternative embodiments, any other suitable task allocation may be used.

[0047] As another example, the measurements performed by the on-chip service monitor 76 are by no means limited to throughput measurements or the use of counters. In an alternative embodiment, the on-chip service monitor 76 can detect performance degradation by analyzing various characteristics of a specified service flow, such as latency, changes in intra-packet intervals, dropped packets, data corruption, and service throughput exhibited in the monitored service flow.

[0048] In various embodiments, the on-chip service monitor 76 can detect various performance degradations. Non-limiting examples of degradation include loss of PCIe credits, degradation of PCIe link speed or bus width, hardware failures such as loss of read requests for DMA engine access, and many other situations.

[0049] Various components of switch 18 can be implemented using dedicated hardware or firmware, such as hardwired or programmable logic, for example in application-specific integrated circuits (ASICs) or field-programmable gate arrays (FPGAs). Additionally or alternatively, some functions of switch 18 can be implemented in software and / or using a combination of hardware and software components. For clarity, components that are not essential for understanding the disclosed techniques are omitted from the figures.

[0050] In some embodiments, some of the functionality of the switch 18 (e.g., of the host 28) can be implemented in one or more programmable processors (e.g., one or more central processing units (CPUs) or microcontrollers) that are programmed in software to perform the functionality described herein. The software can be downloaded to any of the processors in electronic form, over a network, for example, or alternatively or additionally the software can be provided and / or stored on non-transitory tangible media, such as magnetic, optical, or electronic memory.

[0051] Figure 2 is a flowchart schematically illustrating a method for on-chip traffic monitoring according to embodiments described herein. The method begins at a configuration operation 90, where the on-chip traffic monitor 76 is configured to inspect one or more specified traffic flows. The configuration of the monitor 76 can be performed, for example, by the host 28. In embodiments, the host 28 also specifies a respective measurement period for each traffic flow.

[0052] At a counter assignment operation 94, the monitoring logic 80 of the monitor 76 assigns a respective hardware counter 84 to each traffic flow to be inspected. The monitoring logic also sets an appropriate measurement period for each counter 84.

[0053] At a monitoring operation 98, the monitoring logic 80 monitors traffic at an intermediate location in the network 20, e.g., traffic flowing through the routing and interconnect matrix 56. The traffic typically includes a plurality of packets, each originating from some source in the automotive network and destined for some destination in the automotive network. The monitoring logic 80 identifies traffic of the specified traffic flows within the total traffic through the matrix 56.

[0054] At a measurement operation 102, the monitoring logic 80 measures a metric such as actual throughput (actual bandwidth) of each flow using the respective counter 84. Other suitable metrics can include, for example, latency, changes in spacing within packets, dropped packets, data corruption, etc.

[0055] In embodiments, to measure the throughput of a given traffic flow, the monitoring logic 80 (i) increments the counter 84 assigned to the flow to count the amount of traffic (e.g., number of bytes) of the flow, and (ii) reads the counter value and resets the counter at the end of each measurement period. As described above, this process yields a sequence of real-time bandwidth readings for each traffic flow, one reading per measurement period.

[0056] At a degradation check stage 106, the monitoring logic 80 checks whether the bandwidth readings (and / or other metrics) of any traffic flow indicate a performance degradation. If not, the method loops back to stage 98 above. If a performance degradation is detected, at a notification stage 110, the monitoring logic 80 notifies the host 28 of the detected degradation. For example, the logic 80 can use the ICU 72 to issue an interrupt to the host 28.

[0057] Figure 2 The method of FIG. 1 is an example method depicted for conceptual clarity only. In alternative embodiments, any other suitable method can be used.

[0058] Although primarily directed to detection of performance degradation for safety and reliability, the methods and systems described herein can also be used for other applications. For example, the measurements performed by the on-chip traffic monitor 76 can be used to identify traffic bottlenecks, network optimization, and traffic engineering. As another example, the on-chip traffic monitor 76 can continuously update the maximum and minimum counter values of previous measurement periods and calculate an average value for a particular traffic flow. These values can be used by a host to implement bandwidth allocation.

[0059] Note that the above-described embodiments are cited by way of example, and that the disclosure is not limited to what has been particularly shown and described hereinabove. Rather, the scope of the disclosure includes both combinations and sub-combinations of the various features described hereinabove, as well as variations and modifications thereof which would occur to persons of ordinary skill in the art upon reading the foregoing description. The documents incorporated by reference into this disclosure are to be considered an integral part of the application unless specifically indicated otherwise.

Claims

1. A network device for use in an automotive network, the network device comprising: Semiconductor die; A network device circuit system disposed on the semiconductor die and configured to transmit services of the vehicle network; as well as An on-chip service monitor, disposed on the semiconductor die and configured to monitor traffic traversing the network device circuitry from one or more sources in the automotive network to one or more destinations in the automotive network, and to detect performance degradation in the network device circuitry by analyzing the monitored traffic.

2. The network device according to claim 1, wherein, The on-chip service monitor is configured to select a service flow from the service and detect the performance degradation in the selected service flow.

3. The network device according to claim 1 or 2, wherein, The network device circuit system includes: Multiple port circuits, disposed on the semiconductor die and configured to send and receive packets via the automotive network; A switching structure, disposed on the semiconductor die and configured to forward the packets between the port circuits; and An interconnect circuit system disposed on the semiconductor die and configured to connect the switching structure to a host via a peripheral bus. The on-chip service monitor is coupled to the interconnect circuit system.

4. The network device according to claim 3, wherein, The on-chip service monitor is configured to identify service flows associated with a given bus function of the peripheral bus in the service, and to detect the performance degradation by analyzing the identified service flows separately from one or more other service flows.

5. The network device according to claim 3, wherein, The interconnect circuit system includes multiple direct memory access (DMA) engines, and the on-chip service monitor is configured to identify service flows associated with a given DMA engine among the multiple DMA engines in the services, and to detect the performance degradation by analyzing the identified service flows separately from one or more other service flows.

6. The network device according to claim 1 or 2, wherein, The on-chip service monitor is configured as follows: Identify service flows associated with one of the following in the services: (i) virtual circuits, (ii) port circuits within port circuits, (iii) time-sensitive network (TSN) services, (iv) defined memory regions in the host’s memory, and (v) message signaling interruption (MSI) services. as well as The performance degradation is detected by analyzing the identified service flow separately from one or more other service flows.

7. The network device according to claim 1 or 2, wherein, The on-chip service monitor includes one or more hardware counters, and the on-chip service monitor is configured to allocate one of the hardware counters to measure the service throughput of a selected service flow within the service.

8. The network device according to claim 7, wherein, The on-chip service monitor is configured to measure the service throughput by using the hardware counter to count the traffic volume of the selected service flow within a defined measurement period.

9. The network device according to claim 1 or 2, wherein, The on-chip service monitor is configured to notify the host in response to detecting the performance degradation.

10. The network device according to claim 9, wherein, The on-chip service monitor is configured to notify the host of the performance degradation within 100 microseconds from the occurrence of the performance degradation.

11. The network device according to claim 1 or 2, wherein, The on-chip service monitor is configured to detect the performance degradation by analyzing one or more of the following: service throughput exhibited in the monitored service, as well as data corruption, latency, changes in intra-packet intervals, and dropped packets.

12. A method for performing service monitoring in network devices of an automotive network, the method comprising: The services of the vehicle network are transmitted using a network device circuit system disposed on a semiconductor die; as well as Using an on-chip service monitor disposed on the semiconductor die, traffic traversing the network device circuitry from one or more sources in the automotive network to one or more destinations in the automotive network is monitored, and performance degradation in the network device circuitry is detected by analyzing the monitored traffic.

13. The business monitoring method according to claim 12, wherein, Detecting the performance degradation includes selecting a service flow from the service and detecting the performance degradation in the selected service flow.

14. The method for business monitoring according to claim 12 or 13, wherein: The transmission of the service includes (i) sending and receiving packets via the automotive network using multiple port circuits disposed on the semiconductor die, (ii) forwarding the packets between the port circuits using a switching structure disposed on the semiconductor die, and (iii) connecting the switching structure to a host via a peripheral bus using an interconnect circuit system disposed on the semiconductor die; and Monitoring the services includes monitoring the services that pass through the interconnect circuit system.

15. The business monitoring method according to claim 14, wherein, Detecting the performance degradation includes identifying service flows associated with a given bus function of the peripheral bus within the service, and detecting the performance degradation by analyzing the identified service flows separately from one or more other service flows.

16. The business monitoring method according to claim 14, wherein, The interconnect circuit system includes multiple direct memory access (DMA) engines, and wherein detecting the performance degradation includes identifying a service flow associated with a given DMA engine among the multiple DMA engines in the service, and detecting the performance degradation by analyzing the identified service flow separately from one or more other service flows.

17. The business monitoring method according to claim 12 or 13, wherein, Detecting the performance degradation includes: Identify service flows associated with one of the following in the services: (i) virtual circuits, (ii) port circuits within port circuits, (iii) Time-Sensitive Networking (TSN) services, (iv) defined memory regions in the host's memory, and (v) Message Signalling Interruption (MSI) services; and The performance degradation is detected by analyzing the identified service flow separately from one or more other service flows.

18. The business monitoring method according to claim 12 or 13, wherein, Monitoring the service includes allocating hardware counters from one or more hardware counters to measure the throughput of selected service flows within the service.

19. The business monitoring method according to claim 18, wherein, Monitoring the service includes measuring the service throughput by using the hardware counter to count the traffic volume of the selected service flow within a defined measurement period.

20. The method for business monitoring according to claim 12 or 13, wherein, Detecting the performance degradation includes analyzing one or more of the following: the throughput of the monitored services, as well as data corruption, latency, changes in intra-packet intervals, and dropped packets.

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