Data forwarding method based on outer-layer VLAN tag, network equipment and storage medium
By generating an outer VLAN tag in the OLT chip and sending data packets to the switching chip, and using the switching chip's L2 learning mechanism to parse the GEMPORT ID, the problem of insufficient forwarding table space in the OLT chip is solved. This enables a low-cost OLT chip to support more ONU access, reduces equipment costs, and improves system stability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-26
- Publication Date
- 2026-03-31
AI Technical Summary
In low-cost OLT chip solutions, the forwarding table space is limited, making it impossible to effectively manage multiple ONUs, resulting in increased equipment costs and wasted resources, and failing to meet the needs of high-density access.
By generating an outer VLAN tag in the OLT chip, data packets are combined with the switching chip, and the L2 learning mechanism of the switching chip is used to parse the GEMPORT ID, reducing the forwarding table pressure of the OLT chip and transferring the table entry learning to the switching chip.
This enables low-cost OLT chips to support more ONU connections, reducing equipment procurement and operating costs, improving system forwarding efficiency and stability, and avoiding hardware bottlenecks.
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Figure CN121771108A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of fiber optic access network technology, and in particular to a data forwarding method, network device and storage medium based on outer VLAN tags. Background Technology
[0002] In a Passive Optical Network (PON) system, the Optical Line Terminal (OLT) is responsible for communicating with multiple Optical Network Units (ONUs). An OLT typically consists of an OLT chip and a switching chip. The OLT chip handles the Gigabit-capable Passive Optical Network (GPON) protocol and GPON Encapsulation Method (GEM) frames, while the switching chip handles Layer 2 (L2) switching of Ethernet data. To distinguish between different ONUs or service flows, the OLT chip assigns a Gigabit-capable Ethernet Mapping Port (GEMPORT) ID to each logical channel and maintains a large forwarding table from Virtual Local Area Network (VLAN) to the GEMPORT. This ensures that user VLANs are mapped to the correct GEMPORT in the uplink direction and vice versa in the downlink direction.
[0003] However, in low-cost OLT chip solutions, the internal forwarding table space for storing VLAN-to-GEMPORT mappings is extremely limited (e.g., only supporting 128 entries). This severely limits the number of ONUs that a single PON port can manage (typically only 4-6), failing to meet the growing demand for high-density access. To support more ONUs, high-performance, high-cost OLT chips must be used, leading to a significant increase in equipment procurement and operating costs, resulting in resource waste. Summary of the Invention
[0004] Therefore, it is necessary to provide a data forwarding method, network device, and storage medium based on outer VLAN tags to reduce the forwarding table pressure of OLT chips, addressing the aforementioned technical problems.
[0005] In a first aspect, a data forwarding method based on an outer VLAN tag is provided, applied to a network device including an optical line terminal (OLT) chip and a switching chip. The method includes: in the uplink direction, obtaining a first GEMPORT ID corresponding to a data stream from an optical network unit (ONU) through the OLT chip; generating a first outer VLAN tag for the uplink data packet based on the first GEMPORT ID; combining the uplink data packet with the first outer VLAN tag to form a first double-layer VLAN packet; sending the first double-layer VLAN packet to the switching chip; receiving the first double-layer VLAN packet through the switching chip, parsing the first outer VLAN tag in the first double-layer VLAN packet to obtain the first GEMPORT ID, and creating an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first double-layer VLAN packet to obtain an updated L2 forwarding table.
[0006] Secondly, a network device is provided, including an optical line terminal (OLT) chip and a switching chip. The OLT chip is used to obtain, in the uplink direction, the first GEMPORT ID corresponding to the data stream from the optical network unit (ONU); generate a first outer VLAN tag for the uplink data packet based on the first GEMPORT ID; combine the uplink data packet with the first outer VLAN tag to form a first double-layer VLAN packet; and send the first double-layer VLAN packet to the switching chip. The switching chip is used to receive the first double-layer VLAN packet, parse the first outer VLAN tag in the first double-layer VLAN packet to obtain the first GEMPORT ID, and create an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first double-layer VLAN packet to obtain an updated L2 forwarding table.
[0007] Thirdly, a computer-readable storage medium is provided, on which a computer program is stored, which, when executed by a processor, is used to implement the aforementioned data forwarding method based on an outer VLAN tag.
[0008] The beneficial effects of this invention are as follows: In the uplink direction, the OLT chip no longer maintains a large mapping table, but directly sends the fields corresponding to the data stream and constructs the first double-layer VLAN packet to the switching chip. Since switching chips generally possess an inherent L2 learning mechanism for standard QinQ (double-layer VLAN) packets, they automatically treat the VID of the outer VLAN tag as a regular VLAN ID. Therefore, the switching chip can learn and create entries in its sufficiently large L2 forwarding table based on this VID (i.e., the first GEMPORT ID) and the packet's source MAC address.
[0009] This invention shifts the task of mapping the first GEMPORT ID to the VID of the first outer VLAN tag from the resource-constrained OLT chip to the resource-abundant switching chip. This shift directly circumvents the hardware limitation of insufficient forwarding table space in the OLT chip. Therefore, this invention enables a low-cost, small-forwarding-table OLT chip to support a number of ONU accesses far exceeding its native capacity, breaking through the hardware bottleneck. Simultaneously, since there is no need to replace the high-cost, high-performance OLT chip, equipment procurement and operating costs are significantly reduced. Furthermore, utilizing the mature hardware forwarding engine of the switching chip to handle this task also improves the overall forwarding efficiency and stability of the system. Attached Figure Description
[0010] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the accompanying drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below.
[0011] Figure 1 This is a schematic diagram of the hardware system architecture of a network device provided in an embodiment of the present invention; Figure 2 This is a flowchart illustrating a data forwarding method (uplink direction) based on an outer VLAN tag provided in an embodiment of the present invention; Figure 3 This is a flowchart illustrating a data forwarding method based on outer VLAN tags (enhanced uplink direction, including multi-service mapping, VLAN isolation and QoS tagging) provided in an embodiment of the present invention. Figure 4 This is a flowchart illustrating a data forwarding method (downlink direction) based on an outer VLAN tag provided in an embodiment of the present invention. Detailed Implementation
[0012] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0013] In this embodiment of the invention, the following abbreviations are used for ease of description. The meanings of these abbreviations are as follows: An Optical Network Unit (ONU) is a user-side terminal device in a PON network, responsible for communicating with the OLT and providing users with access to data, voice, video and other services.
[0014] An optical line terminal (OLT) is a central office device in a PON network. It is responsible for managing multiple ONUs, performing GPON protocol processing, GEM frame encapsulation / decapsulation, and upper-layer service interaction.
[0015] A Gigabit-capable Ethernet Mapping Port (GEMPORT) is a logical channel identifier defined in the GPON protocol, used to uniquely identify a service flow or a group of service flows between the OLT and ONU.
[0016] Virtual Local Area Network (VLAN) is a logical network technology built on top of Ethernet that divides a physical network into multiple broadcast domains using VLAN tags.
[0017] Layer 2 (L2) refers to the data link layer in the OSI seven-layer model, primarily responsible for MAC address addressing and frame forwarding. The L2 forwarding table (also known as the FDB table) is the core data structure used by switches to guide Layer 2 forwarding.
[0018] Media Access Control (MAC) is a sublayer of the data link layer. Its address (MAC address) is a unique hardware identifier for network devices, used for precise addressing within a local area network.
[0019] Gigabit-capable Passive Optical Network (GPON) is a mainstream fiber optic access technology standard that defines the physical and protocol layer specifications between the OLT and ONU.
[0020] The GPON Encapsulation Method (GEM) is a data encapsulation format defined in the GPON standard, used to carry upper-layer services.
[0021] Class of Service (CoS) is a Layer 2 QoS (Quality of Service) mechanism that uses the PCP field (3 bits) in the VLAN tag to mark the priority of packets.
[0022] Address Resolution Protocol (ARP) is a network protocol used to resolve IP addresses into their corresponding MAC addresses, and it forms the basis of Layer 3 communication.
[0023] Reference Figure 1To support the hardware system architecture used in this embodiment, a network device is provided, comprising an Optical Line Terminal (OLT) chip 101 and a switching chip 102. The OLT chip 101 is the core processing unit of the central office equipment in the GPON network, responsible for communicating with multiple Optical Network Units (ONUs) and performing GEM frame encapsulation and decapsulation. The switching chip 102 is a COTS (Cost-on-Demand) Ethernet switching chip, such as those from Broadcom or Marvell, which internally supports the IEEE 802.1Q and 802.1ad (QinQ) standards and possesses standard L2 forwarding table learning and query functions. The two are connected via a high-speed SerDes interface, forming an integrated data processing platform.
[0024] Based on the above system architecture, this embodiment provides a data forwarding method based on outer VLAN tags, such as... Figure 2 As shown, this specifically includes the following steps: S201, in the uplink direction, obtains the first GEMPORT ID corresponding to the data stream from the optical network unit (ONU) through the OLT chip.
[0025] In this step, the first GEMPORT ID refers to a unique logical channel identifier assigned by the OLT to each ONU or its service flow in the GPON protocol; it is essentially a 12-bit unsigned integer. When an ONU user initiates an uplink service, its Ethernet data frame is encapsulated in a GEM frame and sent to the OLT chip via the PON port.
[0026] After receiving the optical signal, the OLT chip first performs photoelectric conversion and physical layer processing. Then, according to the GEM protocol specification, it directly reads the value from the Port-ID field in the GEM frame header. This is a hardware parsing process automatically completed by the OLT chip's internal GEM processing engine, without software intervention or additional mapping table lookups. Therefore, this step can efficiently and accurately obtain the GEMPORT ID that strictly corresponds to the uplink data stream.
[0027] S202, based on the first GEMPORT ID, generates the first outer VLAN tag for the uplink data packet.
[0028] In this step, the uplink data packet refers to the original Ethernet frame obtained after being decapsulated by the OLT chip's GEM. Generating the first outer VLAN tag of the uplink data packet means constructing a new VLAN tag that conforms to the IEEE 802.1Q standard. The first outer VLAN tag is a 4-byte Ethernet header extension field containing four subfields: TPID (0x8100), PCP, DEI, and VID.
[0029] The OLT chip internally includes a VLAN tag generation module, which can be a programmable logic unit or dedicated hardware circuitry. When enabled, this module receives the GEMPORT ID value from step S201 and directly writes it to the VID (VLAN Identifier) field of the new VLAN tag. The TPID field is fixed at 0x8100 to identify it as a VLAN tag, while the PCP and DEI fields can be set to default values (such as 0). The entire process is a simple data assignment and formatting operation, ensuring that the generated VLAN tag accurately carries the GEMPORT ID information.
[0030] S203 combines the uplink data packet with the first outer VLAN tag to form the first double-layer VLAN packet.
[0031] In this step, combining the uplink data packet with the first outer VLAN tag means encapsulating the packet according to the IEEE 802.1ad (QinQ) standard.
[0032] The OLT chip's packet processing engine inserts the first outer VLAN tag generated in S202 between the source MAC address and EtherType fields of the uplink data packet. If the uplink data packet itself already carries an inner VLAN tag (single-layer VLAN), the final packet will contain two VLAN tags, forming the first double-layer VLAN packet. This encapsulation method is an industry standard, and any network device supporting QinQ can correctly identify and process it, thus ensuring the compatibility of this solution.
[0033] S204 sends the first dual-layer VLAN packet to the switching chip.
[0034] This transmission step is accomplished through the internal high-speed physical interface (such as XAUI, SGMII, or a proprietary SerDes link) between the OLT chip and the switching chip. At the hardware level, the OLT chip's egress queue manager pushes the first double-layer VLAN packet into the interface's transmit buffer, and then transmits the complete packet sequence to the switching chip via electrical signals. This interface is configured in transparent transmission mode, without modifying, filtering, or parsing the packet content, ensuring the integrity of the first double-layer VLAN packet.
[0035] S205 receives the first double-layer VLAN packet through the switching chip, parses the first outer VLAN tag in the first double-layer VLAN packet to obtain the first GEMPORT ID, and creates an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first double-layer VLAN packet to obtain the updated L2 forwarding table.
[0036] In this step, receiving refers to the physical layer and data link layer circuitry of the switching chip capturing and verifying packets from the OLT chip. Parsing refers to the switching chip's packet parsing engine (Parser) stripping away header information layer by layer according to the Ethernet frame format. Since the outermost layer of the packet is a standard 802.1Q VLAN tag, the parsing engine automatically extracts the value of its VID field and treats it as the VLAN ID to which the packet belongs. From the switching chip's perspective, the first GEMPORT ID here is just a regular VLAN ID.
[0037] Creating an entry refers to the switching chip executing its inherent L2 learning algorithm: it takes the parsed VLAN ID (i.e., the first GEMPORT ID), the source MAC address of the packet, and the physical port number receiving the packet (i.e., the internal port connected to the OLT chip) as a triple and writes it into its on-chip SRAM L2 forwarding table. This write operation overwrites the original initial L2 forwarding table, thus obtaining an updated L2 forwarding table. The entire process relies entirely on the switching chip's native support for standard protocols, requiring no customized development, ensuring low cost and high reliability of the solution.
[0038] In one exemplary embodiment, a method is provided for utilizing the inherent L2 learning mechanism of the switching chip to complete the parsing and entry creation of GEMPORT IDs. In traditional customized solutions, enabling the switching chip to recognize GEMPORT IDs typically requires modification of its microcode or driver, which is costly and difficult to maintain. The innovation of this embodiment lies in completely abandoning this customized approach and instead utilizing the switching chip's native, fixed support for the IEEE 802.1ad (QinQ) standard.
[0039] The core of the uplink processing flow in this embodiment lies in the implementation details of step S205, which specifically includes: based on the inherent L2 learning mechanism of the switching chip for standard double-layer VLAN packets, parsing the first outer VLAN tag in the first double-layer VLAN packet to obtain the first GEMPORT ID.
[0040] Understandably, Ethernet switching chips (such as the Broadcom Trident series) have a complete packet processing pipeline embedded within them. This pipeline includes a parser designed to automatically recognize and process various standard encapsulation formats, including QinQ. When the switching chip receives the first dual-layer VLAN packet from the OLT chip, its parser operates in the following sequence: First, identify the outer label: The parser first detects that the TPID after the MAC header of the packet is 0x8100, and determines that there is a VLAN label.
[0041] Secondly, the VID is extracted as the VLAN ID: The parser automatically reads the VID field of the outer VLAN tag and treats its value (i.e., the first GEMPORT ID) as the VLAN ID to which this packet belongs. This is the basis for the switching chip to perform L2 forwarding decisions.
[0042] Then, it is passed to the L2 learning engine: The parser packages the extracted VLAN ID, the source MAC address of the packet and the ingress physical port number (i.e. the internal port connected to the OLT) and sends it to the L2 learning engine.
[0043] The entire process is completed automatically by the hardware logic of the switching chip, without any software intervention or firmware modification. Therefore, the action of obtaining the first GEMPORT ID is essentially the result of the switching chip treating it as a regular VLAN ID and processing it according to standard procedures.
[0044] The initial L2 forwarding table includes static ARP entries sent from the OLT chip to the switching chip.
[0045] The L2 forwarding table (also known as the FDB table) is primarily used to guide Layer 2 forwarding at the data plane. However, communication is also required between the device's control plane (such as the CPU of an OLT) and the switching chip (e.g., issuing management commands, synchronizing status). This control plane communication typically relies on Layer 3 (L3) routing, which in turn requires ARP entries to resolve the mapping from IP addresses to MAC addresses.
[0046] In this architecture, the CPU of the OLT chip and the management CPU of the switching chip reside in the same management subnet. To ensure smooth management communication between the two, during the system startup initialization phase, the OLT chip pre-writes a static ARP entry into the L3 table database of the switching chip through its management channel (such as I2C or MDIO). This entry explicitly specifies the binding relationship between the IP address of the switching chip's management CPU and its corresponding MAC address.
[0047] This static ARP entry forms part of the initial L2 forwarding table. It ensures that the control plane of the OLT and the switching chip can communicate normally even if the L2 data table has not yet learned any user traffic, thereby ensuring the manageability and stability of the entire system.
[0048] In summary, this embodiment cleverly encodes the GEMPORT ID within the VID field of the outer VLAN tag, enabling the switching chip to seamlessly resolve the GEMPORT ID and create L2 entries using its inherent L2 learning mechanism. Simultaneously, pre-configured static ARP entries ensure control plane connectivity. The entire solution requires no custom development, reducing implementation costs and complexity.
[0049] During system initialization, the control plane of the OLT chip receives and stores a preset VLAN mapping rule table through a management interface (such as CLI or SNMP). This table is a key-value pair data structure, where the key is the user-side service VLAN ID (range 1-4094), and the value is a shared first GEMPORT ID (e.g., 100). This configuration allows data flows from different services (such as Internet VLAN 101, IPTV VLAN 102, and VoIP VLAN 103) to reuse the same GPON uplink logical channel, thereby optimizing the allocation of GEMPORT resources. Based on the above configuration, the uplink processing flow in this embodiment is as follows: Figure 3 As shown, the specific steps include: S301 obtains uplink service data carrying the user service VLAN ID from the optical network unit (ONU) through the OLT chip.
[0050] In this step, uplink service data refers to Ethernet frames generated and sent by the user terminal equipment (CPE) on the ONU side. The user service VLAN ID is the VID field value of the inner VLAN tag assigned by the CPE according to the service type, used to distinguish different service flows (such as Internet access, IPTV).
[0051] The OLT chip receives optical signals through its PON MAC layer and performs physical layer processing such as photoelectric conversion, framing, and BIP verification before sending the data to the GEM decapsulation engine. This engine, according to the GEM protocol specification, strips the GEM frame header, exposing the internal Ethernet payload. This payload then becomes the uplink service data carrying the user's service VLAN ID. The entire acquisition process is automatically completed by the OLT chip's hardware pipeline, resulting in extremely low latency.
[0052] S302 determines the first GEMPORTID associated with the user service VLAN ID according to the preset VLAN mapping rules.
[0053] Determining the specific implementation of this action relies on the VLAN Classification module inside the OLT chip. This module is typically a high-speed lookup engine based on TCAM (Ternary Content-Addressable Memory) or a hash table.
[0054] When the Ethernet frame output from step S301 arrives at this module, the engine extracts the VID field (i.e., the user service VLAN ID) of its inner VLAN tag and uses it as a key to perform a match search in the preset VLAN mapping rule table. Once a match is found, the engine outputs the associated value, i.e., the first GEMPORT ID. For example, if the input user service VLAN ID is 102 (IPTV), the search engine will return the first GEMPORT ID 100. This process is completed within nanoseconds, ensuring line-speed processing capability.
[0055] S303 adds a first inner VLAN tag to the uplink data packet.
[0056] Among them, the VID field of the first inner VLAN tag carries the user service VLAN ID.
[0057] In this step, the uplink data packet refers to the original Ethernet frame after being decapsulated by GEM. In most deployment scenarios, this data packet already carries a VLAN tag when it arrives at the OLT, so the addition operation here mainly refers to confirming and retaining this tag.
[0058] The first inner VLAN tag is the existing tag, whose structure conforms to the IEEE 802.1Q standard and contains four fields: TPID (0x8100), PCP, DEI, and VID.
[0059] The value of the VID field is the user service VLAN ID mentioned in S301. If the data packet does not carry a VLAN tag (such as for certain special services), the packet processing unit of the OLT chip can also dynamically add one according to a preset policy, and its VID value also comes from the service identification result. This step ensures that user service information is retained during internal processing.
[0060] S304 replaces the VID field of the first inner VLAN tag from the user service VLAN ID to the preset global isolation VLAN ID.
[0061] Replacement is a key security mechanism in this embodiment. The preset global isolation VLAN ID is a unique and reserved VLAN ID (e.g., 4094) within the system. It is only used for internal links between the OLT chip and the switching chip and is not exposed externally.
[0062] This operation is performed by the VLAN Editing module of the OLT chip. This module is triggered before the packet leaves the OLT and enters the internal bus. It locates the memory position of the VID field of the first inner VLAN tag and overwrites its value from the original user service VLAN ID (e.g., 101) with the global isolation VLAN ID (e.g., 4094). The purpose of this operation is to eliminate potential VLAN ID conflicts between different users or different PON ports, ensuring the isolation and security of the internal network.
[0063] S305 determines the corresponding Service Level of Service (CoS) value based on the GPON service type bound to the first GEMPORT ID.
[0064] The process of determining the Service Level of Service (CoS) value relies on another pre-defined mapping table—the Service Type-QoS mapping table. This table is also stored in the control plane memory of the OLT chip, with the key being the GEMPORT ID and the value being a 3-bit CoS value (range 0-7).
[0065] The QoS scheduling unit of the OLT chip receives the first GEMPORT ID from step S302 and uses it as an index to query the mapping table. For example, if the first GEMPORT ID 100 is bound to the IPTV service type, the query result may return a CoS value of 5 (high priority); if it is bound to ordinary Internet access, it may return a CoS value of 0 (best effort). This CoS value will be used to guide subsequent queue scheduling and bandwidth allocation.
[0066] S306, set the first GEMPORT ID to the VID field of the first outer VLAN tag, and set the service level CoS value to the PCP field of the first outer VLAN tag to obtain the first outer VLAN tag of the uplink data packet.
[0067] The setup process is handled by the OLT chip's QinQ encapsulation engine. This engine is responsible for constructing a new 802.1Q VLAN tag as the outer tag. It directly writes the first GEMPORT ID (e.g., 100) obtained in step S302 into the VID field of the new tag, and simultaneously writes the Service Level of Service (CoS) value (e.g., 5) obtained in step S305 into the PCP field.
[0068] The TPID field is fixed at 0x8100, while the DEI field can be set to 0. Through this precise field assignment, the first outer VLAN tag is successfully constructed, which simultaneously encodes routing information (VID=GEMPORT ID) and quality of service information (PCP=CoS value).
[0069] S307 combines the uplink data packet, the first inner VLAN tag, and the first outer VLAN tag to form the first dual-layer VLAN packet.
[0070] The final assembly step is standard QinQ encapsulation. The OLT chip's packet assembly unit takes the uplink data packet modified by S304 (whose inner VLAN VID is already the globally isolated VLAN ID) as the payload and inserts the first outer VLAN tag generated by S306 before its MAC header.
[0071] The final message structure is as follows: [DMAC][SMAC][Outer-VLAN-Tag][Inner-VLAN-Tag][Payload].
[0072] This first dual-layer VLAN packet is then sent to the egress queue and transmitted to the switching chip via the internal high-speed interface, completing the entire uplink processing flow.
[0073] Upon receiving this message, the switching chip's built-in QinQ parser automatically strips the outer VLAN tag and uses the VID (first GEMPORT ID) for L2 learning and the PCP (CoS value) for inbound queue scheduling. Since all service flows mapped to the same GEMPORT have the same outer VID, the switching chip only needs to maintain one L2 entry for that GEMPORT, significantly saving valuable table entry resources. Simultaneously, the PCP field ensures that high-priority services (such as IPTV) receive differentiated forwarding guarantees within the switching chip.
[0074] In one exemplary embodiment, a downlink data forwarding function is further provided. This embodiment assumes that the uplink learning process has been successfully completed and the L2 forwarding table of the switching chip has been updated. The downlink method flow of this embodiment is as follows: Figure 4 As shown, the specific steps include: S401 receives downlink data packets after receiving an updated L2 forwarding table.
[0075] In this step, receiving a downlink data packet means that the switching chip receives an Ethernet data frame destined for an ONU user from its external network port (e.g., a port connected to the BRAS or core router). The destination MAC address of this data packet is the MAC address of the ONU user's terminal device (such as a set-top box or computer). The physical layer and MAC layer circuitry of the switching chip are responsible for capturing and verifying the integrity of this message, preparing for subsequent forwarding decisions.
[0076] S402, query the updated L2 forwarding table to obtain the second GEMPORT ID associated with the destination MAC address of the downlink data packet.
[0077] In this step, the query refers to the forwarding engine of the switching chip performing a standard L2 table lookup operation. Updating the L2 forwarding table is the same as the L2 forwarding table generated in step S205 of Example 1. The specific implementation of the query is as follows: the forwarding engine extracts the destination MAC address of the downlink data packet and searches for a matching entry in its L2 forwarding table. Since this entry is created during the uplink learning phase, its key fields include VLAN ID (i.e., the first GEMPORT ID), source MAC address, and port number. During the downlink query, the switching chip matches the destination MAC address with the MAC address field in the entry and reads the VLAN ID field value from the matched entry. In the context of this invention, this VLAN ID field value is defined as the second GEMPORT ID. It is essentially the same as the uplink first GEMPORT ID value, but its role here is as a query result.
[0078] S403 generates a second outer VLAN tag for downlink data packets based on the acquired second GEMPORT ID.
[0079] In this step, the generation method is similar to step S202, but in the opposite direction. The VLAN tag generation module inside the switching chip is triggered, and it directly fills the VID field of a new 802.1Q VLAN tag with the second GEMPORT ID value queried in step S402, thus forming the second outer VLAN tag. This operation is also completed through hardware logic, ensuring high processing efficiency.
[0080] S404 combines the downlink data packet with the second outer VLAN tag to form a second double-layer VLAN packet.
[0081] In this step, the combination operation follows the same IEEE 802.1ad (QinQ) standard as step S203. The switching chip's packet encapsulation engine inserts the second outer VLAN tag generated in S403 before the MAC header of the original downlink data packet.
[0082] If the downlink data packet itself already carries the inner VLAN, a standard double-layer VLAN structure is ultimately formed; otherwise, the outer VLAN tag follows directly after the MAC header. The resulting packet is the second double-layer VLAN packet.
[0083] S405 sends the second dual-layer VLAN packet to the OLT chip.
[0084] This transmission step is completed through the internal high-speed interface between the switching chip and the OLT chip. The switching chip's egress queue manager pushes the second dual-layer VLAN packet to the transmit buffer of the internal port connected to the OLT chip, and transmits it to the OLT chip via the SerDes link. This process is symmetrical to step S204, ensuring seamless packet transmission within the device.
[0085] S406 receives the second dual-layer VLAN packet through the OLT chip, parses the second outer VLAN tag to obtain the second GEMPORT ID, and encapsulates the downlink data packet into a GEM frame based on the obtained second GEMPORT ID before sending it to the target ONU.
[0086] In this step, receiving refers to the OLT chip capturing the second double-layer VLAN packet from the switching chip from its internal interface. Parsing refers to the OLT chip's packet parsing unit stripping the outermost VLAN tag and reading its VID field, which is the second GEMPORT ID.
[0087] Encapsulation into GEM frames is a core function of the GPON protocol. Specifically, the GEM encapsulation engine within the OLT chip uses the obtained second GEMPORT ID to look up its internal GEM Port configuration table, determining the target ONU's identity and corresponding PON port. Then, the engine encapsulates the original downlink data packet (after stripping the outer VLAN) as the payload into a new GEM frame, filling the GEM frame header with the corresponding Port-ID (i.e., the second GEMPORT ID). Finally, this GEM frame is scheduled and sent through the correct PON port, ultimately reaching the target ONU and completing the entire downlink forwarding process.
[0088] Furthermore, this embodiment also provides a handling mechanism for L2 forwarding table query misses. This embodiment is a supplement and extension to step S402. In the downlink process, when the switching chip executes step S402 to query and update the L2 forwarding table to obtain the second GEMPORT ID associated with the destination MAC address of the downlink data packet, there is a special case: if the destination MAC address of the downlink data packet is a broadcast address (such as FF:FF:FF:FF:FF:FF), a multicast address, or a unicast address that has not yet established an entry in the L2 forwarding table through the uplink learning process, the query operation will not find a matching entry, that is, the second GEMPORT ID is not obtained.
[0089] To address the scenario of a match error in the query, this embodiment provides the following processing flow: When the switching chip's forwarding engine fails to find an entry matching the destination MAC address in the L2 forwarding table, it triggers a preset broadcast / flooding processing strategy. Under this strategy, the switching chip no longer attempts to obtain a specific second GEMPORT ID, but instead directly uses a preset broadcast GEMPORT ID as a substitute. The preset broadcast GEMPORT ID is a special GEMPORT ID (e.g., a fixed value of 4095) configured by the OLT chip during system initialization. This ID is recognized by all ONUs as a broadcast channel identifier. The switching chip treats this broadcast GEMPORT ID as a valid second GEMPORT ID and uses it in the subsequent S403 step, i.e., generating the second outer VLAN tag for the downlink data packet.
[0090] In subsequent steps S404 to S406, the switching chip sends a second double-layer VLAN packet carrying the broadcast GEMPORT ID to the OLT chip. After parsing the broadcast GEMPORT ID, the OLT chip encapsulates it into a GEM frame and broadcasts it to all online ONUs via the PON port. Upon receiving the broadcast GEM frame, each ONU decides whether to receive and process the data packet according to its internal rules.
[0091] Through the above mechanism, this embodiment ensures that even in the event of missing L2 entries, broadcast, multicast, and unknown unicast traffic can be correctly forwarded to all ONUs, thereby guaranteeing network connectivity and robustness.
[0092] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.
[0093] Based on the same inventive concept, this application also provides an apparatus for implementing the aforementioned data forwarding method based on an outer VLAN tag. The solution provided by this apparatus is similar to the implementation described in the above method. Therefore, the specific limitations of one or more embodiments of the data forwarding method based on an outer VLAN tag provided below can be found in the above-described limitations of the data forwarding method based on an outer VLAN tag, and will not be repeated here.
[0094] In one exemplary embodiment, a network device is provided, including an optical line terminal (OLT) chip and a switching chip; The OLT chip is used to obtain the first GEMPORT ID corresponding to the data stream from the optical network unit (ONU) in the uplink direction; generate the first outer VLAN tag of the uplink data packet based on the first GEMPORT ID; combine the uplink data packet with the first outer VLAN tag to form a first double-layer VLAN packet; and send the first double-layer VLAN packet to the switching chip. The switching chip is used to receive the first double-layer VLAN packet, parse the first outer VLAN tag in the first double-layer VLAN packet to obtain the first GEMPORT ID, and create an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first double-layer VLAN packet to obtain the updated L2 forwarding table.
[0095] In one exemplary embodiment, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, is used to implement the above-described data forwarding method based on outer VLAN tags.
[0096] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.
[0097] The technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as the combination of these technical features does not contradict each other, it should be considered within the scope of this application. The above embodiments only illustrate several implementation methods of this application, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of this application. It should be noted that for those skilled in the art, several modifications and improvements can be made without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.
Claims
1. A data forwarding method based on an outer VLAN tag, characterized in that, Applied to network equipment including optical line terminal (OLT) chips and switching chips, the method includes: In the uplink direction, the first GEMPORTID corresponding to the data stream from the optical network unit (ONU) is obtained through the OLT chip; Based on the first GEMPORT ID, generate the first outer VLAN tag for the uplink data packet; The uplink data packet is combined with the first outer VLAN tag to form a first double-layer VLAN packet; Send the first dual-layer VLAN packet to the switching chip; The switching chip receives the first dual-layer VLAN packet, parses the first outer VLAN tag in the first dual-layer VLAN packet to obtain the first GEMPORT ID, and creates an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first dual-layer VLAN packet to obtain the updated L2 forwarding table.
2. The method according to claim 1, characterized in that, After obtaining the updated L2 forwarding table, the method further includes: In the downlink direction, receive downlink data packets; Query the updated L2 forwarding table to obtain the second GEMPORT ID associated with the destination MAC address of the downlink data packet; Based on the obtained second GEMPORT ID, generate the second outer VLAN tag for the downlink data packet; The downlink data packet is combined with the second outer VLAN tag to form a second double-layer VLAN packet; The second dual-layer VLAN packet is sent to the OLT chip; The OLT chip receives the second dual-layer VLAN packet, parses the second outer VLAN tag to obtain the second GEMPORT ID, and encapsulates the downlink data packet into a GEM frame based on the obtained second GEMPORT ID before sending it to the target ONU.
3. The method according to claim 1, characterized in that, The step of obtaining the first GEMPORT ID corresponding to the data stream from the optical network unit (ONU) via the OLT chip specifically includes: The uplink service data carrying the user service VLAN ID is obtained from the optical network unit (ONU) through the OLT chip; According to the preset VLAN mapping rules, determine the first GEMPORT ID associated with the user service VLAN ID; The preset VLAN mapping rule is used to map multiple different user service VLAN IDs to the same first GEMPORT ID.
4. The method according to claim 2, characterized in that, The step of querying the updated L2 forwarding table to obtain the second GEMPORT ID associated with the destination MAC address of the downlink data packet specifically includes: Check if a second GEMPORT ID associated with the destination MAC address of the downlink data packet exists in the updated L2 forwarding table; If not, the default broadcast GEMPORT ID will be used as the second GEMPORT ID.
5. The method according to claim 3, characterized in that, The step of combining the uplink data packet with the first outer VLAN tag to form a first dual-layer VLAN packet specifically includes: A first inner VLAN tag is added to the uplink data packet; wherein, the VID field of the first inner VLAN tag carries the user service VLAN ID; The uplink data packet, the first inner VLAN tag, and the first outer VLAN tag are combined to form the first dual-layer VLAN packet; wherein, the VID field of the first outer VLAN tag carries the first GEMPORT ID.
6. The method according to claim 5, characterized in that, Sending the first dual-layer VLAN packet to the switching chip specifically includes: Replace the VID field of the first inner VLAN tag in the first double-layer VLAN packet with the preset global isolation VLAN ID from the user service VLAN ID; The replaced first dual-layer VLAN packet is sent to the switching chip.
7. The method according to claim 3, characterized in that, The step of generating the first outer VLAN tag for the uplink data packet based on the first GEMPORT ID specifically includes: Determine the corresponding 802.1p priority value based on the GPON service type bound to the first GEMPORT ID; The first GEMPORT ID is set to the VID field of the first outer VLAN tag, and the 802.1p priority value is set to the PCP field of the first outer VLAN tag to obtain the first outer VLAN tag of the uplink data packet; Upon receiving the first dual-layer VLAN packet, the switching chip performs differentiated scheduling and forwarding of the first dual-layer VLAN packet based on the 802.1p priority value in the PCP field.
8. The method according to claim 1, characterized in that, The step of parsing the first outer VLAN tag in the first dual-layer VLAN packet to obtain the first GEMPORT ID specifically includes: Based on the inherent L2 learning mechanism of the switching chip for standard double-layer VLAN packets, the first outer VLAN tag in the first double-layer VLAN packet is parsed to obtain the first GEMPORT ID; The initial L2 forwarding table includes static ARP entries sent by the OLT chip to the switching chip.
9. A network device, characterized in that, This includes optical line terminal (OLT) chips and switching chips; The OLT chip is used to obtain the first GEMPORT ID corresponding to the data stream from the optical network unit (ONU) in the uplink direction; Based on the first GEMPORT ID, generate the first outer VLAN tag for the uplink data packet; The uplink data packet is combined with the first outer VLAN tag to form a first double-layer VLAN packet; And send the first dual-layer VLAN packet to the switching chip; The switching chip is used to receive the first dual-layer VLAN packet, parse the first outer VLAN tag in the first dual-layer VLAN packet to obtain the first GEMPORT ID, and create an entry in the initial L2 forwarding table based on the first GEMPORT ID and the source MAC address of the first dual-layer VLAN packet to obtain an updated L2 forwarding table.
10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it is used to implement the method as described in claim 1.