Solar cell and preparation method thereof, photovoltaic module and photovoltaic system

Abstract

The invention discloses a solar cell and a preparation method thereof, a photovoltaic module and a photovoltaic system. The preparation method comprises the following steps: forming a first silicon material layer on one side, far away from the front surface, of the back surface of a silicon substrate, wherein the first silicon material layer comprises a first conductive type doping element; carrying out annealing treatment on the first silicon material layer in the first preset region through laser in an oxidizing atmosphere, so that the first silicon material layer is converted into a first doped polycrystalline silicon layer, and forming a first oxidation doping mask layer in the first preset region on one side, far away from the silicon substrate, of the first silicon material layer; forming a second silicon material layer in a second preset area on the back surface; and annealing the second silicon material layer of the first sub-region and the first silicon material layer of the first sub-region, so that the first silicon material layer and the second silicon material layer of the first sub-region are converted into a second doped polycrystalline silicon layer and a second oxidation doped mask layer. The preparation process is simplified, and the preparation cost is reduced.

Description

Technical Field

[0001] This invention relates to the field of solar energy technology, and in particular to a solar cell, its preparation method, a photovoltaic module, and a photovoltaic system. Background Technology

[0002] A back contact solar cell (BC) is a type of solar cell in which both the emitter and base contact electrodes are placed on the back of the cell (the non-light-receiving side, i.e., the back side). The light-receiving side (i.e., the front side) of the cell is not blocked by any metal electrodes, thereby effectively increasing the effective light-receiving area of ​​the cell.

[0003] In the current process of fabricating BC solar cells, it is necessary to prepare a first silicon material layer doped with a first conductivity type and a second silicon material layer doped with a second conductivity type on the back of the solar cell. The existing fabrication process is relatively complicated, resulting in high fabrication costs. Summary of the Invention

[0004] This invention provides a solar cell, its preparation method, a photovoltaic module, and a photovoltaic system, which simplify the preparation process and reduce the preparation cost.

[0005] According to one aspect of the present invention, a method for fabricating a solar cell is provided, comprising: providing a silicon substrate, the silicon substrate comprising a front side and a back side opposite to the front side;

[0006] A first silicon material layer is formed on the back side away from the front side, wherein the first silicon material layer includes a first conductivity type dopant element; the first silicon material layer comprises amorphous material and / or polycrystalline material composed of microcrystals;

[0007] In an oxidizing atmosphere, the first silicon material layer located in the first preset region is annealed by laser, so that the first silicon material layer in the first preset region is transformed into a first doped polycrystalline silicon layer and a first oxide-doped mask layer; wherein, the first oxide-doped mask layer is located on the side of the first doped polycrystalline silicon layer away from the silicon substrate;

[0008] A second silicon material layer is formed in a second predetermined region on the back side; the second predetermined region includes a first sub-region and a second sub-region, the first sub-region being a doped region and the second sub-region being an isolation region; the second silicon material layer comprises amorphous material and / or polycrystalline material composed of microcrystals;

[0009] Annealing is performed on the second silicon material layer of the first sub-region and the first silicon material layer of the first sub-region, so that the first silicon material layer and the second silicon material of the first sub-region are transformed into a second doped polycrystalline silicon layer and a second oxide-doped mask layer; wherein, the second oxide-doped mask layer is located on the side of the second doped polycrystalline silicon layer away from the silicon substrate.

[0010] According to another aspect of the present invention, a solar cell is provided, the solar cell having a front side and a back side opposite to the front side, the back side having a first preset region and a second preset region, wherein the first preset region has a first tunneling layer and a first doped polycrystalline silicon layer, the second preset region has a second doped polycrystalline silicon layer, the second doped polycrystalline silicon layer includes a first sublayer and a second sublayer, the second sublayer being disposed on the side of the first sublayer away from the silicon substrate;

[0011] Wherein, the first doped polycrystalline silicon layer on the first preset region is a p-type silicon material layer doped with a third group element; the first sub-layer on the second preset region is an n-type silicon material layer doped with a third group element and a fifth group element, wherein the doping amount of the fifth group element is higher than that of the third group element.

[0012] The second sublayer on the second preset region is an n-type silicon material layer doped with Group 5 elements.

[0013] According to another aspect of the present invention, a photovoltaic module is provided, including any of the solar cells described in the embodiments of the present invention.

[0014] According to another aspect of the present invention, a photovoltaic system is provided, including the photovoltaic module described in any of the embodiments of the present invention.

[0015] The solar cell fabrication method provided in this invention, by controlling the irradiation range of the laser beam within a first preset region, can form a first oxide-doped mask layer only within the first preset region. Compared to forming a full-layer first oxide-doped mask layer simultaneously through a high-temperature thermal oxidation process to anneal the first silicon material layer, this simplifies the patterning process of the first oxide-doped mask layer, thereby reducing fabrication costs. Furthermore, by using a laser to anneal and crystallize the first silicon material layer located in the first preset region, annealing, crystallization, and the formation of the first oxide-doped mask layer are completed simultaneously, simplifying the fabrication process and reducing costs. Moreover, after fabricating the first doped polycrystalline silicon layer and the first oxide-doped mask layer, there is no need to remove the first silicon material layer in the second preset region. A second silicon material layer is directly formed on the surface of the first silicon material layer in the second preset region, and the first and second silicon material layers are directly annealed to form the second doped polycrystalline silicon layer and the second oxide-doped mask layer. This eliminates the etching process for the first silicon material layer in the second preset region, further simplifying the fabrication process and reducing costs.

[0016] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart of a method for preparing a solar cell according to an embodiment of the present invention;

[0019] Figure 2 This is a schematic diagram of a silicon substrate provided in an embodiment of the present invention;

[0020] Figure 3 This is a schematic diagram of the first silicon material layer after preparation according to an embodiment of the present invention;

[0021] Figure 4 This is a schematic diagram of the fabrication of the first doped polycrystalline silicon layer provided in an embodiment of the present invention;

[0022] Figure 5 This is a schematic diagram of the second silicon material layer after preparation according to an embodiment of the present invention;

[0023] Figure 6 This is a schematic diagram of another preparation of the second silicon material layer provided in an embodiment of the present invention;

[0024] Figure 7 This is a schematic diagram of the second doped polycrystalline silicon layer provided in an embodiment of the present invention;

[0025] Figure 8 This is a schematic diagram of another method for preparing a second doped polycrystalline silicon layer according to an embodiment of the present invention;

[0026] Figure 9 This is a schematic diagram of another method for preparing a second doped polycrystalline silicon layer according to an embodiment of the present invention;

[0027] Figure 10 This is a schematic diagram of the second oxide-doped mask layer after removing the isolation region and the first preset region, as provided in an embodiment of the present invention.

[0028] Figure 11 This is a schematic diagram of the etching trench after preparation according to an embodiment of the present invention;

[0029] Figure 12 yes Figure 8 A schematic diagram of the fabrication of the medium structure after etching the groove;

[0030] Figure 13 This is a schematic diagram of the process after removing the first oxide-doped mask layer and the second oxide-doped mask layer, as provided in an embodiment of the present invention.

[0031] Figure 14 This is a schematic diagram of the electrode fabrication process provided in an embodiment of the present invention;

[0032] Figure 15 This is a schematic diagram of a solar cell provided in an embodiment of the present invention;

[0033] Figure 16 This is a schematic diagram of another type of solar cell provided in an embodiment of the present invention. Detailed Implementation

[0034] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0035] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0036] To simplify the fabrication process of solar cells and reduce manufacturing costs, the embodiments of the present invention provide the following technical solutions:

[0037] like Figure 1 As shown, Figure 1 This is a flowchart of a method for fabricating a solar cell according to an embodiment of the present invention. The method for fabricating a solar cell includes the following steps:

[0038] S110, provides a silicon substrate, the silicon substrate including a front side and a back side opposite to the front side.

[0039] like Figure 2 As shown, a raw silicon wafer is provided as a silicon substrate 100. The silicon substrate 100 includes a front side 101 and a back side 102 opposite to the front side 101.

[0040] S120. A first silicon material layer is formed on the back side away from the front side, wherein the first silicon material layer includes a dopant element of a first conductivity type. The first silicon material layer includes an amorphous material and / or a polycrystalline material composed of microcrystals.

[0041] Silicon materials deposited at temperatures below 590 degrees Celsius exhibit an amorphous state. At temperatures of 590 degrees Celsius and above, silicon materials contain some microcrystals. These microcrystals include nanocrystals or small polycrystalline particles.

[0042] The process of forming the first silicon material layer 200 on the side of the back surface 102 away from the front surface 101 is as follows:

[0043] Optionally, before forming the first silicon material layer 200 on the side of the back surface 102 away from the front surface 101, the back surface 102 may be polished or textured.

[0044] like Figure 2 As shown, the back surface 102 is polished or textured using a wet etching process. For example, a tank etching machine can be used, which contains cleaning solutions such as alkaline etching, acid cleaning, hydrofluoric acid (HF), and hydrogen peroxide cleaning, to etch the back surface 102, removing the oxide layer and creating a textured surface. This increases the specific surface area of ​​the back surface 102, effectively improving the light-trapping effect of the solar cell and thus increasing its luminous efficiency. The difference between polishing and texturing lies in controlling the type and concentration of the wet etching solution during polishing to suppress anisotropy. Generally, the concentration of the wet etching solution is higher during polishing than during texturing.

[0045] like Figure 3 As shown, after the back surface 102 is polished or textured by wet etching, a first silicon material layer 200 is formed on the side of the back surface 102 away from the front surface 101 by film deposition processes such as plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD).

[0046] S130. In an oxidizing atmosphere, the first silicon material layer located in the first preset region is annealed by laser, so that the first silicon material layer in the first preset region is transformed into a first doped polycrystalline silicon layer and a first oxide-doped mask layer. The first oxide-doped mask layer is located on the side of the first doped polycrystalline silicon layer away from the silicon substrate.

[0047] like Figure 4As shown, in an oxidizing atmosphere, by controlling the irradiation range of the laser beam within a first preset region A1, the laser anneals and oxidizes the first silicon material layer 200 located in the first preset region A1, transforming the first silicon material layer within the first preset region A1 into a first doped polycrystalline silicon 2001 layer and a first oxide-doped mask layer 201. For example, the silicon substrate 100 is an N-type silicon substrate. The first silicon material layer 200 is a boron-doped silicon material layer; after laser annealing, the boron element in the first silicon material layer 200 is in an activated state. When the first silicon material layer 200 includes an amorphous material, after laser annealing, the crystallization process from an amorphous material to a crystalline material can be completed. Since laser annealing crystallization is completed in an oxidizing atmosphere, simultaneously with the laser annealing crystallization of the first silicon material layer 200, a first oxide-doped mask layer 201 can also be formed in the first preset region A1 on the side of the first silicon material layer 200 away from the silicon substrate 100. When the doping element is boron, the first oxide-doped mask layer 201 is borosilicate glass (BSG).

[0048] S140. A second silicon material layer is formed in a second predetermined region on the back side; the second predetermined region includes a first sub-region and a second sub-region, the first sub-region being a doped region and the second sub-region being an isolation region; the second silicon material layer contains amorphous materials and / or polycrystalline materials composed of microcrystals.

[0049] like Figure 5 and Figure 7 As shown, the second preset region A2 includes a first sub-region A3 and a second sub-region A4. The first sub-region A3 is a doped region, and the second sub-region A4 is an isolation region. A second silicon material layer 300 is formed on the second preset region A2 on the back surface 102. The second silicon material layer 300 contains amorphous materials and / or polycrystalline materials composed of microcrystals. Where the silicon material is deposited at a temperature below 590 degrees Celsius, it exhibits an amorphous state. Where the silicon material is deposited at a temperature of 590 degrees Celsius or higher, it contains some microcrystals. These microcrystals include nanocrystals or small-particle polycrystalline materials.

[0050] The process of forming the second silicon material layer 300 in the second predetermined region A2 on the back side 102 is as follows:

[0051] like Figure 5 As shown, a second silicon material layer 300 is formed in the second predetermined region A2 of the back side 102 using a film deposition process such as plasma-enhanced chemical vapor deposition (PECVD) or low-pressure chemical vapor deposition (LPCVD). It should be noted that, referring to... Figure 5 The second silicon material layer 300 can be formed only in the second preset region A2, as shown in the reference. Figure 6 Alternatively, a second silicon material layer 300 can be formed in both the first preset region A1 and the second preset region A2.

[0052] S150. Annealing is performed on the second silicon material layer of the first sub-region and the first silicon material layer of the first sub-region, so that the first silicon material layer and the second silicon material of the first sub-region are transformed into a second doped polycrystalline silicon layer and a second oxide-doped mask layer; wherein, the second oxide-doped mask layer is located on the side of the second doped polycrystalline silicon layer away from the silicon substrate.

[0053] like Figures 7-9 As shown, the annealing process includes a high-temperature heat treatment process or a laser annealing process. The second silicon material layer 300 and the first silicon material layer 200 located in the first sub-region A3 can be subjected to a second conductivity type doping and annealing treatment through heat treatment or laser annealing, transforming the first silicon material layer 200 and the second silicon material layer 300 into a second doped polycrystalline silicon layer 3001 and a second oxide-doped mask layer 301. The annealing process includes an oxygen treatment section.

[0054] For example, refer to Figure 6 and Figure 7 Annealing can be performed on the entire second silicon material layer 300 on the back side and the second silicon material layer 300 in the second preset area A2, as shown in the reference. Figure 9 Alternatively, annealing can be performed only on the first silicon material layer 200 and the second silicon material layer 300 of the first sub-region A3, as shown in the reference. Figure 8 Alternatively, the first silicon material layer 200 and the second silicon material layer 300 of the first sub-region A3 and the second silicon material layer 300 of the first preset region A1 can be annealed.

[0055] When the second silicon material layer 300 does not contain dopants, during the annealing process, a second oxide-doped mask layer 301 can be formed on the side of the second silicon material layer 300 away from the silicon substrate 100 due to the presence of an oxidizing atmosphere and a second conductivity type dopant. The second conductivity type dopant in the second oxide-doped mask layer 301 diffuses into both the second silicon material layer 300 and the first silicon material layer 200, causing the first silicon material layer 200 to be completely or partially transformed into the second doped polycrystalline silicon layer 3001, and under an oxidizing atmosphere, the second silicon material layer 300 is completely or partially transformed into the second oxide-doped mask layer 301. When the second silicon material layer 300 contains dopants, the dopants can be activated through an annealing process, causing the second conductivity type dopant to diffuse from the second silicon material layer 300 to the first silicon material layer 200, causing the first silicon material layer 200 to be completely or partially transformed into the second doped polycrystalline silicon layer 3001, and under an oxidizing atmosphere, the second silicon material layer 300 is completely or partially transformed into the second oxide-doped mask layer 301. It should be noted that the doping concentration in the second silicon material layer 300 is at least one order of magnitude greater than the doping concentration in the first silicon material layer 200. The doping elements in the second silicon material layer 300 diffuse into the first silicon material layer 200, so that the second silicon material layer 300 and the first silicon material layer 200 are transformed into doped polycrystalline layers with the same doping conductivity type.

[0056] It should be noted that while annealing the second silicon material layer 300 through a high-temperature heat treatment process, thermal defects in the first silicon material layer 200 and the second silicon material layer 300 can be repaired, thereby improving the performance of the solar cell.

[0057] The solar cell fabrication method provided in this invention, by controlling the irradiation range of the laser beam within a first preset region A1, can form a first oxide-doped mask layer 201 only within the first preset region A1. Compared to forming a complete first oxide-doped mask layer 201 simultaneously through a high-temperature thermal oxidation process to anneal the first silicon material layer 200, this simplifies the patterning process of the first oxide-doped mask layer 201, thereby reducing fabrication costs. Furthermore, by using a laser to anneal and crystallize the first silicon material layer 200 located in the first preset region A1, the annealing, crystallization, and formation of the first oxide-doped mask layer 201 are completed simultaneously, simplifying the fabrication process and reducing fabrication costs. Furthermore, after the first doped polysilicon layer 2001 and the first oxide-doped mask layer 201 are prepared, it is not necessary to remove the first silicon material layer 200 in the second preset region A2. Instead, the second silicon material layer 300 is directly formed on the surface of the first silicon material layer 200 in the second preset region A2. The first silicon material layer 200 and the second silicon material layer are then directly annealed to form the second doped polysilicon layer 3001 and the second oxide-doped mask layer 302. This eliminates the need for etching the first silicon material layer 200 in the second preset region A2, further simplifying the preparation process and reducing the preparation cost.

[0058] Based on the above embodiments, optionally, the oxidizing atmosphere includes one or more of oxygen, nitrous oxide, and ozone.

[0059] Based on the above embodiments, optionally, the first conductivity type doping element includes a third group element.

[0060] Based on the above embodiments, optionally, the first conductivity type doping element is boron.

[0061] Based on the above embodiments, optionally, thermal oxidation treatment is not performed before forming the second silicon material layer in the second preset region on the back side.

[0062] like Figure 5 and Figure 6 As shown, no thermal oxidation process is performed before the second silicon material layer 300 is formed in the second preset region A2 of the back surface 102. Therefore, there is no oxide layer on the surface of the first silicon material layer 200 in the second preset region A2 of the back surface 102, and there is no oxide layer between the second silicon material layer 300 and the first silicon material layer 200. The two are in direct contact, which facilitates the diffusion of dopants in the second silicon material layer 300 into the first silicon material layer 200 during the annealing process.

[0063] Based on the above embodiments, optionally, the thickness of the second silicon material layer 300 is less than or equal to 80 nanometers.

[0064] Specifically, if the thickness of the second silicon material layer 300 is too large, exceeding 80 nanometers, the thickness of the second predetermined region A2 of the solar cell becomes excessively thick, resulting in excessive on-resistance and poor electrical performance. Preferably, the thickness of the second silicon material layer 300 is less than or equal to 50 nanometers. Further, the thickness of the second silicon material layer 300 is less than or equal to 30 nanometers.

[0065] Based on the above embodiments, optionally, all of the second silicon material layer 300 in the first sub-region A3 is converted into the second oxide-doped mask layer 301; or all of the second silicon material layers 300 in the first sub-region A3 and part of the first silicon material layer 200 in the first sub-region A3 are converted into the second oxide-doped mask layer 301.

[0066] Specifically, the thickness of the second oxide-doped mask layer 301 varies depending on the thickness of the second silicon material layer 300 and the duration of the oxidation annealing process.

[0067] By setting a second silicon material layer 300, which can act as a buffer layer, second conductivity type dopants can diffuse through the second silicon material layer 300 into the first silicon material layer 200 of the first sub-region A3. During the transformation of the second silicon material layer 300 into the second oxide-doped mask layer 301, the second conductivity type dopants continuously diffuse into the first silicon material layer 200, resulting in a higher doping concentration after the first silicon material layer 200 is transformed into the second doped polysilicon layer 3001. Furthermore, during the annealing process of the first silicon material layer 200, an oxide layer inevitably forms on the surface of the first silicon material layer 200 in the first sub-region A3. By completely transforming the second silicon material layer 300 into the second oxide-doped mask layer 301, the diffusion time of the second conductivity type dopants into the first silicon material layer 200 is longer, allowing more second conductivity type dopants to diffuse through the second silicon material layer 300 into the first silicon material layer 200, thus avoiding insufficient doping concentration due to the obstruction of the oxide layer.

[0068] Furthermore, when the second silicon material layer 300 covers the entire back side, if part of the second silicon material layer 300 is converted into polysilicon and part into the second oxide-doped mask layer 301, then both the second oxide-doped mask layer 301 and the polysilicon converted from the second silicon material layer 300 in the first preset region A1 need to be removed. The second oxide-doped mask layer 301 and the polysilicon need to be removed using different processes, increasing the number of process steps. By converting the second silicon material layer 300 entirely into the second oxide-doped mask layer 301, only one etching process is needed for removal, simplifying the process.

[0069] It should be noted that the reference Figure 6 and Figure 7When the entire second silicon material layer 300 on the back side is annealed, the entire second silicon material layer 300 on the back side is transformed into the second oxide-doped mask layer 301, or the entire second silicon material layer 300 on the back side and part of the first silicon material layer 200 in the second preset region A2 are transformed into the second oxide-doped mask layer 301.

[0070] When the second silicon material layer 300 of the first preset region A1 and the first sub-region A3 is annealed, all of the second silicon material layer 300 of the first preset region A1 and the first sub-region A3 is transformed into the second oxide-doped mask layer 301, or the second silicon material layer 300 of the first preset region A1 and the first sub-region A3, as well as part of the first silicon material layer 200 of the first sub-region A3, is transformed into the second oxide-doped mask layer 301.

[0071] Based on the above embodiments, optionally, the first silicon material layer 200 of the first sub-region A3 is wholly or partially converted into a second doped polycrystalline silicon layer 3001.

[0072] Specifically, when annealing the second silicon material layer 300 and the first silicon material layer 200 of the first sub-region A3, the second silicon material layer 300 of the first sub-region A3 can be completely converted into the second oxide-doped mask layer 301, and the first silicon material layer 200 of the first sub-region A3 can be completely converted into the second doped polysilicon layer 3001; alternatively, the second silicon material layer 300 and part of the first silicon material layer 200 of the first sub-region A3 can be converted into the second oxide-doped mask layer 301, and the remaining part of the first silicon material layer 200 of the first sub-region A3 can be converted into the second doped polysilicon layer 3001.

[0073] When annealing the entire second silicon material layer 300 on the back side and the first silicon material layer 200 in the second preset region A2, the entire second silicon material layer 300 on the back side can be converted into the second oxide-doped mask layer 301; the first silicon material layer 200 in the second preset region A2 can be converted into the second doped polysilicon layer 3001, or the first silicon material layer 200 in the second preset region A2 can be partially converted into the second doped polysilicon layer 3001 and partially converted into the first oxide-doped mask layer 301.

[0074] When the second silicon material layer 300 of the first preset region A1 and the first sub-region A3 is annealed, the second silicon material layer 300 of the first preset region A1 and the first sub-region A3 can be set to be completely converted into the second oxide-doped mask layer 301; the first silicon material layer 200 of the first sub-region A3 can be completely converted into the second doped polysilicon layer 3001, or a portion of the first silicon material layer 200 of the first sub-region A3 can be converted into the second oxide-doped mask layer 301, and another portion of the first silicon material layer 200 of the first sub-region A3 can be converted into the second doped polysilicon layer 3001.

[0075] It should be noted that in this embodiment, the conversion of all or part of the first silicon material layer 200 into the second doped polysilicon layer 3001 means that the first silicon material layer 200 is converted into the second doped polysilicon layer 3001 in the thickness direction. A portion of the first silicon material layer 200 refers to a first silicon material layer 200 of a predetermined thickness, which is less than the total thickness of the first silicon material layer 200 in the second predetermined region A2. For example, when the first silicon material layer 200 in the first sub-region A3 is partially converted into the second doped polysilicon layer 3001, it means that the portion of the thickness of the first silicon material layer 200 in the first sub-region A3 adjacent to the silicon substrate is converted into the second doped polysilicon layer 3001, and the portion of the thickness away from the silicon substrate is converted into the second oxide-doped mask layer 301. Optionally, refer to... Figures 6-9 Both the first preset region A1 and the second preset region A2 include a second silicon material layer 200;

[0076] Annealing is performed on the second silicon material layer 200 located in the first sub-region A3 and the first silicon material layer 200 located in the first sub-region A3, including:

[0077] The second silicon material layer 200 in the first preset region A1 and the second preset region A2, and the first silicon material layer 200 in the first preset region A1 are annealed by laser annealing or heat treatment. Figure 7 );

[0078] Alternatively, the second silicon material layer 300 in the first preset region A1 and the first sub-region A3, and the first silicon material layer 200 in the first sub-region A1, can be annealed using a laser annealing process. Figure 8 );

[0079] Alternatively, laser annealing can be used to anneal only the second silicon material layer 200 of the first sub-region A1 and the first silicon material layer 200 of the first sub-region A1. Figure 9 ).

[0080] For details, please refer to Figure 6 and Figure 7The entire second silicon material layer 300 and the first silicon material layer 200 of the second preset region A2 can be annealed using heat treatment or laser annealing processes to form... Figure 7 The structure shown transforms the entire second silicon material layer 300 and the first silicon material layer 200 of the second preset region A2 into a second doped polysilicon layer 3001 and a second oxide-doped mask layer 301. Annealing the entire second silicon material layer 300 can be performed using either thermal treatment or laser annealing, offering greater process options and further reducing process requirements.

[0081] refer to Figure 6 and Figure 8 Laser annealing can be used to anneal only the second silicon material layer 300 and the first silicon material layer 200 in the first sub-region A3, and the second silicon material layer 300 in the first preset region A1, to form... Figure 8 The structure shown transforms the second silicon material layer 300 and the first silicon material layer 200 in the first sub-region A3, as well as the second silicon material layer 300 in the first preset region A1, into a second doped polysilicon layer 3001 and a second oxide-doped mask layer 301. The second sub-region A4 (isolation region) remains the second silicon material layer 300 and the first silicon material layer 200. This configuration allows for direct etching of the second silicon material layer 300 and the first silicon material layer 200 in the isolation region to form etching trenches, simplifying the process.

[0082] refer to Figure 6 and Figure 9 Laser annealing can be used to anneal only the second silicon material layer 300 and the first silicon material layer 200 in the first sub-region A3 to form... Figure 9 The structure shown transforms only the second silicon material layer 300 and the first silicon material layer 200 in the first sub-region A3 into a second doped polysilicon layer 3001 and a second oxide-doped mask layer 301, while other regions remain either the second silicon material layer 300 or the first silicon material layer 200. This configuration allows the mask for the second doped polysilicon layer 3001 to be formed directly in the first sub-region A3, further simplifying the process.

[0083] Optional, see reference Figure 7 After annealing the second silicon material layer in the first preset region and the second preset region, and the first silicon material layer in the first preset region, by laser annealing or heat treatment, the process further includes:

[0084] The second oxide-doped mask layer 301 located in the isolation region (second sub-region A4) and the first preset region A1 is removed by laser etching process.

[0085] like Figure 7 and Figure 10As shown, by controlling the area isolation region (second sub-region A4) and the first preset region A1 irradiated by the laser beam, the second oxide-doped mask layer 301 located in the isolation region (second sub-region A4) and the first preset region A1 is removed by laser etching process.

[0086] Optionally, before or after removing the second oxide-doped mask layer located in the isolation region and the first preset region, the process further includes:

[0087] Remove the multiple film layers on the front side to expose the silicon substrate on the front side.

[0088] It should be noted that, as Figure 7 and Figure 10 As shown, before or after removing the second oxide-doped mask layer 301 located in the isolation region (second sub-region A4), at least one of the following is formed on the front side 101 of the silicon substrate 100: a first tunneling layer 103, a first doped polysilicon layer 2001, a first oxide-doped mask layer 201, a second tunneling layer 104, a second doped polysilicon layer 3001, and a second oxide-doped mask layer 301. Therefore, multiple film layers located on the front side 101 need to be removed by a wet etching process to expose the front side 101 of the silicon substrate 100.

[0089] refer to Figure 11 Optionally, after removing the second oxide-doped mask layer 301 located in the isolation region (second sub-region A4) and the multiple layers on the front side, the process further includes:

[0090] The second doped polysilicon layer 3001 located in the first preset region A1 and the isolation region (second sub-region A4) is removed, and the silicon substrate 100 on the front side is textured to form a light trapping structure, which includes a pyramid structure.

[0091] like Figure 11 As shown, by controlling the area irradiated by the laser beam to be located in the isolation region (second sub-region A4) and the first preset region A1, the second silicon-doped polysilicon layer 3001 located in the isolation region (second sub-region A4) and the first preset region A1 can be removed.

[0092] It should be noted that removing the second doped polysilicon layer 3001 located in the first preset region A1 and the isolation region (second sub-region A4) can be done by completely removing the second doped polysilicon layer 3001 in the isolation region (second sub-region A4) and the first preset region A1, or by partially removing it, that is, some of the second doped polysilicon layer 3001 may remain in the first preset region A1 and the isolation region (second sub-region A4).

[0093] Optionally, when removing the second doped polysilicon layer 3001 of the isolation region, a portion of the silicon substrate 100 of the isolation region is also removed to form an etching trench 001; at the same time, the isolation region (second sub-region A4) and the front side 101 are textured.

[0094] Specifically, such as Figure 10 As shown, the second doped polysilicon layer 3001 located in the isolation region (second sub-region A4) can be removed by a wet etching process. An etching trench 001 can also be formed on the silicon substrate 100 in the isolation region (second sub-region A4) by a wet etching process. Simultaneously, as... Figure 11 As shown, the front surface 101 is texturized using the same wet etching process, and the etching groove 001 in the isolation area is also texturized, which simplifies the manufacturing process and reduces the manufacturing cost.

[0095] Optional, see reference Figure 8 and Figure 12 After annealing the second silicon material layer 300 in the first preset region A1 and the first sub-region A3, and the first silicon material layer 200 in the first sub-region A3, by laser annealing process, the process further includes:

[0096] The second silicon material layer 300, the first silicon material layer 200, and part of the silicon substrate 100 in the isolation area are removed by laser etching or etching solution to form an etching groove, and the isolation area is textured.

[0097] For details, please refer to Figure 8 and Figure 12 The second silicon material layer 300, the first silicon material layer 200 and part of the silicon substrate 100 of the isolation area (second sub-region A4) can be etched away by laser etching or acid-base etching solution to form an etching groove 001, and the bottom of the etching groove 001 is textured.

[0098] By annealing only the second silicon material layer and the first silicon material layer in the first sub-region and the second silicon material layer in the first preset region, the isolation region is free of the second doped polysilicon layer and the second oxide doped mask layer. The second silicon material layer, the first silicon layer and the silicon substrate in the isolation region can be directly etched to form an etching trench without the need for patterning the second oxide doped mask layer, thus reducing the number of process steps.

[0099] Optionally, the process of removing the second silicon material layer, the first silicon material layer, and a portion of the silicon substrate in the isolation area by laser etching or etching solution to form an etching trench may include, at the same time as, before or after:

[0100] Multiple film layers on the front side are removed to expose the silicon substrate on the front side. The front side is then textured to form a light-trapping structure, which includes a pyramid structure.

[0101] Optional, see reference Figure 9 and Figure 11 After annealing only the second silicon material layer 300 and the first silicon material layer of the first sub-region A3 using laser annealing, the process further includes:

[0102] The second silicon material layer 300 of the first preset area A1 is removed by laser etching or etching solution etching, and the second silicon material layer 300, the first silicon material layer 200 and part of the silicon substrate 100 of the isolation area are removed to form an etching groove 001, and the isolation area is textured.

[0103] For details, please refer to Figure 9 and Figure 11 The second silicon material layer 300 of the first preset region A1, the second silicon material layer 300 of the isolation region (second sub-region A4), the first silicon material layer 200 and part of the silicon substrate 100 can be removed by laser etching or acid-base etching solution to form an etching groove 001, and the bottom of the etching groove 001 is textured.

[0104] By annealing only the second silicon material layer and the first silicon material layer in the first sub-region, the first preset region and the isolation region are free of the second doped polysilicon layer and the second oxide doped mask layer. The second silicon material layer, the first silicon material layer and the silicon substrate in the first preset region and the isolation region can be directly etched to form an etching trench without the need for patterning the second oxide doped mask layer, thus reducing the number of process steps.

[0105] Optionally, the process of removing the second silicon material layer in the first preset region by laser etching or etching solution, and removing the second silicon material layer, the first silicon material layer, and part of the silicon substrate in the isolation region to form an etching trench, may include, simultaneously with or before or after:

[0106] Multiple film layers located on the front side are removed to expose the silicon substrate on the front side, and the front side is textured to form a light-trapping structure; the light-trapping structure includes a pyramid structure.

[0107] refer to Figures 11-13 Optionally, after forming the etched grooves, the process may also include:

[0108] Remove the first oxide-doped mask layer 201 to expose the first doped polysilicon layer 2001 located in the first preset region A1;

[0109] Remove the second oxide-doped mask layer 301 to expose the second doped polysilicon layer 3001 located in the second sub-region A2.

[0110] The first oxide-doped mask layer 201 and the second oxide-doped mask layer 301 can be removed by laser etching.

[0111] Optionally, before forming the first silicon material layer on the back side away from the front side, the method further includes:

[0112] A first tunneling layer is formed on the back side, and the first tunneling layer contacts the silicon substrate.

[0113] like Figure 3 As shown, before forming the first silicon material layer 200 on the side of the back surface 102 away from the front surface 101, a tunneling layer 103 is formed on the back surface 102 by a film deposition process such as plasma enhanced chemical vapor deposition (PECVD) or low pressure chemical vapor deposition (LPCVD).

[0114] Correspondingly, before forming the etching trench on the silicon substrate in the isolation region, the following steps are also included:

[0115] Remove the first tunnel layer of the isolation area.

[0116] like Figure 11 As shown, before forming the etching trench 001 on the silicon substrate in the isolation region (second sub-region A4), the process further includes: removing the first tunneling layer 103 located in the isolation region (second sub-region A4) by a wet etching process.

[0117] Optionally, after annealing via laser annealing, the process further includes: repairing thermal defects in the first doped polycrystalline silicon layer via heat treatment; and repairing thermal defects in the second doped polycrystalline silicon layer via heat treatment, thereby improving the performance of the solar cell.

[0118] Optionally, annealing via heat treatment processes may also include:

[0119] A diffusion region of the first conductivity type is formed in the region of the silicon substrate near the first doped polysilicon layer;

[0120] A second conductivity type diffusion region is formed in the region of the silicon substrate near the second silicon material layer in the second preset region.

[0121] like Figure 7As shown, a first conductivity type diffusion region 105 is formed in the region of the silicon substrate 100 near the first doped polycrystalline silicon layer 2001. A second conductivity type diffusion region 106 is formed on the side of the silicon substrate 100 near the second silicon material layer 300 in the second predetermined region A2. The first conductivity type dopant element in the first doped polycrystalline silicon layer 2001 diffuses to the side of the silicon substrate 100 near the first doped polycrystalline silicon layer 2001 under the influence of a temperature field. The second conductivity type dopant element in the second doped polycrystalline silicon layer 3001 diffuses to the side of the silicon substrate 100 near the first silicon material layer 200 under the influence of a temperature field. The establishment of the first conductivity type diffusion region 105 and the second conductivity type diffusion region 106 optimizes the generation, separation, and transport processes of charge carriers, thereby improving the light absorption and utilization efficiency of the solar cell and enhancing the photoelectric conversion efficiency. The first conductivity type diffusion region 105 and the second conductivity type diffusion region 106 can improve interface characteristics, reduce defect density and energy barrier at the interface, and improve the stability and reliability of the solar cell during long-term use. The thickness of both the first conductivity type diffusion region 105 and the second conductivity type diffusion region 106 is greater than or equal to 0 nanometers and less than or equal to 300 nanometers.

[0122] Optionally, when repairing thermal defects in the first doped polysilicon layer through a heat treatment process, the method may further include:

[0123] A diffusion region of the first conductivity type is formed in the region of the silicon substrate near the first doped polysilicon layer;

[0124] A second conductivity type diffusion region is formed in the region of the silicon substrate in the second preset region near the second doped polysilicon layer.

[0125] Optionally, the thickness of the diffusion region of the second conductivity type is 0-300 nm.

[0126] Optionally, the bottom depth of the etching groove on the side closer to the first sub-region is greater than the bottom depth of the etching groove on the side closer to the first preset region.

[0127] like Figure 11 As shown, an etching trench 001 is formed on the silicon substrate 100 in the isolation region (second sub-region A4) using a wet etching process. To avoid damage to the inner film layer of the first preset region A1 caused by wet etching, the wet etching rate on the side of the etching trench 001 closer to the second sub-region A3 is greater than the wet etching rate on the side of the etching trench 001 closer to the first preset region A1. This technical solution enables, as... Figure 11As shown, after texturing, the depth of the texturing structure located on the side of the etching groove 001 near the second sub-region A3 is greater than the depth of the side of the etching groove 001 near the first preset region A1. The light trapping effect of the texturing structure located on the side of the etching groove 001 near the second sub-region A3 is better than the light trapping effect of the side of the etching groove 002 near the first preset region A1.

[0128] Optionally, in the direction from the isolation region to the first preset region A1, the size of the isolation region is less than or equal to 30% of the size of the second preset region A2. The above technical solution can avoid the isolation region occupying too large an area, thus reducing the luminous efficiency of the solar cell.

[0129] Optionally, the second oxide-doped mask layer may be formed using either of the following two methods:

[0130] The first method: The second silicon material layer is fabricated using an in-situ doping method. The second silicon material layer contains a Group 5 element. The annealing process includes an oxidation treatment section. In the oxidation treatment section of the annealing process, a second oxide doped mask layer is formed on the side of the second silicon material layer away from the silicon substrate.

[0131] The second method: The second silicon material layer uses intrinsic silicon. The annealing process includes an oxidation process and a doping process. The second silicon material layer is doped with group V elements through the doping process. Through the doping process and the oxidation process, the second silicon material layer is transformed into a second doped polycrystalline layer, and a second doped mask layer is formed on the side of the second silicon material layer away from the silicon substrate.

[0132] For details, please refer to Figure 6 and Figure 7 When the second silicon material layer 300 contains doped elements, for example, the silicon substrate 100 is an N-type silicon substrate. The second silicon material layer 300 is a phosphorus-doped silicon material layer. During the oxidation process, the phosphorus element in the second silicon material layer 300 is activated, causing it to diffuse into the first silicon material layer 200. The first silicon material layer 200 is partially or completely converted into a second doped polycrystalline silicon layer. Since the annealing is completed in an oxidizing atmosphere, the second silicon material layer 300 is completely converted into a second oxide-doped mask layer 301. When the dopant element is phosphorus, the second oxide-doped mask layer 301 is a phosphosilicate glass (PSG).

[0133] The second silicon material layer 300 uses intrinsic silicon, that is, when the second silicon material layer 300 does not contain doped elements, the annealing process includes an oxidation process and a doping process. In the doping process, phosphorus diffuses from the second silicon material layer 300 to the first silicon material layer 200. After passing through the oxidation process, the phosphorus is in an activated state, and the first silicon material layer 200 is partially or completely converted into the second doped polycrystalline silicon layer 3001. Since the annealing is completed in an oxidizing atmosphere, the second silicon material layer 300 is completely converted into the second oxide-doped mask layer 301.

[0134] Optionally, after doping the second silicon material layer with a Group 5 element in the doping process, a top doped mask layer is formed on the surface of the second silicon material layer, and a bottom layer of the second doped mask layer is formed between the top doped mask layer and the second doped polysilicon layer during the oxidation process.

[0135] Specifically, the second oxide-doped mask layer 301 includes a bottom layer and a top layer of the second doped mask layer. The density of the top layer of the doped mask layer is lower than that of the bottom layer of the second reference mask layer. The top layer of the doped mask layer is relatively porous and easy to clean, which can prevent contamination of other film layers. The bottom layer of the second doped mask layer is relatively dense and not easy to clean, which can protect the second doped polysilicon layer 3001 during the fabrication of the etching trench 001 and the texturing process.

[0136] Optionally, after the second silicon material layer is doped with a Group 5 element through the doping process, the top doped mask layer formed on the surface of the second silicon material layer has a two-layer or multi-layer structure, and the two-layer or multi-layer structure has different corrosion rates in alkaline solution.

[0137] Specifically, the top doped mask layer is obtained by converting the second silicon material layer 300, and the interface of the top doped mask layer has two or more layers. When the top doped mask layer is etched with the same alkaline solution, different layers in the top doped mask layer have different etching rates. For example, at 75 degrees Celsius, the top doped mask layer is etched with a 2%-15% potassium hydroxide or sodium hydroxide solution, and the etching rates of different layers are different.

[0138] Optionally, the second doped polysilicon layer and the second oxide-doped mask layer are doped with Group 5 elements.

[0139] Optionally, the doping element is phosphorus, a Group 5 element.

[0140] Optionally, the elements doped in the first doped polysilicon layer and the first oxide-doped mask layer are Group 3 and Group 5 elements, respectively, with the doping level of the Group 5 element being at least 40% lower than that of the Group 3 element; similarly, the elements doped in the second doped polysilicon layer and the second oxide-doped mask layer are also Group 3 and Group 5 elements, with the doping level of the Group 3 element being at least 40% lower than that of the Group 5 element. Specifically, the first doped polysilicon layer 2001 is a p-type layer, and the second doped polysilicon layer 3001 is an n-type layer.

[0141] Optionally, after removing the first oxide-doped mask layer and the second oxide-doped mask layer, the process further includes:

[0142] A passivation layer is formed on the side of the first doped polysilicon layer and the second doped polysilicon layer away from the silicon substrate, and in the isolation region;

[0143] A first electrode is formed on the side of the passivation layer away from the first doped polysilicon layer, and the first electrode passes through the passivation layer and is connected to the first doped polysilicon layer.

[0144] A second electrode is formed on the side of the passivation layer away from the second doped polysilicon layer, and the second electrode passes through the passivation layer and is connected to the second doped polysilicon layer.

[0145] like Figure 14 As shown, a passivation layer 400 is formed on the side of the first doped polysilicon layer 2001 and the second doped polysilicon layer 3001 away from the silicon substrate 100 and in the isolation region.

[0146] like Figure 14 As shown, a first electrode E1 is formed on the side of the passivation layer 400 away from the first doped polysilicon layer 2001. The first electrode E1 passes through the passivation layer 400 and is electrically connected to the first doped polysilicon layer 2001. Optionally, an antireflection layer 500 is further formed on the side of the passivation layer 400 away from the first doped polysilicon layer 2001. The first electrode E1 is electrically connected through the antireflection layer 500, the passivation layer 400, and the first doped polysilicon layer 2001.

[0147] like Figure 14 As shown, a second electrode E2 is formed on the side of the passivation layer 400 away from the second doped polysilicon layer 3001. The second electrode E2 passes through the passivation layer 400 and is electrically connected to the second doped polysilicon layer 3001. Optionally, an antireflection layer 500 is also formed on the side of the passivation layer 400 away from the second doped polysilicon layer 3001. The second electrode E2 passes through the antireflection layer 500 and the passivation layer 400 and is electrically connected to the second doped polysilicon layer 3001.

[0148] The passivation layer 400 covers both the front side 101 and the back side 102 of the entire silicon substrate 100. The passivation layer 400 can be a passivating film such as an aluminum oxide layer; specific applications are not limited here. The antireflection layer 500 is used to reduce sunlight reflection, allowing more sunlight to be absorbed inside the solar cell. The antireflection layer 500 can be a film such as a silicon nitride layer.

[0149] Optionally, based on the above embodiments, the process of forming a first electrode E1 on the side of the passivation layer 400 away from the first doped polysilicon layer 2001 and a second electrode E2 on the side of the passivation layer 400 away from the second doped polysilicon layer 3001 may include: firstly, removing a portion of the passivation layer 400 on the side of the first doped polysilicon layer 2001 away from the silicon substrate 100 to form a first through-channel, and removing a portion of the passivation layer 400 on the side of the second doped polysilicon layer 3001 away from the silicon substrate 100 to form a second through-channel; the passivation layer 400 can be activated by a sintering process to improve the passivation effect. Then, hydrofluoric acid is used to perform hydrophobic treatment on the bottom and sides of the first and second through-channels to achieve an anti-oxidation effect; then, a seed layer containing aluminum is grown in the first and second through-channels using a physical vapor deposition method; the seed layer is patterned, and the seed layer in the first and second through-channels is retained; finally, the first electrode E1 is formed in the first through-channel by electroplating; and the second electrode E2 is formed in the second through-channel. Alternatively, the first electrode E1 and the second electrode E2 can also be prepared by printing conductive silver paste or conductive copper paste.

[0150] Alternatively, after growing a seed layer containing aluminum on the side of the passivation layer 400 away from the silicon substrate 100 and within the first and second through-holes, electroplating can be performed on the entire surface first, followed by patterning of the electroplated metal layer, retaining the metal layer within the first and second through-holes and part of the surface. The metal layer within the first through-hole serves as the first electrode E1, and the metal layer within the second through-hole serves as the second electrode E2.

[0151] Optionally, based on the above embodiments, refer to... Figure 14The process of forming a first electrode E1 on the side of the passivation layer 400 away from the first doped polysilicon layer 2001 and a second electrode E2 on the side of the passivation layer 400 away from the second doped polysilicon layer 3001 may include: printing silver paste as a seed layer on the side of the passivation layer 400 away from the first doped polysilicon layer 2001; during the printing of silver paste, a portion of the passivation layer 400 on the side of the first doped polysilicon layer 2001 away from the silicon substrate 100 is penetrated to form a first through-groove; printing silver paste as a seed layer on the side of the passivation layer 400 away from the second doped polysilicon layer 3001; during the printing of silver paste, a portion of the passivation layer 400 on the side of the second doped polysilicon layer 3001 away from the silicon substrate 100 is penetrated to form a second through-groove; printing copper paste in the first through-groove to form the first electrode E1; and printing copper paste in the second through-groove to form the second electrode E2.

[0152] The above process flow, before printing silver paste, may also include: firstly removing a portion of the passivation layer 400 on the side of the first doped polysilicon layer 2001 away from the silicon substrate 100 to form a first through-channel; and secondly removing a portion of the passivation layer 400 on the side of the second doped polysilicon layer 3001 away from the silicon substrate 100 to form a second through-channel; then cleaning the bottom and sides of the first and second through-channels with hydrofluoric acid to form hydrophobic bottom and side surfaces, achieving an anti-oxidation effect. This prevents the printed silver paste from being unable to penetrate the passivation layer 400.

[0153] Optionally, based on the above embodiments, refer to... Figure 10 The process of forming a first electrode E1 on the side of the passivation layer 400 away from the first doped polysilicon layer 2001 and a second electrode E2 on the side of the passivation layer 400 away from the second doped polysilicon layer 3001 may include: printing silver paste on the side of the passivation layer 400 away from the first doped polysilicon layer 2001, during which a portion of the passivation layer 400 on the side of the first doped polysilicon layer 2001 away from the silicon substrate 100 is penetrated to form a first through-groove; printing silver paste on the side of the passivation layer 400 away from the second doped polysilicon layer 3001, during which a portion of the passivation layer 400 on the side of the second doped polysilicon layer 300 away from the silicon substrate 100 is penetrated to form a second through-groove; continuing to print silver paste in the first through-groove to form the first electrode E1; and continuing to print silver paste in the second through-groove to form the second electrode E2.

[0154] The above process flow, before printing silver paste, may also include: firstly removing a portion of the passivation layer 400 on the side of the first doped polysilicon layer 2001 away from the silicon substrate 100 to form a first through-channel; and secondly removing a portion of the passivation layer 400 on the side of the second doped polysilicon layer 3001 away from the silicon substrate 100 to form a second through-channel; then cleaning the bottom and sides of the first and second through-channels with hydrofluoric acid to form hydrophobic bottom and side surfaces, achieving an anti-oxidation effect. This prevents the printed silver paste from being unable to penetrate the passivation layer 400.

[0155] Optionally, based on the above embodiments, refer to... Figure 10 After forming the first electrode E1 on the side of the passivation layer 400 away from the first doped polysilicon layer 2001 and the second electrode E2 on the side of the passivation layer 400 away from the second doped polysilicon layer 3001, photoinjection processing can be used to activate the metal contacts within the first electrode E1 and / or the second electrode E2 and eliminate defects. Photoinjection processing can eliminate contact defects and provide a high concentration of process carriers.

[0156] Optionally, based on the above embodiments, light injection processing can be performed on the front side 101 before or after any step. Since the front side 101 has no electrodes and no electrode obstruction, the light injection efficiency is effectively increased. Simultaneously, light injection processing can eliminate contact defects and provide a high concentration of process carriers.

[0157] This invention also provides a solar cell, prepared using the solar cell preparation method described in any embodiment of this invention. The beneficial effects of this solar cell preparation method described in any embodiment are not repeated here.

[0158] This invention also provides a solar cell, see reference. Figure 15 The solar cell has a front side and a back side opposite to the front side. The back side has a first preset region A1 and a second preset region A2. The first preset region A1 has a first tunneling layer 103 and a first doped polycrystalline silicon layer 2001. The second preset region A2 has a second doped polycrystalline silicon layer 3001. The second doped polycrystalline silicon layer 3001 includes a first sublayer 31 and a second sublayer 32. The second sublayer 32 is disposed on the side of the first sublayer 31 away from the silicon substrate 100.

[0159] Among them, the first doped polycrystalline silicon layer 2001 on the first preset region A1 is a p-type silicon material layer doped with a third group element; the first sub-layer 31 on the second preset region A2 is an n-type silicon material layer doped with a third group and a fifth group element, and the doping amount of the fifth group element is higher than that of the third group element.

[0160] The second sublayer on the second preset region A2 is an n-type silicon material layer doped with a group 5 element.

[0161] For details, please refer to Figure 6 When the second silicon material layer 300 in the second preset region A2 is partially converted into a second oxide-doped mask layer and partially converted into a second doped polysilicon layer, a second silicon material layer is formed. Figure 15 The structure shown is the back-contact solar cell of this embodiment.

[0162] Optionally, the third group element is boron, and the fifth group element is phosphorus.

[0163] Optional, see reference Figure 16 A second tunneling layer 33 is also included between the first sub-layer 31 and the second sub-layer 32.

[0164] For details, please refer to Figure 6 and Figure 16 Before the second silicon material layer 300 is formed on the surface of the first silicon material layer 200, the surface of the first silicon material layer 200 may be oxidized by oxygen in the environment to form the second tunneling layer 33. Alternatively, the second tunneling layer 33 may be formed on the surface of the first silicon material layer 200 through an oxidation process.

[0165] Optionally, the thickness of the second tunneling layer 33 is 0.1 nm to 3 nm.

[0166] Specifically, when the second tunneling layer 33 is formed by oxidation of the surface of the first silicon material layer 200 by oxygen in the environment, the thickness of the second tunneling layer 33 is 0.5 nm-1 nm. When the second tunneling layer 33 is formed on the surface of the first silicon material layer 200 through an oxidation process, the thickness of the second tunneling layer 33 is 0.1 nm-3 nm.

[0167] The solar cells in this embodiment of the invention and the solar cell preparation methods provided in any embodiment of the invention belong to the same concept and have the same beneficial effects. For technical details not covered in this embodiment, please refer to the solar cells described in any embodiment of the invention.

[0168] This invention also provides a photovoltaic module, including the solar cell described in any embodiment of this invention. The photovoltaic module incorporates the beneficial effects of the solar cell as described herein, which will not be repeated here.

[0169] This invention also provides a photovoltaic system, including the photovoltaic module described in any embodiment of this invention. The beneficial effects of this photovoltaic system, including the photovoltaic module, are described in any of the above-described embodiments and will not be repeated here.

[0170] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0171] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for preparing a solar cell, characterized in that, include: A silicon substrate is provided, the silicon substrate including a front side and a back side opposite to the front side; A first silicon material layer is formed on the back side away from the front side, wherein the first silicon material layer includes a first conductivity type dopant element; the first silicon material layer comprises amorphous material and / or polycrystalline material composed of microcrystals; In an oxidizing atmosphere, the first silicon material layer located in the first preset region is annealed by laser, so that the first silicon material layer in the first preset region is transformed into a first doped polycrystalline silicon layer and a first oxide-doped mask layer; wherein, the first oxide-doped mask layer is located on the side of the first doped polycrystalline silicon layer away from the silicon substrate; A second silicon material layer is formed in a second predetermined region on the back side; the second predetermined region includes a first sub-region and a second sub-region, the first sub-region being a doped region and the second sub-region being an isolation region; the second silicon material layer comprises amorphous material and / or polycrystalline material composed of microcrystals; Annealing is performed on the second silicon material layer of the first sub-region and the first silicon material layer of the first sub-region, so that the first silicon material layer and the second silicon material of the first sub-region are transformed into a second doped polycrystalline silicon layer and a second oxide-doped mask layer; wherein, the second oxide-doped mask layer is located on the side of the second doped polycrystalline silicon layer away from the silicon substrate.

2. The method for preparing a solar cell according to claim 1, characterized in that... , The oxidizing atmosphere includes one or more of oxygen, nitrous oxide, and ozone.

3. The method for preparing a solar cell according to claim 1, characterized in that, The first conductivity type doping element includes a third group element.

4. The method for preparing a solar cell according to claim 3, characterized in that, The first conductivity type doping element is boron.

5. The method for preparing a solar cell according to claim 1, characterized in that, No thermal oxidation process is performed before the second silicon material layer is formed in the second predetermined area on the back side.

6. The method for preparing a solar cell according to claim 1, characterized in that, The thickness of the second silicon material layer is less than or equal to 80 nanometers.

7. The method for preparing a solar cell according to claim 1, characterized in that, The second silicon material layer in the first sub-region is completely converted into the second oxide-doped mask layer; or all the second silicon material layers in the first sub-region and part of the first silicon material layers in the first sub-region are converted into the second oxide-doped mask layer.

8. The method for preparing a solar cell according to claim 1, characterized in that, The first silicon material layer in the first sub-region is converted into the second doped polycrystalline silicon layer in whole or in part.

9. The method for preparing a solar cell according to claim 1, characterized in that, Both the first preset region and the second preset region include the second silicon material layer; Annealing is performed on the second silicon material layer located in the first sub-region and the first silicon material layer located in the first sub-region, including: The second silicon material layer in the first preset region and the second preset region, as well as the first silicon material layer in the first sub-region, are annealed using laser annealing or heat treatment processes. Alternatively, the second silicon material layer in the first preset region and the first sub-region, and the first silicon material layer located in the first sub-region, can be annealed using a laser annealing process. Alternatively, laser annealing can be used to anneal only the second silicon material layer in the first sub-region and the first silicon material layer in the first sub-region.

10. The method for preparing a solar cell according to claim 9, characterized in that, After annealing the second silicon material layer in the first preset region and the second preset region, and the first silicon material layer in the first preset region, by laser annealing or heat treatment, the process further includes: The second oxide-doped mask layer located on the isolation region and the first preset region is removed by laser etching process; Before or after removing the second oxide-doped mask layer located on the isolation region and the first preset region, the process further includes: Remove the multiple film layers located on the front side to expose the silicon substrate on the front side; After removing the second oxide-doped mask layer and multiple layers on the front side located in the isolation region, the process further includes: The second doped polysilicon layer located in the first preset region and the isolation region is removed, and the silicon substrate on the front side is textured to form a light-trapping structure, the light-trapping structure including a pyramid structure. When removing the second doped polysilicon layer of the isolation region, a portion of the silicon substrate in the isolation region is also removed to form an etching trench; simultaneously, the isolation region and the front side are textured.

11. The method for preparing a solar cell according to claim 9, characterized in that, After annealing the second silicon material layer in the first preset region and the first sub-region, and the first silicon material layer in the first sub-region, using a laser annealing process, the process further includes: The second silicon material layer, the first silicon material layer, and a portion of the silicon substrate in the isolation area are removed by laser etching or etching solution to form an etching trench, and the isolation area is textured. The process of removing the second silicon material layer, the first silicon material layer, and a portion of the silicon substrate in the isolation area by laser etching or etching solution to form an etching trench includes, or includes, before or after: Multiple film layers located on the front side are removed to expose the silicon substrate on the front side, and the front side is textured to form a light-trapping structure; the light-trapping structure includes a pyramid structure.

12. The method for preparing a solar cell according to claim 9, characterized in that, After annealing only the second silicon material layer of the first sub-region and the first silicon material layer of the first sub-region using laser annealing, the process further includes: The second silicon material layer in the first preset area is removed by laser etching or etching solution, and the second silicon material layer, the first silicon material layer, and part of the silicon substrate in the isolation area are removed to form an etching trench, and the isolation area is textured. Removing the second silicon material layer in the first preset region by laser etching or etching solution, and removing the second silicon material layer in the isolation region, the first silicon material layer, and part of the silicon substrate to form an etching trench, simultaneously or before or after: Multiple film layers located on the front side are removed to expose the silicon substrate on the front side, and the front side is textured to form a light-trapping structure; the light-trapping structure includes a pyramid structure.

13. The method for preparing a solar cell according to any one of claims 10-12, characterized in that, After forming the etching grooves, the process also includes: Remove the first oxide-doped mask layer to expose the first doped polysilicon layer located in the first preset region; Remove the second oxide-doped mask layer to expose the second doped polysilicon layer located in the second sub-region.

14. The method for preparing a solar cell according to claim 1, characterized in that, Before forming the first silicon material layer on the side of the back surface away from the front surface, the following is also included: The back surface is polished or textured.

15. The method for preparing a solar cell according to claim 1, characterized in that, Before forming the first silicon material layer on the side of the back surface away from the front surface, the following is also included: A first tunneling layer is formed on the back side, and the first tunneling layer contacts the silicon substrate.

16. The method for preparing a solar cell according to claim 9, characterized in that, After annealing via laser annealing, the process also includes: The thermal defects of the first doped polycrystalline silicon layer are repaired by heat treatment process; Thermal defects in the second doped polycrystalline silicon layer are repaired using a heat treatment process.

17. The method for preparing a solar cell according to claim 9, characterized in that, Annealing via heat treatment processes also includes: A first conductivity type diffusion region is formed in the region of the silicon substrate near the first doped polysilicon layer; A second conductivity type diffusion region is formed in the region of the silicon substrate near the second silicon material layer in the second preset region.

18. The method for preparing a solar cell according to claim 16, characterized in that, Repairing thermal defects in the first doped polycrystalline silicon layer using a heat treatment process also includes: A first conductivity type diffusion region is formed in the region of the silicon substrate near the first doped polysilicon layer; A second conductivity type diffusion region is formed in the region of the silicon substrate near the second doped polycrystalline silicon layer in the second preset region.

19. The method for preparing a solar cell according to claim 18, characterized in that, The thickness of the diffusion region of the second conductivity type is 0-300 nm.

20. The method for preparing a solar cell according to any one of claims 10-12, characterized in that, The bottom depth of the etching groove on the side closer to the first sub-region is greater than the bottom depth of the etching groove on the side closer to the first preset region.

21. The method for preparing a solar cell according to claim 1, characterized in that, The second doped mask layer is formed using either of the following two methods: The first method: The second silicon material layer is fabricated using an in-situ doping method. The second silicon material layer contains a Group 5 element. The annealing process includes an oxidation treatment section. In the oxidation treatment section of the annealing process, a second oxide doped mask layer is formed on the side of the second silicon material layer away from the silicon substrate. The second method: The second silicon material layer uses intrinsic silicon. The annealing process includes an oxidation process and a doping process. The second silicon material layer is doped with group V elements through the doping process. Through the doping process and the oxidation process, the second silicon material layer is transformed into a second doped polycrystalline layer, and a second doped mask layer is formed on the side of the second silicon material layer away from the silicon substrate.

22. The method for preparing a solar cell according to claim 21, characterized in that, After doping the second silicon material layer with Group 5 elements in the doping process, a top doped mask layer is formed on the surface of the second silicon material layer. During the oxidation process, a bottom layer of the second doped mask layer is formed between the top doped mask layer and the second doped polysilicon layer.

23. The method for preparing a solar cell according to claim 22, characterized in that, After the second silicon material layer is doped with a Group 5 element through the doping process, the top doped mask layer formed on the surface of the second silicon material layer has a two-layer or multi-layer structure, and the two-layer or multi-layer structure has different corrosion rates in alkaline solution.

24. The method for preparing a solar cell according to claim 1, characterized in that, The second doped polysilicon layer and the second oxide doped mask layer are doped with Group 5 elements.

25. The method for preparing a solar cell according to claim 24, characterized in that, The doped element is phosphorus, a Group 5 element.

26. The method for preparing a solar cell according to claim 1, characterized in that, The first doped polysilicon layer and the first oxide doped mask layer are doped with elements from Group 3 and Group 5, with the doping amount of Group 5 elements being more than 40% lower than that of Group 3 elements; the second doped polysilicon layer and the second oxide doped mask layer are doped with elements from Group 3 and Group 5, with the doping amount of Group 3 elements being more than 40% lower than that of Group 5 elements.

27. The method for preparing a solar cell according to claim 13, characterized in that, After removing the first oxide-doped mask layer and the second oxide-doped mask layer, the process also includes: A passivation layer is formed on the side of the first doped polysilicon layer and the second doped polysilicon layer away from the silicon substrate, and on the isolation region; A first electrode is formed on the side of the passivation layer away from the first doped polysilicon layer, and the first electrode passes through the passivation layer and is connected to the first doped polysilicon layer. A second electrode is formed on the side of the passivation layer away from the second doped polysilicon layer, and the second electrode passes through the passivation layer and is connected to the second doped polysilicon layer.

28. A solar cell, characterized in that, The solar cell has a front side and a back side opposite to the front side. The back side has a first preset region and a second preset region. The first preset region has a first tunneling layer and a first doped polycrystalline silicon layer. The second preset region has a second doped polycrystalline silicon layer. The second doped polycrystalline silicon layer includes a first sublayer and a second sublayer. The second sublayer is disposed on the side of the first sublayer away from the silicon substrate. Wherein, the first doped polycrystalline silicon layer on the first preset region is a p-type silicon material layer doped with a third group element; the first sub-layer on the second preset region is an n-type silicon material layer doped with a third group element and a fifth group element, wherein the doping amount of the fifth group element is higher than that of the third group element. The second sublayer on the second preset region is an n-type silicon material layer doped with Group 5 elements.

29. The solar cell according to claim 28, characterized in that, The third group element is boron, and the fifth group element is phosphorus.

30. The solar cell according to claim 28, characterized in that, A second tunneling layer is also included between the first sublayer and the second sublayer.

31. The solar cell according to claim 30, characterized in that, The thickness of the second tunneling layer is 0.1nm-3nm.

32. A photovoltaic module, characterized in that, It includes at least one solar cell as described in any one of claims 28-31.

33. A photovoltaic system, characterized in that, Includes the photovoltaic module as described in claim 32.

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