Semiconductor device manufacturing method and semiconductor device manufacturing system

Abstract

A method for manufacturing a semiconductor device includes: processing a laser absorbing layer and a first bonding layer in a non-bonded region of a superposed substrate in which the first bonding layer and the second bonding layer are bonded in a first substrate having the laser absorbing layer and the first bonding layer and a second substrate having the second bonding layer; a slope filling step for filling a filler to a predetermined second outer peripheral position corresponding to the first outer peripheral position of the first bonding layer; irradiating laser to the laser absorbing layer; and separating the first substrate in the overlapped substrate from the second substrate.

Description

Technical Field

[0001] This disclosure relates to a method for manufacturing a semiconductor device and a system for manufacturing a semiconductor device. Background Technology

[0002] Patent Document 1 discloses a method for manufacturing a NAND flash memory, which includes a three-dimensional memory cell array obtained by arranging multiple memory cells in three dimensions and a CMOS circuit for controlling the memory cell array. The manufacturing method includes the following steps: bonding a first substrate and a second substrate, on which semiconductor elements including CMOS and the memory cell array are formed, together via a separable layer, and separating the first substrate at the separable layer.

[0003] Patent Document 2 discloses a method for forming a semiconductor device by bonding a semiconductor substrate having memory cells together with a semiconductor substrate having CMOS. The manufacturing method describes a back-side grinding process performed after filling an unbonded area formed on the outer periphery of the bonded substrate with an insulating film.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent Application Publication No. 2021-44408

[0007] Patent Document 2: Japanese Patent Application Publication No. 2021-48303 Summary of the Invention

[0008] The problem the invention aims to solve

[0009] The technology disclosed herein allows for the proper separation of the first substrate and the second substrate in an overlapping substrate obtained by bonding the first substrate and the second substrate.

[0010] means for solving problems

[0011] One aspect of this disclosure is a method for manufacturing a semiconductor device, comprising the following processes: performing bevel filling on an unbonded area of ​​an overlapping substrate obtained by bonding the first bonding layer to the second bonding layer in a first substrate having a laser absorption layer and a first bonding layer and a second substrate having a second bonding layer, filling a filler material up to a second peripheral position predetermined corresponding to a first peripheral position of the first bonding layer; irradiating the laser absorption layer with a laser; and separating the first substrate from the second substrate in the overlapping substrate.

[0012] The effects of the invention

[0013] According to this disclosure, the first substrate and the second substrate can be appropriately separated in an overlapping substrate obtained by bonding the first substrate and the second substrate. Attached Figure Description

[0014] Figure 1 This is a flowchart illustrating the main processes involved in wafer processing.

[0015] Figure 2 This is an explanatory diagram showing the main processes involved in wafer processing.

[0016] Figure 3 This is an explanatory diagram showing the bonding of the first wafer and the second wafer.

[0017] Figure 4 This is an illustrative diagram showing an example of a sloped filling for an area that is not properly fitted.

[0018] Figure 5 This is an illustrative diagram showing another example of a sloped filling for areas that do not fit together.

[0019] Figure 6 This is an explanatory diagram showing the situation of irradiating a laser beam onto a laser absorption layer.

[0020] Figure 7 This is an explanatory diagram showing the separation of the first wafer and the second wafer.

[0021] Figure 8 This is an explanatory diagram illustrating the main steps involved in the preparation of a first wafer according to one embodiment.

[0022] Figure 9 This is a flowchart illustrating the main steps involved in the preparation of a first wafer according to one embodiment.

[0023] Figure 10 This is an explanatory diagram illustrating a portion of the process involved in the preparation of a first wafer according to one embodiment.

[0024] Figure 11 This is a flowchart illustrating the main steps involved in the preparation of a first wafer according to one embodiment.

[0025] Figure 12 This is an explanatory diagram illustrating a portion of the process involved in the preparation of a first wafer according to one embodiment.

[0026] Figure 13 This is a top view showing an outline of the structure of a wafer processing apparatus according to one embodiment.

[0027] Figure 14 This is a top view showing an outline of the structure of an interface modification apparatus according to one embodiment.

[0028] Figure 15 This is a side view showing an outline of the structure of an interface modification apparatus according to one embodiment.

[0029] Figure 16 This is an explanatory diagram showing an outline of the slope filling according to the first embodiment.

[0030] Figure 17 This is an explanatory diagram showing an outline of the slope filling according to the first embodiment.

[0031] Figure 18 This is an explanatory diagram showing an example of the function of the slope filling according to the first embodiment.

[0032] Figure 19 This is an explanatory diagram showing an example of the function of the slope filling according to the first embodiment.

[0033] Figure 20 This is an explanatory diagram showing an outline of the slope filling involved in the second embodiment.

[0034] Figure 21 This is an explanatory diagram showing an outline of the formation of the separation base points involved in the second embodiment.

[0035] Figure 22 This is an explanatory diagram showing an outline of the formation of the separation base points involved in the second embodiment.

[0036] Figure 23 This is an explanatory diagram illustrating an example of the function of slope filling and separation according to the second embodiment.

[0037] Figure 24 This is an explanatory diagram showing the outline of the formation of the separation base points involved in the third embodiment.

[0038] Figure 25 This is an explanatory diagram showing the wafer processing involved in the comparative example. Detailed Implementation

[0039] In the semiconductor device manufacturing process, a process is performed where a device layer formed on the surface of a first wafer is transferred to a second wafer from a superimposed wafer obtained by bonding two semiconductor substrates (hereinafter referred to as "wafers"). This transfer of the device layer from the first wafer to the second wafer is performed, for example, by irradiating a separation layer inside the first wafer with a laser beam to reduce the bonding force between the first and second wafers, and then separating the first wafer from the second wafer. Furthermore, the separated first wafer is reused for bonding with the next second wafer.

[0040] At the periphery of the overlapping wafer T, there may be an unfitted area B, similar to the misfitting of the beveled surfaces of the first wafer W and the second wafer S (see reference). Figure 2 The inventors of this invention, through in-depth research, discovered that during the separation of the first wafer W, even when the bonding force in the separation layer of the first wafer W is reduced, separation in other regions near the unbonded region B sometimes takes precedence over separation in the separation layer. For example, as... Figure 25 As shown in (a), when an upward force Fup is applied to the outer periphery We of the first wafer W, as Figure 25 As shown in (b), sometimes a portion of the slope of the first wafer W, corresponding to the unattached region B, separates from the overlapping wafer T while still attached to the first wafer W. Additionally, as another example, as... Figure 25 As shown in (c), sometimes the separation progresses from the outer periphery of the junction between the first wafer W and the second wafer S to the surface of the second wafer S, causing the device region of the second wafer S (or the first wafer W) to be torn.

[0041] The reason for such inappropriate separation is not yet clear, but it can be assumed that the stress that should be concentrated on the separation layer is not only concentrated on the separation layer, but also on the region near the outer periphery of the junction surface between the first wafer W and the second wafer S, and separation should begin from this region.

[0042] In such Figure 25 In the example shown in (b), where a portion of the bevel is missing, the area in the first wafer W separated from the overlapping wafer T that could form a device is limited, sometimes leading to a decrease in productivity. Furthermore, in processes that involve repeating the bonding and separation process more than twice, such bevel defects sometimes occur repeatedly, and the consumption of the area capable of forming a device becomes significant.

[0043] In such Figure 25 In the case shown in example (c), where separation progresses to the point that the device region of the second wafer S (or the first wafer W) tears, it sometimes leads more directly to a decrease in productivity.

[0044] The technology disclosed herein allows for the appropriate separation of the first and second substrates in an overlapping substrate obtained by bonding the first and second substrates. Hereinafter, a method for manufacturing a semiconductor device according to this embodiment will be described with reference to the accompanying drawings. Furthermore, in this specification and the drawings, elements having substantially the same functional structure are labeled with the same reference numerals, thereby omitting repeated descriptions.

[0045] In the semiconductor device manufacturing method of this embodiment, firstly, a first wafer W (which serves as a first substrate) is prepared. Figure 1 St1), to be used as the second substrate, the second wafer S ( Figure 1 (St2). The preparation of the first wafer W and the second wafer S can be performed in parallel. Below, as... Figure 2 and Figure 3 As shown, the side of the first wafer W that is bonded to the second wafer S is called surface Wa, and the side opposite to surface Wa is called back surface Wb. Similarly, the side of the second wafer S that is bonded to the first wafer W is called surface Sa, and the side opposite to surface Sa is called back surface Sb.

[0046] The first wafer W prepared in St1 is, for example, a semiconductor wafer such as a silicon substrate. In one embodiment, the first wafer W has a generally circular shape. Figure 3 As shown in (a), a multilayer film consisting of multiple stacked layers is formed on the surface Wa of the first wafer W. The multilayer film, from the surface Wa side, sequentially includes a laser absorption layer P, an etch stop layer Q, a device layer Dw, and a surface film Fw. Furthermore, these laser absorption layer P, etch stop layer Q, device layer Dw, and surface film Fw are formed on the first wafer W, for example, in a film deposition apparatus (not shown) using a process including CVD (Chemical Vapor Deposition), and in an etching apparatus (not shown) using a process including RIE (Reactive Ion Etching). Additionally, other desired films that are components of the multilayer film can be formed, for example, between each of the laser absorption layer P, etch stop layer Q, device layer Dw, and surface film Fw. Details regarding the formation of the multilayer film will be described later.

[0047] The device layer Dw involved in this embodiment includes at least a portion of the memory cell array of a NAND flash memory. However, the technology involved in this disclosure is not limited to this and can also be applied to the manufacture of other semiconductor devices by bonding substrates having other desired devices to each other. In one embodiment, the device layer Dw includes at least a portion of the memory cell array of a DRAM. In another embodiment, the device layer Dw includes at least a portion of peripheral circuitry for controlling the memory cell array of a NAND flash memory or a DRAM. Furthermore, sometimes no devices are formed in the device layer Dw at the time of preparation during St1, but the devices are formed in subsequent processes. In other words, the device layer Dw can form a predetermined area of ​​devices such that devices are formed in processes after St1.

[0048] Examples of surface films Fw include oxide films (THOX films, SiO2 films, TEOS films), SiC films, SiCN films, or adhesives. The surface film Fw of the first wafer W constitutes the first bonding layer of this disclosure.

[0049] The laser absorbing layer P absorbs the laser beam (e.g., a CO2 laser beam) as described later. The laser absorbing layer P may be an oxide film (SiO2 film, TEOS film), but any film that absorbs the laser beam is acceptable and there are no particular limitations.

[0050] The etch stop layer Q is configured such that selective wet etching can be performed on the separation surface in the overlapping wafer T after the separation of the first wafer W (described later). Specifically, during the separation of the first wafer W, the laser absorption layer P is the main separation surface; therefore, a portion of the laser absorption layer P and the etch stop layer Q remain on the side of the separated first device layer Dw. In this state, by selectively etching the laser absorption layer P and the etch stop layer Q, only the laser absorption layer P is removed first. Then, by selectively etching the etch stop layer Q and the first device layer Dw, only the etch stop layer Q is removed. This improves the thickness deviation (TTV) of the first device layer Dw after wet etching. As the material for the etch stop layer Q, polysilicon (Poly-Si) can be used, but there are no particular limitations as long as the etch selectivity ratio between the etch stop layer Q and the first device layer Dw can be ensured. Furthermore, details regarding the method for forming the etch stop layer Q will be described later.

[0051] The second wafer S prepared in St2 is, for example, a semiconductor wafer such as a silicon substrate. In one embodiment, the second wafer S has a generally circular shape. Figure 3 As shown in (b), a multilayer film Ms is formed on the surface Sa of the second wafer S. The multilayer film Ms has a device layer Ds and a surface film Fs sequentially from the surface Sa side. Furthermore, for example, the device layer Ds and the surface film Fs are formed on the second wafer S by a process including CVD in a film deposition apparatus (not shown).

[0052] The device layer Ds and surface film Fs are identical to the device layer Dw and surface film Fw of the first wafer W, respectively. The surface film Fs of the second wafer W constitutes the second bonding layer of this disclosure. The device layer Ds in this embodiment includes at least a portion of the peripheral circuitry for controlling the memory cell array of a NAND flash memory. In one embodiment, when the device layer Dw of the first wafer W includes at least a portion of the memory cell array of a DRAM, the device layer Ds includes at least a portion of the peripheral circuitry for controlling the memory cell array. In another embodiment, when the device layer Dw of the first wafer W includes at least a portion of the peripheral circuitry for controlling the memory cell array, the device layer Ds includes at least a portion of the memory cell array of a NAND flash memory. In yet another embodiment, when the device layer Dw of the first wafer W includes at least a portion of the peripheral circuitry for controlling the memory cell array, the device layer Ds includes at least a portion of the memory cell array of a DRAM.

[0053] After preparing the first wafer W and the second wafer S as described above, as follows Figure 3 As shown in (c), the first wafer W and the second wafer S are bonded together to form the first overlapping wafer T1 as an overlapping substrate. Figure 1 , Figure 2 St3). In St3, the surface film Fw of the first wafer W is bonded to the surface film Fs of the second wafer S. The bonding method between the first wafer W and the second wafer S is arbitrary, for example, the surface films Fw and Fs are modified by plasma treatment in a surface modification apparatus (not shown), and the surface films Fw and Fs are hydrophilized by supplying pure water in a surface hydrophilization apparatus (not shown), and then the surface films Fw and Fs are bonded to each other by van der Waals forces and hydrogen bonds (intermolecular forces) in a bonding apparatus (not shown).

[0054] Next, as Figure 4 or Figure 5 As shown, bevel filling is performed on the unattached area B1 at the periphery of the first overlapping wafer T1. Figure 1 , Figure 2 (St4). Bevel filling includes injecting liquid filler material G into the bevel portion of the first overlapping wafer T1, including the unbonded region B1. In one embodiment, it includes injecting liquid filler material G into the unbonded region B, followed by baking (sintering) the filler material G to solidify it. As an example, in the bevel filling apparatus 70 described later, the first overlapping wafer T1 is rotated while liquid filler material G is injected from the injector 9. Thus, filler material G is filled into the unbonded region B1 of the entire circumference of the first overlapping wafer T1. The filler material G can be as follows: Figure 4 As shown, it is only filled into the unattached area B1. Alternatively, the filler material G can also be used as follows... Figure 5 As shown, the filler material G is applied to the entire beveled portion, including the unattached area B1. The first overlapping wafer T1, filled with the filler material G, is conveyed, for example, to the baking apparatus 80 described later, where the filler material G is baked. In one embodiment, the first overlapping wafer T1 is then conveyed to the cleaning apparatus 90 described later, where excess filler material G adhering to unwanted areas is cleaned and removed.

[0055] Next, as Figure 6 As shown, a laser beam L is irradiated onto the laser absorption layer P. Figure 1 , Figure 2(St5). In St5, for example, in the laser processing apparatus 50 described later, a laser beam is pulsedly irradiated onto the laser absorption layer P or the interface between the laser absorption layer P and the etch stop layer Q. The laser beam can be determined according to the material of the laser irradiation object, such as the laser absorption layer P. In one embodiment, the laser beam is a CO2 laser beam, and the wavelength of the CO2 laser beam is, for example, 8.9 μm to 11 μm. In another embodiment, the laser beam is an IR laser beam, and the wavelength of the IR laser beam is, for example, 1.5 μm to 2.5 μm. The laser beam L can be helically irradiated onto the entire surface of the laser absorption layer P when viewed from above, or it can be concentrically and annularly irradiated onto the entire surface of the laser absorption layer P. Alternatively, the laser beam L can be pulsedly irradiated onto the laser absorption layer P while moving a lens (not shown) included in the laser irradiation apparatus in a linear direction. In this case, for example, a linear movement mechanism (transfer machine) can be provided for the lens to move the lens in a horizontal direction, and, for example, a galvanometer scanner (not shown) can be used to scan the laser beam from the lens. The laser beam L passes through the first wafer W from the back side Wb side and is absorbed in the laser absorption layer P. Furthermore, the laser beam L reduces the bonding strength at the laser absorption layer P, the interface between the laser absorption layer P and the wafer W, or the interface between the laser absorption layer P and the etch stop layer Q.

[0056] In the following description, the interface with reduced bonding strength inside the first overlapping wafer T1 (in this embodiment, the surface inside the laser absorption layer P) is sometimes referred to as a "separation surface" in the art of this disclosure. In addition, in this embodiment, "reduced bonding strength" means a state in which the bonding strength is reduced at least compared with that before the laser beam L was irradiated, including the separation of the laser absorption layer P from the etch stop layer Q.

[0057] Next, as Figure 7 As shown, the first wafer W in the first overlapping wafer T1 is separated from the second wafer S. Figure 1 , Figure 2 (St6). In St6, for example in the separation apparatus 60 described later, the first wafer W is separated with the laser absorption layer P, whose bonding strength was reduced in St5, as the reference point. Furthermore, in this specification, at least a portion of the layer formed on the first wafer W is transferred, and the second wafer S after the first wafer W is separated is referred to as "the second wafer S after the transfer of this layer," or simply as "the second wafer S." Figure 7 In the example, the structure including the first device layer Dw, surface films Fw and Fs, the second device layer Ds, and the second wafer S is referred to as "the second wafer S after the first device layer Dw has been transferred", or simply "the second wafer S". The same applies to the second superimposed wafer T2 described later.

[0058] The separation method for the first wafer W is arbitrary. As an example, such as... Figure 7 As shown in (a), the adsorption holding disk 210 adsorbs and holds the back surface Sb of the second wafer S, and the adsorption disk 211 adsorbs and holds the surface Wa of the first wafer W. Then, as... Figure 7 As shown in (b), with the first wafer W held by the adsorption disk 211, the adsorption disk 211 is raised to separate the first wafer W. At this time, as described above, by irradiating the laser beam L, the bonding strength inside the laser absorption layer P or at the interface between the laser absorption layer P and the etch stop layer Q is reduced, so the first wafer W can be separated without applying a large load. In addition, by filling the unbonded area B1 with a bevel, bonding force is generated in the unbonded area B1, thus ensuring separation at the aforementioned interface. Therefore, it is possible to suppress Figure 25 The comparative example shows a localized defect in the beveled surface. As a result, the first device layer Dw transferred to the second wafer S can be expanded, thereby improving productivity.

[0059] Next, in the first superimposed wafer T1 after the first wafer W has been separated, the separation surface is subjected to surface treatment. Figure 1 , Figure 2 (St7). In St7, the separation surface can be cleaned, for example, in the cleaning apparatus 90. Alternatively, the separation surface can be ground to flatten or removed, for example, in a grinding apparatus (not shown) or an etching apparatus (not shown). Details regarding the surface treatment involved in this embodiment will be described later.

[0060] In one embodiment, the surface treatment includes a CMP (Chemical Mechanical Polishing) process. In the CMP process, a polishing pad is brought into contact with the separation surface of the first overlapping wafer T1, and pressure is applied while polishing the surface. At this time, the filler material G involved in this embodiment serves to prevent damage to the unattached areas in the beveled portion of the first overlapping wafer T1 due to the pressure.

[0061] Furthermore, in one embodiment, the material of the filler material G is selected based on its resistance to irradiation by the laser beam at St5. In this case, if CMP is included in the surface treatment at St7, the filler material G is preferably also resistant to each processing step included in the CMP. In one embodiment, if the filler material G filled at St4 is not resistant to one processing step of the CMP, it is removed after the separation of the first wafer W (St6) until the CMP is performed in the surface treatment (St7). In this case, during the CMP in the surface treatment (St7), the unbonded area B1 of the first overlapping wafer T1 is refilled with another filler material G that is resistant to each processing step included in the CMP. Thus, the refilled other filler material G serves to prevent damage to the unbonded area B1 during subsequent CMP as described above. Furthermore, the refilling of this other filler material G can be performed in the same manner as in St4 described above.

[0062] Next, a wiring layer Wr is formed on the first overlapping wafer T1 after surface treatment. Figure 1 , Figure 2 The wiring layer Wr can be formed using a known wiring process (BEOL: Back End of Line). Since the third wafer U, described later, is also bonded to the wiring layer Wr of the first overlapping wafer T1 according to this embodiment, St8 is configured to have a bonding surface film Ft. In one embodiment, the manufacturing method ends without bonding other wafers to the wiring layer Wr in the first overlapping wafer T1. In this case, the bonding surface film Ft may not be present on the wiring layer Wr.

[0063] Next, prepare the third wafer U ( Figure 1 , Figure 2 The preparation of the third wafer U of St9 is the same as the preparation of the first wafer W of St1. That is, a stacked film including a laser absorption layer P, an etch stop layer Q, a third device layer Du, and a surface film Fu is formed on the surface of the third wafer U. The absorption layer P, etch stop layer Q, third device layer Du, and surface film Fu in the third wafer U involved in this embodiment are the same as the absorption layer P, etch stop layer Q, first device layer Dw, and surface film Fu in the first wafer W, respectively. In one embodiment, the third device layer Du of the third wafer U includes a device different from the first device layer Dw of the first wafer W.

[0064] Next, as Figure 1 , Figure 2As shown, the second wafer S, after the first device layer Dw is transferred, is bonded to the third wafer U to obtain a second overlapping wafer T2 (St10) as an overlapping substrate. The bonding of the third wafer U and the second wafer S in St10 is the same as the bonding of the first wafer W and the second wafer S in St3. Then, filler material G is filled into the unbonded area B2 of the second overlapping wafer T2 by performing bevel filling (St11). In one embodiment, if the filler material G filled in the unbonded area B1 of the first overlapping wafer T1 is removed in a process prior to St11, filler material G is filled into both the unbonded areas B1 and B2 in St11. Afterwards, laser beam L irradiation (St12), separation of the third wafer U (St13), surface treatment of the second wafer S after the third device layer Du is transferred (St14), and formation of the wiring layer Wr (St15) are performed sequentially. St11 to St15 are the same as St4 to St8. In this embodiment, the manufacturing method ends after the wiring layer Wr is formed in St15. In one embodiment, after the wiring layer Wr is formed in St15, another wafer (not shown) may be further bonded to the wiring layer Wr of the second overlapping wafer T2, and the same process as St3 to St8 may be performed. Furthermore, in this specification, the first overlapping wafer T1 and the second overlapping wafer T2 are sometimes simply referred to together as "overlapping wafers T1 and T2".

[0065] During the separation at St13, bonding forces are generated in the unbonded areas B1 and B2 by filling them with bevels, thus ensuring separation at the bonding interface between the second wafer S and the third wafer U. Therefore, even in processes involving repeated bonding and separation, the recurrence of bevel defects can be suppressed, thereby minimizing the consumption of areas capable of forming devices.

[0066] The first wafer W, after separation in St7, is reused. Figure 1 (St20). Regarding the reuse process of the first wafer W, as an example, in an etching apparatus (not shown), the laser absorption layer P remaining on the first wafer W is etched to remove it. The etching of the laser absorption layer P can be dry etching or wet etching. From this point of view, the laser absorption layer P is configured to be selectively etched relative to the surface Wa of the first wafer W. In one embodiment, when there is a sacrificial layer between the laser absorption layer P and the first wafer W, selective etching between the laser absorption layer P and the sacrificial layer is performed first, followed by selective etching between the sacrificial layer and the surface Wa of the first wafer W.

[0067] Next, the first wafer W, after the laser absorption layer P has been removed, undergoes the same process as St1 to form a separation layer Mw, a first device layer Dw, and a surface film Fw on the surface Wa. In this way, the first wafer W is reused for the next second wafer S. Furthermore, although the laser absorption layer P has been removed, the first wafer W after removal is a bare wafer with no film formed on the surface Wa, and therefore can also be reused as the second wafer S.

[0068] In addition, the third wafer U, separated in St13, is reused ( Figure 1 (St21). The reuse of the third wafer U is the same as the reuse of the first wafer W of St20.

[0069] Below, as one embodiment, the manufacturing method involved will be described. Figure 8 Preparation of the first wafer W as shown ( Figure 1 The case in which at least a portion of a memory cell array of three DNANDs is formed on the device layer Dw of the first wafer W will be described. The device layer Dw includes, as an example, a memory hole H formed by the method described below.

[0070] Specifically, the preparation of the first wafer W involved in this embodiment ( Figure 1 St1) includes Figure 9 and Figure 10 The processes shown are as follows. Figure 10 Figures (a) to (c) are examples illustrating the state of the device layer Dw in the main processes of each process. Furthermore, Figure 1 The preparation of the third U wafer in St9 is the same.

[0071] First, a laser absorption layer P is formed above the surface Wa of the first wafer W. Figure 9 , Figure 10 St101). The laser absorption layer P is the desired oxide film (SiO2 film, TEOS film).

[0072] Next, an etch stop layer Q is formed above the laser absorption layer P. Figure 9 , Figure 10 (St102). The etch stop layer Q is polysilicon.

[0073] Next, an etch stop structure ES is formed on a portion of the etch stop layer Q corresponding to the predetermined position of the memory hole H described later. Figure 9 St103).

[0074] In St103, a recess ES' is first formed in the aforementioned portion of the etch stop layer Q. Figure 10 St103a). Subsequently, a protective pad Pd and an oxide film Ox are formed in the recess ES'. Figure 10 (St103b). The protective pad Pd has the function of stopping the etching process during the formation of the memory hole H described later, so that the area beneath the protective pad Pd, such as the laser absorption layer P, the first wafer W, etc., is not etched. As an example, titanium nitride (TiN), tungsten (W), tungsten silicide (WSi2), etc., are used as materials for the protective pad Pd. However, it is not limited to these, and other known materials can be used from the viewpoint of having the above-mentioned function.

[0075] Furthermore, in one embodiment, the etch stop structure ES is configured to not have a protective pad Pd. In this case, the etch stop layer Q can be configured to not have the etch stop structure ES. Also, in this case, the etch stop layer Q can be formed to a thickness sufficient to prevent etching below the protective pad Pd during the etching process when forming the memory hole H described later.

[0076] Next, an alternating layer AL, consisting of multiple oxide and nitride films stacked alternately, is formed above the etch stop layer Q as the laminated film. Figure 9 , Figure 10 St104).

[0077] Next, at the predetermined location where the memory hole H is to be formed, a deep hole DH is formed by HAR etching in a manner that penetrates alternating layers AL. Figure 9 , Figure 10 (St105). St105 can be performed using known patterning and etching apparatus. The deep hole DH formed during etching stops at the etching stop structure ES, without reaching the laser absorption layer P and the first wafer W. Therefore, subsequent separation within the laser absorption layer P can be appropriately performed. Furthermore, the possibility of reusing the separated first wafer W is increased.

[0078] Next, remove the etch stop construct ES ( Figure 9 , Figure 10 For example, the removal of the etch-stop structure ES is achieved by dry etching (St106).

[0079] Next, memory holes H are formed in the deep hole DH after the etch stop structure ES has been removed. Figure 9 , Figure 10 (St107). For example, various films can be formed on the sidewalls of deep holes DH to form memory holes H.

[0080] After forming the memory hole H, the following is formed Figure 10 The wiring layer Wr and surface film Fw shown in (c) Figure 9(St108 in this embodiment). The wiring layer Wr involved in this embodiment includes a conductive material constituting a signal network or a power supply network. The surface film Fw includes copper pads Cu that are electrically connected to the wiring layer Wr.

[0081] Furthermore, in one embodiment, other deep holes DH are further formed above the deep holes DH formed by St105 and St106 described above, thereby obtaining memory hole H with a higher aspect ratio. Specifically, as... Figure 11 , Figure 12 As shown, after executing St101~St106 above, St110~St113 are executed, followed by St107 and St108.

[0082] After performing St106, firstly, a sacrificial layer SL is formed in the deep hole DH. Figure 11 , Figure 12 St110).

[0083] Next, above the deep borehole DH filled by the sacrificial layer SL, other alternating layers AL of multiple oxide and nitride films are formed in alternating layers. Figure 11 , Figure 12 (St111). Other alternating AL layers are configured to include an etch stop portion EP. The etch stop portion EP has the function of stopping the etching so that the area below the etch stop portion EP is not etched during HAR etching of the other alternating AL layers. The material of the etch stop portion EP is not particularly limited as long as it can ensure the etch selectivity relative to the oxide or nitride film constituting the other alternating AL layers.

[0084] Next, at the predetermined locations where memory holes H are formed, other deep holes DH are formed by HAR etching in a manner that penetrates other alternating layers AL. Figure 11 , Figure 12 St112). St112 is the same as St105 above. Other deep holes DH formed during etching stop at the etching stop EP.

[0085] Next, the etch stop portion EP is removed, and the sacrificial layer SL is also removed. Figure 11 , Figure 12 (St113). For example, the etch stop EP and sacrificial layer SL are removed by dry etching. Through St113, the lower deep hole DH formed in St105 and St106 communicates with other upper deep holes DH, thereby forming a deep hole.

[0086] Next, through St107, various films are formed on the sidewalls of the connected deep hole DH, thereby forming the memory hole H. Additionally, through St108, a wiring layer Wr and a surface film Fw are formed.

[0087] Refer again Figure 8 Preparation of the second wafer S ( Figure 1 In St2, a second wafer S is prepared to have peripheral circuitry for controlling the memory cell array formed in the device layer Ds. The peripheral circuitry in this embodiment includes a CMOS (Complementary Metal-Oxide-Semiconductor) and a wiring layer Wr electrically connected to the CMOS. Additionally, the surface film Fs of the second wafer S includes copper pads Cu electrically connected to the wiring layer Wr. Furthermore, in St2, a second wafer S with the peripheral circuitry already formed can be prepared, or the second wafer S can be prepared by forming the peripheral circuitry in St2.

[0088] After preparing the first wafer W and the second wafer S as described above, the first wafer W and the second wafer S are bonded together to obtain the first overlapping wafer T1. Figure 1 , Figure 8 (S3).

[0089] Next, the bevel filling of the unbonded area B of the first overlapping wafer T1 is performed sequentially. Figure 1 , Figure 8 St4), irradiation of the laser beam L targeting the laser absorption layer P ( Figure 1 , Figure 8 The separation of St5 and the first wafer W ( Figure 1 , Figure 8 St6).

[0090] Next, the separation surface of the first overlapping wafer T1 after the first wafer W has been separated is subjected to surface treatment. Figure 1 , Figure 8 (St7). In the surface treatment involved in this embodiment, the laser absorption layer P remaining on the separation surface of the first overlapping wafer T1 after the separation of the first wafer W is removed. Next, the etch stop layer Q is removed. The removal of the laser absorption layer P can, for example, include selective etching of the laser absorption layer P relative to the etch stop layer Q. In addition, the removal of the etch stop layer Q can include selective etching of the etch stop layer Q relative to the device layer Dw of the first wafer W. According to the surface treatment including selective etching of the etch stop layer Q, the thickness variation (TTV: Total Thickness Variation) of the first overlapping wafer T1 after surface treatment can be improved.

[0091] In this embodiment, at least a portion of the memory via H included in the device layer Dw is exposed on the separation surface of the first overlapping wafer T1 after surface treatment. Subsequently, a wiring layer Wr is formed that is electrically connected to the exposed memory via H. Figure 1 , Figure 8(St8). In one embodiment, after surface treatment, a portion of the memory aperture H, including a polysilicon film doped with impurities and imparted with conductivity, is exposed. In this case, a wiring layer Wr can be formed in St8 to electrically connect to the polysilicon film.

[0092] Subsequently, when bonding the first overlapping wafer T1 to the third wafer U, a bonding surface film Ft can also be formed. Then, a second overlapping wafer T2 can be formed by bonding with the third wafer U (St9 to St15). In this case, the third wafer U can also be configured as at least a portion of a memory cell array including 3DNANDs, similar to the first wafer W.

[0093] The slope filling according to the first embodiment will now be described. The slope filling according to the first embodiment is for the overlapping wafer T, and can be performed as a slope filling for the first overlapping wafer T1 in St4 or the second overlapping wafer T2 in St11 according to the above embodiment. Furthermore, in the following... Figures 16-19 For ease of explanation, the illustrations of the etch stop layer Q, device layer Dw, and device layer Ds of the first wafer W and the second wafer S described in the above embodiments are omitted.

[0094] In the slope filling involved in the first embodiment, such as Figure 16 As shown, the filler material G is filled to a second outer peripheral position E2, which is predetermined to be radially inward from the first outer peripheral position E1 of the surface film Fw of the first wafer W, which is the first bonding layer of the overlapping wafer T. Furthermore, the first outer peripheral position E1 of the surface film Fw is the outermost position in the radial direction when observing the cross-section of the overlapping wafer T. Similarly, the second outer peripheral position E2 of the filler material G is the outermost position in the radial direction when observing the cross-section of the overlapping wafer T. This is also the case in the second and third embodiments described below.

[0095] In one embodiment, for example, the process of filling the filler material G up to the second outer peripheral position E2 can be performed by adjusting the supply speed of the filler material G from the injector 9 and the rotation speed of the superimposed wafer T while injecting liquid filler material G from the injector 9 and rotating the superimposed wafer T. In another embodiment, the process of filling the filler material G up to the second outer peripheral position E2 can be performed by removing the filler material G up to the second outer peripheral position E2 after injecting the filler material G to the radially outer side of the second outer peripheral position E2 of the superimposed wafer T.

[0096] In one embodiment, a third peripheral position E3, which is the outermost radial position of the contact interface between the surface film Fw and the filling material G, can be determined using a first distance D1 and a second distance D2 when observing the cross-section of the overlapping wafer T, as follows: The first distance D1 is the distance between the interface where the bonding strength is reduced by irradiating the laser absorption layer P, i.e., the separation surface Sf, and the bonding interface Bf between the first wafer W and the second wafer S. The second distance D2 is the distance between the separation surface Sf and the third peripheral position E3. The third peripheral position E3 is then determined such that D1-D2>Th holds with respect to a predetermined threshold Th. Furthermore, in this embodiment... Figure 17 In the example shown, the separation layer Sf is the interface between the laser absorption layer P and the first wafer W. However, in other cases, the separation layer Sf may also be, for example, an inner surface of the laser absorption layer P, or the interface between the laser absorption layer P and the etch stop layer Q described in the above embodiment.

[0097] In one implementation, the third peripheral position E3 can also be determined by the first distance D1 and the second distance D2 becoming D1 / D2 > Th2 with respect to a predetermined threshold Th2.

[0098] In the inclined plane filling according to the first embodiment, by filling the filler material G up to the second outer peripheral position E2, which is predetermined to be located radially inward from the first outer peripheral position E1, it is possible to suppress the use of Figure 25 The inappropriate separation described above.

[0099] The rationale for suppressing inappropriate separation through the slope filling described in the first embodiment is not yet clear, but examples of its effect can be envisioned, such as... Figure 18 As shown, it can be assumed that when an upward force Fup is applied to the outer periphery We of the first wafer W, the stress σ1 concentrated near the outermost position of the interface Bf between the first wafer W and the second wafer S, and the stress σ2 concentrated near the third outer periphery position E3, come into play. At this time, the contribution of stress σ2 to separation is greater than that of stress σ1, so it can be assumed that a crack Cr is generated with the vicinity of the third outer periphery position E3 as the base point.

[0100] In addition, such as Figure 19 As shown, when the laser absorption layer P extends into the unbonded region B, an upward force Fup may be applied to the outer periphery We of the first wafer W, but the crack Cr with the third outer periphery position E3 as the base point may not form. This can be attributed to the fact that separation occurs preferentially in the separation layer Sf because it extends into the unbonded region B.

[0101] Furthermore, by determining the third peripheral position E3 in a manner where D1-D2>Th holds, the aforementioned inappropriate separation can be further suppressed. The rationale is not yet clear, but an example of its effect can be envisioned. Regarding... Figure 18 The crack Cr shown can be considered to result in more appropriate separation when the crack Cr progresses towards the separation surface Sf. Therefore, it can be considered that by determining the third peripheral position E3 as described above, the distance between the third peripheral position E3 and the separation surface Sf can be shortened, thereby making it easier for the crack Cr to progress towards the separation surface Sf.

[0102] The inventors of this invention conducted in-depth research and discovered that the aforementioned inappropriate separation is particularly prone to occur in first wafers W with stacked films having a large first distance D1. Here, regarding stacked films with a large first distance D1, it can be considered that, for example, as in the first wafer W according to the above embodiment, the overall thickness of the stacked film increases due to the repeated processing of the device layer Dw. Especially when the device layer Dw includes a memory cell array of NAND flash memory, the stacked film including this device layer Dw becomes significantly thicker.

[0103] According to the slope filling involved in the first embodiment, even for the separation of the overlapping wafer T, which includes a first wafer W with a large first distance D1, the aforementioned inappropriate separation can be suppressed.

[0104] The slope filling and separation according to the second embodiment will now be described. The slope filling and separation according to the second embodiment is performed on the overlapping wafer T, and can be performed on the first overlapping wafer T1 in St4 and St6 according to the above embodiment, or on the second overlapping wafer T2 in St11 and St13. Furthermore, in the following... Figures 20-23 For ease of explanation, the illustrations of the etch stop layer Q, device layer Dw, and device layer Ds of the first wafer W and the second wafer S described in the above embodiments are omitted.

[0105] In the slope filling involved in the second embodiment, such as Figure 20 As shown, the filling material G is filled to a second outer peripheral position E2, which is predetermined to be located radially outward from the first outer peripheral position E1, corresponding to the first outer peripheral position E1 of the surface film Fw of the first wafer W, which is the first bonding layer of the overlapping wafer T.

[0106] Next, separation base points A are formed on the filling material G of the overlapping wafer T after it has been bevel-filled. For example, the blade 220 of the separation apparatus 60 described later can be used to form separation base points A. In forming separation base points A, firstly, as... Figure 21As shown, a blade 220 is inserted into the circumference of the filling material G. Then, when the blade 220 is moved along... Figure 21 As the straight arrow advances further, a separation point A, which has lost the strength of the filling material G, is formed near the insertion position. Furthermore, the overlapping wafer T is rotated with the blade 220 inserted. Thus, as... Figure 22 As shown, the separation base point A is formed around the entire circumference of the superimposed wafer T when viewed from above. Alternatively, the separation base point A can also be formed around the entire circumference of the superimposed wafer T by rotating the blade 220 around the superimposed wafer T.

[0107] After the separation base point A is formed, the first wafer W or the third wafer U is separated from the second wafer S, similar to the description of St6 and St13 in the above embodiments.

[0108] Furthermore, the blade 220 is configured to be movable such that it can be inserted at least once on the circumference of the filling material G. The blade 220 constitutes the base point forming part in this disclosure.

[0109] In one embodiment, the base point forming unit of this disclosure includes a moving mechanism 221 that holds the blade 220 in a manner capable of moving at least in the horizontal direction. Additionally, the base point forming unit includes a sensor 222 that detects the horizontal position or pressure of the blade 220 relative to the filler material G in contact with the blade 220. The horizontal position or pressure of the blade 220 detected by the sensor 222 is output to a control device 61. Furthermore, the control device 61 controls the moving mechanism 221 based on the horizontal position or pressure of the blade 220, thereby adjusting the horizontal position of the blade 220 to form a separation base point A in the filler material G at a desired radial depth. In one embodiment, when the separation base point A is formed around the entire circumference of the filler material G, the control device 61 adjusts the horizontal position of the blade 220 by controlling the moving mechanism 221 to ensure uniform radial depth of the separation base point A over the entire circumference.

[0110] In one embodiment, after forming the separation base point A around the entire perimeter of the interface between the first wafer W and the second wafer S, the separation base point A may be further formed at a location on the interface. In this case, after forming the separation base point A around the entire perimeter, the blade 150 is further inserted towards the center at a location on the interface to form the stripping base point A.

[0111] In one embodiment, the base point forming section of this disclosure may also include an ultrasonic oscillator (not shown) that imparts ultrasonic vibrations to the blade 220.

[0112] Furthermore, the base point forming unit is not limited to the embodiment described above with blade 220; a desired structure capable of forming separation base points A on the circumference of the filler material G can be adopted. For example, the separation device 60 may also include an air knife (not shown) as the base point forming unit. The air knife supplies air to the interface between the first wafer W and the second wafer S to form the separation base point A. To facilitate the formation of the separation base point A, pressurized high-pressure air or heated high-temperature air can be used. Alternatively, a water jet supplying water to the interface between the first wafer W and the second wafer S can be used instead of an air knife. The water supplied from the water jet can be pressurized high-pressure water or heated high-temperature water.

[0113] Alternatively, the separation device 60 may also include a rotating blade (not shown) as a base point forming unit. The rotating blade has a structure that uses a motor (not shown) to rotate the blade. In this case, the rotating blade is inserted into the interface between the first wafer W and the second wafer S while rotating the rotating blade to form the separation base point A.

[0114] Alternatively, the separation device 60 may also include a heating section (not shown) as a base point forming section. The heating section heats the interface between the first wafer W and the second wafer S to expand the first wafer W and the second wafer S, thereby applying thermal stress to the interface to form the separation base point A.

[0115] Moreover, for example, Figure 21 As shown, in the separation device 60, a suction mechanism 230 may also be provided below the base point forming section such as the blade 220. The suction mechanism 230 is connected to a suction source (not shown) and suctions the atmosphere near the separation base point A. When the blade 220 is inserted into the filling material G to form the separation base point A, particles may sometimes be generated due to cutting. The suction mechanism 230 can suction these particles to remove them, thereby keeping the interior of the separation device 60 clean. In addition, a downflow may be formed inside the separation device 60 during separation. In this case, by arranging the suction mechanism 230 below the blade 220, particles can be suctioned more efficiently.

[0116] In the inclined plane filling and separation according to the second embodiment, the filling material G is filled up to a second outer peripheral position E2, which is predetermined to be located radially outward from the first outer peripheral position E1, and a separation base point A is formed around the entire circumference of the filling material G, thereby suppressing the use of Figure 25 The inappropriate separation described above.

[0117] The rationale for suppressing inappropriate separation using the beveled filling method described in the second embodiment is not yet clear, but the following possible effects can be envisioned. Firstly, the inventors of this invention conducted in-depth research and learned that, particularly when the filler material G is filled up to a second outer peripheral position E2 radially outward from the first outer peripheral position E1, cracks Cr may occur at random locations on the contact interface between the filler material G and the surface film Fw at various positions on the circumference of the overlapping wafer T during separation. These randomly located cracks Cr may cause the aforementioned inappropriate separation. In contrast, in the separation described in the second embodiment, such as... Figure 23 As shown, it can be considered that when an upward force Fup is applied to the outer periphery We of the first wafer W, the stress tends to concentrate in the region near the portion where the separation base point A is formed at the interface between the filler material G and the surface film Fw, and cracks Cr are generated with this region as the base point. Furthermore, it is believed that by forming separation base points A throughout the entire periphery of the filler material G, the cracks Cr progress uniformly throughout the entire periphery, resulting in appropriate separation.

[0118] The following describes the slope filling and laser beam L irradiation according to the third embodiment. The slope filling and laser beam L irradiation according to the third embodiment are for the slope filling and laser beam L irradiation of the overlapping wafer T, and can be performed as slope filling and laser beam L irradiation for the first overlapping wafer T1 in St4 and St5 or the second overlapping wafer T2 in St11 and St12 according to the above embodiments. Furthermore, in the following... Figure 19 For ease of explanation, the illustrations of the etch stop layer Q, device layer Dw, and device layer Ds of the first wafer W and the second wafer S described in the above embodiments are omitted.

[0119] In the slope filling described in the third embodiment, the same as that described in the second embodiment is applied, such as... Figure 20 As shown, the filling material G is filled to a second outer peripheral position E2, which is predetermined to be located radially outward from the first outer peripheral position E1, corresponding to the first outer peripheral position E1 of the surface film Fw of the first wafer W, which is the first bonding layer of the overlapping wafer T.

[0120] Next, separation points A are formed on the filling material G of the overlapping wafer T after it has been bevel-filled. For example... Figure 24 As shown, separation point A is formed by irradiating the filler material G with a laser beam. The irradiation with the laser beam is the same as the irradiation of the laser beam L for the laser absorption layer P described in St5 of the above embodiment. By irradiating the filler material G with the laser beam L, separation point A, which has lost the strength of the filler material G, is formed. Separation point A can also be formed in the separation process described in the second embodiment. Figure 22The situation shown also occurs around the entire perimeter of the filling material G.

[0121] According to the inclined plane filling and laser irradiation involved in the third embodiment, the same effects and results are obtained as those described in the inclined plane filling and separation involved in the second embodiment. That is, it is considered to be the same as... Figure 23 Similarly, when an upward force Fup is applied to the outer periphery We of the first wafer W, stress tends to concentrate in the region near the portion where separation base point A is formed at the interface between the filler material G and the surface film Fw, and cracks Cr are generated around this region. Furthermore, it can be considered that by forming separation base points A throughout the entire circumference of the filler material G, the cracks Cr progress uniformly throughout the entire circumference, thereby achieving proper separation. Therefore, it is possible to suppress the use of... Figure 25 The inappropriate separation described above.

[0122] Hereinafter, a wafer processing system 1 will be described as an example of a substrate processing system capable of performing the bonding and separation of the first substrate and the second substrate in the wafer processing method described above.

[0123] like Figure 13 As shown, the wafer processing system 1 has a structure that connects the loading / unloading station 2 and the processing station 3 into one unit. The loading / unloading station 2 is a container C capable of accommodating multiple overlapping wafers T1 and T2 for loading and unloading from external sources. The processing station 3 is equipped with various processing devices for performing desired processing on the overlapping wafers T1 and T2.

[0124] The loading / unloading station 2 is equipped with a cassette stage 10 for holding cassettes C capable of accommodating multiple overlapping wafers T1 and T2. Furthermore, a wafer transport device 20 is disposed adjacent to the cassette stage 10 on the positive X-axis side. The wafer transport device 20 is configured to move along a transport path 21 extending along the Y-axis, transporting overlapping wafers T1 and T2 between the cassettes C of the cassette stage 10 and the transport stage 30 (described later).

[0125] At the inbound / outbound station 2, a transfer station 30 is provided adjacent to the wafer transfer device 20 on the positive X-axis direction side for transferring overlapping wafers T1 and T2 between the wafer transfer device 20 and the processing station 3.

[0126] Processing station 3 is equipped with a wafer transport device 40, a laser processing device 50, a separation device 60, a slope filling device 70, a baking device 80, and a cleaning device 90.

[0127] The wafer transport device 40 is located on the positive X-axis side of the transport table 30. The wafer transport device 40 is configured to move freely on the transport path 41 extending along the X-axis direction, and is configured to transport overlapping wafers T1 and T2 to the transport table 30, laser processing device 50, separation device 60, inclined filling device 70, baking device 80 and cleaning device 90 of the transport station 2.

[0128] The laser processing apparatus 50 irradiates a laser beam L1 onto the laser absorption layer P at the interface between the first wafer W and the second wafer S to form a region with reduced bonding strength where the first wafer W and the second wafer S are separated. The laser processing apparatus 50 includes a control device 51, which will be described later.

[0129] like Figure 14 and Figure 15 As shown, the laser processing apparatus 50 has a holding disk 100 that holds overlapping wafers T1 and T2 via its upper surface. The holding disk 100 holds the back surface Sb of the second wafer S with the first wafer W positioned on the upper side and the second wafer S positioned on the lower side. The holding disk 100 is supported on a sliding stage 102 by an air bearing 101. A rotation mechanism 103 is provided on the lower surface of the sliding stage 102. The rotation mechanism 103 incorporates, for example, a motor as a drive source. The holding disk 100 is configured to rotate freely about a vertical axis via the air bearing 101 through the rotation mechanism 103. The sliding stage 102 is configured to move freely on a guide rail 106 extending along the Y-axis direction on a base 105 via a moving mechanism 104 provided on its lower surface. Furthermore, the drive source for the moving mechanism 104 is not particularly limited; for example, a linear motor can be used.

[0130] A laser head 110 is disposed above the holding disk 100. The laser head 110 has a lens 111. The lens 111 irradiates a laser beam L1 onto the laser absorption layer P of the overlapping wafers T1 and T2 held in the holding disk 100. As a result, the first wafer W is separated from the stacked film in the portion irradiated by the laser beam L1, forming a bonding strength reduction region where the first wafer W and the second wafer S are separated. Furthermore, there is no particular limitation on the formation location of the bonding strength reduction region, as long as separation can occur at the interface between the first wafer W and the second wafer S to reduce the bonding strength. That is, the separation of the first wafer W and the second wafer S can occur at the interface between the first wafer W and the stacked film as shown in the figure, or it can occur at the interface between the stacked films, or at the interface between the second wafer S and the stacked film.

[0131] The laser head 110 is supported on the support member 112. The laser head 110 is configured to move freely up and down along the guide rail 113 extending in the vertical direction via the lifting mechanism 114. In addition, the laser head 110 is configured to move freely in the Y-axis direction via the moving mechanism 115. Furthermore, the lifting mechanism 114 and the moving mechanism 115 are respectively supported on the support column 116.

[0132] Furthermore, in the illustrated example, the configuration allows the holding disk 100 to rotate relative to the laser head 110 and move horizontally via the rotating mechanism 103 and the moving mechanism 104. However, it can also be configured so that the laser head 110 can rotate relative to the holding disk 100 and move horizontally. Alternatively, it can be configured so that both the holding disk 100 and the laser head 110 can rotate relative to each other and move horizontally.

[0133] Separation device 60 is equipped with Figure 7 The adsorption holding disk 210 and adsorption disk 211 are shown in (a). Moreover, the first wafer W is separated from the second wafer S by the method described above, with the bonding force reduction region as the reference point. In one embodiment, the separation device 60 includes the blade 220, the moving mechanism 221, and the sensor 222 described above.

[0134] The inclined plane filling device 70 is equipped with Figure 4 or Figure 5 The injector 9 shown is configured to inject filler material G into the beveled portions of the overlapping wafers T1 and T2. As an example, the bevel filling device 70 includes a retaining disk (not shown) similar to the retaining disk 100. The overlapping wafers T1 and T2 are held on this retaining disk, and while rotating the overlapping wafers T1 and T2, filler material G is injected from the injector 9 into the beveled portions. Thus, filler material G can be injected into the entire circumference of the beveled portions of the overlapping wafers T1 and T2. In one embodiment, the bevel filling device 70 is controlled to inject filler material G only into the non-adhered areas of the beveled portions of the overlapping wafers T1 and T2.

[0135] The baking apparatus 80 is configured to bake (solidify) the filler material G in the overlapping wafers T1 and T2 whose beveled surfaces have been injected with the filler material G.

[0136] The cleaning device 90 performs a cleaning process on the first wafer W and the second wafer S after the filler material G has been injected by the inclined filling device 70 or after the filler material G has been sintered by the baking device 80, in order to remove particles on these wafers and filler material G adhering to unnecessary parts. The cleaning method can be arbitrarily selected.

[0137] In one embodiment, the wafer processing system 1 is divided into multiple systems, including: a wafer processing system comprising a laser processing device 50 and a separation device 60; and another wafer processing system comprising a bevel filling device 70 and a baking device 80. The desired processing of each wafer is performed by transferring wafers W, S, U, overlapping wafers T1, T2, etc., between these multiple systems.

[0138] The wafer processing system 1 described above is equipped with a control device 51, a control device 61, and at least one control device 95. Control device 51 independently controls the operation of the laser processing device 50. Control device 61 independently controls the operation of the separation device 60. Control device 95 uniformly controls a series of wafer processing operations within the wafer processing system 1.

[0139] Control devices 51, 61, and 95 respectively process computer-executable instructions for executing the various processes described herein on the laser processing apparatus 50, the separation apparatus 60, and the wafer processing system 1. Control devices 51, 61, and 95 can be configured to control elements of the laser processing apparatus 50, the separation apparatus 60, and the wafer processing system 1 to execute the various processes described herein. In one embodiment, part or all of control device 51 may be included in the laser processing apparatus 50, part or all of control device 61 may be included in the separation apparatus 60, and part or all of control device 95 may be included in the wafer processing system 1.

[0140] Control devices 51, 61, and 95 may each include a processing unit, a storage unit, and a communication interface. Control devices 51, 61, and 95 may be implemented, for example, by a computer. The processing unit can be configured to perform various control actions by reading a program from the storage unit that provides logic or routines capable of performing various control actions and executing the read program. The program may be pre-stored in the storage unit or retrieved via a medium when needed. The retrieved program is stored in the storage unit and read and executed by the processing unit. The medium may be various storage media readable by a computer or a communication line connected to the communication interface. The storage medium may be transient or non-transient. The processing unit may be a CPU (Central Processing Unit) or one or more circuits. The storage unit may include RAM (Random Access Memory), ROM (Read-Only Memory), HDD (Hard Disk Drive), SSD (Solid State Drive), or combinations thereof. The communication interface can also communicate with the laser processing device 50 and the wafer processing system 1 via communication lines such as LAN (Local Area Network).

[0141] Furthermore, in this embodiment, a control device 51 is provided separately for the laser processing apparatus 50, but the control device 51 may also be integrally formed with the control device 95. Similarly, a control device 61 is provided separately for the separation device 60, but the control device 61 may also be integrally formed with the control device 95. In other words, the operation of both the laser processing apparatus 50 and the separation device 60 can be controlled by the control device 95.

[0142] The embodiments disclosed herein should be considered illustrative in all respects and not restrictive. The above embodiments can also be omitted, substituted, or modified in various ways without departing from the appended claims and their spirit. For example, the constituent elements of the above embodiments can be arbitrarily combined. Based on such arbitrary combinations, the effects and functions of each constituent element involved in the combination can be obtained, and other effects and functions that are clearly known to those skilled in the art based on the description herein can also be obtained.

[0143] Furthermore, the effects described in this specification are merely illustrative or exemplary, and not limiting. In other words, the technology disclosed herein can supplement or replace the aforementioned effects with other effects that are readily apparent to those skilled in the art based on the description in this specification.

[0144] Explanation of reference numerals in the attached figures

[0145] B: Unbonded area; P: Laser absorption layer; S: Second wafer; T: Overlapping wafer; W: First wafer.

Claims

1. A method for manufacturing a semiconductor device, comprising the following processes: For the unattached area of ​​the overlapping substrate obtained by bonding the first bonding layer and the second bonding layer in a first substrate having a laser absorption layer and a first bonding layer and a second substrate having a second bonding layer, a slope filling is performed, in which the filler material is filled up to a second outer periphery position determined in advance corresponding to the first outer periphery position of the first bonding layer. Irradiate the laser absorption layer with laser light; and The first substrate in the overlapping substrate is separated from the second substrate.

2. The method for manufacturing a semiconductor device according to claim 1, wherein, The second outer peripheral position is radially inward compared to the first outer peripheral position.

3. The method for manufacturing a semiconductor device according to claim 2, wherein, When the distance between the separation surface of the first substrate and the second substrate formed by irradiating the laser and the bonding interface of the first bonding layer and the second bonding layer is set as the first distance, and the distance between the separation surface and the outermost position in the radial direction of the contact interface between the first bonding layer and the filling material, i.e. the third peripheral position, is set as the second distance, the third peripheral position is predetermined in such a way that the difference between the first distance and the second distance is greater than a predetermined threshold.

4. The method for manufacturing a semiconductor device according to claim 1, wherein, The second outer periphery position is radially outward compared to the first outer periphery position. Before separating the first substrate from the second substrate, the following process is included: forming separation base points around the circumference of the filling material in a top view.

5. The method for manufacturing a semiconductor device according to claim 4, wherein, The process of separating the first substrate from the second substrate includes the following step: forming the separation base point using a base point forming part.

6. The method for manufacturing a semiconductor device according to claim 5, wherein, The base point forming part includes a blade. The method for manufacturing the semiconductor device includes the following processes: With the blade inserted into the filler material, the blade is rotated relative to the overlapping substrate, thereby forming the separation point.

7. The method for manufacturing a semiconductor device according to claim 4, wherein, This includes the following processing: The laser absorption layer is irradiated with a laser beam, and the separation base points are formed by irradiating the filling material with the laser beam.

8. The method for manufacturing a semiconductor device according to claim 1, wherein, Includes the following processing: An etching stop layer is formed on the laser absorption layer; as well as A device layer is formed on the etch stop layer.

9. The method for manufacturing a semiconductor device according to claim 8, wherein, It also includes the following processing: A wiring layer is formed on the first substrate; and A surface film for bonding is formed on the first substrate.

10. The method of manufacturing a semiconductor device according to claim 8, wherein, After separating the first substrate from the second substrate, the following process is further included: performing surface treatment on the separation surface of the second substrate after the device layer has been transferred. The etch stop layer is made of a material capable of selective etching between itself and the separation surface. The surface treatment includes removing the etch stop layer by selectively etching between the etch stop layer and the separation surface.

11. The method of manufacturing a semiconductor device according to claim 10, wherein, Performing the surface treatment includes exposing at least a portion of the device layer from the separation surface.

12. The method of manufacturing a semiconductor device according to claim 8, wherein, Forming the device layer includes: A laminated film is formed on the etch stop layer; and Deep holes are formed by etching the laminated film. Forming the etch stop layer includes: forming an etch stop structure on a portion of the etch stop layer corresponding to the location in the device layer where the deep via is pre-determined to be formed. The etching stop structure is configured to stop the etching that forms the deep hole at the etching stop structure.

13. The method for manufacturing a semiconductor device according to claim 12, wherein, The etching stop structure includes a protective pad made of one or more materials selected from titanium nitride, tungsten, and tungsten silicide.

14. The method for manufacturing a semiconductor device according to claim 1, wherein, After separating the first substrate from the overlapping substrate, the following process is further included: removing the filler material that has been filled into the unattached area by the slope filling.

15. The method of manufacturing a semiconductor device according to claim 14, wherein, After separating the first substrate from the overlapping substrate, the following process is further included: performing surface treatment on the separation surface of the overlapping substrate after the first substrate has been separated. After removing the filler material and before surface treatment of the separation surface, the following process is also included: re-filling the unbonded area of ​​the overlapping substrate with the bevel.

16. The method of manufacturing a semiconductor device according to claim 8, wherein, The device layer includes at least a portion of a memory cell array.

17. The method of manufacturing a semiconductor device according to claim 16, wherein, The second substrate includes other device layers. The other device layers include at least a portion of the peripheral circuitry used to control the memory cell array.

18. The method for manufacturing a semiconductor device according to claim 1, wherein, It also includes the following processing: A second overlapping substrate is formed by bonding a third substrate having a laser absorption layer to the overlapping substrate. The unbonded areas of the second overlapping substrate are filled with a bevel. Irradiate the laser absorption layer of the third substrate with laser light; and The third substrate in the second overlapping substrate is separated from the second substrate.

19. A semiconductor device manufacturing system comprising: A laser irradiation apparatus irradiates a laser onto the laser absorption layer of an overlapping substrate obtained by bonding the first bonding layer and the second bonding layer of a first substrate having the laser absorption layer and a first bonding layer, and a second substrate having a second bonding layer. The overlapping substrate is a substrate in which the unbonded areas are filled with a filler material up to a second peripheral position predetermined corresponding to a first peripheral position of the first bonding layer; and A separation device that separates the first substrate from the second substrate in the overlapping substrates.

20. The semiconductor device manufacturing system according to claim 19, wherein, A slope filling device is provided for filling the unattached area of ​​the overlapping substrate with the slope.

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