Back contact solar cell and photovoltaic module

Abstract

The invention relates to the field of photovoltaic technology, in particular to a back contact solar cell and a photovoltaic module. The back contact solar cell comprises a substrate, first areas and second areas which are alternately arranged at intervals in the X direction are formed on the backlight face of the substrate, gaps between the adjacent first areas and second areas form third areas, a first doping layer is formed in each first area, a second doping layer is formed in each second area, and a second doping layer is formed in each second area. A third doping layer is formed in each third region; the doping concentration of the third doping layer is greater than the doping concentration of the first doping layer and the doping concentration of the second doping layer; the third doped layer is electrically connected with the adjacent first doped layer and the adjacent second doped layer. Compared with the prior art, the arrangement of the third doping layer is beneficial to generating leakage current under relatively low reverse bias voltage, so that the hot spot temperature of the assembly is remarkably reduced, the reliability of a single battery and the assembly is improved, and the phenomenon of abnormal concentration of reverse leakage current can be avoided.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, and in particular to a back-contact solar cell and photovoltaic module. Background Technology

[0002] Back-contact solar cells refer to cells where both the positive and negative metal electrodes are located on the back side, with no metal electrodes obstructing the front. Compared to double-contact cells, back-contact cells have higher short-circuit current and photoelectric conversion efficiency, and are one of the current technological directions for achieving high-efficiency crystalline silicon solar cells.

[0003] From the perspective of photoelectric conversion performance, the two adjacent doped semiconductor layers of a back-contact solar cell need to be separated due to their different polarities. This is typically achieved through trenches or film layers to suppress forward leakage and ensure high photoelectric conversion efficiency in the forward voltage region. However, from the perspective of cell reliability, the high resistance between the two adjacent doped semiconductor layers in a back-contact solar cell results in a higher reverse breakdown voltage, leading to a higher risk of hot spots.

[0004] Hot spot reliability issues in solar cells pose a significant safety hazard to the components. Existing back-contact solar cells typically electrically connect multiple uniformly distributed local locations between two adjacent doped semiconductor layers to form multiple uniformly distributed leakage channels, thereby reducing reverse breakdown voltage and mitigating the risk of hot spots to some extent.

[0005] However, the aforementioned back-contact solar cells all have the following problems: if there are too many leakage channels, it will increase carrier recombination and lead to a loss of photoelectric conversion efficiency; if there are too few leakage channels, it will easily lead to excessive concentration of reverse leakage, and there is still a risk of hot spots. Summary of the Invention

[0006] The purpose of this invention is to provide a back-contact solar cell and a photovoltaic module having the back-contact solar cell, so as to improve the hot spot risk of batteries in the prior art.

[0007] To achieve the above objectives, the present invention adopts the following technical solution: A back-contact solar cell includes a substrate, wherein a first region and a second region are formed on the back surface of the substrate, which are alternately spaced along the X direction; a third region is formed between adjacent first regions and second regions; a first doped layer is formed in each first region; a second doped layer is formed in each second region; and a third doped layer is formed in each third region. One of the first doped layer and the second doped layer is P-type doped and the other is N-type doped. The third doped layer is either P-type doped or N-type doped, and the doping concentration of the third doped layer is greater than the doping concentration of the first doped layer and the doping concentration of the second doped layer, respectively. The third doped layer is electrically connected to the adjacent first doped layer and the adjacent second doped layer, respectively.

[0008] Compared with the prior art, the advantages of the back contact solar cell provided in this application are: (1) The setting of the third doped layer is conducive to generating leakage current under a lower reverse bias voltage, thereby significantly reducing the hot spot temperature of the module and improving the reliability of individual cells and modules; (2) The concentration gradient between the third doped layer and the first and second doped layers will generate a diffusion barrier, thereby suppressing the translocation of charge carriers from the first and second doped layers to the third doped layer and ensuring the photoelectric conversion efficiency of the cell; (3) The third doped layer forms a large area reverse leakage channel between the first and second doped layers, thereby mitigating the hot spot risk caused by the concentration of reverse leakage current.

[0009] In some embodiments, the ratio of the doping concentration of the third doped layer to the doping concentration of the first doped layer is 10:1 to 200:1; and / or, The ratio of the doping concentration of the third doped layer to the doping concentration of the second doped layer is between 10:1 and 200:1; and / or, The peak doping concentration of the first doped layer is 1e18~5e19cm⁻³; and / or, The peak doping concentration of the second doped layer is 0.5e18~3e19cm⁻³; and / or, The peak doping concentration of the third doped layer is 1e19~1e21cm-3.

[0010] A higher doping concentration ratio between the third doped layer and the first and second doped layers makes it less likely for charge carriers in the first and second doped layers to migrate laterally to the third doped layer. However, a higher doping concentration in the third doped layer increases the fabrication difficulty. Therefore, setting the doping concentration ratio between the third doped layer and the first and second doped layers between 10:1 and 200:1 effectively suppresses carrier migration in the first and second doped layers, facilitating carrier collection by the metal electrode, while avoiding the problem of excessive fabrication difficulty for the third doped layer. The concentrations of the first, second, and third doped layers can be selected within the above range, and appropriate values ​​can be chosen based on the concentration ratio.

[0011] In some embodiments, the area ratio of a single third region to the area of ​​the backlight surface ranges from 0.1% to 2%; and / or, The thickness of the third doped layer is greater than the thickness of the first doped layer and the thickness of the second doped layer, respectively.

[0012] The width and area ratio of the third region are significantly lower than those of the isolation region in existing technologies. This design reduces surface recombination losses and facilitates higher open-circuit voltage and photoelectric conversion efficiency. Furthermore, because a third doped layer capable of suppressing carrier translocation is incorporated within the third region, the reduction in the width of the third region does not introduce carrier translocation issues. The thickness of the third doped layer is greater than that of the first and second doped layers, which helps reduce reverse breakdown voltage.

[0013] In some embodiments, the thickness of the third doped layer is 0.1~2 μm; and / or, The thickness of the first doped layer is 0.1~0.3 μm; and / or, The thickness of the second doped layer is 0.05~0.25 μm; and / or, The width of the third doped layer is 0.5~20um.

[0014] The size parameters of the first, second, and third doped layers can be selected within the above range.

[0015] In some embodiments, the third doped layer has a first side surface and a second side surface along its width direction, the first side surface being at least partially attached to the first doped layer, and the second side surface being at least partially attached to the second doped layer; or... A third doped semiconductor layer is formed in each of the third regions. The third doped semiconductor layer is stacked on the corresponding third doped layer. The third doped semiconductor layer includes a plurality of first contact bumps and a plurality of second contact bumps. The plurality of first contact bumps are attached to the adjacent first doped layer, and the plurality of second contact bumps are attached to the adjacent second doped layer.

[0016] In other words, the third doped layer can achieve electrical connection with the first and second doped layers by directly contacting them, or it can achieve electrical connection with the first and second doped layers through the third doped semiconductor layer.

[0017] In some embodiments, the third doped layer is divided into a first contact portion, a second contact portion, and a spacer portion along its length direction. The first contact portion and the second contact portion are alternately distributed. Each adjacent first contact portion and the second contact portion are connected by the spacer portion. Each first contact portion is attached to an adjacent first doped layer, each second contact portion is attached to an adjacent second doped layer, and each spacer portion forms a gap with an adjacent first doped layer and an adjacent second doped layer, respectively.

[0018] In the above embodiments, the third doped layer achieves electrical connection with the first and second doped layers through local contact. By forming local contact between the third doped layer and the first and second doped layers, the first and second doped layers are locally electrically isolated. This avoids the problem of carrier recombination caused by the concentration gradient and PN junction failing to suppress carrier transverse movement due to the close proximity of the first and second doped layers, thereby further reducing carrier recombination and improving photoelectric conversion efficiency.

[0019] In some embodiments, the backlight surface has a third doped semiconductor layer disposed on each of the third regions, the third doped semiconductor layers being stacked on the corresponding third doped layer, and the third doped semiconductor layer including a plurality of first contact bumps and a plurality of second contact bumps, wherein: The plurality of first contact protrusions are arranged at intervals along the Y direction and are attached to the adjacent first doped layer; The plurality of second contact protrusions are arranged at intervals along the Y direction and are attached to the adjacent second doped layer; The plurality of first contact bumps and the plurality of second contact bumps are alternately distributed on the corresponding third doped layer; Wherein, the Y direction is the extension direction of each doped layer, and the Y direction is perpendicular to the X direction.

[0020] The above embodiments achieve local electrical connection between the third doped layer and the first and second doped layers by setting contact protrusions.

[0021] In some embodiments, the doping concentration of the third doped layer varies gradient along the width direction of the third doped layer; or, Along the width direction of the third doped layer, the doping concentration of the third doped layer increases from both sides toward the center.

[0022] In the above embodiments, the third doped layer is formed by non-uniform doping, which is beneficial for rapid leakage current and thus quickly eliminates hot spots.

[0023] In some embodiments, the third doped layer has the same doping type as the first doped layer, the adjacent sides of the third doped layer and the first doped layer are bonded together, and there is an electrical gap between the adjacent sides of the third doped layer and the second doped layer; or, The third doped layer has the same doping type as the second doped layer, the sides of the third doped layer and the second doped layer that are close to each other are attached, and there is an electrical gap between the sides of the third doped layer and the first doped layer that are close to each other. Wherein, the gap width d of the electrical clearance is ≤0.05um.

[0024] In the above implementation scheme, the third doped layer is only bonded to one of the first and second doped layers, while maintaining an extremely narrow electrical gap with the other, the width of which is controlled within 0.05 μm. This ensures, on the one hand, that a leakage path can be formed in the substrate region corresponding to the electrical gap, preventing reverse leakage failure due to an excessively wide gap; on the other hand, it allows the formation of an n+ / n- / p+ / p- structure using this electrical gap, enabling flexible control of the reverse leakage activation voltage by adjusting the gap width.

[0025] In some embodiments, along the X direction, the first region and the second region are arranged alternately in an interdigitated pattern; or... Along the X direction, the first region and the second region are parallel and alternately arranged; or, The first region and the second region are each composed of a plurality of sub-regions arranged in a regular island-like pattern. The shapes of the plurality of sub-regions include one or more of the following: circles, rectangles, regular polygons, and irregular polygons.

[0026] The three shape design schemes for the first and second regions mentioned above can be selected according to the needs of different specifications of battery cells.

[0027] In some embodiments, the gap between the first region and the second region is a trench, the trench constitutes the third region, and the third doped layer is disposed within the trench; and / or, The third doped layer is locally distributed within the third region.

[0028] In the above structure, the trenches prevent short circuits in the high-mobility carrier collection layer. The localized distribution of the third doped layer within the third region creates a local electrical insulation gap between the first and second doped layers, thereby further suppressing carrier translocation.

[0029] In some embodiments, within each of the first regions, the first doped layer is sequentially covered with one or more of the following: a first interface passivation layer, a first doped semiconductor layer, a first transparent conductive oxide layer, and a first metal electrode; and / or, In each of the second regions, the second doped layer is sequentially covered with one or more of the following: a second interface passivation layer, a second doped semiconductor layer, a second transparent conductive oxide layer, and a second metal electrode.

[0030] The primary function of the interface passivation layer is to protect the substrate and enhance the stability and lifespan of the battery. The first doped semiconductor layer has the same doping type as the first doped layer, and the second doped semiconductor layer has the same doping type as the second doped layer. The primary function of the doped semiconductor layer is to transport charge carriers to the metal electrode. The primary function of the transparent conductive oxide layer is to efficiently collect and transport charge carriers outwards. The interface passivation layer, the doped semiconductor layer, and the transparent conductive oxide layer can be selected individually, in combination of any two, or simultaneously.

[0031] A photovoltaic module includes a back-contact solar cell as described in any of the preceding claims. Because of the back-contact solar cell, the photovoltaic module can generate leakage current at a lower reverse bias voltage, thereby reducing the hotspot temperature of the module while ensuring that the photoelectric conversion efficiency meets design requirements. Attached Figure Description

[0032] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0033] Figure 1 This is a partial structural diagram of a back-contact solar cell provided in Embodiment 1 of the present invention when only a doped layer is formed on the backlight surface. Figure 2 for Figure 1 Cross-sectional view at point AA; Figure 3 This is a partial structural diagram of a back-contact solar cell provided in Embodiment 2 of the present invention when only a doped layer is formed on the backlight surface. Figure 4 for Figure 3 Cross-sectional view at BB; Figure 5 This is a partial structural diagram of the back-contact solar cell provided in Embodiment 3 of the present invention when only a doped layer is formed on the back-light surface; Figure 6 for Figure 5 Cross-sectional view at CC; Figure 7 This is a partial cross-sectional schematic diagram of the back-contact solar cell provided in Embodiment 4 of the present invention; Figure 8 This is a partial cross-sectional schematic diagram of the back-contact solar cell provided in Embodiment 5 of the present invention; Figure 9 This is a partial cross-sectional schematic diagram of the back-contact solar cell provided in Embodiment Six of the present invention; Figure 10 This is a partial cross-sectional schematic diagram of the back-contact solar cell provided in Embodiment 7 of the present invention; Figure 11 This is a schematic diagram of a local structure of the back-contact solar cell in Comparative Example 2, where only a doped layer is formed on the back surface.

[0034] icon: 1-Base; 11-First region; 12-Second region; 13-Third region; 21-First doped layer; 22-Second doped layer; 23-Third doped layer; 231-First contact portion; 232-Second contact portion; 233-Spacer portion; 31-First interface passivation layer; 32-Second interface passivation layer; 41-First doped semiconductor layer; 42-Second doped semiconductor layer; 43-Third doped semiconductor layer; 431-First contact bump; 432-Second contact bump; 51 - First transparent conductive oxide layer; 52 - Second transparent conductive oxide layer; 61-First metal electrode; 62-Second metal electrode; 71 - First surface passivation layer; 72 - Second surface passivation layer; 100 - Leakage current path. Detailed Implementation

[0035] The technical solution of the present invention will be clearly and completely described below with reference to the implementation schemes. Obviously, the described implementation schemes are only a part of the implementation schemes of the present invention, and not all of them. Based on the implementation schemes of the present invention, all other implementation schemes obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] It should be noted that in the description of this invention, the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0037] It should be noted that in the description of this invention, the terms "connection" and "installation" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or a connection through an intermediate medium; they can refer to a mechanical connection or an electrical connection. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0038] A first aspect of this application provides a back-contact solar cell, referring to... Figures 1 to 10 The back-contact solar cell includes a substrate 1. A first region 11 and a second region 12, arranged alternately along the X-direction, are formed on the back surface of the substrate 1. A third region 13 is formed by the gaps between adjacent first regions 11 and second regions 12. For example... Figure 1 As shown, the first region 11, the second region 12 and the third region 13 all extend along the Y direction in general. Typically, one of the X direction and the Y direction is the length direction of the solar cell and the other is the width direction of the solar cell, with an angle of 90 degrees between them.

[0039] This application provides three shape schemes for the first region 11 and the second region 12, namely: In the first implementation scheme, such as Figure 1 As shown, along the X-direction, the first region 11 and the second region 12 are arranged alternately in an interlacing pattern. Specifically, the first region 11 and the second region 12 are each composed of a main line and multiple branch lines. The length direction of the main line is parallel to the Y-direction, while the multiple branch lines are perpendicularly connected to the main line and distributed at intervals along the Y-direction. The branch lines in the first region 11 and the branch lines in the second region 12 are designed with an interlacing pattern, forming a third region 13 with an arc-shaped structure between the first region 11 and the second region 12. This implementation scheme is most commonly used in back-contact solar cells.

[0040] In a second embodiment, the back-contact solar cell of this application may also be: along the X direction, the first region 11 and the second region 12 are parallel and alternately arranged, that is, the first region 11 and the second region 12 are long rectangular.

[0041] In a third embodiment, the back-contact solar cell may further consist of: the first region 11 and the second region 12 each being composed of a plurality of sub-regions arranged in a regular island-like pattern, the shapes of which include one or more of the following: circles, rectangles, regular polygons, and irregular polygons. The first region 11 and the second region 12 are each composed of a plurality of sub-regions arranged regularly along the X and Y directions, and the shape of each sub-region is not limited.

[0042] The three shape schemes of the first region 11 and the second region 12 mentioned above can be selected according to the needs of different specifications of battery cells.

[0043] In the back-contact solar cell provided in this application, a first doped layer 21 is formed in each first region 11, a second doped layer 22 is formed in each second region 12, and a third doped layer 23 is formed in each third region 13; one of the first doped layer 21 and the second doped layer 22 is P-type doped and the other is N-type doped, and the third doped layer 23 is either P-type doped or N-type doped, and the doping concentration of the third doped layer 23 is greater than the doping concentration of the first doped layer 21 and the doping concentration of the second doped layer 22, respectively; the third doped layer 23 is electrically connected to the adjacent first doped layer 21 and the adjacent second doped layer 22, respectively.

[0044] Compared with the prior art, the advantages of the back contact solar cell provided in this application are as follows: (1) The setting of the third doped layer 23 is conducive to generating leakage current under a lower reverse bias voltage, thereby significantly reducing the hot spot temperature of the module and improving the reliability of individual cells and modules; (2) Since the doping concentration of the third doped layer 23 is higher than that of the first and second doped layers, the concentration gradient between the third doped layer 23 and the first and second doped layers will generate a diffusion barrier, thereby suppressing the translocation of carriers from the first and second doped layers (low concentration doped layers) to the third doped layer 23 (high concentration doped layer), avoiding the problems of forward leakage and reduced photoelectric conversion efficiency caused by the direct local contact of the first and second doped layers in the prior art; (3) By setting the third doped layer 23 between the first doped layer 21 and the second doped layer 22, a large area reverse leakage channel is formed between the first doped layer 21 and the second doped layer 22, avoiding the phenomenon of abnormal concentration of reverse leakage current, thereby alleviating the hot spot risk caused by the concentration of reverse leakage current.

[0045] Reference Figure 2 and Figure 4In some embodiments, the gap between the first region 11 and the second region 12 is a trench, which forms the third region 13, and the third doped layer 23 is disposed within the trench. In this embodiment, multiple trenches arranged sequentially along the X-direction are processed on the backlight surface of the substrate 1, and either the first region 11 or the second region 12 is formed between two adjacent trenches. The trenches can prevent short circuits in the high-mobility carrier collection layer. Of course, in some other embodiments, trenches may not be processed on the backlight surface of the substrate 1, and the backlight surface of the substrate 1 may be a plane.

[0046] Reference Figure 1 In some implementations, the third doped layer 23 covers the entire third region 13. (See reference...) Figure 3 In some other embodiments, the third doped layer 23 can be locally distributed within the third region 13. Of the two embodiments described above, the former has the advantage of a larger leakage channel area, while the latter has the advantage of utilizing the local insulating gap between the third doped layer 23 and the first and second doped layers to suppress carrier translocation. During fabrication, the third doped layer 23 can be formed using either high-concentration doping with complete coverage of the third region 13 or low-concentration doping with partial coverage of the third region 13.

[0047] In some embodiments, the doping concentration of the third doped layer 23 varies gradient along its width, meaning the doping concentration gradually decreases or increases from the adjacent first doped layer 21 to the second doped layer 22. In other embodiments, the doping concentration of the third doped layer 23 increases from both sides towards the center along its width. In the above embodiments, the third doped layer 23 is formed using a non-uniform doping method, which is beneficial for rapid leakage current, thereby quickly eliminating hot spots and reducing their duration.

[0048] In some embodiments, the third doped layer 23 has the same doping type as the first doped layer 21, the adjacent sides of the third doped layer 23 and the first doped layer 21 are bonded together, and there is an electrical gap between the adjacent sides of the third doped layer 23 and the second doped layer 22; or, the third doped layer 23 has the same doping type as the second doped layer 22, the adjacent sides of the third doped layer 23 and the second doped layer 22 are bonded together, and there is an electrical gap between the adjacent sides of the third doped layer 23 and the first doped layer 21. That is, in a set of first, third, and second doped layers that are sequentially adjacent, two doped layers with the same doping type are bonded together, and doped layers with different doping types have an electrical gap, wherein the gap width d ≤ 0.05 μm.

[0049] In the above implementation scheme, the third doped layer 23 is only bonded to one of the first and second doped layers, while maintaining an extremely narrow electrical gap with the other, the width of which is controlled within 0.05 μm. This ensures, on the one hand, that the substrate region corresponding to the electrical gap can form a leakage path, preventing reverse leakage failure due to an excessively wide gap; on the other hand, it allows the formation of an n+ / n- / p+ / p- structure using this electrical gap, enabling flexible control of the reverse leakage activation voltage by adjusting the gap width.

[0050] Optionally, the first doped layer 21 and the third doped layer 23 are both N-type doped, and the second doped layer 22 is P-type doped; or, the first doped layer 21 and the third doped layer 23 are both P-type doped, and the second doped layer 22 is N-type doped; or, the second doped layer 22 and the third doped layer 23 are both N-type doped, and the first doped layer 21 is P-type doped; or, the second doped layer 22 and the third doped layer 23 are both P-type doped, and the first doped layer 21 is N-type doped. In short, the doping types of the three doped layers can be combined with each other.

[0051] In some implementations, the ratio of the doping concentration of the third doped layer 23 to the doping concentration of the first doped layer 21 is 10:1 to 200:1; and / or, the ratio of the doping concentration of the third doped layer 23 to the doping concentration of the second doped layer 22 is between 10:1 and 200:1. A higher ratio of the doping concentration of the third doped layer 23 to the first and second doped layers makes it less likely for charge carriers in the first and second doped layers to migrate laterally to the third doped layer 23. However, a higher doping concentration of the third doped layer 23 also increases the difficulty of fabrication. Therefore, setting the doping concentration ratio of the third doped layer 23 to the first and second doped layers between 10:1 and 200:1 effectively suppresses the migration of charge carriers in the first and second doped layers, which is beneficial for the metal electrode to collect charge carriers, while avoiding the problem of excessively high fabrication difficulty for the third doped layer 23.

[0052] Taking the example where the first doped layer 21 and the third doped layer 23 are both N-type doped and the second doped layer 22 is P-type doped, the following explanation is provided. At the junction of the first doped layer 21 and the third doped layer 23, due to the concentration gradient between them, the charge carriers in the first doped layer 21 are not easily transverse to the third doped layer 23. At the junction of the second doped layer 22 and the third doped layer 23, the transverse movement of the charge carriers is determined by both the concentration gradient and the electric field force. Specifically, holes in the second doped layer 22 will not transverse to the third doped layer 23 under the combined action of the electric field force and the concentration gradient, while electrons in the third doped layer 23 flow towards the second doped layer 22 under the action of the concentration gradient, and at the same time, electrons in the third doped layer 23 are pushed back into the third doped layer 23 under the action of the electric field force. By setting the doping concentration ratio of the third doped layer 23 to the first and second doped layers within the range of 10:1 to 200:1, the transverse displacement of charge carriers in the first and second doped layers can be effectively suppressed. Furthermore, the electrons in the third doped layer 23 can form a dynamic equilibrium state under the dual action of concentration gradient and electric field force. That is, when the PN junction is stable, the diffusion motion of electrons is almost equal to the rate driven by the electric field, and the macroscopic flow of electrons stops, thereby reducing the recombination of charge carriers between the second and third doped layers.

[0053] In some implementations, the peak doping concentration of the first doped layer 21 is 1e18~5e19 cm⁻³.

[0054] In some implementations, the peak doping concentration of the second doped layer 22 is 0.5e18~3e19cm-3. In some implementations, the peak doping concentration of the third doped layer 23 is 1e19~1e21cm-3.

[0055] The concentrations of the first, second, and third doped layers can be selected within the above range, and appropriate values ​​should be chosen in conjunction with the concentration ratios described above.

[0056] In some implementations, the area ratio of a single third region 13 to the area of ​​the backlight surface ranges from 0.1% to 2%.

[0057] In some implementations, the width of the third region 13 is 0.5~20um.

[0058] By adopting the above technical solution, the width and area ratio of the third region 13 are much lower than those of the isolation region (which is essentially equivalent to the third region 13 in this application) in the prior art. This configuration can reduce surface recombination losses and is beneficial to obtaining higher open-circuit voltage and photoelectric conversion efficiency. At the same time, since a third doped layer 23 capable of suppressing carrier transverse movement is disposed in the third region 13, the reduction in the width of the third region 13 will not cause a problem of carrier transverse movement.

[0059] In some embodiments, the thickness of the third doped layer 23 is greater than the thickness of the first doped layer 21 and the thickness of the second doped layer 22, respectively. The doped layers are mainly formed by diffusion, ion implantation, and vapor deposition. When the first doped layer 21, the second doped layer 22, and the third doped layer 23 are all formed on the surface of the substrate 1 by diffusion or ion implantation, the junction depth of the third doped layer 23 is greater than the junction depth of the first doped layer 21 and the junction depth of the second doped layer 22, respectively. It should be noted that this application does not limit the formation methods of the first, second, and third doped layers, and the formation methods of the first, second, and third doped layers can be the same or different.

[0060] In some embodiments, the thickness of the third doped layer 23 is 0.1~2 μm; and / or, the thickness of the first doped layer 21 is 0.1~3 μm; and / or, the thickness of the second doped layer 22 is 0.05~0.25 μm. The thicknesses of the first, second, and third doped layers can be selected within the above ranges.

[0061] Reference Figures 1 to 4 In some embodiments, the third doped layer 23 has a first side and a second side along its width direction. The first side is at least partially attached to the first doped layer 21, and the second side is at least partially attached to the second doped layer 22. That is, the third doped layer 23 can achieve electrical connection with the first and second doped layers by directly contacting them.

[0062] Reference Figure 5 and Figure 6 In other embodiments, a third doped semiconductor layer 43 is formed in each third region 13. The third doped semiconductor layer 43 is stacked on the corresponding third doped layer 23. The third doped semiconductor layer 43 includes a plurality of first contact bumps 431 and a plurality of second contact bumps 432. The plurality of first contact bumps 431 are attached to the adjacent first doped layer 21, and the plurality of second contact bumps 432 are attached to the adjacent second doped layer 22. That is, the third doped layer 23 can be electrically connected to the first and second doped layers through the third doped semiconductor layer 43.

[0063] Reference Figures 7 to 11 In each first region 11, the first doped layer 21 is sequentially covered with one or more of the following: a first interface passivation layer 31, a first doped semiconductor layer 41, a first transparent conductive oxide layer 51, and a first metal electrode 61; and / or, in each second region 12, the second doped layer 22 is sequentially covered with one or more of the following: a second interface passivation layer 32, a second doped semiconductor layer 42, a second transparent conductive oxide layer 52, and a second metal electrode 62.

[0064] The primary function of the interface passivation layer is to protect the substrate 1 and enhance the stability and lifespan of the battery. The first doped semiconductor layer 41 has the same doping type as the first doped layer 21, and the second doped semiconductor layer 42 has the same doping type as the second doped layer 22. The primary function of the doped semiconductor layers is to transport charge carriers to the metal electrode. The primary function of the transparent conductive oxide layer is to efficiently collect and transport charge carriers outwards. The material of the transparent conductive oxide layer includes one or more combinations of zinc oxide doped, tin oxide doped, and indium oxide doped; for example, the transparent conductive oxide layer is specifically an indium oxide doped layer.

[0065] The interface passivation layer, the doped semiconductor layer, and the transparent conductive oxide layer can be selected individually, or any combination of two of them, or all of them simultaneously. Of course, none of the above three can be selected. In this case, the first metal electrode 61 is in direct contact with the first doped layer 21, and the second metal electrode 62 is in direct contact with the second doped layer 22.

[0066] Furthermore, the back-contact solar cell also includes a first surface passivation layer 71 covering the back surface of the substrate 1 and a second surface passivation layer 72 covering the light-facing surface of the substrate 1. The first surface passivation layer 71 is disposed on the side of each metal electrode close to the substrate 1, and the first surface passivation layer 71 covers each doped layer and / or each doped semiconductor layer. Each metal electrode at least partially penetrates the first surface passivation layer 71 and is in contact with the corresponding doped layer or doped semiconductor layer.

[0067] It is understood that the "coverage" described in this application can be either directly attached to the surface or indirectly covered. For example, the first surface passivation layer 71 and the doped layer are in contact with each other, or other films are provided between the first surface passivation layer 71 and the doped layer.

[0068] In some embodiments, substrate 1 is an N-type silicon substrate, specifically an N-type monocrystalline silicon wafer. In other embodiments, substrate 1 may also be a P-type silicon substrate.

[0069] In some embodiments, one of the first doped semiconductor layer 41 and the second doped semiconductor layer 42 is made of one or more combinations of N-type doped polycrystalline silicon, N-type doped amorphous silicon, N-type doped microcrystalline silicon, N-type doped polycrystalline silicon oxide, N-type doped polycrystalline silicon carbide, N-type doped microcrystalline silicon oxide, N-type doped microcrystalline silicon carbide, and transparent conductive oxide; the other is made of one or more combinations of P-type doped polycrystalline silicon, P-type doped amorphous silicon, P-type doped microcrystalline silicon, P-type doped polycrystalline silicon oxide, P-type doped polycrystalline silicon carbide, P-type doped microcrystalline silicon oxide, P-type doped microcrystalline silicon carbide, and transparent conductive oxide. The transparent conductive oxide includes one or more combinations of zinc oxide doped, tin oxide doped, and indium oxide doped.

[0070] Furthermore, the first doped semiconductor layer 41 and the second doped semiconductor layer 42 can be replaced by a transition metal oxide (TMO) with carrier (electron-selective, hole-selective) transport capability, and the transition metal oxide can also serve as a hole or electron transport layer.

[0071] In some embodiments, the peak doping concentrations of the first doped semiconductor layer 41 and the second doped semiconductor layer 42 are 1e19~1e21cm, respectively. -3 .

[0072] In some embodiments, the thicknesses of the first doped semiconductor layer 41 and the second doped semiconductor layer 42 are 50~500 nm, respectively.

[0073] In some embodiments, the first metal electrode 61 and the second metal electrode 62 are each made of at least one element selected from Ag, Al, Cu, Ni, Ti, W, and Sn. The metal electrodes can be elemental metals or alloys composed of multiple elements.

[0074] In some embodiments, the thicknesses of the first metal electrode 61 and the second metal electrode 62 are 1~50 μm, respectively.

[0075] In some embodiments, the first interface passivation layer 31 and the second interface passivation layer 32 are respectively made of at least one of silicon oxide, aluminum oxide, silicon oxynitride, silicon nitride, silicon carbide, and amorphous silicon.

[0076] In some implementations, the thicknesses of the first interface passivation layer 31 and the second interface passivation layer 32 are 1~10 nm, respectively.

[0077] In some implementations, the light-facing surface of substrate 1 is one of a positive pyramid textured surface, an inverted pyramid textured surface, or a black silicon textured surface. Setting the light-facing surface of substrate 1 as a textured surface can reduce surface reflection loss of light and improve light absorption efficiency.

[0078] In some embodiments, the first surface passivation layer 71 and the second surface passivation layer 72 are made of at least one of silicon nitride, silicon oxynitride, silicon oxide, and aluminum oxide.

[0079] In some embodiments, the refractive indices of the first surface passivation layer 71 and the second surface passivation layer 72 are 1.8 to 2.3, respectively; and / or, the thicknesses of the first surface passivation layer 71 and the second surface passivation layer 72 are 50-250 nm, respectively.

[0080] A second aspect of this application provides a photovoltaic module comprising the solar back-contact cell provided in the first aspect. Further, the photovoltaic module includes multiple strings of cells arranged in a flat configuration and an encapsulation layer covering each string, each string comprising several solar cells connected in series. This photovoltaic module encompasses all the technical features and effects of the solar cell, which will not be elaborated further here.

[0081] The structure of the back-contact solar cell provided in this application is further illustrated below with several specific embodiments.

[0082] Example 1 Reference Figure 1 and Figure 2 , Figure 1 This is a schematic diagram of a local structure when only a doped layer is formed on the back surface of substrate 1. Figure 2 for Figure 1 In the cross-sectional view at AA, in this embodiment, the third doped layer 23 covers the entire third region 13, and the two sides of the third doped layer 23 along the width direction are integrally attached to the first doped layer 21 and the second doped layer 22, respectively. In this embodiment, the first, second, and third doped layers are preferably formed on the surface of the substrate 1 by diffusion or ion implantation.

[0083] Example 2 The difference between this embodiment and Embodiment 1 is that the two sides of the third doped layer 23 along its width direction are partially attached to the first doped layer 21 and the second doped layer 22, respectively.

[0084] Specifically, refer to Figure 3 and Figure 4 , Figure 3 This is a schematic diagram of a local structure when only a doped layer is formed on the back surface of substrate 1. Figure 4 for Figure 3 In the cross-sectional view at BB, in this embodiment, the third doped layer 23 is divided into a first contact portion 231, a second contact portion 232, and a spacer portion 233 along its length. The first contact portion 231 and the second contact portion 232 are alternately distributed. Each adjacent first contact portion 231 and the second contact portion 232 are connected by the spacer portion 233. Each first contact portion 231 is attached to the adjacent first doped layer 21, each second contact portion 232 is attached to the adjacent second doped layer 22, and each spacer portion 233 forms a gap between the adjacent first doped layer 21 and the adjacent second doped layer 22.

[0085] Compared to Embodiment 1, the advantage of this embodiment is that by forming a local contact between the third doped layer 23 and the first and second doped layers, the first and second doped layers are locally electrically isolated, which alleviates the problem of carrier recombination caused by the failure of the concentration gradient and the PN junction to suppress carrier transverse movement, thereby further reducing carrier recombination and improving photoelectric conversion efficiency.

[0086] Example 3 Reference Figure 5 and Figure 6 , Figure 5 This is a schematic diagram of a local structure when only the first, second, and third doped layers and the third semiconductor doped layer are formed on the back surface of substrate 1. Figure 6 for Figure 5 In the cross-sectional view at CC, in this embodiment, a third doped semiconductor layer 43 is respectively disposed on each third region 13 of the backlight surface. The third doped semiconductor layer 43 is stacked on the corresponding third doped layer 23. The third doped semiconductor layer 43 includes a plurality of first contact protrusions 431 and a plurality of second contact protrusions 432, wherein: the plurality of first contact protrusions 431 are arranged at equal intervals along the Y direction and are attached to the adjacent first doped layer 21; the plurality of second contact protrusions 432 are arranged at equal intervals along the Y direction and are attached to the adjacent second doped layer 22; the plurality of first contact protrusions 431 and the plurality of second contact protrusions 432 are alternately distributed on the corresponding third doped layer 23. The doping concentration of the third doped semiconductor layer 43 is the same as that of the third doped layer 23.

[0087] Both this embodiment and Embodiment 2 form a local electrical connection between the third doped layer 23 and the first and second doped layers. The difference between the two is that Embodiment 2 achieves the local electrical connection between the third doped layer 23 and the first and second doped layers through local contact, while this embodiment achieves the local electrical connection between the third doped layer 23 and the first and second doped layers by setting contact protrusions.

[0088] Example 4 The difference between this embodiment and Embodiment 1 is as follows: When the third doped layer 23 and the first doped layer 21 have the same doping type, the first side of the third doped layer 23 is in contact with the first doped layer 21, and an electrical gap with a width of less than 0.05 μm is formed between the second side of the third doped layer 23 and the second doped layer 22. Alternatively, when the third doped layer 23 and the second doped layer 22 have the same doping type, an electrical gap with a width of less than 0.05 μm is formed between the first side of the third doped layer 23 and the first doped layer 21, and the second side of the third doped layer 23 is in contact with the second doped layer 22.

[0089] This electrical gap allows for the formation of an n+ / n- / p+ / p- structure. By controlling the width of this gap, the voltage at which reverse leakage is initiated can be flexibly controlled. This electrical gap is an extremely narrow slit, preventing reverse leakage failure.

[0090] Example 5 This embodiment is a further solution based on any one of the first to fourth embodiments, referred to... Figure 7 In this embodiment, the first metal electrode 61 at least partially penetrates the first surface passivation layer 71 and contacts the first doped layer 21, and the second metal electrode 62 at least partially penetrates the first surface passivation layer 71 and contacts the second doped layer 22.

[0091] One method for manufacturing the aforementioned solar cell includes: S1: Provide a substrate 1, and divide the backlight surface of the substrate 1 into a first region 11, a second region 12 and a third region 13; S2: Forming doped layers; specifically, a first doped layer 21 is formed in each first region 11, a second doped layer 22 is formed in each second region 12, and a third doped layer 23 is formed in each third region 13. The formation method and order of the three doped layers are not limited here. S3: Form a first surface passivation layer 71, which covers each doped layer; S4: Perform a film-opening process on the first surface passivation layer 71 to expose at least part of the first doped layer 21 and the second doped layer 22. S5: Form multiple metal electrodes, each corresponding to one of the first and second doped layers; specifically, the multiple metal electrodes are divided into a first metal electrode 61 and a second metal electrode 62, wherein the first metal electrode 61 covers the first doped layer 21, and the second metal electrode 62 covers the second doped layer 22, and each metal electrode contacts the corresponding doped layer through an opening on the first surface passivation layer 71.

[0092] Example 6 This embodiment is an extension based on any one of the first to fourth embodiments. (Refer to...) Figure 8 In this embodiment, in each second region 12, a second interface passivation layer 32, a second doped semiconductor layer 42 and a second metal electrode 62 are sequentially covered on the second doped layer 22. The second metal electrode 62 at least partially penetrates the first surface passivation layer 71 and contacts the second doped semiconductor layer 42.

[0093] Example 7 This embodiment is an extension based on the above embodiments, referring to... Figure 9In this embodiment, in each first region 11, the first doped layer 21 is sequentially covered with a first interface passivation layer 31, a first doped semiconductor layer 41 and a first metal electrode 61. The first metal electrode 61 at least partially penetrates the first surface passivation layer 71 and contacts the first doped semiconductor layer 41.

[0094] Example 8 This embodiment is an extension based on the above embodiments, referring to... Figure 10 In this embodiment, within each first region 11, a first interface passivation layer 31, a first doped semiconductor layer 41, a first transparent conductive oxide layer 51, and a first metal electrode 61 are sequentially covered on the first doped layer 21; within each second region 12, a second interface passivation layer 32, a second doped semiconductor layer 42, a second transparent conductive oxide layer 52, and a second metal electrode 62 are sequentially covered on the second doped layer 22. The transparent conductive oxide layer is specifically a tin-doped indium oxide layer.

[0095] As can be seen from the above embodiments, the membrane structure in the first region 11 and the second region 12 can be the same or different.

[0096] Example 9 The doped layer structure in this embodiment is the same as in Embodiment 1 (i.e., the first side of the third doped layer 23 is entirely in contact with the first doped layer 21, and the second side of the third doped layer 23 is entirely in contact with the second doped layer 22), and a specific parameter design is provided. In this embodiment, the substrate 1 is an N-type single-crystal silicon wafer. The first doped layer 21 is doped with phosphorus (N-type doping), with a doping concentration of 1.2e19cm-3, a maximum width of 500um, and a junction depth of 0.2um. The second doped layer 22 is doped with boron (P-type doping), with a doping concentration of 1e19cm-3, a maximum width of 500um, and a junction depth of 0.15um. The third doped layer 23 is P-type doped, with a doping concentration of 1.2e20cm-3, a width of 3um, a junction depth of 0.4um, and an area ratio (compared to the backlight surface) of 0.3%.

[0097] This embodiment also includes a doped semiconductor layer and a first interface passivation layer. The first doped semiconductor layer 41 is N-type polycrystalline silicon, the second doped semiconductor layer 42 is P-type polycrystalline silicon, and both the first interface passivation layer 31 and the second interface passivation layer 32 are silicon oxide.

[0098] Example 10 The doped layer structure in this embodiment is the same as that in Embodiment 2 (i.e., the first and second sides of the third doped layer 23 are in partial contact with the first and second doped layers, respectively), and the remaining structure and parameters are the same as those in Embodiment 9.

[0099] Example 11 The doped layer structure in this embodiment is the same as that in Embodiment 3 (i.e., the third doped layer 23 is locally electrically connected to the first and second doped layers through the third doped semiconductor layer 43), and the remaining structure and parameters are the same as those in Embodiment 9.

[0100] Example 12 In this embodiment, the doping concentration of the third doped layer 23 is 3e20cm-3, and the other settings are the same as in Embodiment Nine.

[0101] Example 13 In this embodiment, the third doped layer 23 has a doping concentration of 7e20cm-3, and the rest of the settings are the same as in Embodiment Nine.

[0102] Example 14 In this embodiment, the width of the third doped layer 23 is 4 μm and the area ratio is 0.4%, and the other settings are the same as in Embodiment Nine.

[0103] Example 15 In this embodiment, the width of the third doped layer 23 is 5 μm and the area ratio is 0.5%, and the other settings are the same as in Embodiment Nine.

[0104] Example 16 In this embodiment, the junction depth of the third doped layer 23 is 0.5 μm, and the other settings are the same as in Embodiment Nine.

[0105] Example 17 In this embodiment, the junction depth of the third doped layer 23 is 0.6 μm, and the other settings are the same as in Embodiment Nine.

[0106] Example 18 In this embodiment, the first doped semiconductor layer 41 is N-type amorphous silicon, the second doped semiconductor layer 42 is P-type amorphous silicon, and both the first interface passivation layer 31 and the second interface passivation layer 32 are intrinsic amorphous silicon. The first doped semiconductor layer 41 is further provided with a first transparent conductive oxide layer 51 and a first metal electrode 61, and the second doped semiconductor layer 42 is further provided with a second transparent conductive oxide layer 52 and a second metal electrode 62. The remaining configurations are the same as in Embodiment Nine.

[0107] Example 19 In this embodiment, the first doped semiconductor layer 41 is N-type polycrystalline silicon, the second doped semiconductor layer 42 is P-type amorphous silicon, the first interface passivation layer 31 is silicon oxide, and the second interface passivation layer 32 is intrinsic amorphous silicon. The first doped semiconductor layer 41 is further provided with a first transparent conductive oxide layer 51 and a first metal electrode 61, and the second doped semiconductor layer 42 is further provided with a second transparent conductive oxide layer 52 and a second metal electrode 62. The remaining configurations are the same as in Embodiment Nine.

[0108] Example 20 In this embodiment, the second doped semiconductor layer 42 and the second interface passivation layer 52 are not provided. The first doped semiconductor layer 41 is N-type polysilicon, the first interface passivation layer 31 is silicon oxide, and the second metal electrode 62 contacts the second doped layer 22 through a through hole provided on the first surface passivation layer 71 on the second doped layer 22. The rest of the settings are the same as in Embodiment Nine.

[0109] Example 21 In this embodiment, the doping concentration of the third doped layer 23 gradually increases from the adjacent second doped layer 22 to the first doped layer 21, and the rest of the settings are the same as in Embodiment Nine.

[0110] Example 22 In this embodiment, the doping concentration of the third doped layer 23 gradually decreases from the adjacent second doped layer 22 to the first doped layer 21, and the rest of the settings are the same as in Embodiment Nine.

[0111] Example 23 In this embodiment, along the width direction of the third doped layer 23, the doping concentration of the third doped layer 23 increases from both sides towards the center. The remaining settings are the same as in Embodiment Nine.

[0112] Comparative Example 1 This comparative example is a conventional back-contact solar cell without a leakage current channel. Except for the absence of the third doped layer 23, the other configurations of this cell are the same as those in Example 9.

[0113] Comparative Example 2 This comparative example is a conventional back-contact solar cell with a leakage current channel, for reference. Figure 11 The back-contact solar cell has multiple leakage channels 100 between adjacent first and second doped layers. The remaining configurations of this comparative example are the same as those in Example 9.

[0114] Performance testing For the batteries provided in Examples 9 to 23 and the two comparative examples, the reverse breakdown voltage, photoelectric conversion efficiency, hot spot occurrence (local high temperature), and open circuit voltage were tested using a testing instrument. The test results are shown in Tables 1 to 6.

[0115] Table 1

[0116] Table 2

[0117] Table 3

[0118] Table 4

[0119] Table 5

[0120] Table 6

[0121] As shown in Table 1, compared to the comparative examples, the embodiments of this application exhibit lower reverse breakdown voltage and significantly improve hot spot phenomena in the battery. Compared to Examples 10 and 11, the photoelectric conversion efficiency of Example 9 is slightly lower, but it still meets the battery design requirements (currently, the industry standard design requirement for battery photoelectric conversion efficiency is greater than 25%). The photoelectric conversion efficiencies of Examples 10 and 11 are not significantly different from those of the comparative examples.

[0122] As shown in Table 2, with other parameters remaining unchanged, the higher the doping concentration of the third doped layer 23, the lower the reverse breakdown voltage, the lower the local high temperature of the hot spot, and the higher the conversion efficiency.

[0123] As shown in Table 3, with other parameters remaining unchanged, the larger the area ratio of the third doped layer 23, the lower the reverse breakdown voltage, the lower the local high temperature of the hot spot, and the conversion efficiency is not much different. As shown in Table 4, with other parameters remaining unchanged, the greater the thickness of the third doped layer 23, the lower the reverse breakdown voltage, the lower the local high temperature of the hot spot, and the conversion efficiency is not much different.

[0124] As shown in Table 5, the embodiments of this application, when applied to other high-efficiency batteries, such as HBC batteries and hybrid BC battery structures, can reduce reverse breakdown voltage and significantly improve the hot spot phenomenon of the battery.

[0125] As shown in Table 6, with other parameters remaining constant, gradually increasing the doping concentration of the third doped layer 23 from the adjacent second doped layer 22 to the first doped layer 21 further reduces the reverse breakdown voltage and hotspot temperature. Conversely, gradually decreasing the doping concentration of the third doped layer 23 from the adjacent second doped layer 22 to the first doped layer 21 slightly increases the reverse breakdown voltage and hotspot temperature. Along the width direction of the third doped layer 23, increasing the doping concentration from both sides towards the center results in minimal changes to the reverse breakdown voltage and hotspot temperature. The open-circuit voltage and conversion efficiency also show little change.

[0126] In summary, the back-contact solar cell provided in this application, by setting a third doped layer 23 between the first doped layer 21 and the second doped layer 22, can generate leakage current at a lower reverse bias voltage, thereby reducing the hot spot temperature of the module and mitigating the hot spot risk caused by concentrated reverse leakage current. The doping concentration of the third doped layer 23 is higher than that of the first and second doped layers. The concentration gradient between the third doped layer 23 and the first and second doped layers can suppress the carrier translocation of the first and second doped layers, ensuring that the photoelectric conversion efficiency of the cell meets the design requirements.

[0127] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the various embodiments of the present invention.

Claims

1. A back-contact solar cell, comprising a substrate (1), wherein a first region (11) and a second region (12) are formed on the back surface of the substrate (1) at alternating intervals along the X direction, and a third region (13) is formed by the gap between adjacent first regions (11) and second regions (12), characterized in that, A first doped layer (21) is formed in each of the first regions (11), a second doped layer (22) is formed in each of the second regions (12), and a third doped layer (23) is formed in each of the third regions (13). One of the first doped layer (21) and the second doped layer (22) is P-type doped and the other is N-type doped. The third doped layer (23) is either P-type doped or N-type doped. The doping concentration of the third doped layer (23) is greater than that of the first doped layer (21) and the second doped layer (22). The third doped layer (23) is electrically connected to the adjacent first doped layer (21) and the adjacent second doped layer (22), respectively.

2. The back-contact solar cell according to claim 1, characterized in that, The ratio of the doping concentration of the third doped layer (23) to the doping concentration of the first doped layer (21) is 10:1 to 200:1; and / or, The ratio of the doping concentration of the third doped layer (23) to the doping concentration of the second doped layer (22) is between 10:1 and 200:1; and / or, The peak doping concentration of the first doped layer (21) is 1e18~5e19cm-3; and / or, The peak doping concentration of the second doped layer (22) is 0.5e18~3e19cm-3; and / or, The peak doping concentration of the third doped layer (23) is 1e19~1e21cm-3.

3. The back-contact solar cell according to claim 1, characterized in that, The area ratio of a single third region (13) to the area of ​​the backlight surface ranges from 0.1% to 2%; and / or, The thickness of the third doped layer (23) is greater than the thickness of the first doped layer (21) and the thickness of the second doped layer (22).

4. The back-contact solar cell according to claim 3, characterized in that, The thickness of the third doped layer (23) is 0.1~2 μm; and / or, The thickness of the first doped layer (21) is 0.1~0.3 μm; and / or, The thickness of the second doped layer (22) is 0.05~0.25 μm; and / or, The width of the third doped layer (23) is 0.5~20um.

5. The back-contact solar cell according to claim 1, characterized in that, The third doped layer (23) has a first side and a second side along its width direction, the first side being at least partially attached to the first doped layer (21), and the second side being at least partially attached to the second doped layer (22); or, A third doped semiconductor layer (43) is formed in each of the third regions (13). The third doped semiconductor layer (43) is stacked on the corresponding third doped layer (23). The third doped semiconductor layer (43) includes a plurality of first contact bumps (431) and a plurality of second contact bumps (432). The plurality of first contact bumps (431) are attached to the adjacent first doped layer (21), and the plurality of second contact bumps (432) are attached to the adjacent second doped layer (22).

6. The back-contact solar cell according to claim 5, characterized in that, The third doped layer (23) is divided into a first contact portion (231), a second contact portion (232), and a spacer portion (233) along its length. The first contact portion (231) and the second contact portion (232) are alternately distributed. Each adjacent first contact portion (231) and second contact portion (232) are connected by the spacer portion (233). Each first contact portion (231) is attached to the adjacent first doped layer (21), each second contact portion (232) is attached to the adjacent second doped layer (22), and each spacer portion (233) forms a gap between the adjacent first doped layer (21) and the adjacent second doped layer (22).

7. The back-contact solar cell according to claim 5, characterized in that, The backlight surface has a third doped semiconductor layer (43) disposed on each of the third regions (13). The third doped semiconductor layer (43) is stacked on the corresponding third doped layer (23). The third doped semiconductor layer (43) includes a plurality of first contact bumps (431) and a plurality of second contact bumps (432), wherein: The plurality of first contact protrusions (431) are arranged at intervals along the Y direction and are attached to the adjacent first doped layer (21); The plurality of second contact protrusions (432) are arranged at intervals along the Y direction and are attached to the adjacent second doped layer (22); The plurality of first contact bumps (431) and the plurality of second contact bumps (432) are alternately distributed on the corresponding third doped layer (23); Wherein, the Y direction is the extension direction of each doped layer, and the Y direction is perpendicular to the X direction.

8. The back-contact solar cell according to claim 1, characterized in that, Along the width direction of the third doped layer (23), the doping concentration of the third doped layer (23) varies in a gradient; or, Along the width direction of the third doped layer (23), the doping concentration of the third doped layer (23) increases from both sides to the middle.

9. The back-contact solar cell according to claim 1, characterized in that, The third doped layer (23) has the same doping type as the first doped layer (21), the third doped layer (23) and the first doped layer (21) are attached to each other on their adjacent sides, and there is an electrical gap between the third doped layer (23) and the second doped layer (22) on their adjacent sides; or, The third doped layer (23) has the same doping type as the second doped layer (22), the third doped layer (23) and the second doped layer (22) are attached to each other, and there is an electrical gap between the third doped layer (23) and the first doped layer (21); Wherein, the gap width d of the electrical clearance is ≤0.05um.

10. The back-contact solar cell according to claim 1, characterized in that, Along the X direction, the first region (11) and the second region (12) are arranged alternately in an interdigitated pattern; or, Along the X direction, the first region (11) and the second region (12) are parallel and alternately arranged; or, The first region (11) and the second region (12) are each composed of a plurality of sub-regions arranged in a regular island shape. The shapes of the plurality of sub-regions include one or more of the following: circles, rectangles, regular polygons, and irregular polygons.

11. The back-contact solar cell according to claim 1, characterized in that, The gap between the first region (11) and the second region (12) is a trench, which forms the third region (13), and the third doped layer (23) is disposed within the trench; and / or, The third doped layer (23) is locally distributed within the third region (13).

12. The back-contact solar cell according to claim 1, characterized in that, Within each of the first regions (11), the first doped layer (21) is sequentially covered with one or more of the following: a first interface passivation layer (31), a first doped semiconductor layer (41), a first transparent conductive oxide layer (51), and a first metal electrode (61); and / or, Within each of the second regions (12), the second doped layer (22) is sequentially covered with one or more of the following: a second interface passivation layer (32), a second doped semiconductor layer (42), a second transparent conductive oxide layer (52), and a second metal electrode (62).

13. A photovoltaic module, characterized in that, Including the back-contact solar cell as described in any one of claims 1 to 12.

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