Display panel and display device

Abstract

This application provides a display panel and a display device. The display panel includes a substrate, an array of light-emitting chips and a driving chip disposed on the substrate, and a circuit layer connecting the light-emitting chips and the driving chip. The substrate includes a first substrate and a second substrate, the circuit layer is disposed between the first substrate and the second substrate, the driving chip is disposed on a first surface of the first substrate, and the light-emitting chip is disposed on a second surface of the second substrate opposite to the first substrate. The display panel and display device provided in this application, by separately disposing the light-emitting chips and the driving chip on opposite surfaces of different substrates, completely avoid the situation where the driving chip blocks the light from the light-emitting chip, thereby effectively improving the viewing angle of the display module and avoiding brightness attenuation and color shift that easily occur when viewed from a wide viewing angle.

Description

Technical Field

[0001] This application belongs to the field of display technology, and in particular relates to a display panel and display device. Background Technology

[0002] Mini LED (Light Emitting Diode) technology, representing the next generation of display technology, integrates tens of thousands of micron-sized LED chips onto a substrate surface and combines this with zone-driven technology to achieve high contrast, high brightness, and high dynamic range. This technology significantly enhances image performance through precise backlight control, making it one of the core solutions for current high-end display devices.

[0003] However, in current mainstream Mini LED light panel designs, the driver chip and the Mini LED light-emitting chip are usually arranged in a planar structure on the same layer. This structure can meet basic functional requirements when the number of zones is small, but as the requirements for display quality continue to increase, the density of backlight zones increases significantly, and the size and number of driver chips increase accordingly. The height and size of the driver chip itself can block light from wide viewing angles, causing the light to not diffuse effectively, resulting in a narrower overall viewing angle of the display module. When viewed from a wide viewing angle, brightness attenuation and color drift are likely to occur. Summary of the Invention

[0004] In view of this, embodiments of this application provide a display panel and a display device to solve the technical problem that when the driving chip and the light-emitting chip of the existing display panel are arranged on the same side, the light of the light-emitting chip will be blocked.

[0005] In a first aspect, embodiments of this application provide a display panel, including a substrate, an array of light-emitting chips and driving chips disposed on the substrate, and a circuit layer that connects the light-emitting chips and the driving chips;

[0006] The substrate includes a first substrate and a second substrate, the circuit layer is disposed between the first substrate and the second substrate, the driving chip is disposed on a first surface of the first substrate, and the light-emitting chip is disposed on a second surface of the second substrate opposite to the first substrate.

[0007] In some embodiments, the light-emitting chip array is disposed on the second surface of the substrate on which the second substrate is mounted, and a first mounting space is arrayed on the first surface of the substrate, the first mounting space being used to fix and mount the driving chip.

[0008] In some embodiments, the first mounting space is a first mounting hole, and a first pad for fixing the driver chip is provided in the first mounting hole. A second pad for fixing the light-emitting chip is provided on the second surface of the second substrate. Both the first pad and the second pad are connected to the circuit layer.

[0009] In some embodiments, the first mounting space is a first receiving groove, the bottom of the first receiving groove is provided with a first pad for fixing the driver chip, and the second surface of the second substrate is provided with a second pad for fixing the light-emitting chip. Both the first pad and the second pad are connected to the circuit layer.

[0010] In some embodiments, a first mounting space is provided on the first substrate, the first mounting space is used to fix the driver chip, and the driver chip does not protrude from the first surface of the first substrate;

[0011] A second mounting space is provided on the second substrate for fixing the light-emitting chip, and the light-emitting chip does not protrude from the second surface of the second substrate.

[0012] In some embodiments, the first mounting space is a first mounting hole, and a first pad for fixing the driver chip is provided in the first mounting hole. The second mounting space is a second mounting hole, and a second pad for fixing the light-emitting chip is provided in the second mounting hole. Both the first pad and the second pad are connected to the circuit layer.

[0013] In some embodiments, a positioning element is provided on the side of the first substrate near the second substrate, and the first substrate is aligned and attached to the second substrate through the positioning element.

[0014] In some embodiments, there is one first substrate and multiple second substrates, with the multiple second substrates spliced ​​on the first substrate.

[0015] In some embodiments, the projections of the light-emitting chip and the driving chip in the thickness direction of the substrate may completely overlap or completely not overlap.

[0016] Secondly, embodiments of this application provide a display device including the display panel described in the first aspect.

[0017] In existing technologies, the driver chip itself has a certain height and physical size. When the driver chip and the light-emitting chip are both located on one side of the substrate, part of the driver chip is located in the light path of the light-emitting chip, which will block the light emitted from the light-emitting chip with a certain light emission angle (especially at wide viewing angles). This prevents the light from diffusing effectively, narrowing the overall viewing angle of the display module and making it prone to brightness attenuation and color drift when viewed at wide viewing angles. The display panel and display device provided in this application completely avoid the situation where the driver chip blocks the light emitted from the light-emitting chip by placing the driver chip outside the light path of the light emitted from the light-emitting chip. This effectively improves the viewing angle of the display module and avoids the brightness attenuation and color drift that are prone to occur when viewed at wide viewing angles. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a schematic diagram of the structure of a display panel in the prior art;

[0020] Figure 2 This is a schematic diagram of the structure of the display panel provided in the embodiments of this application. Figure 1 ;

[0021] Figure 3 This is a schematic diagram of the structure of the display panel provided in the embodiments of this application. Figure 2 ;

[0022] Figure 4 This is a partial structural schematic diagram of the display panel provided in an embodiment of this application;

[0023] Figure 5 This is a schematic diagram of the structure of the display panel provided in the embodiments of this application. Figure 3 ;

[0024] Figure 6 This is a schematic diagram of the first substrate structure of the display panel provided in an embodiment of this application;

[0025] Figure 7 This is a schematic diagram of the second substrate structure of the display panel provided in the embodiments of this application.

[0026] The attached icon numbers are as follows:

[0027] 10. Substrate; 11. First substrate; 110. First mounting space; 12. Second substrate; 120. Second mounting space;

[0028] 20. Driver chip;

[0029] 30. Light-emitting chip;

[0030] 40. Line layer. Detailed Implementation

[0031] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that the embodiments of this application can also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the embodiments of this application with unnecessary detail.

[0032] It should also be understood that the term "and / or" as used in the specification of embodiments of this application and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0033] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0034] It should be understood that the terms "length", "width", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", and "outer" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.

[0035] Furthermore, in the description of the embodiments and the appended claims of this application, the terms "first," "second," "third," etc., are used only for distinguishing descriptions and should not be construed as indicating or implying relative importance.

[0036] In the description of embodiments in this application, references to "some embodiments" or "some embodiments" mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in some embodiments," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiments, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized. "A plurality" refers to two or more.

[0037] like Figure 1 As shown, in current mainstream Mini LED light panel designs, the driver chip 20 and the Mini LED light-emitting chip 30 are typically arranged in a planar configuration on the same layer. This structure can meet basic functional requirements when the number of zones is small, but with the continuous improvement of display quality requirements, the backlight zone density has increased significantly, and the size and number of driver chips 20 have increased accordingly, exposing the following key technical bottlenecks:

[0038] 1. Optical path obstruction and viewing angle limitation: The driver chip 20 itself has a certain physical height and footprint. When it is on the same plane as the light-emitting chip 30, it directly blocks part of the light emitted from the light-emitting chip 30, especially for light emitted from a wide viewing angle. This obstruction effect reduces light diffusion efficiency, resulting in a narrowing of the overall viewing angle of the display module. In oblique viewing scenarios, brightness attenuation and color shift are likely to occur, significantly affecting the user experience.

[0039] 2. Dark Area Formation and Backlight Uniformity Defects: The opaque nature of the driver chip 20 can create localized "dark spots" or "dark areas" in the backlight field. As the zone density increases, the distribution density of these dark areas also increases, resulting in a superposition effect between adjacent dark areas and a decrease in backlight uniformity. When displaying solid colors or grayscale images, visible uneven brightness may occur, directly weakening the display quality.

[0040] 3. Thermal Management Stress and Reliability Risks: As one of the main heat sources, the driver chip 20, when densely arranged with the light-emitting chip 30 on the same layer, leads to a high concentration of heat. Heat is difficult to conduct quickly and dissipate evenly, causing excessively high local junction temperatures. Excessively high junction temperatures not only reduce the luminous efficacy and lifespan of the light-emitting chip 30, but may also cause performance fluctuations in the driver chip 20, thereby affecting the stability and reliability of the entire display system.

[0041] The aforementioned technical obstacles have become key bottlenecks restricting the further development of Mini LED display technology towards higher partition density, better image quality, and more reliable performance, and breakthroughs are urgently needed through structural innovation and process optimization.

[0042] Based on this, embodiments of this application provide a display panel, such as... Figures 2 to 5 As shown, the display panel includes a substrate 10, a driver chip 20, a light-emitting chip 30, and a circuit layer 40.

[0043] An array of light-emitting chips 30 and driving chips 20 is disposed on substrate 10, and a circuit layer 40 is disposed on substrate 10 and conducts light-emitting chips 30 and driving chips 20.

[0044] The substrate 10 includes a first substrate 11 and a second substrate 12, a circuit layer 40 is disposed between the first substrate 11 and the second substrate 12, a driving chip 20 is disposed on the first surface of the first substrate 11, and a light-emitting chip 30 is disposed on the second surface of the second substrate 12 opposite to the first substrate 11.

[0045] In the prior art, the driver chip 20 itself has a certain height and physical size. When the driver chip 20 and the light-emitting chip 30 are both located on one side of the substrate 10, part of the driver chip 20 is located in the light path of the light-emitting chip 30, which will block the light emitted from the light-emitting chip 30 with a certain light emission angle (especially at a wide viewing angle). This will prevent the light from diffusing effectively, resulting in a narrower overall viewing angle of the display module. When viewed at a wide viewing angle, brightness attenuation and color shift are likely to occur. The display panel and display device provided in this application completely avoid the situation where the driver chip 20 blocks the light emitted from the light-emitting chip 30 by placing the driver chip 20 outside the light path of the light emitted from the light-emitting chip 30. This effectively improves the viewing angle of the display module and avoids brightness attenuation and color shift when viewed at a wide viewing angle.

[0046] In application, by placing the light-emitting chip 30 and the driving chip 20 on opposite surfaces of different substrates, the driving chip 20 is positioned outside the light path emitted by the light-emitting chip 30. Specifically, the driving chip 20 and the light-emitting chip 30 are staggered along the length of the substrate 10, meaning the position of the driving chip 20 does not obstruct the light emitted by the light-emitting chip 30. By placing the driving chip 20 outside the light path of the light emitted by the light-emitting chip 30 (e.g., inside the substrate 10, below the substrate 10, or to the side or outside the backlight path), the light emitted by the light-emitting chip 30 can diffuse freely without bypassing the driving chip 20; effectively solving the problems of brightness attenuation and color drift during wide-view observation. It should be noted that the thickness direction of the substrate 10 refers to the Z direction in the figure, and the length direction of the substrate 10 refers to the X direction in the figure. The above is only for the convenience of understanding the technical solution of this application and should not be construed as a limitation on the scope of protection of this application.

[0047] In this application, the driver chip 20 is no longer located on the light propagation path, thus avoiding any obstruction in the optical path. The physical position of the driver chip 20 no longer overlaps with the light propagation path, eliminating localized obstruction caused by the driver chip 20 in the backlight field, effectively eliminating the Mura effect and improving backlight uniformity. Furthermore, by moving the driver chip 20 out of the light path of the light-emitting chip 30, heat source distribution is optimized. With the physical separation of the driver chip 20 and the light-emitting chip 30, the heat source is no longer highly concentrated, allowing the heat from the driver chip 20 to dissipate in different directions, preventing localized overheating. The heat dissipation path of the light-emitting chip 30 is not blocked by the driver chip 20, improving heat dissipation efficiency, reducing junction temperature, and enhancing the overall reliability and lifespan of the system.

[0048] In some embodiments, such as Figure 2 As shown, the array of light-emitting chips 30 is disposed on the second surface of the second substrate 12, and a first mounting space 110 is formed on the first surface of the first substrate 11. The first mounting space 110 is used to fix and mount the driver chip 20, and the driver chip 20 does not protrude from the first surface of the first substrate 11. By embedding the driver chip 20 inside the substrate 10, the technical bottleneck caused by the co-layering of the driver chip 20 and the light-emitting chip 30 in Mini LED technology is fundamentally solved. Compared with traditional solutions, it not only significantly improves the display quality, but also provides the possibility of achieving higher density partitioning and better image quality, which is a key breakthrough for the development of Mini LED technology towards higher quality and wider application.

[0049] In this application, by embedding the driver chip 20 inside the first substrate 11 so that it does not protrude from the first surface, the integrity of the light propagation path is ensured. Brightness attenuation is effectively reduced during wide-viewing angles, color drift is virtually eliminated, and the user experience is significantly improved. When displaying solid colors or grayscale images, visible brightness unevenness is virtually eliminated, and image quality is significantly enhanced. Furthermore, the physical separation of the driver chip 20 and the light-emitting chip 30 is achieved, allowing heat to be conducted in different directions and preventing localized overheating.

[0050] In applications, such as Figure 2 As shown, the circuit layer 40 is disposed between the first substrate 11 and the second substrate 12, and the circuit layer 40 covers the first mounting space 110, thereby enclosing the driver chip 20 within the first mounting space 110. In this way, on the one hand, physical isolation eliminates the obstruction of the light path by the driver chip 20, ensuring the integrity of the light propagation path and significantly improving the display viewing angle and brightness uniformity; on the other hand, the enclosed structure effectively blocks external environmental interference, enhancing the protection and stability of the driver chip 20, while optimizing the heat conduction path to reduce junction temperature; furthermore, the full-coverage design of the circuit layer 40 simplifies the packaging process, reduces the risk of dust or foreign matter intrusion, further improves the reliability and yield of the display panel, and provides structural protection for high-density partitioning and refined drive control.

[0051] Compared to the existing driver chip 20 configuration, which, due to its opacity, forms a tiny "dark spot" or "dark area" in the backlight field, these dense dark areas can interfere with each other and reduce backlight uniformity. This can lead to visible uniformity defects (Mura effect) when displaying solid colors or grayscale images. In contrast, this application completely avoids the formation of "dark spots" or "dark areas" by covering the driver chip 20 with the circuit layer 40, thus preventing the Mura effect.

[0052] In some embodiments, such as Figure 2As shown, the first mounting space 110 is a first receiving groove. A first pad for fixing the driver chip 20 is provided at the bottom of the first receiving groove, and a second pad for fixing the light-emitting chip 30 is provided on the second surface of the second substrate 12. Both the first and second pads are conductive to the circuit layer 40. The depth design of the receiving groove achieves spatial isolation between the driver chip 20 and the light-emitting chip 30, completely eliminating light path obstruction and dark area formation problems, significantly improving the display viewing angle and backlight uniformity. The vertical conductivity between the bottom pad and the circuit layer 40 optimizes the electrical connection reliability of the driver chip 20, reduces signal loss, and improves driving efficiency. The combination of the receiving groove and the pad enhances the mechanical fixing stability of the driver chip 20. Simultaneously, the heat conduction path design between the pad and the circuit layer 40 effectively disperses the heat generated by the driver chip 20, reducing junction temperature and extending system lifespan. Furthermore, this structure simplifies the packaging process, improves the space utilization of the substrate 10, and provides a more reliable physical basis for high-density partitioning and complex drive control.

[0053] In some embodiments, such as Figure 3 As shown, the first mounting space 110 is a first mounting hole, and a first pad (not shown in the figure) for fixing the driver chip 20 is provided in the first mounting hole. A second pad (not shown in the figure) for fixing the light-emitting chip 30 is provided on the second surface of the second substrate 12. Both the first pad and the second pad are conductive to the circuit layer 40. In application, the pads are specifically set on the hole wall of the mounting hole and are conductive to the circuit layer 40. The direct conductivity between the pads and the circuit layer 40 significantly improves the electrical connection reliability between the driver chip 20 and the light-emitting chip 30 and reduces signal transmission loss. The embedded design of the first mounting hole completely isolates the driver chip 20 from the light-emitting chip 30, completely eliminating the problems of light path obstruction and dark area formation. The pad structure optimizes the heat conduction path, and the heat generated by the driver chip 20 can be quickly dispersed through the pads and the circuit layer 40, effectively reducing the junction temperature and improving system stability. In addition, the integrated design of the pads and the circuit layer 40 simplifies the packaging process, enhances the structural sealing, and further ensures the yield and long-term reliability of the display panel in high-density partitioning scenarios.

[0054] In some embodiments, such as Figure 2As shown, the end of the driver chip 20 closest to the light-emitting chip 30 is flush with the surface of the second substrate 12. This achieves physical isolation between the driver chip 20 and the light-emitting chip 30, ensuring an unobstructed light propagation path, significantly improving the viewing angle and backlight uniformity. Simultaneously, the flush contact optimizes heat conduction efficiency, reduces junction temperature, and enhances overall structural stability. In some other embodiments, the end of the driver chip 20 closest to the light-emitting chip 30 is lower than the surface of the second substrate 12. By placing the end of the driver chip 20 closest to the light-emitting chip 30 within the second substrate 12, spatial isolation between the driver chip 20 and the light-emitting chip 30 is achieved, further eliminating light path obstruction and dark area formation problems, significantly improving the viewing angle and backlight uniformity. Simultaneously, the recessed design optimizes the heat conduction path, reduces the junction temperature of the driver chip 20, and enhances overall structural stability.

[0055] In some embodiments, such as Figure 4 As shown, a first mounting space 110 is provided on the first substrate 11. The first mounting space 110 is used to fix and mount the driver chip 20. The driver chip 20 does not protrude from the first surface of the first substrate 11.

[0056] A second mounting space 120 is formed on the second substrate 12 for fixing and mounting the light-emitting chip 30. The dual-substrate substrate 10 structure, by embedding the driving chip 20 and the light-emitting chip 30 into the mounting spaces of separate substrates and combining this with the design of the sandwich circuit layer 40, achieves unobstructed light paths, improved backlight uniformity, optimized thermal management, enhanced signal stability, and support for high-density partitioning. Compared to traditional same-layer layouts, this solution not only solves the core bottleneck problems in Mini LED technology (such as limited viewing angle, Mura effect, and excessively high junction temperature), but also improves the overall system reliability and mass production feasibility through layered isolation design, providing a better physical implementation path for high-end display devices.

[0057] In the application, the driver chip 20 is embedded in the mounting space of the first substrate 11 without protruding from the surface, ensuring that its physical position is completely separated from the light propagation path of the light-emitting chip 30. This completely eliminates the problem of light path obstruction, significantly improves the display viewing angle, and avoids brightness attenuation and color drift when viewed at large angles. The light-emitting chip 30 is embedded in the mounting space of the second substrate 12, further reducing interference with the backlight field. Combined with the isolation design of the driver chip 20, it can eliminate the formation of dark areas and improve backlight uniformity. The dual-substrate structure achieves physical isolation between the driver chip 20 and the light-emitting chip 30, and the heat source distribution is dispersed, avoiding the local overheating problem caused by the dense arrangement of the driver chip 20 and the light-emitting chip 30 in traditional co-layer designs. The circuit layer 40 is sandwiched between the two substrates, providing multiple paths for heat conduction (such as through the substrate material or the thermally conductive design of the circuit layer 40), reducing the junction temperature of the driver chip 20 and the light-emitting chip 30, extending device life and improving stability. The circuit layer 40 is independently disposed between the two substrates. By optimizing the wiring path, signal interference is reduced, the electrical connection reliability between the driver chip 20 and the light-emitting chip 30 is improved, and signal loss is reduced.

[0058] The embedded mounting space design of the dual-substrate architecture (both the driver chip 20 and the light-emitting chip 30 are enclosed within the substrate) enhances structural sealing, reduces the risk of dust or foreign object intrusion, and simplifies the packaging process, improving production yield. The layered layout of the dual-substrate architecture frees up surface space on the substrate 10, allowing for denser partitioning designs and providing a physical basis for achieving higher resolution and HDR (High Dynamic Range) display effects. The independent mounting spaces for the driver chip 20 and the light-emitting chip 30 avoid the layout limitations caused by size conflicts in traditional same-layer designs, supporting more flexible partition density optimization.

[0059] In application, the first mounting space 110 (first receiving groove) on the first substrate 11 and the second mounting space 120 (second receiving groove) on the second substrate 12 can protect the light-emitting chip 30 and the driving chip 20. In addition, since the second receiving groove can block the large-angle light of the light-emitting chip 30, more precise control of the light can be achieved and the halo can be reduced.

[0060] In some embodiments, such as Figure 4 and Figure 5As shown, the first mounting space 110 is a first mounting hole, in which a first pad for fixing the driver chip 20 is provided. The second mounting space 120 is a second mounting hole, in which a second pad for fixing the light-emitting chip 30 is provided. Both the first and second pads are conductive to the circuit layer 40. The driver chip 20 and the light-emitting chip 30 are completely physically isolated, eliminating light path obstruction and dark area formation problems, significantly improving the display viewing angle and backlight uniformity. The vertical conductivity between the pads and the circuit layer 40 optimizes electrical connection reliability, reduces signal loss, and improves driving efficiency. The layered layout of the dual substrates disperses heat sources. Combined with the heat conduction design of the pads and the circuit layer 40, it effectively reduces the junction temperature of the driver chip 20 and the light-emitting chip 30, extending the system lifespan. In addition, the independent mounting space design simplifies the packaging process, reduces the risk of dust intrusion, and provides a structural basis for high-density partitioning and HDR display, significantly improving the performance and reliability of the display panel.

[0061] In applications, first pads for fixing the light-emitting chip 30 can be arrayed on the upper surface of the first substrate 11. Each first pad has corresponding connection lines and connection points for communication with corresponding points on the first substrate 11. A PCB (Printed Circuit Board), FPC (Flexible Printed Circuit), or glass substrate 10 can be used to fabricate circuitry on the upper surface, and the light-emitting chip 30 can be die-bonded. A first mounting space 110 is formed at a predetermined position through precision processing (such as etching or laser ablation) for embedding the driver chip 20. A circuit layer 40 is provided on the lower surface of the second substrate 12, including second pads for fixing the light-emitting chip 30 and drive lines connecting the connection points of the first substrate 11. Similarly, a PCB, FPC, or glass substrate 10 can be used to fabricate circuitry on the lower surface, and the driver chip 20 can be mounted. A second receiving space is formed at a predetermined position through precision processing (such as etching or laser ablation) for embedding the light-emitting chip 30.

[0062] In this application, by interlocking the mounting spaces, chips that were originally distributed on two planes are embedded into the first substrate 11 and the second substrate 12, significantly reducing the overall thickness of the module and achieving an ultra-thin design. Simultaneously, the chips are securely housed within their respective mounting spaces and physically protected by the substrate 10, enhancing the device's resistance to shock and vibration. Furthermore, the first substrate 11 and the second substrate 12 become two independent and efficient heat dissipation paths, avoiding heat cross-contamination and improving heat dissipation efficiency. This allows high-performance display devices that previously required complex multi-layered circuitry to be achieved using conventional surface mount technology (SMT) processes, reducing manufacturing costs.

[0063] In some embodiments, a positioning element (not shown) is provided on the side of the first substrate 11 near the second substrate 12, and the first substrate 11 is aligned and bonded to the second substrate 12 through the positioning element. Specifically, anisotropic conductive adhesive or solder bumps can be applied to the surfaces of the first substrate 11 and the second substrate 12, and then a high-precision alignment device can be used to precisely align the first substrate 11 and the second substrate 12 to ensure that the connection points of the first substrate 11 and the second substrate 12 are bonded and conductive.

[0064] In some embodiments, such as Figure 6 and Figure 7 As shown, there is one first substrate 11 and multiple second substrates 12, which are spliced ​​together on the first substrate 11. By staggering the seams of the first substrate 11 and the second substrate 12, a larger integrated display device can be formed without the need for additional support devices, and it has higher splicing strength.

[0065] In some embodiments, such as Figures 2 to 5 As shown, the projections of the light-emitting chip 30 and the driving chip 20 in the thickness direction of the substrate 10 may be completely overlapping or completely non-overlapping. Preferably, the projections of the light-emitting chip 30 and the driving chip 20 in the thickness direction of the substrate 10 are completely non-overlapping. When the projections of the light-emitting chip 30 and the driving chip 20 in the thickness direction of the substrate 10 are completely non-overlapping, physical isolation between the driving chip 20 and the light-emitting chip 30 is achieved, the light propagation path is complete, the display viewing angle is effectively expanded, and color drift is basically eliminated. Dark area formation is eliminated, backlight uniformity is improved, the Mura effect is basically eliminated, and the image quality is significantly improved. Heat sources are dispersed, the light efficiency of the light-emitting chip 30 is improved, its lifespan is extended, and the performance stability of the driving chip 20 is significantly improved. Higher density partitioning can be achieved, supporting 8K and higher resolution displays, laying the foundation for HDR applications. Precise conduction is achieved through the circuit layer 40, signal loss is reduced, driving efficiency is improved, and the precise control requirements of high-resolution displays are met.

[0066] Secondly, embodiments of this application provide a display device including the display panel described in the first aspect. Because it includes the display panel described in the first aspect, it possesses all the beneficial effects described in the first aspect.

[0067] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0068] The above-described embodiments are only used to illustrate the technical solutions of the embodiments of this application, and are not intended to limit them. Although the embodiments of this application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of the embodiments of this application.

Claims

1. A display panel, characterized in that, It includes a substrate, an array of light-emitting chips and driving chips disposed on the substrate, and a circuit layer that connects the light-emitting chips and the driving chips; The substrate includes a first substrate and a second substrate, the circuit layer is disposed between the first substrate and the second substrate, the driving chip is disposed on a first surface of the first substrate, and the light-emitting chip is disposed on a second surface of the second substrate opposite to the first substrate. The first substrate and the second substrate form a dual-substrate structure, which ensures that the position of the driving chip does not block the light emitted by the light-emitting chip, and the light emitted by the light-emitting chip can diffuse freely without bypassing the driving chip. Furthermore, the physical separation of the driving chip and the light-emitting chip prevents the heat source from being highly concentrated, allowing the heat from the driving chip to dissipate in different directions, avoiding local overheating. The heat dissipation path of the light-emitting chip is not blocked by the driving chip, thus improving heat dissipation efficiency.

2. The display panel as described in claim 1, characterized in that, The light-emitting chip array is disposed on the second surface of the second substrate, and a first mounting space is provided on the first surface of the first substrate for fixing and mounting the driving chip.

3. The display panel as described in claim 2, characterized in that, The first mounting space is a first mounting hole, and a first pad for fixing the driver chip is provided in the first mounting hole. A second pad for fixing the light-emitting chip is provided on the second surface of the second substrate. Both the first pad and the second pad are connected to the circuit layer.

4. The display panel as described in claim 2, characterized in that, The first mounting space is a first receiving groove. The bottom of the first receiving groove is provided with a first pad for fixing the driver chip. The second surface of the second substrate is provided with a second pad for fixing the light-emitting chip. Both the first pad and the second pad are connected to the circuit layer.

5. The display panel as described in claim 1, characterized in that, A first mounting space is provided on the first substrate, and the first mounting space is used to fix the driver chip, wherein the driver chip does not protrude from the first surface of the first substrate; A second mounting space is provided on the second substrate for fixing the light-emitting chip, and the light-emitting chip does not protrude from the second surface of the second substrate.

6. The display panel as described in claim 5, characterized in that, The first mounting space is a first mounting hole, and a first pad for fixing the driver chip is provided in the first mounting hole. The second mounting space is a second mounting hole, and a second pad for fixing the light-emitting chip is provided in the second mounting hole. Both the first pad and the second pad are connected to the circuit layer.

7. The display panel as described in claim 5, characterized in that, The first substrate has a positioning element on the side near the second substrate, and the first substrate is aligned and bonded to the second substrate through the positioning element.

8. The display panel as described in claim 5, characterized in that, There is one first substrate and multiple second substrates, which are spliced ​​together on the first substrate.

9. The display panel as described in any one of claims 1 to 8, characterized in that, The projections of the light-emitting chip and the driving chip in the thickness direction of the substrate may either completely overlap or completely not overlap.

10. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 9.

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