Method, device and equipment for protecting nonvolatile memory
By increasing or decreasing the time integral count value and using partition redundancy protection methods, frequent erasure and writing of non-volatile memory is identified and blocked, solving the problems of high resource consumption and low accuracy in the prior art. This achieves effective protection of non-volatile memory, reduces the risk of memory cell failure and hardware replacement costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CHANGSHA YINGWEITENG ELECTRIC TECH CO LTD
- Filing Date
- 2026-01-30
- Publication Date
- 2026-05-12
AI Technical Summary
Existing technologies for detecting frequent erase/write operations in non-volatile memory require significant resources and are not very accurate. They cannot effectively identify and block long-term, low-frequency cumulative erase/write operations, leading to an increased risk of memory cell failure.
By acquiring the erase and write status of the target non-volatile memory over a preset time period, and using the increase or decrease of the time integral count value, frequent erase and write operations are identified, and protection operations are performed when a threshold is reached. Combined with the partitioned redundancy protection method, backup storage units are used to replace failed units for data storage.
It achieves accurate identification and blocking of frequent erase and write operations on non-volatile memory with minimal resource consumption, avoiding memory cell failure, reducing hardware replacement costs, and improving the reliability of automated control systems.
Smart Images
Figure CN122018802A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of automation control, and in particular to a method, apparatus, and device for protecting non-volatile memory. Background Technology
[0002] Currently, most function codes (such as operation and configuration data) in automation control are stored in non-volatile memory. If the storage of these data is abnormal, the equipment may fail to operate, or even cause a safety accident. For example, as the drive unit of the actuator in the industrial automation control system, the frequency converter stores thousands of function codes in EEPROM (Electrically Erasable Programmable Read Only Memory).
[0003] In typical automated control scenarios, the lifespan of non-volatile memory is mainly limited by the number of erase / write cycles, typically around 1 million, which is sufficient to cover the device's lifespan. However, in actual use, software design flaws and improper user operation can lead to frequent erase / write cycles of non-volatile memory, drastically increasing the risk of memory cell failure.
[0004] In related technologies, frequent erase / write detection schemes for non-volatile memory often require significant resources and are not very accurate. Therefore, how to achieve accurate identification of frequent erase / write operations on non-volatile memory with minimal resource consumption, and thus effectively identify and block long-term, low-frequency cumulative erase / write operations in automated control scenarios, is an urgent problem to be solved. Summary of the Invention
[0005] The purpose of this invention is to provide a method, apparatus, and device for protecting non-volatile memory, which can accurately identify frequent erasures and writes of non-volatile memory with minimal resource consumption.
[0006] To address the aforementioned technical problems, this invention provides a method for protecting non-volatile memory, comprising: The erase / write status of the target non-volatile memory is obtained within a preset time period; wherein, the erase / write status includes an erase / write state where erase / write occurs and an unerased state where erase / write does not occur. If the erase / write situation is the erase / write state, then the time integral count value is increased using a preset accumulation value; wherein the increased time integral count value is greater than or equal to the sum of the time integral count value before the increase and the preset accumulation value; When the time integral count value is greater than or equal to the frequent erase / write threshold, it is determined that the target non-volatile memory is subject to frequent erase / write, and a preset frequent erase / write protection operation is executed.
[0007] On the other hand, after obtaining the erase / write status of the target non-volatile memory over a preset time period, the method further includes: If the erase / write status is the non-erasure / write state, then the time integral count value is adjusted to the difference between the time integral count value and the preset decrement value.
[0008] On the other hand, the method of increasing the time integral count value using a preset accumulation value includes: The time integral count value is adjusted to be the sum of the time integral count value and the preset accumulated value.
[0009] On the other hand, acquiring the erase / write status of the target non-volatile memory over a preset time period includes: When the target non-volatile memory is erased or written at least once within the preset time period, the erase / write situation is determined to be the erase / write state; When the target non-volatile memory is not erased or written during the preset time period, the erase / write situation is determined to be the non-erased / written state.
[0010] On the other hand, determining that the target non-volatile memory is subject to frequent erase / write operations and performing a preset frequent erase / write protection operation includes: The time integral count value is cleared to zero, and a frequent erase / write alarm signal is output.
[0011] On the other hand, the preset accumulated value is a value determined based on the normal usage frequency, lifespan, erase / write lifespan, and daily usage time of the target non-volatile memory; the frequent erase / write threshold is the product of the preset accumulated value and the preset minimum number of accumulated times.
[0012] On the other hand, the method also includes: Obtain an access request to the target non-volatile memory; wherein the access request is a read request or a write request; If the current storage unit corresponding to the access request is a failed unit, then a target mapping unit is determined according to preset fault mapping information; wherein, the current storage unit is any data storage unit that the access request needs to access, the data storage unit is a storage unit in the data area of the target non-volatile memory, the failed unit is a failed storage unit in the target non-volatile memory; the target mapping unit is the backup storage unit corresponding to the current storage unit, the backup storage unit is a storage unit in the backup area of the target non-volatile memory, and the preset fault mapping information includes the correspondence between each failed unit in the target non-volatile memory and its corresponding backup storage unit, and the number of failed units in the target non-volatile memory is less than or equal to the number of backup storage units; The target mapping unit is used to complete the access request to the current storage unit.
[0013] On the other hand, the method also includes: When a new faulty storage cell is detected in the data area, the new faulty storage cell is marked as a faulty cell. Determine whether there are available backup storage units in the backup area; wherein, the available backup storage unit is a backup storage unit that has not established a corresponding relationship with the corresponding failed unit; If so, a correspondence is established between the new fault-failed storage unit and the target backup storage unit in the preset fault mapping information; wherein, the target backup storage unit is any of the available backup storage units.
[0014] The present invention also provides a protection device for non-volatile memory, comprising: The status acquisition module is used to acquire the erase and write status of the target non-volatile memory within a preset time period; wherein, the erase and write status includes an erase and write state where erasure and writing are present and an unerased state where erasure and writing are not present. The time integration module is used to increase the time integration count value by using a preset accumulation value if the erase / write situation is the erase / write state; wherein the increased time integration count value is greater than or equal to the sum of the time integration count value before the increase and the preset accumulation value; The erase / write protection module is used to determine that the target non-volatile memory is subject to frequent erase / write operations when the time integral count value is greater than or equal to the frequent erase / write threshold, and to perform a preset frequent erase / write protection operation.
[0015] Furthermore, the present invention also provides a protection device for non-volatile memory, comprising: Memory, used to store computer programs; A processor, used to implement the steps of the non-volatile memory protection method as described above when executing the computer program.
[0016] The present invention provides a method for protecting a non-volatile memory, comprising: acquiring the erase / write status of a target non-volatile memory within a preset time period; wherein the erase / write status includes an erase / write state where erase / write occurs and an unerased state where erase / write does not occur; if the erase / write status is an erase / write state, then increasing the time integral count value using a preset accumulated value; wherein the increased time integral count value is greater than or equal to the sum of the time integral count value before the increase and the preset accumulated value; when the time integral count value is greater than or equal to a frequent erase / write threshold, determining that the target non-volatile memory is subject to frequent erase / write, and performing a preset frequent erase / write protection operation.
[0017] As can be seen, this invention identifies frequent erase / write operations on the target non-volatile memory by increasing the time integral count value using a preset accumulation value when the target non-volatile memory is in an erase / write state within a preset time period. This approach, which integrates the write time, avoids the process of counting the number of writes to each memory cell. It achieves accurate identification of frequent erase / write operations on the non-volatile memory with minimal resource consumption. After identifying frequent erase / write operations, it executes a preset frequent erase / write protection operation to implement write protection for the non-volatile memory. This effectively identifies and blocks long-term, low-frequency cumulative erase / write operations in automated control scenarios. Furthermore, this invention also provides a protection device and apparatus for non-volatile memory, which also possesses the aforementioned beneficial effects. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0019] Figure 1 A flowchart illustrating a method for protecting a non-volatile memory provided in an embodiment of the present invention; Figure 2 This is a flowchart illustrating another method for protecting non-volatile memory provided in an embodiment of the present invention. Figure 3 A flowchart illustrating a partition redundancy protection method for non-volatile memory provided in an embodiment of the present invention; Figure 4 This is a flowchart illustrating another method for partition redundancy protection of non-volatile memory provided in an embodiment of the present invention. Figure 5 This is a structural block diagram of a protection device for a non-volatile memory provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of a protection device for a non-volatile memory provided in an embodiment of the present invention. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0021] Please refer to Figure 1 , Figure 1 A flowchart illustrating a method for protecting non-volatile memory provided in an embodiment of the present invention. The method may include: Step 101: Obtain the erase / write status of the target non-volatile memory within a preset time period; wherein, the erase / write status includes erase / write state where there is erase / write and non-erase / write state where there is no erase / write.
[0022] It is understood that the target non-volatile memory in this embodiment can be a non-volatile memory that needs protection in automated control equipment (such as a frequency converter), i.e., a non-volatile memory that requires frequent erase and write tests. The specific type of memory for the target non-volatile memory in this embodiment can be set by the designer according to the practical scenario and user needs. For example, the target non-volatile memory can be EEPROM, or other non-volatile memories such as flash memory. This embodiment does not impose any restrictions on this.
[0023] Correspondingly, the erase / write situation in this step can refer to the erase / write situation of the target non-volatile memory within a preset time period. The specific content of the erase / write situation in this embodiment can be set by the designer according to the practical scenario and user needs. For example, the erase / write situation can include an erase / write state where erasure has occurred, i.e., at least one erase / write operation has been performed within the preset time period; it can also include a non-erasure state where no erasure has occurred, i.e., no erasure / write operation has been performed within the preset time period; the erase / write situation can also include the number of erase / write operations corresponding to the erase / write state, i.e., the number of erase / write operations performed within the preset time period. This embodiment does not impose any limitations on this.
[0024] Correspondingly, the detection of frequent erase / write operations on non-volatile memory in related technologies mainly relies on two technical approaches: 1. Identification method based on fixed-length instruction queues, which constructs a queue of fixed capacity to temporarily store erase / write instructions that have not yet been executed; when the queue is saturated, it is determined to be frequent erase / write operations to trigger write protection; however, this method requires allocating static storage space in the limited chip RAM (random access memory), which has a large resource overhead, and its identification mechanism is essentially instantaneous and stateless, lacking the ability to identify instructions with slightly longer erase / write intervals, resulting in a monitoring blind spot. 2. The statistical identification method based on a fixed time window counts erase / write commands within a fixed time window (e.g., 10 seconds). If the count exceeds a preset threshold, an alarm is generated. While this method consumes fewer resources, its accuracy is low. For example, a continuous erase / write behavior of "19 times every 10 seconds" (below the threshold of 20 times) will not be identified as frequent erase / write, but the accumulated erase / write count will continuously consume the lifespan of non-volatile memory (e.g., EEPROM). This defect cannot be solved by lowering the warning threshold, as this may falsely trigger alarms and introduce new problems. Therefore, this embodiment obtains the erase / write status of the target non-volatile memory within a preset time period. Using this erase / write status, the time integral count value is adjusted to detect frequent erase / write of the target non-volatile memory. This embodiment uses the idea of integrating the write time to identify frequent erase / write of non-volatile memory, avoiding the queue storage of erase / write commands, and can achieve accurate identification of frequent erase / write of non-volatile memory with less resource consumption. In this step, the erase and write status of the target non-volatile memory can be obtained at preset time intervals within a preset time period, and the time integral count value can be adjusted at preset time intervals.
[0025] The specific time setting for the preset time period in this step can be customized by the designer based on the practical scenario and user needs. For example, the preset time period can be 1 second. For instance, the processor can acquire the erase / write status S of the target non-volatile memory within the current 1 second. If at least one erase / write operation has occurred within the current 1 second, then S=1 (i.e., erase / write state); if no erase / write operation has occurred within the current 1 second, then S=0 (i.e., no erase / write state). The preset time period can also be a longer time value (e.g., 1 minute) or a shorter time value (e.g., 0.5 seconds), and this embodiment does not impose any restrictions on this.
[0026] Step 102: If the erasure / write status is in the erasure / write state, then increase the time integral count value using the preset accumulation value; wherein, the increased time integral count value is greater than or equal to the sum of the time integral count value before the increase and the preset accumulation value.
[0027] Understandably, in this step, the processor can increase the time integral count value using a preset accumulated value when the erase / write state is active. This increased time integral count value can then be used to detect whether the target non-volatile memory is subject to frequent erase / write operations. The preset accumulated value in this step can be a pre-set value used to adjust and increase the time integral count value during each erase / write operation. The specific value of the preset accumulated value in this embodiment can be set by the designer according to the usage scenario and user needs. For example, the preset accumulated value can be a value greater than 0; for instance, the preset accumulated value can be 1. The preset accumulated value can also be a value greater than 1, thereby improving the recognition speed of frequent erase / write operations.
[0028] Correspondingly, the specific method for increasing the time integral count value using the preset accumulation value in this step can be set by the designer according to the practical scenario and user needs. For example, the time integral count value (SUM) can be adjusted to the sum of the time integral count value (SUM) and the preset accumulation value (M), i.e., SUM = SUM + M. The erase / write situation also includes the erase / write count corresponding to the erase / write state, in which case the time integral count value (SUM) can also be adjusted to the sum of the time integral count value (SUM), the preset accumulation value (M), and the erase / write count. This embodiment does not impose any restrictions on this.
[0029] It should be noted that for the case where the erasure state is not erased, the designer can set it according to the practical scenario and user needs. For example, when the erasure state is not erased, the time integral count value can be adjusted to decrease, such as adjusting the time integral count value to the difference between the time integral count value and a preset decrement value. Similarly, this embodiment does not limit the specific value of the preset decrement value. For example, the preset decrement value can be 1, that is, when the erasure state is not erased, the time integral count value can be adjusted to the difference between the time integral count value and 1. Accordingly, when the time integral count value is adjusted to the sum of the time integral count value and the preset accumulated value in the erasure state, and when the time integral count value is adjusted to the difference between the time integral count value and the preset decrement value in the non-erasure state, the preset accumulated value can be greater than the preset decrement value. In some embodiments, the time integral count value may not be adjusted when the erasure state is not erased. This embodiment does not impose any restrictions on this.
[0030] Step 103: When the time integral count value is greater than or equal to the frequent erase / write threshold, it is determined that the target non-volatile memory is subject to frequent erase / write, and a preset frequent erase / write protection operation is executed.
[0031] In this step, the processor can determine that the target non-volatile memory is subject to frequent erase / write operations when the time integral count value is greater than or equal to the frequent erase / write threshold, thus realizing the detection of frequent erase / write operations on the target non-volatile memory. Furthermore, by executing a preset frequent erase / write protection operation, the processor can implement write protection for the target non-volatile memory. Correspondingly, in this step, when the time integral count value is greater than or equal to the frequent erase / write threshold, the time integral count value can also be cleared to zero to facilitate subsequent detection.
[0032] Correspondingly, the specific process of executing the preset frequent erase / write protection operation when the target non-volatile memory is determined to be frequently erased / written in this step, i.e., the specific operation content of the preset frequent erase / write protection operation, can be set by the designer according to the practical scenario and user needs. For example, in this step, the time integral count value can be cleared to zero and a frequent erase / write alarm signal can be output; alternatively, the erase / write operation of the target non-volatile memory can be restricted directly or when frequent erase / write is detected multiple times. For instance, in this step, when the time integral count value is greater than or equal to the frequent erase / write threshold, the time integral count value can be cleared to zero and a frequent erase / write alarm signal can be output; if the number of times the frequent erase / write alarm signal is output reaches the number threshold within the preset multiple detection time period, the erase / write operation of the target non-volatile memory can be restricted.
[0033] It should be noted that the specific values of the preset accumulation value and the frequent erase / write threshold in this embodiment can be set by the designer according to the practical scenario and user needs. For example, the frequent erase / write threshold (R) can be the product of the preset accumulation value (M) and the preset minimum number of accumulations (T), i.e. This allows for the definition of the minimum number of accumulations required to identify frequent erase / write operations using a preset minimum accumulation count. For example, if the preset time period is 1 second, then when the clock is based on seconds, the frequent erase / write threshold can represent the minimum time (unit: seconds) required to identify frequent erase / write operations. If the target non-volatile memory (such as EEPROM) is continuously erased / written for T seconds, it can be determined that frequent erase / write operations exist. The larger the value of T is set, the more stringent the conditions for triggering erase / write protection become. Taking a frequency converter as an example, since manual parameter setting is generally completed within 1-2 minutes, T can be set to 60 seconds.
[0034] Correspondingly, the preset accumulation value (M) can be defined as the accumulation step value of the time integral count value (SUM). In practical terms, erase / write operations with a frequency higher than M seconds / time are identified as abnormally frequent erase / write operations. The larger the value of M is set, the wider the range of abnormal erase / write frequencies that can be identified (i.e., the lower the frequency of abnormal erase / write operations that can be identified). For example, if there are at least 1 EEPROM erase / write operations within the current 1 second, the time integral count value SUM is incremented by M; otherwise, the SUM value is decremented by 1 (i.e., the preset decrement value). The choice of the M value can be determined based on application requirements. For example, the preset cumulative value is a value determined based on the normal usage frequency, lifespan, erase / write lifespan, and daily usage time of the target non-volatile memory. For instance, if the EEPROM (i.e., the target non-volatile memory) has a lifespan of 3 years, a daily usage time of 8 hours, and an erase / write lifespan of 1 million cycles, then according to the principle that the total number of erase / write cycles of the EEPROM within the product's lifespan is less than 1 million cycles, M should be no less than 30 seconds / cycle, 2 cycles / minute (i.e., normal usage frequency) × 60 minutes × 8 hours (i.e., daily usage time) × 1095 days (i.e., lifespan) = 1.05 million cycles. For example, if a frequency converter has a 1-year warranty, a 2-year lifespan can be taken as the lifespan. Under extreme operating conditions (24 hours a day), and based on the mainstream erase / write lifespan of 1 million cycles for EEPROM, the preset cumulative value M can be 60.
[0035] Accordingly, this embodiment can define the erase / write situation S within the current 1 second as the erase / write situation of the target non-volatile memory; such as Figure 2 As shown, if there is at least one erase / write operation on the target non-volatile memory within the current 1 second, then S will be recorded as 1; otherwise, S will be recorded as 0. When the frequent erase / write identification signal A=1, it indicates that there is frequent erase / write operation on the current target non-volatile memory; the detection of A can be defined by the following formula (1).
[0036] (1)
[0037] Among them, the frequent erase / write threshold R and the time integral count value SUM are defined by the following equations (2) and (3), respectively.
[0038] (2) (3) In summary, the method provided in this embodiment can identify frequent erase / write operations with a frequency higher than M seconds / time, thereby achieving write protection functionality for the target non-volatile memory. Figure 2The inverter in the middle indicates faults and limits write protection operations such as EEPROM erase and write; if it is necessary to identify lower frequency erase and write operations, the detection time T value can be increased while increasing the M setting value to avoid false detection of abnormalities. Assuming that the actual erase and write operation frequency is x seconds / time, the actual time t required to identify frequent operations satisfies the following formula (4).
[0039] (4)
[0040] Accordingly, the method provided in this embodiment may also include a setting process for a preset accumulated value (M) and a preset minimum number of accumulations (T). For example, the preset accumulated value and / or the preset minimum number of accumulations may be adjusted according to the obtained parameter setting instructions.
[0041] In this embodiment, the present invention increases the time integral count value by using a preset accumulation value when the target non-volatile memory is in an erase / write state within a preset time period. It identifies frequent erase / write operations of the target non-volatile memory by integrating the write time, avoiding the process of counting the number of writes for each memory unit. It can accurately identify frequent erase / write operations of the non-volatile memory with less resource consumption. After frequent erase / write operations are identified, a preset frequent erase / write protection operation is executed to realize the write protection function of the non-volatile memory. It can effectively identify and block long-term and low-frequency cumulative erase / write operations in automated control scenarios.
[0042] Based on the previous embodiment, this embodiment of the invention also provides a partition redundancy protection method for non-volatile memory. This method allows for convenient partition redundancy settings to perform software remediation of non-volatile memory with failed memory cells, avoiding the increased costs associated with hardware replacement. For details, please refer to... Figure 3 , Figure 3 This is a flowchart illustrating a partition redundancy protection method for non-volatile memory provided in an embodiment of the present invention. The method may include: Step 201: Obtain the access request for the target non-volatile memory; wherein the access request is a read request or a write request.
[0043] It is understood that the access request in this step can be a request to access the target non-volatile memory, such as a write request to write data or a read request to read data. The specific method for obtaining the access request for the target non-volatile memory in this step can be set by the designer according to the practical scenario and user needs. For example, it can be implemented in a way that is the same as or similar to the method for obtaining access requests for non-volatile memory in automated control equipment in related technologies. Figure 4As shown, during the power-on initialization function code process, the inverter can generate a read request to read the function code-related data stored in the EEPROM (i.e., the target non-volatile memory); during the main loop after startup, if it is necessary to update the function code-related data stored in the EEPROM, a write request to write the function code-related data to the EEPROM can be generated. This embodiment does not impose any limitations on this.
[0044] Step 202: If the current storage unit corresponding to the access request is a failed unit, then determine the target mapping unit according to the preset fault mapping information.
[0045] Wherein, the current storage unit is any data storage unit that the access request needs to access, the data storage unit is a storage unit in the data area of the target non-volatile memory, the failed unit is a failed storage unit in the target non-volatile memory; the target mapping unit is the backup storage unit corresponding to the current storage unit, the backup storage unit is a storage unit in the backup area of the target non-volatile memory, and the preset fault mapping information includes the correspondence between each failed unit in the target non-volatile memory and its corresponding backup storage unit, and the number of failed units in the target non-volatile memory is less than or equal to the number of backup storage units.
[0046] It is understood that in this embodiment, the access area of a preset-size storage region in the target non-volatile memory can be considered as a storage unit. For example, the storage unit of an EEPROM is usually 32 bytes (Byte) as one page. For instance, if a certain model of EEPROM is 64kBit in size, then the EEPROM chip has a total of 256 pages of storage units. In this embodiment, all storage units in the target non-volatile memory can be divided into two storage regions. One storage region is used as the data region, and the storage units in the data region can be used as data storage units. The device's data is stored in the corresponding storage address according to the logical address (e.g., data at logical addresses 0-1024 are stored one-to-one with storage addresses 0-1024). The other storage region is used as the backup region, and the storage units in it (i.e., backup storage units) are used to replace the faulty or failed storage units (i.e., failed units) in the data region for data storage. The size of the backup region can be selected according to actual needs. For example, taking 4 pages as the backup region, the partitioning can be established as shown in Table 1.
[0047] Table 1. Partition Design Illustration in Target Non-volatile Memory
[0048] Correspondingly, since the failure of a certain memory address in the target non-volatile memory (such as EEPROM) does not affect the normal operation of other addresses, in this embodiment, when a memory address fails, the memory cell (i.e., data storage cell) where it is located is marked as a failed cell. The data storage of the failed cell is replaced by a memory cell in the backup area (i.e., a backup memory cell). The correspondence between each failed cell and its corresponding backup memory cell is recorded through preset fault mapping information, that is, a one-to-one correspondence between failed cells and backup memory cells. For example, if the memory addresses 40 and 70 corresponding to logical addresses 40 and 70 are confirmed as failed addresses, a failed memory cell mapping table as shown in Table 2 can be established.
[0049] Table 2. A mapping table of failed memory cells
[0050] As shown in Table 2, after establishing the failed storage unit mapping table, the data at storage addresses 32-63 corresponding to the original Page 1 (i.e., the failed unit) can be transferred to addresses 8064-8095 corresponding to Page 252 (i.e., the backup storage unit); all the data at storage addresses 64-96 corresponding to the original Page 2 (i.e., the failed unit) is transferred to addresses 8096-8127 corresponding to Page 253 (i.e., the backup storage unit). In other words, the preset fault mapping information can include the identification information and address information (such as the logical address of the failed unit and the storage address of the corresponding backup storage unit) of each failed unit and its corresponding backup storage unit (as shown in the mapping units in Table 2).
[0051] This embodiment does not limit the specific recording method of the preset fault mapping information. It can be recorded in a tabular manner as shown in Table 2, or in other ways such as sets or arrays. For example, a frequency converter uses an EEPROM with a size of 64kBit and a total of 256 pages of storage units. A software design defect causes the EEPROM storage address 1050 corresponding to logical address 1050 to fail. The partition design in the EEPROM can be as shown in Table 1, with the backup area having a size of 4 pages (Page 252-Page 255). The preset fault mapping information can be recorded using the failed storage unit mapping table shown in Table 3.
[0052] Table 3 Another type of failed memory cell mapping table
[0053] Accordingly, the method provided in this embodiment may also include the process of detecting that the current storage unit corresponding to the access request is a failed unit. For example, it may be determined whether the current storage unit hits the failed unit in the preset fault mapping information; if so, the current storage unit corresponding to the access request is determined to be a failed unit, and step 202 can be performed; if not, the current storage unit can be accessed directly according to the access request.
[0054] Step 203: Use the target mapping unit to complete the access request to the current storage unit.
[0055] It is understandable that in this step, when the current storage unit is a failed unit, the backup storage unit (i.e. the target mapping unit) corresponding to the current storage unit is used to complete the access request to the current storage unit, such as writing the data that you want to write to the current storage unit to the target mapping unit, or reading the data that you want to read from the current storage unit from the target mapping unit.
[0056] Correspondingly, the method provided in this embodiment may further include: a process for establishing preset fault mapping information, such as when the processor detects a new faulty storage unit in the data area, marking the new faulty storage unit as a faulty unit; determining whether there is an available backup storage unit in the backup area; wherein, the available backup storage unit is a backup storage unit that has not established a corresponding relationship with the corresponding faulty unit; if so, establishing a correspondence between the new faulty storage unit and the target backup storage unit in the preset fault mapping information; wherein, the target backup storage unit is any available backup storage unit.
[0057] Accordingly, after establishing the correspondence between the new failed storage unit and the target backup storage unit in the preset fault mapping information, the device can be restarted or the factory settings restored so that the target backup storage unit can be used to replace the new failed storage unit for data storage in the future.
[0058] If there are no available backup storage units in the backup area, this process can be terminated directly, or a fault alarm message for the target non-volatile memory can be output to prompt the user to replace the target non-volatile memory in a timely manner.
[0059] In this embodiment, the present invention utilizes a target mapping unit to complete the access request to the current storage unit. It can use the storage unit in the backup area to replace the failed storage unit for data storage. By using convenient partition redundancy settings, it can realize the software rectification of the non-volatile memory with failed storage units, avoid the increased cost of hardware replacement, and significantly reduce the rectification cost.
[0060] Corresponding to the above method embodiments, this invention also provides a protection device for non-volatile memory. The protection device for non-volatile memory described below and the protection method for non-volatile memory described above can be referred to in correspondence.
[0061] Please refer to Figure 5 , Figure 5 This is a structural block diagram of a protection device for a non-volatile memory provided in an embodiment of the present invention. The device may include: The status acquisition module 10 is used to acquire the erase and write status of the target non-volatile memory within a preset time period; wherein, the erase and write status includes an erase and write state where erasure has occurred and an unerased state where erasure has not occurred. The time integration module 20 is used to increase the time integration count value by using a preset accumulation value if the erasure / write state is in the erasure / write state; wherein the increased time integration count value is greater than or equal to the sum of the time integration count value before the increase and the preset accumulation value; The erase / write protection module 30 is used to determine that the target non-volatile memory is subject to frequent erase / write operations when the time integral count value is greater than or equal to the frequent erase / write threshold, and to perform a preset frequent erase / write protection operation.
[0062] In some embodiments, the device may further include: The adjustment module is used to adjust the time integral count value to the difference between the time integral count value and the preset decrement value if the erasure status is not erased.
[0063] In some embodiments, the time integration module 20 may be specifically used to adjust the time integration count value to the sum of the time integration count value and a preset accumulated value.
[0064] In some embodiments, the status acquisition module 10 can be specifically used to determine the erase / write status as erase / write state when the target non-volatile memory has been erased / written at least once within a preset time period; and to determine the erase / write status as no erase / write state when the target non-volatile memory has not been erased / written within the preset time period.
[0065] In some embodiments, the erase / write protection module 30 may be specifically used to clear the time integral count value to zero and output a frequent erase / write alarm signal.
[0066] In some embodiments, the preset accumulated value is a value determined based on the normal usage frequency, lifespan, erase / write lifespan, and daily usage time of the target non-volatile memory; the frequent erase / write threshold is the product of the preset accumulated value and the preset minimum number of accumulated times.
[0067] In some embodiments, the device may further include: The access acquisition module is used to acquire access requests for the target non-volatile memory; wherein, the access request is a read request or a write request; The mapping module is used to determine the target mapping unit based on preset fault mapping information if the current storage unit corresponding to the access request is a failed unit. Here, the current storage unit is any data storage unit that the access request needs to access, the data storage unit is a storage unit in the data area of the target non-volatile memory, and the failed unit is a failed storage unit in the target non-volatile memory. The target mapping unit is the backup storage unit corresponding to the current storage unit, and the backup storage unit is a storage unit in the backup area of the target non-volatile memory. The preset fault mapping information includes the correspondence between each failed unit in the target non-volatile memory and its corresponding backup storage unit, and the number of failed units in the target non-volatile memory is less than or equal to the number of backup storage units. The access module is used to complete the access request to the current storage unit using the target mapping unit.
[0068] In some embodiments, the device further includes: The marking module is used to mark a new faulty memory cell as a faulty cell when a new faulty memory cell is detected in the data area. The backup judgment module is used to determine whether there are available backup storage units in the backup area; where available backup storage units are backup storage units that have not been associated with the corresponding failed units. The relationship establishment module is used to establish a correspondence between a new failed storage unit and a target backup storage unit in the preset fault mapping information if an available backup storage unit exists; wherein, the target backup storage unit is any available backup storage unit.
[0069] In this embodiment, the present invention uses the time integration module 20 to increase the time integration count value when the target non-volatile memory is in an erase / write state within a preset time period. By using the idea of integrating the write time, the frequent erase / write of the target non-volatile memory is identified, avoiding the process of counting the number of writes of each memory unit. It can achieve accurate identification of frequent erase / write of non-volatile memory with less resource consumption. After frequent erase / write is identified, the write protection function of non-volatile memory is realized by executing a preset frequent erase / write protection operation. It can effectively identify and block long-term and low-frequency cumulative erase / write in automated control scenarios.
[0070] Corresponding to the above method embodiments, this invention also provides a protection device for non-volatile memory. The protection device for non-volatile memory described below and the protection method for non-volatile memory described above can be referred to in correspondence.
[0071] Please refer to Figure 6 , Figure 6 This is a schematic diagram of a protection device for a non-volatile memory provided in an embodiment of the present invention. The controller may include: Memory D1 is used to store computer programs; Processor D2 is used to implement the steps of the non-volatile memory protection method provided in the above method embodiments when executing a computer program.
[0072] In this embodiment, the protection device for the non-volatile memory can be an automated control device, such as a frequency converter.
[0073] The steps in the non-volatile memory protection method described above can be implemented by the structure of the controller.
[0074] Corresponding to the above method embodiments, this invention also provides a computer program product. The computer program product described below and the non-volatile memory protection method described above can be referred to in correspondence.
[0075] A computer program product includes a computer program / instructions that, when executed by a processor, implement the steps of the non-volatile memory protection method provided in the above-described method embodiments.
[0076] Corresponding to the above method embodiments, this invention also provides a computer storage medium. The computer storage medium described below and the non-volatile memory protection method described above can be referred to in correspondence.
[0077] A computer storage medium storing a computer program, wherein when the computer program is executed by a processor, the steps of the non-volatile memory protection method of the above method embodiments are implemented.
[0078] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatuses, devices, computer program products, and computer storage media disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.
[0079] The present invention has provided a detailed description of a method, apparatus, and device for protecting non-volatile memory. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of these embodiments are merely illustrative and are intended to help understand the method and core concepts of the invention. It should be noted that those skilled in the art can make various improvements and modifications to the invention without departing from its principles, and these improvements and modifications also fall within the scope of protection of the present invention.
Claims
1. A method for protecting non-volatile memory, characterized in that, include: The erase / write status of the target non-volatile memory is obtained within a preset time period; wherein, the erase / write status includes an erase / write state where erase / write occurs and an unerased state where erase / write does not occur. If the erase / write situation is the erase / write state, then the time integral count value is increased using a preset accumulation value; wherein the increased time integral count value is greater than or equal to the sum of the time integral count value before the increase and the preset accumulation value; When the time integral count value is greater than or equal to the frequent erase / write threshold, it is determined that the target non-volatile memory is subject to frequent erase / write, and a preset frequent erase / write protection operation is executed.
2. The method for protecting non-volatile memory according to claim 1, characterized in that, After obtaining the erase / write status of the target non-volatile memory over a preset time period, the method further includes: If the erase / write status is the non-erasure / write state, then the time integral count value is adjusted to the difference between the time integral count value and the preset decrement value.
3. The method for protecting non-volatile memory according to claim 1, characterized in that, The method of increasing the time integral count value using a preset accumulation value includes: The time integral count value is adjusted to be the sum of the time integral count value and the preset accumulated value.
4. The method for protecting non-volatile memory according to claim 1, characterized in that, The process of acquiring the erase / write status of the target non-volatile memory over a preset time period includes: When the target non-volatile memory is erased or written at least once within the preset time period, the erase / write situation is determined to be the erase / write state; When the target non-volatile memory is not erased or written during the preset time period, the erase / write situation is determined to be the non-erased / written state.
5. The method for protecting non-volatile memory according to claim 1, characterized in that, The step of determining that the target non-volatile memory is subject to frequent erase / write operations and performing a preset frequent erase / write protection operation includes: The time integral count value is cleared to zero, and a frequent erase / write alarm signal is output.
6. The method for protecting non-volatile memory according to claim 1, characterized in that, The preset accumulated value is a value determined based on the normal usage frequency, lifespan, erase / write lifespan, and daily usage time of the target non-volatile memory; the frequent erase / write threshold is the product of the preset accumulated value and the preset minimum number of accumulated times.
7. The method for protecting non-volatile memory according to any one of claims 1 to 6, characterized in that, Also includes: Obtain an access request to the target non-volatile memory; wherein the access request is a read request or a write request; If the current storage unit corresponding to the access request is a failed unit, then a target mapping unit is determined according to preset fault mapping information; wherein, the current storage unit is any data storage unit that the access request needs to access, the data storage unit is a storage unit in the data area of the target non-volatile memory, the failed unit is a failed storage unit in the target non-volatile memory; the target mapping unit is the backup storage unit corresponding to the current storage unit, the backup storage unit is a storage unit in the backup area of the target non-volatile memory, the preset fault mapping information includes the correspondence between each failed unit in the target non-volatile memory and its corresponding backup storage unit, and the number of failed units in the target non-volatile memory is less than or equal to the number of backup storage units; The target mapping unit is used to complete the access request to the current storage unit.
8. The method for protecting non-volatile memory according to claim 7, characterized in that, Also includes: When a new faulty storage cell is detected in the data area, the new faulty storage cell is marked as a faulty cell. Determine whether there are available backup storage units in the backup area; wherein, the available backup storage unit is a backup storage unit that has not established a corresponding relationship with the corresponding failed unit; If so, a correspondence is established between the new fault-failed storage unit and the target backup storage unit in the preset fault mapping information; wherein, the target backup storage unit is any of the available backup storage units.
9. A protection device for a non-volatile memory, characterized in that, include: The status acquisition module is used to acquire the erase and write status of the target non-volatile memory within a preset time period; wherein, the erase and write status includes an erase and write state where erasure and writing are present and an unerased state where erasure and writing are not present. The time integration module is used to increase the time integration count value by using a preset accumulation value if the erase / write situation is the erase / write state; wherein the increased time integration count value is greater than or equal to the sum of the time integration count value before the increase and the preset accumulation value; The erase / write protection module is used to determine that the target non-volatile memory is subject to frequent erase / write operations when the time integral count value is greater than or equal to the frequent erase / write threshold, and to perform a preset frequent erase / write protection operation.
10. A protection device for a non-volatile memory, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the method for protecting non-volatile memory as described in any one of claims 1 to 8 when executing the computer program.