A bioelectric signal detection and excitation device and method
By using a buffer unit that alternately stores excitation data and a hardware timing unit, the waveform distortion problem caused by the microcontroller's memory capacity limitation is solved, enabling the output of extremely low-frequency and non-periodic complex waveforms, and improving the flexibility and accuracy of neural modulation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZHEJIANG BRAIN ENHANCE TECH CO LTD
- Filing Date
- 2026-04-23
- Publication Date
- 2026-05-26
AI Technical Summary
In the prior art, due to the limited memory capacity of microcontrollers, high-frequency sampling and low-frequency signal output conflict with each other, which can easily cause waveform distortion. At the same time, the fixed output architecture cannot generate non-periodic complex electrical stimulation waveforms in real time.
By employing a buffer unit and hardware timing unit that alternately stores excitation data, and through an alternating transmission mechanism, the excitation data can be output alternately without reducing the master clock frequency, ensuring the system memory limit and supporting the generation of extremely low frequency and aperiodic complex waveforms.
It achieves flexible neural modulation that breaks through the memory limit without reducing the system's master clock frequency, and can output extremely low frequency signals and generate non-periodic complex waveforms to meet clinical needs.
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Figure CN122075019A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of brain-computer interface technology, and in particular to a bioelectric signal detection and excitation device and method. Background Technology
[0002] In the field of neuromodulation and brain-computer interface applications, closed-loop neural intervention is mainly used to generate adaptive electrical stimulation parameters based on the dynamic characteristics of real-time monitored bioelectrical signals, so as to achieve precise electrical stimulation and intervention treatment of specific areas of the brain or nervous system.
[0003] In existing technologies, the generation of electrical stimulation waveforms required for neuromodulation often employs a Direct-Digital Synthesizer (DDS). The traditional implementation involves a main control unit pre-calculating and generating a complete wavetable, which is stored in memory. Then, driven by the system's main clock frequency, digital sampling points from this wavetable are sequentially extracted and sent to a digital-to-analog converter for output. In this architecture, the discrete signal generated by the system depends on two core frequencies: the desired output electrical stimulation signal frequency. and the system's main clock frequency .
[0004] However, the aforementioned existing technology has the following drawbacks: if a single wavetable structure is used to generate the wavetable by a main control unit, there is a mutual constraint between the system's output signal frequency, main clock frequency, and microprocessor memory capacity. Specifically, the preset wavetable must completely contain at least one cycle of the signal, and the desired output signal frequency is... Then the signal period At the master clock frequency The number of sampling points required in a single cycle under the drive The calculation formula is Because the main control unit has a limited memory capacity, the maximum number of sampling points it can accommodate is set to [value missing]. Then the system must satisfy This leads to the deduction that the lowest signal frequency that the system can output is limited by... Based on the above logical deduction, it can be concluded that in order to ensure the smoothness and low distortion of medical-grade electrical stimulation signals, a high master clock frequency must be maintained. However, this would lead to a sharp increase in the number of sampling points required to output low-frequency electrical stimulation signals, and could easily exceed the memory limit. Forcing a reduction in the main clock frequency to output low-frequency signals would be problematic. This will lead to high-frequency distortion and step transitions in the electrical stimulation waveform. Furthermore, once a fixed wavetable is generated, it cannot be arbitrarily changed during the output period, resulting in the system only being able to output repetitive signals with a fixed period, which cannot meet the clinical requirements for non-periodic complex excitation waveforms such as frequency hopping and multi-frequency superposition.
[0005] Therefore, this application aims to solve the problem in the prior art where high-frequency sampling and low-frequency signal output conflict due to memory capacity limitations, which easily leads to waveform distortion. It also solves the problem that the fixed output architecture cannot generate non-periodic complex electrical stimulation waveforms in real time. Summary of the Invention
[0006] The main purpose of this application is to provide a bioelectric signal detection and excitation device and method, which aims to solve the problem that the high-frequency sampling and low-frequency signal output of microcontrollers conflict due to memory capacity limitations, which easily leads to waveform distortion. At the same time, it also solves the problem that the fixed output architecture cannot generate non-periodic complex electrical stimulation waveforms in real time.
[0007] To achieve the above objectives, this application proposes a bioelectric signal detection and excitation device, comprising: The acquisition module is configured to acquire detection signals from living organisms; The main control module includes: The processing unit is electrically connected to the acquisition module and is used to receive the detection signal and generate corresponding excitation data. At least two buffer units are electrically connected to the processing unit and are used to alternately store the corresponding stimulus data; The output module, electrically connected to the main control module, outputs an electrical stimulation waveform based on the excitation data; wherein, The main control module is configured such that during the transmission of the excitation data from one of the buffer units to the output module, the processing unit simultaneously writes the subsequent excitation data into another buffer unit, and when the transmission from the previous buffer unit is completed, it switches to continuous transmission from the other buffer unit to the output module.
[0008] Furthermore, the main control module also includes: The first data transfer unit is electrically connected to the at least two buffer units and also electrically connected to the output module; The hardware timing unit is electrically connected to the controlled end of the first data transfer unit; The first data transfer unit transmits the excitation data of the at least two buffer units to the output module one by one based on the clock frequency of the hardware timing unit.
[0009] Furthermore, the at least two buffer units include: The first buffer unit has its input terminal electrically connected to the processing unit; The second buffer unit has its input terminal electrically connected to the processing unit. The first buffer unit and the second buffer unit alternately store the stimulus data from the processing unit.
[0010] Furthermore, the at least two buffer units include: The first buffer unit has its input terminal electrically connected to the processing unit and its output terminal electrically connected to the first data transport unit. The second buffer unit has its input terminal electrically connected to the processing unit and its output terminal electrically connected to the first data transport unit. The first buffer unit and the second buffer unit alternately store the stimulus data from the processing unit; The first data transfer unit transmits the excitation data from the first buffer unit to the output module based on the clock frequency of the hardware timing unit, and the processing unit synchronously transmits the excitation data to the second buffer unit. Once the first buffer unit has completed its transmission, the second buffer unit will continuously transmit the excitation data to the output module.
[0011] Furthermore, the main control module includes: The second data transfer unit is electrically connected to the acquisition module and is used to receive the data ready signal sent by the acquisition module. The ring-shaped buffer unit is electrically connected to the second data transport unit and also electrically connected to the processing unit; The second data transfer unit responds to the ready signal and is used to transfer and temporarily store the detection signal of the acquisition module to the ring buffer unit.
[0012] Furthermore, the output module includes: A digital-to-analog converter unit, the input of which is electrically connected to the at least two buffer units; A low-pass filter, the input of which is electrically connected to the output of the digital-to-analog converter, and the output of which is used to output the electrical stimulation waveform.
[0013] Furthermore, the output module also includes: The constant current unit has its input terminal electrically connected to the output terminal of the low-pass filter, and its output terminal is used to connect to external electrodes.
[0014] Furthermore, it also includes a power module, which is connected to the power input terminal of the acquisition module and the power input terminal of the output module, respectively. The power module includes: An isolation unit, the output of which is electrically connected to the power input of the main control module; The power management unit is electrically connected to the isolation unit, and also electrically connected to the power input terminal of the acquisition module and the power input terminal of the output module.
[0015] This application also discloses a method for use in the above-mentioned bioelectric signal detection and excitation device, the method comprising the following steps: The detection signal is acquired through the acquisition module and then sent to the main control module. The main control module receives the detection signal through its processing unit and generates corresponding excitation data based on the detection signal. Controlling the main control module to perform alternating transmission includes: during the transmission of the excitation data in one buffer unit to the output module, the processing unit synchronously writes the subsequent excitation data into another buffer unit; when the transmission of the previous buffer unit is completed, the transmission is switched to the output module continuously from the other buffer unit.
[0016] Furthermore, controlling the main control module to perform alternating transmission specifically includes: The data transfer unit responds to the interrupt signal of the hardware timing unit and, according to the clock frequency of the hardware timing unit, transfers the excitation data of the buffer unit to the output module. While the stimulus data is being transferred to the output module, the processing unit simultaneously writes the stimulus data into the other buffer unit.
[0017] The above technical solution has the following advantages: This application acquires detection signals from organisms through an acquisition module, and configures a processing unit and at least two buffer units that alternately store excitation data within the main control module. While the data from one of the buffer units is being independently transmitted to the output module, the processing unit simultaneously calculates the detection signal and generates excitation data before writing the excitation data into subsequent data. This decouples the excitation data transmission timing from the computing power of the processing unit, effectively solving the technical defects of traditional single wavetable architectures, which are limited by the microcontroller's memory capacity, leading to severe distortion and frequency reduction stuttering of low-frequency electrical stimulation waveforms when the main clock frequency is reduced. It also fails to generate non-periodic complex waveforms in real time. This application achieves high-fidelity continuous output of extremely low-frequency slow waves or non-periodic arbitrary frequency-changing waveforms across the entire frequency band without reducing the system's main clock frequency. Attached Figure Description
[0018] The present application will now be described in detail with reference to specific embodiments and accompanying drawings, wherein: Figure 1 This is a structural block diagram of one embodiment of the bioelectric signal detection and excitation device of this application; Figure 2 This is a structural block diagram of another embodiment of the bioelectric signal detection and excitation device of this application; Figure 3 This is a schematic diagram of the alternating output structure of the excitation data of the bioelectric signal detection and excitation device of this application; Figure 4 This is a flowchart of the bioelectric signal detection and excitation method of this application; Figure 5 This is a flowchart of step S3 of the present invention's bioelectric signal detection and excitation method.
[0019] In the diagram: 100, Main control module; 101, Processing unit; 102, First buffer unit; 103, Second buffer unit; 104, First data transfer unit; 105, Hardware timing unit; 106, Ring buffer unit; 107, Second data transfer unit; 200, Acquisition module; 201, Analog-to-digital conversion unit; 202, Electrode; 300, Output module; 301, Digital-to-analog conversion unit; 302, Low-pass filter; 303, Constant current unit; 400, Sensing module; 401, Inertial measurement unit; 402, Magnetic sensor; 500, Host computer; 600, Power module; 601, Isolation unit; 6011, USB isolator; 6012, Power isolator; 602, Power management unit; 6021, Charger battery; 6022, Voltage regulator unit; 6023, Boost unit. Detailed Implementation
[0020] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the following specific embodiments are merely illustrative of this application and do not constitute a limitation thereof.
[0021] In the existing field of closed-loop neuromodulation and brain-computer interfaces, systems need to acquire weak bioelectrical signals, such as electroencephalograms (EEGs), in real time and output complex and variable transcranial electrical stimulation waveforms based on the EEG state. Traditional hardware typically employs a single-threaded serial operating mode with a main processor. Specifically, to ensure high fidelity and smoothness of the output electrical stimulation waveform, the system's main clock frequency must be maintained at a high level. However, due to the limited memory capacity of the microcontroller, a single wavetable cannot accommodate the large number of sampling points required for low-frequency waveforms. Forcibly reducing the main clock frequency to achieve low-frequency output will cause high-frequency distortion and step-like jumps in the waveform. Furthermore, traditional hardware pre-calculates and generates a complete wavetable and stores it in memory, resulting in a relatively limited single-wavetable output method. The processor cannot modify the wavetable data midway, causing the system to only output periodically repetitive waveforms, which cannot meet the clinical needs for complex adaptive modulation such as non-periodic and frequency-hopping waveforms. Based on these problems, this application proposes a bioelectrical signal detection and excitation device.
[0022] Before detailing the embodiments, some core general terms in this application are defined.
[0023] The buffer unit referred to in this application refers to an independent storage block that can be partitioned out in physical memory or on-chip static random-access memory (SRAM) for temporarily storing digital sequences; The data transfer unit referred to in this application refers to a hardware controller that is independent of the processing unit 101's computing core and is capable of high-speed data transfer between the bus and peripherals or between different memory addresses, such as a direct memory access (DMA) controller inside a microcontroller. The alternating transmission referred to in this application refers to a work mode that is executed in parallel on the time axis. That is, when the system is transmitting data of block A to the outside world, the computing core is filling new data into block B. The two are independent of each other and do not block each other. Block A and block B in this application refer to the first buffer unit 102 and the second buffer unit 103, respectively.
[0024] like Figure 1 and Figure 2 As shown in one embodiment of this application, this embodiment provides a bioelectric signal detection and excitation device, including a data acquisition module 200, a main control module 100, and an output module 300; The acquisition module 200 is configured to acquire detection signals from living organisms; The main control module 100 includes a processing unit 101 and at least two buffer units. The processing unit 101 is electrically connected to the acquisition module 200 and is used to receive the detection signal and generate corresponding excitation data. The at least two buffer units are both electrically connected to the processing unit 101 and are used to alternately store the corresponding excitation data. The output module 300 is electrically connected to the main control module 100, and outputs an electrical stimulation waveform based on the excitation data; The main control module 100 is configured such that during the transmission of the excitation data from one of the buffer units to the output module 300, the processing unit 101 simultaneously writes the subsequent excitation data into another buffer unit, and when the transmission from the previous buffer unit is completed, the transmission is switched to the output module 300 continuously from the other buffer unit.
[0025] In some embodiments, the acquisition module 200 is mainly used to acquire electrical signals from a living organism and convert them into detection signals. For example, an analog-to-digital converter is used, with its input terminal connected to the electrode 202. The motor is connected to the organism being tested, so that the analog signal generated by the electrode 202 is converted into a digital signal by the analog-to-digital converter 201. The digital signal is the detection signal and can be read by the processing unit 101. The living organism can refer to animals such as humans, cats, dogs, and mice. It can be used in different scenarios, such as observing the electrical signals of the human brain or limbs in the medical field. If used in mice, it can be used in the laboratory to observe the electroencephalogram (EEG) signals of mice and provide reference and basis for subsequent experiments. Therefore, this application does not limit the specific field and application scenario in detail, and different scenarios and fields are all for acquiring the electrical signals of living organisms. In the following embodiments, it is mainly limited to the medical field, and the electrical signals of living organisms mainly refer to the EEG signals of humans.
[0026] The main control module 100 is a microcontroller (MCU) that can receive the detection signal from the acquisition module 200 and perform detailed analysis on the detection signal. It can be a variety of different MCU models, such as the STM32 series. In addition, the main control module 100 can also be implemented using FPGA (Field Programmable Gate Array), PLC (Programmable Logic Controller), DSP (Digital Signal Processor), or SOC (System On Chip). There are no specific limitations here.
[0027] In some embodiments, the main control module 100 is disassembled in detail, and a processing unit 101 is integrated inside it. The processing unit 101 is mainly used to receive detection signals and perform data calculations after receiving the detection signals. After receiving the detection signals from the acquisition module 200, the processing unit 101 first performs data processing tasks such as data caching, filtering, feature extraction, and state discrimination. Then, based on the judgment result of the real-time brain state, the processing unit 101 dynamically decides and issues adaptive electrical stimulation parameters, such as target frequency and phase instructions, according to a preset closed-loop control algorithm to achieve the best neural intervention effect. After determining the stimulation waveform parameters, the processing unit 101 calculates and generates the next discrete signal sampling points to be output. In this stage, it is necessary to ensure that the calculation speed is greater than the output speed. The processing unit 101 uses a sine function table and leverages the Single Instruction Multiple Data (SIMD) instruction set of the main control module 100 to accelerate the complex calculation of a large number of sampling points. The series of discrete digital sampling points obtained through the above high-speed calculation constitutes the excitation data referred to in this application (i.e., the wavetable data referred to below). Subsequently, the processing unit 101 fills this calculated segment of excitation data into an idle buffer unit for subsequent alternating output.
[0028] In some embodiments, the main control module 100 also integrates at least two buffer units. The buffer units are mainly used to store the processed stimulus data, i.e., discrete digital sampling points. There is no limit to the number of buffer units. In order to enable the buffer units to alternately output the corresponding stimulus data, the number of buffer units is at least multiple. If there are 3 buffer units, the 3 buffer units are used to store continuous stimulus data. While the stimulus data of the first buffer unit is being transmitted to the output module 300, the processing unit 101 can fill the intermediate buffer unit with stimulus data. When the first buffer unit completes the transmission of stimulus data, the bus immediately and seamlessly switches to the intermediate buffer unit to continue transmitting stimulus data to the output module 300 without interruption. Subsequently, the buffer unit at the end will be filled with stimulus data by the processing unit 101, and so on, so that the stimulus data can be filled into multiple buffer units in batches, so that the buffer units alternately output stimulus data to the output module 300. This increases the memory limit of the main control module 100 without changing the main clock frequency, greatly increases the number of discrete digital sampling points, and theoretically can achieve an infinite extension of the number of discrete digital sampling points, simply by continuously looping.
[0029] In some embodiments, the output module 300 is used to receive excitation data and output corresponding electrical stimulation waveforms according to the excitation data. After receiving the excitation data, the output module 300 converts the digital signals stored in the buffer unit into analog signals for stimulating the EEG after passing through the output module 300. The excitation data will change according to the detection signal received by the processing unit 101, so that the output module 300 can output different electrical stimulation waveforms.
[0030] This embodiment provides a bioelectric signal detection and excitation device. The physical carrier of the device can be a printed circuit board integrating a high-performance microcontroller. The acquisition module 200 is used to acquire weak brain electrical activity signals on the scalp surface and convert them into detection signals. The main control module 100 serves as the central neural node of the entire system. It includes a processing unit 101 and multiple buffer units. The processing unit 101 is the core of the main control module 100 and is responsible for performing complex data calculations. The memory space of the main control module 100 is divided into at least two independent buffer units. During operation, the processing unit 101 puts the calculated data (excitation data) into the buffer unit. When the data from the first buffer unit is sent to the output module 300, the processing unit 101 is in a non-blocking state. The processing unit 101 can immediately start calculating the next segment of data and fill it into the second buffer unit to form an alternating excitation data filling and output mode. This allows the device to not only break through the memory limit and achieve the output of extremely low frequency signals without reducing the main clock frequency, but also change the characteristics of the next segment of waveform in each alternation, thereby realizing the continuous generation of non-periodic waveforms, greatly improving the flexibility of neural modulation, and meeting the clinical needs for non-periodic complex excitation waveforms such as frequency hopping and multi-frequency superposition.
[0031] like Figure 1 and Figure 2 As shown, in one embodiment of this application, the main control module 100 further includes a first data transfer unit 104 and a hardware timing unit 105. The first data transfer unit 104 is electrically connected to the at least two buffer units and also electrically connected to the output module 300. The hardware timing unit 105 is electrically connected to the controlled end of the first data transfer unit 104. The first data transfer unit 104 transmits the excitation data of the at least two buffer units to the output module 300 one by one based on the clock frequency of the hardware timing unit 105.
[0032] In some embodiments, the first data transfer unit 104 specifically adopts the DMA controller circuit inside the main control module 100, while the hardware timing unit 105 adopts the internal advanced timer. The first data transfer unit 104 is connected to the on-chip buffer unit and the input of the output module 300 through the high-speed bus inside the chip. The communication method between the main control module 100 and the output module 300 can be SPI communication, IC2 communication, etc., and this application takes SPI communication as an example. Specifically, the hardware timing unit 105 is set to a fixed high-frequency trigger source (e.g., a clock frequency of 100kHz). Each time the timer overflows and generates a hardware trigger signal, the first data transfer unit 104 will grab a byte or word of data from the buffer unit and transfer it to the output module 300. The entire process is completed by the DMA controller circuit, without requiring the processing unit 101 to execute any address fetching or transfer software instructions, so that the processing unit 101 has sufficient computing cycles to process complex data calculations to obtain stimulus data.
[0033] like Figure 1 and Figure 2 As shown, in one embodiment of this application, the at least two buffer units include a first buffer unit 102 and a second buffer unit 103. The input terminal of the first buffer unit 102 is electrically connected to the processing unit 101; the input terminal of the second buffer unit 103 is electrically connected to the processing unit 101; the first buffer unit 102 and the second buffer unit 103 alternately store the excitation data from the processing unit 101.
[0034] In some embodiments, the first buffer unit 102 and the second buffer unit 103 are arranged in parallel in memory space, specifically a typical Ping-Pong Buffer (PPB) structure. The processing unit 101 establishes connections with the first buffer unit 102 and the second buffer unit 103 via an internal bus. In physical memory mapping, the first buffer unit 102 and the second buffer unit 103 are allocated in adjacent or contiguous SRAM address pools. The input terminals of both the first buffer unit 102 and the second buffer unit 103 are connected to the data bus of the processing unit 101. The processing unit 101 can store stimulus data into the first buffer unit 102 and the second buffer unit 103 respectively using addressing instructions. Initially, when the processing unit 101 stores the stimulus data, it calculates the first signal segment and fills it into the first buffer unit 102, i.e., the first wavetable data. Subsequently, during the process of outputting excitation data from the first buffer unit 102, the processing unit 101 begins to calculate the secondary signal and fill it into the second buffer unit 103, i.e., the second wavetable data. The two processes are strictly interleaved in time, and will be described in this application as two buffer units.
[0035] like Figure 2 As shown, in one embodiment of this application, the at least two buffer units include a first buffer unit 102 and a second buffer unit 103. The input terminal of the first buffer unit 102 is electrically connected to the processing unit 101, and its output terminal is electrically connected to the first data transfer unit 104. The input terminal of the second buffer unit 103 is electrically connected to the processing unit 101, and its output terminal is electrically connected to the first data transfer unit 104. The first buffer unit 102 and the second buffer unit 103 alternately store the stimulus data from the processing unit 101. The first data transfer unit 104 transmits the stimulus data from the first buffer unit 102 to the output module 300 based on the clock frequency of the hardware timing unit 105, and the processing unit 101 synchronously transmits the stimulus data to the second buffer unit 103. When the first buffer unit 102 has completed its transmission, the second buffer unit 103 continuously transmits the stimulus data to the output module 300.
[0036] In some embodiments, the first data transfer unit 104 is equipped with two channels. In the initial state T0, the source address of the first data transfer unit 104 points to the starting address of the first buffer unit 102. With the pulse of the hardware timing unit 105, data is uniformly sent to the output module 300. At the same time, the processing unit 101 detects that the second buffer unit 103 is in an idle state and fills the subsequent excitation data into the second buffer unit 103. When the last data of the first buffer unit 102 is transferred, the first data transfer unit 104 triggers a transmission completion interrupt and automatically flips the source address pointer to point to the starting address of the second buffer unit 103, seamlessly starting a new round of excitation data transfer. At this time, after the processing unit 101 learns of the action of switching to the second buffer unit 103 to output excitation data, it immediately starts the calculation of the third segment signal and overwrites and fills it into the first buffer unit 102. The whole process does not waste clock cycles. It eliminates the time of software query and polling waiting, ensuring the continuity of the output excitation waveform at the microsecond level.
[0037] like Figure 1 and Figure 2 As shown, in one embodiment of this application, the main control module 100 includes a second data transfer unit 107 and a ring buffer unit 106. The second data transfer unit 107 is electrically connected to the acquisition module 200 and is used to receive the data ready signal from the acquisition module 200. The ring buffer unit 106 is electrically connected to the second data transfer unit 107 and also electrically connected to the processing unit 101. In response to the ready signal, the second data transfer unit 107 is used to transfer and temporarily store the detection signal from the acquisition module 200 in the ring buffer unit 106.
[0038] In some embodiments, to achieve efficient operation of EEG acquisition and stimulation, the acquisition module 200 can use an ADS1299 high-precision analog-to-digital converter chip. After completing a microvolt-level signal sampling, the analog-to-digital converter chip will send a data ready signal through an external pin. The main control module 100 is internally configured with a second data transfer unit 107, which can use another DMA channel. When the data ready signal is captured, the second data transfer unit 107 immediately and automatically transfers the EEG data in the analog-to-digital converter chip to the ring buffer unit 106 via the SPI bus, without interrupting the current calculation flow of the processing unit 101. The ring buffer unit 106 is a buffer unit with its ends connected in the memory of the main control module 100. The processing unit 101 only reads data in batches from the ring buffer unit 106 when it needs to extract the electrical signals of the organism. No matter how high the sampling rate is set in the device, even if the system is set to a sampling rate as high as 8kHz, the EEG data will not be lost or overwritten because the processing unit 101 is busy calculating the stimulus waveform. When the processing unit 101 reads the data from the ring buffer unit 106, it does so only during idle time and does not occupy the computing resources of the processing unit 101.
[0039] like Figure 2 As shown, in one embodiment of this application, the output module 300 includes a digital-to-analog converter 301 and a low-pass filter 302. The input terminal of the digital-to-analog converter 301 is electrically connected to the at least two buffer units; the input terminal of the low-pass filter 302 is electrically connected to the output terminal of the digital-to-analog converter 301, and its output terminal is used to output the electrical stimulation waveform.
[0040] In some embodiments, the digital-to-analog converter unit 301 may employ a high-resolution dual-channel DAC chip, such as the DAC8563, whose digital communication pins are connected to the SPI bus of the main control module 100 to receive the excitation data stored alternately in the first buffer unit 102 and the second buffer unit 103. Since the signal generated by direct digital frequency synthesis contains sampling frequency harmonics, a low-pass filter 302 is arranged in series after the analog voltage output pin of the digital-to-analog converter unit 301. The low-pass filter 302 effectively filters out high-frequency image noise and glitches, smoothing and shaping the stepped analog signal to output a smooth electrical stimulation waveform.
[0041] In one embodiment of this application, the output module 300 further includes a constant current unit 303, the input terminal of which is electrically connected to the output terminal of the low-pass filter 302, and its output terminal is used to connect to the external electrode 202.
[0042] In some embodiments, directly applying a constant voltage to a medical device is dangerous and uncontrollable. Therefore, a constant current unit 303 is added after the low-pass filter 302. Specifically, a Howland constant current source circuit based on a high-voltage operational amplifier is used to convert the filtered analog control voltage signal into a proportional drive current. Regardless of how the contact impedance of the patient's scalp fluctuates dynamically with sweat or time, the constant current unit 303 can automatically adjust the voltage at its output terminal to forcefully maintain a precise and constant current amplitude passing through the external electrode 202 and the human body, ensuring the safety and accuracy of the transcranial electrical stimulation process. The output terminal of the constant current unit 303 is electrically connected to an external circuit, which is connected to the external electrode 202, and then drives the external electrode 202 through the output module 300 to apply the corresponding electrical stimulation waveform to the human scalp.
[0043] like Figure 1 and Figure 2 As shown, in one embodiment of this application, the embodiment further includes a power module 600, which is connected to the power input terminal of the acquisition module 200 and the power input terminal of the output module 300. The power module 600 includes an isolation unit 601 and a power management unit 602. The output terminal of the isolation unit 601 is electrically connected to the power input terminal of the main control module 100. The power management unit 602 is electrically connected to the isolation unit 601, and also electrically connected to the power input terminals of the acquisition module 200 and the output module 300.
[0044] In some embodiments, due to the involvement of human body connection, the isolation unit 601 employs a DC-DC isolated power supply to convert external power (such as USB 5V) into isolated internal power. Specifically, the isolation unit 601 includes a USB isolator 6011, a USB-C port, and an over-voltage protection unit. The protection unit (OPV) and power isolator 6012 are included. One end of the USB isolator 6011 is electrically connected to the main control module 100, and the other end is electrically connected to the USB-C port. Specifically, it can be connected to the D+ and D- ports of the USB-C port. The USB isolator 6011 preferably uses magnetic coupling or capacitive coupling to transmit digital signals internally, without electrical conduction, thus cutting off the ground loop and ensuring a high signal-to-noise ratio for the EEG signal. The USB-C port can be used to connect to a computer or host computer 500, allowing the main control module 100 to transmit detection signals to the computer or host computer 500 via the USB-C port. The overvoltage protection unit is connected between the USB-C port and the power isolator 6012. The overvoltage protection unit acts as a fuse to prevent excessive voltage from being applied to the external USB-C port, which could damage the subsequent power management unit 602. The power isolator 6012 is used to connect to the USB 5V and also to the power management unit 602. The power from the USB 5V is transmitted to the power management unit 602 after passing through the power isolator 6012.
[0045] The power management unit 602 includes a charger battery 6021, multiple voltage regulator units 6022, and multiple boost units 6023. The voltage regulator units 6022 preferably use low dropout linear regulators (LDOs) to power the acquisition module 200, the main control module 100, and the output module 300, respectively, such as 3.3V as the power supply terminal. The boost units 6023 preferably use boost circuits to provide voltages such as ±40V. Through the interaction between the power management unit 602 and the isolation unit 601, clean DC power can directly power the acquisition module 200, the main control module 100, and the output module 300.
[0046] like Figure 1 and Figure 2 As shown, this application also includes a sensing module 400, which is electrically connected to the main control module 100. The main control module 100 is used to collect environmental data from the sensing module 400 and write the environmental data into the ring buffer unit 106, so that the environmental data and the sampled data are packaged synchronously and sent to the host computer 500.
[0047] The sensing module 400 integrates an inertial measurement unit 401 and a magnetic sensor 402. The inertial measurement unit 401 is preferably a nine-axis attitude sensor (IMU), and the magnetic sensor 402 can be a magnetometer manufactured by STMicroelectronics, specifically the LIS2MDLTR model. The sensing module 400 also includes a temperature and humidity sensor. The inertial measurement unit 401, magnetic sensor 402, and temperature and humidity sensor are used to measure the external environment. The sensors are connected to the main control module 100 via an I2C (Inter-Integrated Circuit) bus. When packaging EEG data, the main control module 100 reads the current data from the sensing module 400 via I2C as environmental data and writes the environmental data into a data frame format in a circular buffer according to a timestamp. The data packet received by the host computer 500 simultaneously contains both the acquired data and the environmental data, facilitating the removal of motion artifacts and enabling multi-data fusion discrimination to improve accuracy.
[0048] like Figure 4 As shown in one embodiment of this application, a method for detecting and exciting the above-mentioned bioelectric signal is also disclosed, the method comprising the following steps: Step S1: Acquire the detection signal through the acquisition module 200 and send the detection signal to the main control module 100; Step S2: Receive the detection signal through the processing unit 101 within the main control module 100, and generate corresponding excitation data based on the detection signal; Step S3: Control the main control module 100 to perform alternating transmission, which includes: during the transmission of the excitation data in one buffer unit to the output module 300, the processing unit 101 synchronously writes the subsequent excitation data into another buffer unit, and when the transmission of the previous buffer unit is completed, the transmission is switched to the output module 300 continuously from the other buffer unit.
[0049] In some embodiments, this method corresponds to the device architecture described above, and the above steps are stored in the non-volatile memory of the main control module 100. Specifically: In step S1, the acquisition module 200 acquires microvolt-level EEG signals through electrodes 202 attached to the human scalp. These EEG signals are then sent to the analog-to-digital conversion unit 201 for sampling and analog-to-digital conversion. After the analog-to-digital conversion unit 201 completes one sampling, it sends a data ready signal to the main control module 100. At this time, the main control module 100 does not participate in the data transfer of the detection signal. Instead, it responds to the data ready signal through the second data transfer unit 107 and temporarily stores the detection signal in the ring buffer unit 106 via the SPI bus. During the idle period when the processing unit 101 is performing other tasks, it packages the accumulated EEG data (i.e., detection signals) in the ring buffer and sends it to the host computer 500 via the USB-C interface, reducing the occupancy of the processing unit 101.
[0050] In step S2, the main control module 100 extracts the latest EEG data from the circular buffer, performs filtering, EEG feature extraction, and real-time brain state discrimination; based on the preset closed-loop control algorithm and the current brain state, it dynamically decides the electrical stimulation parameters to be applied at the next moment, such as frequency, amplitude, phase, etc. After the processing unit 101 determines the parameters, in order to ensure that the waveform calculation speed is greater than the output consumption speed, the processing unit 101 calls the sine function table and uses the SIMD (Single Instruction Multiple Data) instruction set to quickly calculate the next segment of discrete digital sampling points (i.e., excitation data) used to reconstruct the analog waveform.
[0051] like Figure 4 and Figure 5 As shown, in step S3, the stimulus data of multiple buffer units can be interrupted by periodically interrupting the main program of the processing unit 101, so that the stimulus data of the buffer units is transmitted to the output module 300; however, this application proposes a more preferred embodiment, wherein controlling the main control module 100 to perform alternating transmission specifically includes: Step S31: In response to the interrupt signal of the hardware timing unit 105, the data transfer unit transfers the excitation data of the buffer unit to the output module 300 according to the clock frequency of the hardware timing unit 105. Step S32: While the stimulus data is being transported to the output module 300, the processing unit 101 simultaneously writes the stimulus data into the other buffer unit.
[0052] In steps S31 and S32, the number of buffer units can be multiple, but in this embodiment, two are preferred, such as a first buffer unit 102 and a second buffer unit 103. The processing unit 101 alternately fills the calculated excitation data into the idle first buffer unit 102 and the second buffer unit 103. For example, the excitation data of the first buffer unit 102 is used as waveform data A, and the excitation data of the second buffer unit 103 is used as waveform data B. Under the control of a hardware timer (e.g., set to 100kHz), the first data transfer unit 104 outputs the excitation data in the second buffer unit 103 to the output module 300, i.e., the digital-to-analog conversion unit 301.
[0053] When the excitation data in wavetable B is exhausted, the hardware automatically switches to wavetable A to continue reading. While wavetable A is outputting data, the processing unit 101 calculates new data in the background and overwrites it into wavetable B. This cycle repeats, enabling continuous output of low-frequency, non-periodic complex waveforms.
[0054] Specifically, such as Figure 3 It can be seen that the processing unit 101 first fills the first segment of excitation data into the first buffer unit 102. The first buffer unit 102 first transmits wavetable A to the output module 300. During the wavetable output, the processing unit 101 fills the second segment of excitation data into the second buffer unit 103 and waits continuously after filling. When the excitation data in wavetable A is exhausted, the second buffer unit 103 then transmits wavetable B to the output module 300. During the transmission of wavetable B, the processing unit 101 again overwrites the third segment of excitation data into the first buffer unit 102 and waits continuously after overwriting. This cycle continues. In the process of alternating filling and output of multiple segments of continuous excitation data, the memory limit of the main control module 100 is indirectly increased so that low-frequency signals can be output without reducing the main clock frequency.
[0055] On the timeline, the three actions of acquiring detection signals, calculating waveform parameters, and outputting excitation data are presented in a pipeline-like overlapping state. In the alternating transmission steps executed by the main control module 100, the first data transfer unit 104, the second data transfer unit 107, and the processing unit 101 are addressed independently. The transfer and writing actions are executed concurrently within the same time period. Timing alignment is maintained under the interrupt signal of the hardware timing unit 105, thereby releasing the computing resources of the processing unit 101.
[0056] The above description is merely a preferred embodiment of this application and does not limit the patent scope of this application. Any equivalent structural transformations made based on the inventive concept of this application and the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included within the patent protection scope of this application.
Claims
1. A bioelectric signal detection and excitation device, characterized in that, include: The acquisition module is configured to acquire detection signals from living organisms; The main control module includes: The processing unit is electrically connected to the acquisition module and is used to receive the detection signal and generate corresponding excitation data. At least two buffer units are electrically connected to the processing unit and are used to alternately store the corresponding stimulus data; The output module, electrically connected to the main control module, outputs an electrical stimulation waveform based on the excitation data; wherein, The main control module is configured such that during the transmission of the excitation data from one of the buffer units to the output module, the processing unit simultaneously writes the subsequent excitation data into another buffer unit, and when the transmission from the previous buffer unit is completed, it switches to continuous transmission from the other buffer unit to the output module.
2. The bioelectric signal detection and excitation device as described in claim 1, characterized in that, The main control module also includes: The first data transfer unit is electrically connected to the at least two buffer units and also electrically connected to the output module; The hardware timing unit is electrically connected to the controlled end of the first data transfer unit; The first data transfer unit transmits the excitation data of the at least two buffer units to the output module one by one based on the clock frequency of the hardware timing unit.
3. The bioelectric signal detection and excitation device as described in claim 1, characterized in that, The at least two buffer units include: The first buffer unit has its input terminal electrically connected to the processing unit; The second buffer unit has its input terminal electrically connected to the processing unit. The first buffer unit and the second buffer unit alternately store the stimulus data from the processing unit.
4. The bioelectric signal detection and excitation device as described in claim 2, characterized in that, The at least two buffer units include: The first buffer unit has its input terminal electrically connected to the processing unit and its output terminal electrically connected to the first data transport unit. The second buffer unit has its input terminal electrically connected to the processing unit and its output terminal electrically connected to the first data transport unit. The first buffer unit and the second buffer unit alternately store the stimulus data from the processing unit; The first data transfer unit transmits the excitation data from the first buffer unit to the output module based on the clock frequency of the hardware timing unit, and the processing unit synchronously transmits the excitation data to the second buffer unit. Once the first buffer unit has completed its transmission, the second buffer unit will continuously transmit the excitation data to the output module.
5. The bioelectric signal detection and excitation device as described in claim 1, characterized in that, The main control module includes: The second data transfer unit is electrically connected to the acquisition module and is used to receive the data ready signal sent by the acquisition module. The ring-shaped buffer unit is electrically connected to the second data transport unit and also electrically connected to the processing unit; The second data transfer unit responds to the ready signal and is used to transfer and temporarily store the detection signal of the acquisition module to the ring buffer unit.
6. The bioelectric signal detection and excitation device as described in claim 1, characterized in that, The output module includes: A digital-to-analog converter unit, the input of which is electrically connected to the at least two buffer units; A low-pass filter, the input of which is electrically connected to the output of the digital-to-analog converter, and the output of which is used to output the electrical stimulation waveform.
7. The bioelectric signal detection and excitation device as described in claim 6, characterized in that, The output module also includes: The constant current unit has its input terminal electrically connected to the output terminal of the low-pass filter, and its output terminal is used to connect to external electrodes.
8. The bioelectric signal detection and excitation device as described in claim 1, characterized in that, It also includes a power module, which is connected to the power input terminal of the acquisition module and the power input terminal of the output module, respectively. The power module includes: An isolation unit, the output of which is electrically connected to the power input of the main control module; The power management unit is electrically connected to the isolation unit, and also electrically connected to the power input terminal of the acquisition module and the power input terminal of the output module.
9. A method applied to the bioelectric signal detection and excitation device according to any one of claims 1 to 8, characterized in that, The method includes the following steps: The detection signal is acquired through the acquisition module and then sent to the main control module. The main control module receives the detection signal through its processing unit and generates corresponding excitation data based on the detection signal. Controlling the main control module to perform alternating transmission includes: during the transmission of the excitation data in one buffer unit to the output module, the processing unit synchronously writes the subsequent excitation data into another buffer unit; when the transmission of the previous buffer unit is completed, the transmission is switched to the output module continuously from the other buffer unit.
10. The method as described in claim 9, characterized in that, The control of the main control module to perform alternating transmission specifically includes: The data transfer unit responds to the interrupt signal of the hardware timing unit and, according to the clock frequency of the hardware timing unit, transfers the excitation data of the buffer unit to the output module. While the stimulus data is being transferred to the output module, the processing unit simultaneously writes the stimulus data into the other buffer unit.