Firmware upgrade method, system, device and storage medium

Abstract

Embodiments of the present application disclose a firmware upgrading method, system, device and storage medium. The method comprises the following steps: a terminal writes one or more data blocks in a data packet used for upgrading into a cache area of a flash memory, and updates a data state of the data packet recorded in the flash memory, the data state being used for indicating a writing condition and a checking condition of at least one data block in the data packet; in a case that power supply of the terminal is abnormal, the terminal sets the cache area of the flash memory to a read-only mode and locks the data state; in a case that power supply of the terminal is normal and the terminal is restarted, the terminal performs the operations of writing into memory and checking on the data packet based on the data state. In the method, the terminal can realize breakpoint recovery in the upgrading process.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to firmware upgrade methods, systems, devices, and storage media. Background Technology

[0002] Firmware is an executable program in a terminal used to initialize the terminal and control hardware functions. The terminal can erase the original firmware and write the new firmware into the terminal to achieve firmware upgrade.

[0003] If the terminal's power is abnormally interrupted during a firmware upgrade, the firmware may be corrupted or lost, rendering the terminal inoperable. In this case, the operator needs to manually control the terminal's startup pin to trigger a re-upgrade of the firmware. Therefore, the above method fails to handle abnormal recovery, leaving the terminal with no choice but to re-upgrade the firmware in the event of an abnormal power outage, which is a problem. Summary of the Invention

[0004] This application provides a firmware upgrade method, system, device, and storage medium, in which the terminal can resume from breakpoints during the upgrade process.

[0005] In a first aspect, embodiments of this application provide a firmware upgrade method, which can be applied to a terminal, such as a terminal or a device within a terminal. The method includes: the terminal writing one or more data blocks from a data packet used for upgrade to a flash memory buffer, and updating the data state recorded in the flash memory for the data packet, the data state indicating the writing status and verification status of at least one data block in the data packet; in the event of a power outage, the terminal setting the flash memory buffer to read-only mode and locking the data state; and in the event of a normal power supply and restart, the terminal performing write-to-memory and verification operations on the data packet based on the data state.

[0006] In this method, the data status recorded in the flash memory of the data packet is used to indicate the write status and verification status of at least one data block in the data packet. In the event of a power outage and subsequent restoration of normal power, the terminal performs write-to-memory and verification operations based on the data status of the data packet, enabling breakpoint recovery of the upgrade process and resuming the upgrade progress before the power outage, thereby improving upgrade efficiency.

[0007] In this method, locking the data state indicates that the terminal can only read the data state but cannot update it. When the terminal experiences a power failure, setting the flash memory cache to read-only mode and locking the data state helps reduce the probability of data blocks written to the cache and the data state being erased or altered during a power failure.

[0008] In one optional implementation, the terminal further performs the following steps: detecting the terminal's power supply voltage; and determining that the terminal's power supply is abnormal if the terminal's power supply voltage is less than a first threshold.

[0009] In this embodiment, the terminal can determine whether the power supply is abnormal by detecting the power supply voltage, which helps the terminal to react quickly in the event of a power supply abnormality.

[0010] In one optional implementation, when the terminal is powered on normally and restarted, the terminal performs write-to-memory and verification operations on the data packets based on the data status. Specifically, when the terminal is powered on normally and restarted, the terminal performs verification operations on the data blocks in the data packets whose data status is "written but not verified"; when the terminal is powered on normally and restarted, the terminal performs write-to-memory and verification operations on the data blocks in the data packets whose data status is "not written but not verified".

[0011] In this implementation, after the terminal is powered on and restarted, it can perform write-to-memory and verification operations on data blocks in the data packet according to the data status, thereby realizing breakpoint recovery of the upgrade process and continuing the upgrade progress before the power supply failure, which can improve upgrade efficiency.

[0012] In one optional implementation, the terminal writes one or more data blocks from the data packet used for upgrade to the flash memory buffer and updates the data state recorded in the flash memory. Specifically, the terminal writes one or more data blocks from the data packet used for upgrade to the flash memory buffer and updates the data state recorded in the out-of-band area of ​​the flash memory.

[0013] In this embodiment, the terminal separates the area used to store data blocks from the area used to store data states, which helps to improve the terminal's processing efficiency for data blocks and data states.

[0014] In one optional implementation, when the terminal experiences a power supply failure, the terminal sets the flash memory cache to read-only mode and locks the data state. Specifically, when the terminal experiences a power supply failure, the terminal sends a hold signal to the flash memory through a voltage detection circuit. The hold signal is used for firmware upgrade protection. In response to the hold signal, the terminal sets the flash memory cache to read-only mode and locks the data state.

[0015] Optionally, the HOLD signal can be referred to as the / HOLD signal, firmware upgrade protection signal, or freeze signal. The symbol " / " indicates that it is active low.

[0016] In the above implementation, the HOLD signal is used for firmware upgrade protection, indicating that the HOLD signal originally used for state maintenance is now used for firmware upgrade protection, thereby realizing signal reuse and reducing hardware costs.

[0017] Secondly, embodiments of this application provide a firmware upgrade system, the system comprising: The management module is used to write one or more data blocks from the data packet used for upgrade to the flash memory buffer and update the data status recorded in the flash memory. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. The freeze module is used to set the flash memory buffer to read-only mode and lock the data status when the terminal power supply is abnormal. The resume module is used to perform write to memory and verification operations on the data packet based on the data status when the terminal power supply is normal and the terminal restarts.

[0018] In one optional design, a freezing module is used to detect the power supply voltage of the terminal; the freezing module is also used to determine that the terminal power supply is abnormal when the power supply voltage of the terminal is less than a first threshold.

[0019] In one optional design, the resume module is used to perform write-to-memory and verification operations on data packets based on the data status when the terminal power supply is normal and the terminal restarts. Specifically, the resume module is used to perform verification operations on data blocks in the data packet whose data status is "written but not verified" based on the data status when the terminal power supply is normal and the terminal restarts; the resume module is used to perform write-to-memory and verification operations on data blocks in the data packet whose data status is "not written but not verified" based on the data status when the terminal power supply is normal and the terminal restarts.

[0020] In one optional design, a management module is used to write one or more data blocks from the data packet used for upgrade to the buffer of the flash memory, and to update the data status recorded in the flash memory of the data packet. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. Specifically, the management module is used to write one or more data blocks from the data packet used for upgrade to the buffer of the flash memory, and to update the data status recorded in the out-of-band area of ​​the flash memory of the data packet.

[0021] Thirdly, embodiments of this application provide a communication device, which includes: The management unit is used to write one or more data blocks from the data packet used for upgrade to the flash memory buffer and update the data status recorded in the flash memory. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. The freeze unit is used to set the flash memory buffer to read-only mode and lock the data status in the event of abnormal terminal power supply. The resume unit is used to perform write to memory and verification operations on the data packet based on the data status when the terminal power supply is normal and the terminal is restarted.

[0022] In addition, other alternative implementations of the communication device in this regard can be found in the relevant content of the first aspect above, and will not be described in detail here.

[0023] Fourthly, embodiments of this application provide a communication device, which includes a communication module, a power module, a storage module, and a chip, wherein: The power module is used to provide power to communication equipment; Storage modules are used to store data and instructions; Communication modules are used for internal communication within communication devices, or for communication between communication devices and external devices. The chip is used to perform the method described in the first aspect above.

[0024] Fifthly, this application also provides a computer device, the computer device comprising: a memory and a processor, wherein the memory stores a computer program, and the computer program, when executed by the processor, implements the steps of the method described above.

[0025] Sixthly, this application also provides a computer storage medium storing a computer program that, when executed by a processor, implements the steps of the method described above.

[0026] In a seventh aspect, this application also provides a computer program product containing instructions that, when executed on a communication device, implement the steps of the method described above. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application. To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, those skilled in the art can obtain other drawings based on these drawings without any creative effort.

[0028] Figure 1 This is a schematic diagram of the structure of a terminal provided in an embodiment of this application; Figure 2 A flowchart illustrating a firmware upgrade method provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a firmware upgrade system provided in an embodiment of this application; Figure 4 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application; Figure 5 This is a schematic diagram of the structure of a communication device provided in an embodiment of this application; Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application.

[0029] The realization of the objectives, functional features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. The accompanying drawings have illustrated specific embodiments of this application, which will be described in more detail below. These drawings and textual descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concepts of this application to those skilled in the art through reference to specific embodiments. Detailed Implementation

[0030] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0031] It should be understood that the terms "comprising" or "including" indicate the presence of the stated features, steps, operations, elements, components, items, types, and / or groups, but do not exclude the presence, occurrence, or addition of one or more other features, steps, operations, elements, components, items, types, and / or groups. The terms "or," "and / or," and "comprising at least one of the following," as used in this application, can be interpreted as inclusive, or mean any one or any combination thereof. For example, "comprising at least one of the following: A, B, C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C," and similarly, "A, B, or C" or "A, B, and / or C" means "any one of the following: A; B; C; A and B; A and C; B and C; A and B and C." Exceptions to this definition only occur when the combination of elements, functions, steps, or operations is inherently mutually exclusive in some way.

[0032] It should be understood that although the steps in the flowcharts of this application's embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some of the steps in the figures may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of the sub-steps or stages of other steps.

[0033] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0034] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0035] The structure of the terminal in the embodiments of this application is described below. Figure 1 As shown, Figure 1 This is a schematic diagram of a terminal structure provided in an embodiment of this application. The terminal includes flash memory, a non-volatile storage medium used to store terminal data (such as firmware), applications, and user files. The terminal can perform operations such as erasing, writing, and reading from the flash memory. For example, during a firmware upgrade, the terminal can erase the original firmware in the flash memory and write new firmware into it.

[0036] In this application embodiment, the terminal can also be referred to as a terminal device, which can refer to various forms of user equipment (UE), access terminal, user unit, user station, mobile station, mobile station (MS), remote station, remote terminal, mobile device, user terminal, wireless communication device, user agent, or user device. The terminal can also be a cellular phone, cordless phone, session initiation protocol (SIP) phone, wireless local loop (WLL) station, personal digital assistant (PDA), handheld device with wireless communication function, computing device or other processing device connected to a wireless modem, vehicle-mounted device, wearable device, terminal in a 5th generation mobile communication (5G) network, or terminal in a future evolved public land mobile network (PLMN), etc. This application embodiment does not limit the type of terminal.

[0037] To facilitate understanding of the firmware upgrade method disclosed in the embodiments of this application, the relevant terms are explained below.

[0038] (1) NAND flash NAND flash memory is a type of flash memory with NAND logic gates. It features high storage density and low cost. NAND flash memory includes a single-level cell (SLC) cache and an out-of-band (OOB) area. The OOB area is a storage space independent of the user data area and is used to store data required for flash memory management. (2) Firmware upgrade Firmware is an executable program in a terminal used to initialize the terminal and control hardware functions. Firmware upgrade refers to the process of replacing or updating the terminal with a new version of firmware. Firmware upgrades can reduce problems such as device lag and communication abnormalities caused by old firmware versions. Firmware upgrades can also add terminal functions and optimize existing terminal functions.

[0039] The terminal can perform firmware upgrades in boot mode. If the terminal's power is abnormally interrupted during the firmware upgrade process, the firmware may be damaged, lost, erased, or altered, which may cause the terminal to become unusable (or the terminal to become bricked).

[0040] In one approach, the operator manually controls the terminal's boot pin to trigger the terminal to re-enter boot mode and then re-upgrade the firmware. It's clear that in this method, the terminal can only re-upgrade the firmware in the event of an abnormal power outage, and cannot resume the upgrade process from where it was before the power outage, resulting in low upgrade efficiency. Therefore, how to achieve breakpoint recovery of the upgrade process in the event of an abnormal power outage is a problem that urgently needs to be solved.

[0041] To address the aforementioned issues, this application proposes a firmware upgrade method and related apparatus. The firmware upgrade method and related apparatus will be described in detail below with reference to the accompanying drawings.

[0042] Please see Figure 2 , Figure 2 This is a flowchart illustrating a firmware upgrade method provided in an embodiment of this application. The method is described from the perspective of the terminal. Figure 2 As shown, the method includes, but is not limited to, the following steps: S201. The terminal writes one or more data blocks from the data packet used for the upgrade to the flash memory buffer and updates the data status of the data packet recorded in the flash memory.

[0043] Upgrade data packets refer to the set of data that a terminal obtains from a server or local storage medium during the upgrade process to replace or update the original data. For example, in a firmware upgrade scenario, upgrade data packets can be a set of firmware that the terminal obtains from a server or local storage medium during the upgrade process to replace or update the original firmware.

[0044] Data blocks in an upgrade data packet refer to the sub-units obtained after splitting the upgrade data packet, or in other words, data blocks in an upgrade data packet are the constituent units of the upgrade data packet.

[0045] Optionally, the data state recorded in the flash memory of the data packet is used to indicate the write status and verification status of at least one data block in the data packet. The data state recorded in the flash memory of the data packet includes: the data state of at least one data block in the data packet. The data state of the data block includes any one of the following: not written and not verified, written and not verified, or written and verified.

[0046] For example, if the write status of data block 1 in the data packet is "not written" and the checksum status is "not checked," then the data state of data block 1 is "not written and not checked." As another example, if the write status of data block 1 in the data packet is "written" and the checksum status is "not checked," then the data state of data block 1 is "written and not checked." And yet another example, if the write status of data block 1 in the data packet is "written" and the checksum status is "checked," then the data state of data block 1 is "written and checked."

[0047] Optionally, the data status of a data block can be identified using two bits. A two-bit "00" is used to identify a data block whose data status is unwritten and unverified; a two-bit "01" is used to identify a data block whose data status is written and unverified; and a two-bit "11" is used to identify a data block whose data status is written and verified.

[0048] For example, before the terminal writes data block 1 from the data packet to the flash memory buffer, the data state of data block 1 is "not written, not verified," so the data state of data block 1 can be identified using two bits "00." As another example, if the terminal has already written data block 1 from the data packet to the flash memory buffer, and the data state of data block 1 is "written, not verified," then the data state of data block 1 can be identified using two bits "01." Yet another example, if the terminal has written data block 1 from the data packet to the flash memory buffer and verified data block 1, and the data state of data block 1 is "written, verified," then the data state of data block 1 can be identified using two bits "11."

[0049] In one optional implementation, S201 includes: the terminal writing one or more data blocks from the data packet used for upgrading to the flash memory buffer, and updating the data state recorded in the out-of-band area of ​​the flash memory. Here, the flash memory includes non-flash memory, the flash memory buffer includes an SLC buffer (similar to the non-flash memory), and the flash memory out-of-band area includes an out-of-band area (similar to the non-flash memory). In this method, the terminal separates the area used to store data blocks from the area used to store data state, which helps improve the terminal's processing efficiency for data blocks and data state.

[0050] S202. In the event of a power supply failure, the terminal sets the flash memory cache to read-only mode and locks the data state.

[0051] Among them, the terminal locking data state indicates that the terminal can only read the data state but cannot update the data state.

[0052] As can be seen, in S202, when the terminal is in the event of a power failure, the flash memory cache is set to read-only mode and the data status is locked. This helps to reduce the probability that the data blocks and data status written to the flash memory cache will be erased or changed when the terminal is in the event of a power failure.

[0053] In one optional implementation, S202 includes: when the terminal experiences a power supply failure, the terminal sends a hold signal to the flash memory via a voltage detection circuit. The hold signal is used for firmware upgrade protection. In response to the hold signal, the terminal sets the flash memory's cache to read-only mode and locks the data state. Optionally, the hold signal can be referred to as a / hold signal, a firmware upgrade protection signal, or a freeze signal. The symbol " / " indicates that the signal is active low.

[0054] In the above method, the HOLD signal is used for firmware upgrade protection, indicating that the HOLD signal originally used for state maintenance is now used for firmware upgrade protection, thereby realizing signal reuse and reducing hardware costs.

[0055] Optionally, the terminal sends a HOLD signal to the flash memory through a voltage detection circuit. Specifically, the terminal sends a HOLD signal to the HOLD pin (or / HOLD pin) of the flash memory through a voltage detection circuit.

[0056] Optionally, the terminal responds to the HOLD signal, sets the flash memory cache to read-only mode and locks the data state. Specifically, the flash memory controller responds to the HOLD signal, sets the flash memory cache to read-only mode and locks the data state.

[0057] In one optional implementation, the terminal determines a power supply anomaly by the following steps: the terminal detects its power supply voltage; if the power supply voltage is less than a first threshold, the terminal determines a power supply anomaly. This application does not limit the value of the first threshold; for example, the first threshold may be 3.3 volts (V).

[0058] Optionally, the terminal detects its power supply voltage via a voltage detection circuit. This voltage detection circuit is a detection unit within the terminal, employing an independent power supply design, allowing it to detect the terminal's power supply voltage even when the terminal is powered off.

[0059] Optionally, the operating voltage range of the voltage detection circuit can be 1.8V-5.5V. This application does not limit the operating voltage range of the voltage detection circuit.

[0060] S203. When the terminal is powered on normally and restarted, it performs operations to write data packets to memory and perform verification based on the data status.

[0061] The scenario where the terminal has normal power supply and restarts includes situations where the terminal's power supply voltage is greater than the second threshold and the terminal restarts. The second threshold can be determined based on the power supply voltage during normal terminal operation, and this application does not limit the value of the second threshold.

[0062] In one optional implementation, before performing the write-to-memory and verification operations on data packets based on data status, the terminal determines the data status as either "data blocks written to unverified blocks" and / or "data blocks not written to unverified blocks" by parsing the data status. Here, parsing the data status means that the terminal reads and identifies the data status. In this method, the terminal determines whether data blocks have been written to unverified blocks and / or not, based on the data status. This helps the terminal determine the upgrade progress before a power outage, thus eliminating the need to perform write-to-memory and verification operations on already verified data blocks, thereby shortening the upgrade process and improving upgrade efficiency.

[0063] In one optional implementation, S203 includes: when the terminal is powered on normally and restarted, performing a verification operation on data blocks in the data packet whose data status is "written but not verified" based on the data status; and when the terminal is powered on normally and restarted, performing a write-to-memory and verification operation on data blocks in the data packet whose data status is "not written but not verified" based on the data status.

[0064] As can be seen, in the above implementation, after the terminal is powered on and restarted, it can perform write-to-memory and verification operations on the data blocks in the data packet according to the data status, thereby realizing breakpoint recovery in the upgrade process and continuing the upgrade progress before the power supply failure, which can improve upgrade efficiency.

[0065] As can be seen, in this embodiment, while the terminal writes one or more data blocks from the data packet to the flash memory buffer, it also updates the data status recorded in the flash memory of the data packet, which indicates the writing status and verification status of at least one data block in the data packet. Thus, in the event of a power outage and subsequent restoration of normal power supply, the terminal can perform write-to-memory and verification operations based on the data status of the data packet, enabling breakpoint recovery of the upgrade process and resuming the upgrade progress before the power outage, thereby improving upgrade efficiency.

[0066] In addition, in this embodiment of the application, the terminal can set the flash memory cache to read-only mode and lock the data state, so that in the event of a power failure, the terminal can protect the data blocks stored in the cache and the data state stored in the out-of-band area, thereby reducing the probability that the terminal will not be able to operate (or become bricked) due to the data blocks and data state being erased or changed in the event of a power failure.

[0067] Please see Figure 3 , Figure 3 This is a schematic diagram of a firmware upgrade system provided in an embodiment of this application. The firmware upgrade system includes, but is not limited to, a management module 301, a freeze module 302, and a resume module 303.

[0068] The management module 301 is used to write one or more data blocks in the data packet used for upgrade to the cache area of ​​flash memory, and update the data status recorded in flash memory of the data packet. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. The freeze module 302 is used to set the flash memory cache to read-only mode and lock the data state in the event of a terminal power failure. The resume module 303 is used to perform write-to-memory and verification operations on data packets based on the data status when the terminal is powered normally and restarted.

[0069] Optionally, the freeze module 302 is also used to detect the power supply voltage of the terminal; the freeze module 302 is also used to determine that the power supply of the terminal is abnormal when the power supply voltage of the terminal is less than a first threshold.

[0070] Optionally, the resume module 303 is used to perform write-to-memory and verification operations on data packets based on the data status when the terminal power supply is normal and the terminal restarts. Specifically, the resume module 303 is used to perform verification operations on data blocks in the data packet whose data status is "written but not verified" based on the data status when the terminal power supply is normal and the terminal restarts; the resume module 303 is used to perform write-to-memory and verification operations on data blocks in the data packet whose data status is "not written but not verified" based on the data status when the terminal power supply is normal and the terminal restarts.

[0071] Optionally, before performing the write-to-memory and verification operations on the data packet based on the data status, the resume module 303 is further configured to determine, by parsing the data status, whether the data status is that an unverified data block has been written and / or no unverified data block has been written. Here, parsing the data status means that the resume module 303 reads and identifies the data status.

[0072] Optionally, the management module 301 is used to write one or more data blocks in the data packet for upgrade to the buffer of the flash memory, and update the data status recorded in the flash memory of the data packet. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. Specifically, the management module 301 is used to write one or more data blocks in the data packet for upgrade to the buffer of the flash memory, and update the data status recorded in the out-of-band area of ​​the flash memory of the data packet.

[0073] Optionally, the freeze module 302 is used to set the flash memory buffer to read-only mode and lock the data state in the event of abnormal terminal power supply. Specifically, the freeze module 302 is used to send a HOLD signal to the flash memory through a voltage detection circuit in the event of abnormal terminal power supply. The HOLD signal is used for firmware upgrade protection. The freeze module 302 is also used to respond to the HOLD signal to set the flash memory buffer to read-only mode and lock the data state.

[0074] In this embodiment, the management module 301 can be an SLC cache management module, which controls the writing of data blocks in the data packet and updates the data status recorded in the flash memory. The freeze module 302 can be a hardware freeze module, which includes a voltage detection circuit (integrated circuit, IC) and a HOLD signal line. The resume module 303 can be a breakpoint resume module, which is used to parse the data status and implement breakpoint resume.

[0075] As can be seen, while the firmware upgrade system writes one or more data blocks from the data packet to the flash memory buffer through the management module 301, it also updates the data status recorded in the flash memory of the data packet, which indicates the writing status and verification status of at least one data block in the data packet. Thus, in the event of a power outage and subsequent restoration of normal power supply, the firmware upgrade system can use the resume module 303 and the data status of the data packet to perform write-to-memory and verification operations, achieving breakpoint recovery of the upgrade process and resuming the upgrade progress before the power outage, thereby improving upgrade efficiency.

[0076] In addition, the firmware upgrade system can set the flash memory cache to read-only mode and lock the data state through the freeze module 302. In the event of a power failure, the terminal can protect the data blocks stored in the cache and the data state stored in the out-of-band area. This reduces the probability that the terminal will not work (or become bricked) due to the data blocks and data state being erased or changed in the event of a power failure.

[0077] Please see Figure 4 , Figure 4 This is a schematic diagram of a communication device provided in an embodiment of this application. The communication device includes at least a management unit 401, a freezing unit 402, and a transmission continuation unit 403.

[0078] The management unit 401 is used to write one or more data blocks in the data packet for upgrade to the cache of flash memory, and update the data status recorded in flash memory of the data packet. The data status is used to indicate the writing status and verification status of at least one data block in the data packet. The freezing unit 402 is used to set the flash memory cache to read-only mode and lock the data state in the event of a terminal power failure. The resume unit 403 is used to perform write-to-memory and verification operations on data packets based on the data status when the terminal is powered normally and restarted.

[0079] The embodiments of this application and the method embodiments shown above are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the embodiments shown above, which will not be repeated here.

[0080] Please see Figure 5 , Figure 5 This is a schematic diagram of a communication device provided in an embodiment of this application. The communication device can execute the relevant steps of the terminal in the aforementioned method embodiments. The communication device includes: a communication module 501, a power module 502, a storage module 503, and a chip 504.

[0081] The power module 502 is used to provide power to the communication device; the storage module 503 is used to store data and instructions; the communication module 501 is used for internal communication within the communication device or for communication between the communication device and external devices; and the chip 504 is used to execute the method executed by the terminal in the above method embodiment.

[0082] The implementation of this communication device can be found in the relevant content of the above method embodiments, and will not be described in detail here.

[0083] The embodiments of this application and the above-described method embodiments are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the above-described method embodiments, which will not be repeated here.

[0084] Please see Figure 6 , Figure 6 This is a schematic diagram of the structure of a computer device provided in an embodiment of this application. The computer device includes at least a processor 601, a memory 603, and a user interface 602. The processor 601, the memory 603, and the user interface 602 are interconnected. The memory 603 is used to store computer programs, which include program instructions. The processor 601 is used to execute the program instructions.

[0085] Memory 603 may include volatile memory, such as random-access memory (RAM); memory 603 may also include non-volatile memory, such as flash memory, solid-state drive (SSD), etc.; memory 603 may also include a combination of the above types of memory.

[0086] Processor 601 may be a central processing unit (CPU). Processor 601 may further include hardware chips. The aforementioned hardware chips may be application-specific integrated circuits (ASICs), programmable logic devices (PLDs), etc. The aforementioned PLDs may be field-programmable gate arrays (FPGAs), generic array logic (GALs), etc.

[0087] In an optional implementation, memory 603 is also used to store program instructions. Processor 601 can invoke program instructions: processor 601 is configured to invoke program instructions to execute the relevant content of the above method embodiments, which will not be described in detail here.

[0088] The embodiments of this application and the method embodiments shown above are based on the same concept and have the same technical effects. For the specific principles, please refer to the description of the embodiments shown above, which will not be repeated here.

[0089] This application also provides a computer-readable storage medium storing a detection program, which, when executed by a processor, implements the steps of a firmware upgrade method in the above method embodiments.

[0090] The embodiments of the mobile terminal and computer-readable storage medium provided in this application include all the technical features of the above-described firmware upgrade method embodiments. The extended and explanatory content of the specification is basically the same as the above-described method embodiments, and will not be repeated here.

[0091] This application also provides a computer program product, which includes computer program code. When the computer program code is run on a computer, it causes the computer to perform the methods described in the various possible implementations above.

[0092] This application also provides a chip, including a memory and a processor. The memory is used to store a computer program, and the processor is used to call and run the computer program from the memory, so that a device with the chip installed performs the methods described in the various possible implementations above.

[0093] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0094] The steps in the method of this application embodiment can be adjusted, combined, or deleted according to actual needs.

[0095] The units in the device of this application embodiment can be merged, divided, and deleted according to actual needs.

[0096] In this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions are generally described in detail only when they appear for the first time. When they appear again, they are generally not repeated for the sake of brevity. When understanding the technical solutions and other contents of this application, the same or similar terms, concepts, technical solutions and / or application scenario descriptions that are not described in detail later can be referred to their previous relevant detailed descriptions.

[0097] In this application, the descriptions of the various embodiments have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0098] The technical features of the present application can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of the present application.

[0099] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device (which may be a mobile phone, computer, server, controlled terminal, or network device, etc.) to execute the methods of each embodiment of this application.

[0100] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. A computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, all or part of the flow or function according to the embodiments of this application is generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, storage disk, magnetic tape), an optical medium (e.g., digital video disc (DVD)), or a semiconductor medium (e.g., SSD), etc.

[0101] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A firmware upgrade method, characterized in that, The method includes: One or more data blocks from the data packet used for the upgrade are written to the cache of the flash memory, and the data status recorded in the flash memory of the data packet is updated, the data status being used to indicate the writing status and verification status of at least one data block in the data packet; In the event of a power supply failure at the terminal, the cache area of ​​the flash memory is set to read-only mode and the data status is locked. When the terminal is powered on normally and restarted, the operation of writing to the memory and verifying is performed on the data packet based on the data status.

2. The method according to claim 1, characterized in that, The method further includes: Detect the power supply voltage of the terminal; If the power supply voltage of the terminal is less than a first threshold, the terminal power supply is determined to be abnormal.

3. The method according to claim 1 or 2, characterized in that, When the terminal is powered on normally and restarted, the operation of writing to the memory and verifying the data packet based on the data status includes: When the terminal is powered on normally and restarted, a verification operation is performed on the data blocks in the data packet whose data status is "written but not verified" based on the data status. When the terminal is powered on normally and restarted, based on the data status, the operation of writing to the memory and verifying is performed on the data blocks in the data packet whose data status is not written and not verified.

4. The method according to claim 1, characterized in that, The step of writing one or more data blocks from the data packet used for upgrade to the cache of flash memory and updating the data state of the data packet recorded in the flash memory includes: The one or more data blocks in the data packet used for the upgrade are written to the cache of the flash memory, and the data status recorded in the out-of-band area of ​​the flash memory is updated.

5. The method according to claim 1, characterized in that, In the event of a power supply failure at the terminal, setting the flash memory cache to read-only mode and locking the data state includes: In the event of a power supply failure at the terminal, a hold signal is sent to the flash memory via a voltage detection circuit. The hold signal is used for firmware upgrade protection. In response to the hold signal, the cache of the flash memory is set to read-only mode and the data state is locked.

6. A firmware upgrade system, characterized in that, The system includes: The management module is used to write one or more data blocks from a data packet for upgrade to the cache of flash memory, and update the data status recorded in the flash memory of the data packet, wherein the data status is used to indicate the writing status and verification status of at least one data block in the data packet; The freeze module is used to set the cache area of ​​the flash memory to read-only mode and lock the data state in the event of a terminal power failure. The resume module is used to perform operations of writing to the memory and verifying the data packet based on the data status when the terminal is powered normally and restarted.

7. The system according to claim 6, characterized in that, The resume transmission module is used to perform write-to-memory and verification operations on the data packet based on the data status when the terminal is powered normally and restarted, including: The resume transmission module is used to perform a verification operation on the data blocks in the data packet whose data status is written but not verified, based on the data status when the terminal is powered normally and restarted. The resume module is used to perform write-to-memory and verification operations on data blocks in the data packet whose data status is not written or verified, based on the data status when the terminal is powered normally and restarted.

8. A communication device, characterized in that, The communication device includes a communication module, a power module, a storage module, and a chip, wherein: The power module is used to provide power to the communication device; The storage module is used to store data and instructions; The communication module is used for internal communication within the communication device, or for communication between the communication device and external devices. The chip is used to perform the method as described in any one of claims 1 to 5.

9. A computer device, characterized in that, The computer device includes: a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, it implements the method as described in any one of claims 1 to 5.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-readable instructions that, when executed on a communication device, cause the communication device to perform the method described in any one of claims 1 to 5.

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