Driving method, driving module and display device

Abstract

The present disclosure provides a driving method, a driving module and a display device. The driving method is applied to a pixel circuit, the pixel circuit comprising a driving circuit, a first reset circuit and a second reset circuit; a display period comprises a preparation light-emitting stage, the preparation light-emitting stage comprising a first reset time period and a second reset time period; the driving method comprises: in the first reset time period, the first reset circuit writes a first initial voltage to a control terminal of the driving circuit under the control of a first control signal; in the second reset time period, the second reset circuit writes a second initial voltage to a reset terminal of the driving circuit under the control of a second reset control signal; the first reset time period lasts for a time greater than or equal to a first reset time threshold; and / or, the second reset time period lasts for a time greater than or equal to a second reset time threshold. The present disclosure can improve the hysteresis phenomenon of the driving transistor.

Description

Driving method, driving module and display device Technical Field

[0001] This disclosure relates to the field of display technology, and in particular to a driving method, a driving module, and a display device. Background Technology

[0002] In related technologies, because the current flowing through the double-layer series light-emitting element is smaller under the same brightness, the stress on the driving transistor is affected, and conventional image retention and low grayscale image retention will be generated due to the hysteresis phenomenon of the driving transistor.

[0003] Summary of the Invention

[0004] In one aspect, embodiments of this disclosure provide a driving method applied to a pixel circuit, the pixel circuit including a driving circuit, a first reset circuit, and a second reset circuit; the first reset circuit is used to control a first initial voltage terminal to connect or disconnect from a control terminal of the driving circuit under the control of a first control signal provided by a first control terminal; the second reset circuit is used to control a second initial voltage terminal to connect or disconnect from a reset terminal of the driving circuit under the control of a second reset control signal provided by a second reset control terminal; the reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit; the display cycle includes a pre-light emission phase, the pre-light emission phase including a first reset time period and a second reset time period; the driving method includes:

[0005] During the first reset time period, under the control of the first control signal, the first reset circuit writes the first initial voltage provided by the first initial voltage terminal into the control terminal of the drive circuit.

[0006] During the second reset time period, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0007] The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

[0008] Optionally, the first reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time, and the second reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time.

[0009] Optionally, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal; the driving method includes:

[0010] During the first reset time period, the first reset control circuit, under the control of the first reset control signal, writes the first initial voltage into the first terminal of the drive circuit; the compensation control circuit, under the control of the first scan signal, controls the connection between the control terminal of the drive circuit and the first terminal of the drive circuit.

[0011] During the second reset time period, the first reset control circuit, under the control of the first reset control signal, controls the first initial voltage terminal to disconnect from the first terminal of the drive circuit, and the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit.

[0012] Optionally, the first reset time period and the second reset time period are set sequentially.

[0013] Optionally, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, wherein the first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal; the display cycle further includes a light-emitting stage set after the light-emitting preparation stage; the driving method further includes:

[0014] During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to disconnect from the first electrode of the light-emitting element;

[0015] During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to connect with the first electrode of the light-emitting element;

[0016] The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

[0017] Optionally, the interval time threshold is greater than or equal to the four-line scan time.

[0018] Optionally, the display cycle further includes a pre-reset phase set before the first reset time period; the driving method includes:

[0019] During the pre-reset phase, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0020] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0021] Optionally, the third reset time threshold is greater than or equal to four lines of scan time but less than or equal to twenty lines of scan time.

[0022] Optionally, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes:

[0023] During the pre-reset phase, the compensation control circuit is used to control the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

[0024] Optionally, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes:

[0025] During the pre-reset phase, the compensation control circuit is used to control the connection between the control terminal of the drive circuit and the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

[0026] Optionally, the pixel circuit further includes a second light-emitting control circuit, which, under the control of the light-emitting control signal, controls the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit; the display cycle further includes a light-emitting stage set after the light-emitting preparation stage; the driving method includes:

[0027] During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the first voltage terminal to disconnect from the second terminal of the driving circuit;

[0028] During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the connection between the first voltage terminal and the second terminal of the driving circuit.

[0029] Optionally, the pixel circuit further includes a third reset circuit; the third reset circuit is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of the third reset control signal provided by the third reset control terminal, and the second electrode of the light-emitting element is electrically connected to the second voltage terminal; the driving method further includes:

[0030] During the second reset time period, the third reset circuit, under the control of the third reset control signal, writes the third initial voltage provided by the third initial voltage terminal into the first electrode of the light-emitting element.

[0031] Optionally, the display cycle further includes a pre-reset phase set before the first reset time period; the driving method includes:

[0032] During the pre-reset phase, the third reset circuit, under the control of the third reset control signal, writes the third initial voltage into the first electrode of the light-emitting element;

[0033] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0034] Optionally, the second reset control terminal and the third reset control terminal are the same control terminal.

[0035] In a second aspect, embodiments of this disclosure provide a driving module applied to a pixel circuit, the pixel circuit including a driving circuit, a first reset circuit, and a second reset circuit; the first reset circuit is used to control the connection or disconnection between a first initial voltage terminal and the control terminal of the driving circuit under the control of a first control signal provided by a first control terminal; the second reset circuit is used to control the connection or disconnection between a second initial voltage terminal and the reset terminal of the driving circuit under the control of a second reset control signal provided by a second reset control terminal; the reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit; the display cycle includes a pre-light emission phase, the pre-light emission phase including a first reset time period and a second reset time period; the driving module includes a first control signal generation circuit and a second reset control signal generation circuit;

[0036] The first control signal generation circuit is used to provide a first control signal to the first control terminal, so that during the first reset time period, the first reset circuit, under the control of the first control signal, writes the first initial voltage into the control terminal of the drive circuit.

[0037] The second reset control signal generation circuit is used to provide a second reset control signal to the second reset control terminal, so that during the second reset time period, the second reset circuit, under the control of the second reset control signal, writes the second initial voltage into the reset terminal of the drive circuit;

[0038] The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

[0039] Optionally, the first reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time, and the second reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time.

[0040] Optionally, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal; the first control signal generation circuit includes a first reset control signal generation circuit and a first scan signal generation circuit.

[0041] The first reset control signal generation circuit is used to provide a first reset control signal to the first reset control terminal, so that during the first reset time period, the first reset control circuit writes the first initial voltage into the first terminal of the drive circuit under the control of the first reset control signal.

[0042] The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the first reset time period, the compensation control circuit controls the control terminal of the drive circuit to connect with the first terminal of the drive circuit under the control of the first scan signal, and controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal during the second reset time period.

[0043] Optionally, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, wherein the first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal; the display cycle further includes a light-emitting stage set after the light-emitting preparation stage; the driving module further includes a light-emitting control signal generation circuit;

[0044] The light emission control signal generation circuit is used to provide a light emission control signal to the light emission control terminal, so that in the light emission preparation stage, the first light emission control circuit controls the first terminal of the driving circuit to disconnect from the first electrode of the light emission element under the control of the light emission control signal, and in the light emission stage, the first light emission control circuit controls the first terminal of the driving circuit to connect with the first electrode of the light emission element under the control of the light emission control signal.

[0045] The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

[0046] Optionally, the interval time threshold is greater than or equal to the four-line scan time.

[0047] Optionally, the display period may further include a pre-reset phase set before the first reset time period;

[0048] The second reset control signal generation circuit is used to provide the second reset control signal so that, during the pre-reset phase, the second reset circuit, under the control of the second reset control signal, writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0049] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0050] Optionally, the third reset time threshold is greater than or equal to four lines of scan time but less than or equal to twenty lines of scan time.

[0051] Optionally, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit;

[0052] The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the pre-reset phase, the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit.

[0053] Optionally, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit;

[0054] The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the pre-reset phase, the compensation control circuit controls the control terminal of the drive circuit to connect with the first terminal of the drive circuit under the control of the first scan signal.

[0055] In a third aspect, embodiments of this disclosure provide a display device, including a pixel circuit and the aforementioned driving module; the pixel circuit includes a driving circuit, a first reset circuit, and a second reset circuit; the reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit;

[0056] The first reset circuit is electrically connected to the first control terminal, the first initial voltage terminal, and the control terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the control terminal of the drive circuit under the control of the first control signal provided by the first control terminal;

[0057] The second reset circuit is electrically connected to the second reset control terminal, the second initial voltage terminal, and the reset terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the second initial voltage terminal and the reset terminal of the drive circuit under the control of the second reset control signal provided by the second reset control terminal;

[0058] The driving circuit is used to generate a driving current under the control of the potential at its control terminal.

[0059] Optionally, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scanning terminal;

[0060] The first reset control circuit is electrically connected to the first reset control terminal, the first initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the drive circuit under the control of the first reset control signal provided by the first reset control terminal.

[0061] The compensation control circuit is electrically connected to the first scanning end, the control end of the driving circuit, and the first end of the driving circuit, respectively, and is used to control the connection or disconnection between the control end of the driving circuit and the first end of the driving circuit under the control of the first scanning signal provided by the first scanning end.

[0062] Optionally, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, a second light-emitting control circuit, and a third reset circuit;

[0063] The first light-emitting control circuit is electrically connected to the light-emitting control terminal, the first terminal of the driving circuit and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal.

[0064] The second light-emitting control circuit is electrically connected to the light-emitting control terminal, the first voltage terminal, and the second terminal of the driving circuit, respectively, and is used to control the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit under the control of the light-emitting control signal.

[0065] The third reset circuit is electrically connected to the third reset control terminal, the third initial voltage terminal and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of the third reset control signal provided by the third reset control terminal.

[0066] The second electrode of the light-emitting element is electrically connected to the second voltage terminal.

[0067] Optionally, the light-emitting element is a multilayer series light-emitting element. Attached Figure Description

[0068] Figure 1 is a structural diagram of at least one embodiment of the pixel circuit;

[0069] Figure 2 is a structural diagram of at least one embodiment of the pixel circuit;

[0070] Figure 3 is a structural diagram of at least one embodiment of the pixel circuit;

[0071] Figure 4 is a structural diagram of at least one embodiment of the pixel circuit;

[0072] Figure 5 is a structural diagram of at least one embodiment of the pixel circuit;

[0073] Figure 6 is a structural diagram of at least one embodiment of the pixel circuit;

[0074] Figure 7 is a circuit diagram of at least one embodiment of the pixel circuit;

[0075] Figure 8 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 7;

[0076] Figure 9 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 7;

[0077] Figure 10 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 7;

[0078] Figure 11 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 7;

[0079] Figure 12 is a timing diagram of at least one embodiment of the pixel circuit shown in Figure 7;

[0080] Figure 13 is a structural diagram of at least one embodiment of the pixel circuit;

[0081] Figure 14 is a structural diagram of at least one embodiment of the pixel circuit;

[0082] Figure 15 is a structural diagram of at least one embodiment of the pixel circuit;

[0083] Figure 16 is a circuit diagram of at least one embodiment of the pixel circuit;

[0084] Figure 17 is a circuit diagram of at least one embodiment of the pixel circuit;

[0085] Figure 18 is a circuit diagram of at least one embodiment of the pixel circuit;

[0086] Figure 19 is a structural diagram of the drive module according to at least one embodiment of the present disclosure;

[0087] Figure 20 is a structural diagram of the drive module according to at least one embodiment of the present disclosure;

[0088] Figure 21 is a structural diagram of the drive module according to at least one embodiment of the present disclosure. Detailed Implementation

[0089] The technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this disclosure.

[0090] In all embodiments of this disclosure, the transistors used can be thin-film transistors, field-effect transistors, or other devices with similar characteristics. In the embodiments of this disclosure, to distinguish the two terminals of the transistor other than the gate, one terminal is referred to as the first terminal and the other as the second terminal.

[0091] In actual operation, when the transistor is a thin-film transistor or a field-effect transistor, the first electrode can be the drain and the second electrode can be the source; or, the first electrode can be the source and the second electrode can be the drain.

[0092] The driving method described in this embodiment is applied to a pixel circuit, which includes a driving circuit, a first reset circuit, and a second reset circuit. The first reset circuit, under the control of a first control signal provided by a first control terminal, controls the connection or disconnection between a first initial voltage terminal and a control terminal of the driving circuit. The second reset circuit, under the control of a second reset control signal provided by a second reset control terminal, controls the connection or disconnection between a second initial voltage terminal and a reset terminal of the driving circuit. The reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit.

[0093] The display cycle includes a light-up preparation phase, which includes a first reset time period and a second reset time period; the driving method includes:

[0094] During the first reset time period, under the control of the first control signal, the first reset circuit writes the first initial voltage provided by the first initial voltage terminal into the control terminal of the drive circuit.

[0095] During the second reset time period, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0096] The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

[0097] In at least one embodiment of this disclosure, the pixel circuit includes a driving circuit, a first reset circuit, and a second reset circuit; the first reset circuit is reset by the first initial voltage being the potential of the control terminal of the driving circuit under the control of a first control signal, and the second reset circuit is reset by the second initial voltage being the potential of the reset terminal of the driving circuit under the control of a second reset control signal.

[0098] By setting the duration of the first reset time period to be greater than or equal to the first reset time threshold, in conjunction with the compensation control circuit, the reset time of the control terminal of the drive circuit is increased, affecting the hysteresis performance of the drive transistors included in the drive circuit, and optimizing the afterimage problem.

[0099] By setting the duration of the second reset time period to be greater than or equal to the second reset time threshold, the stress time of the driving transistor is increased, thereby improving the hysteresis phenomenon of the driving transistor.

[0100] Optionally, the first reset time threshold is greater than or equal to 8H and less than or equal to 20H, the second reset time threshold is greater than or equal to 8H and less than or equal to 20H, and 1H is the scan time of one line.

[0101] Optionally, the light-emitting element can be a multi-layer series light-emitting element, for example, the light-emitting element can be a double-layer series light-emitting element.

[0102] In related technologies, the light-emitting element is a tandem device, which reduces the driving current flowing through the light-emitting element to achieve the same brightness, thereby reducing power consumption. However, due to the reduction in driving current, other aspects of image quality will deteriorate to some extent, such as image retention. Since the image retention test involves turning on the light for a period of time in a high-brightness state and then switching to a low-brightness state, because the tandem device is more efficient, under the same conditions, it is equivalent to a single product (a single-layer light-emitting device) switching to a lower grayscale, which worsens the image retention problem.

[0103] In related technologies, because the current flowing through the double-layer series light-emitting element is smaller under the same brightness, the stress on the driving transistor is affected, and image retention will be generated due to the hysteresis phenomenon of the driving transistor.

[0104] Based on the above problems, in at least one embodiment of this disclosure, the hysteresis phenomenon of the driving transistor is improved and the image retention problem is improved by setting the duration of the first reset time period to be greater than or equal to the first reset time threshold; and / or setting the duration of the second reset time period to be greater than or equal to the second reset time threshold.

[0105] In at least one embodiment of this disclosure, the Tandem device is a series-connected light-emitting element. The Tandem device is a high-efficiency OLED device structure formed by connecting and stacking multiple OLED (organic light-emitting diode) devices in series through a connecting layer.

[0106] In at least one embodiment of this disclosure, the pixel circuit may be an LTPO (low-temperature polycrystalline oxide) pixel circuit, but is not limited thereto.

[0107] At least one embodiment of this disclosure can be applied to LTPO display products such as mobile phones, foldable displays, and medium-sized displays.

[0108] As shown in FIG1, in at least one embodiment of this disclosure, the pixel circuit includes a driving circuit 10, a first reset circuit 11, and a second reset circuit 12.

[0109] The first reset circuit 11 is electrically connected to the first control terminal R1, the first initial voltage terminal I1, and the control terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the first initial voltage terminal I1 and the control terminal of the drive circuit 10 under the control of the first control signal provided by the first control terminal R1; the first initial voltage terminal I1 is used to provide the first initial voltage Vinit1;

[0110] The second reset circuit 12 is electrically connected to the second reset control terminal RH, the second initial voltage terminal I2, and the second terminal of the drive circuit 10, respectively. It is used to control the connection or disconnection between the second initial voltage terminal I2 and the second terminal of the drive circuit 10 under the control of the second reset control signal provided by the second reset control terminal RH. The second initial voltage terminal I2 is used to provide the second initial voltage Vinit2. The second terminal of the drive circuit 10 is electrically connected to the second node N2.

[0111] The control terminal of the driving circuit 10 is electrically connected to the first node N1. The driving circuit 10 is used to generate a driving current for driving the light-emitting element under the control of the potential of the first node N1.

[0112] In at least one embodiment of this disclosure, the second reset circuit 12 may be electrically connected to the second terminal of the drive circuit 10, and is used to write the second initial voltage Vinit2 into the second terminal of the drive circuit 10 under the control of the second reset control signal; or,

[0113] The second reset circuit 12 can be electrically connected to the first terminal of the drive circuit 10, and is used to write the second initial voltage Vinit2 into the first terminal of the drive circuit 10 under the control of the second reset control signal; or,

[0114] The second reset circuit 12 can be electrically connected to the first terminal and the second terminal of the driving circuit 10 respectively, and is used to write the second initial voltage Vinit2 into the first terminal and the second terminal of the driving circuit 10 under the control of the second reset control signal.

[0115] To improve the hysteresis phenomenon of the drive transistors included in the drive circuit 10.

[0116] In at least one embodiment of this disclosure, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal; the driving method includes:

[0117] During the first reset time period, the first reset control circuit, under the control of the first reset control signal, writes the first initial voltage into the first terminal of the drive circuit; the compensation control circuit, under the control of the first scan signal, controls the connection between the control terminal of the drive circuit and the first terminal of the drive circuit, so as to write the first initial voltage into the control terminal of the drive circuit.

[0118] During the second reset time period, the first reset control circuit, under the control of the first reset control signal, controls the first initial voltage terminal to disconnect from the first terminal of the drive circuit; the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit.

[0119] In a specific implementation, the first reset circuit may include a first reset control circuit and a compensation control circuit. During a first reset time period, the first reset control circuit, under the control of the first reset control signal, writes the first initial voltage into the first terminal of the driving circuit. Under the control of the first scan signal, the compensation control circuit controls the connection between the control terminal of the driving circuit and the first terminal of the driving circuit to write the first initial voltage into the first terminal of the driving circuit. During a second reset time period, under the control of the first scan signal, the compensation control circuit controls the disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit.

[0120] Optionally, the first reset time period and the second reset time period are set sequentially.

[0121] In specific implementation, the first reset time period and the second reset time period can be set sequentially. A data writing phase can be set between the first reset time period and the second reset time period. During the data writing phase, data voltage writing and threshold voltage compensation can be performed. By writing the first initial voltage to the control terminal of the driving circuit during the first reset time period, the driving transistors included in the driving circuit can be turned on at the beginning of the data writing phase to perform threshold voltage compensation.

[0122] In at least one embodiment of this disclosure, the first reset circuit may include a first reset control circuit, and the first control terminal may include a first reset control terminal.

[0123] The first reset control circuit can be electrically connected to the first reset control terminal, the first initial voltage terminal and the control terminal of the drive circuit respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the control terminal of the drive circuit under the control of the first reset control signal provided by the first reset control terminal;

[0124] During the first reset time period, the first reset control circuit, under the control of the first control signal, directly writes the first initial voltage into the control terminal of the drive circuit.

[0125] When the first reset circuit includes only the first reset control circuit, the pixel circuit may further include a compensation control circuit. The compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scan signal provided by the first scan terminal.

[0126] During the first reset time period, the compensation control circuit can, under the control of the first scan signal, control the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit; or, during the first reset time period, the compensation control circuit can, under the control of the first scan signal, control the control terminal of the drive circuit to connect with the first terminal of the drive circuit.

[0127] As shown in Figure 2, based on at least one embodiment of the pixel circuit shown in Figure 1, the first reset circuit includes a first reset control circuit 20 and a compensation control circuit 21; the first control terminal includes a first reset control terminal RP and a first scan terminal GN;

[0128] The first reset control circuit 20 is electrically connected to the first reset control terminal RP, the first initial voltage terminal I1, and the first terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the first initial voltage terminal I1 and the first terminal of the drive circuit 10 under the control of the first reset control signal provided by the first reset control terminal RP; the first terminal of the drive circuit 10 is electrically connected to the third node N3.

[0129] The compensation control circuit 21 is electrically connected to the first scanning terminal GN, the control terminal of the driving circuit 10, and the first terminal of the driving circuit 10, respectively, and is used to control the connection or disconnection between the control terminal of the driving circuit 10 and the first terminal of the driving circuit 10 under the control of the first scanning signal provided by the first scanning terminal GN.

[0130] In at least one embodiment of this disclosure, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, wherein the first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of a light-emitting control signal provided by the light-emitting control terminal; the display cycle further includes a light-emitting stage disposed after the light-emitting preparation stage; the driving method further includes:

[0131] During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to disconnect from the first electrode of the light-emitting element;

[0132] During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to connect with the first electrode of the light-emitting element;

[0133] The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

[0134] In a specific implementation, the pixel circuit may further include a light-emitting element and a first light-emitting control circuit. Under the control of a light-emitting control signal, the first light-emitting control circuit controls the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element. After the light-emitting preparation stage, the display cycle may further include a light-emitting stage. In the light-emitting stage, under the control of a light-emitting control signal, the first light-emitting control circuit controls the connection between the first terminal of the driving circuit and the first electrode of the light-emitting element, so that the driving circuit drives the light-emitting element to emit light. By setting the time interval between the end time of the second reset time period and the start time of the light-emitting stage to be greater than or equal to the interval time threshold, the stress time of the driving transistor included in the driving circuit is increased, and the hysteresis phenomenon of the driving transistor is improved.

[0135] Optionally, the interval time threshold is greater than or equal to 4H, where 1H is the scan time for one line.

[0136] In practice, the time interval threshold can be greater than or equal to 4H, but is not limited to this.

[0137] As shown in Figure 3, based on at least one embodiment of the pixel circuit shown in Figure 2, the pixel circuit further includes a light-emitting element E1 and a first light-emitting control circuit 31.

[0138] The first light-emitting control circuit 31 is electrically connected to the light-emitting control terminal EM, the first terminal of the driving circuit 10, and the first electrode of the light-emitting element E1, respectively. It is used to control the connection or disconnection between the first terminal of the driving circuit 10 and the first electrode of the light-emitting element E1 under the control of the light-emitting control signal provided by the light-emitting control terminal EM.

[0139] In at least one embodiment of this disclosure, the display period further includes a pre-reset phase set before the first reset time period; the driving method includes:

[0140] During the pre-reset phase, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0141] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0142] In a specific implementation, before the first reset time period, the display cycle may also include a pre-reset phase. During the pre-reset phase, under the control of the second reset control signal, the second reset circuit writes the second initial voltage into the reset terminal of the driving circuit, and sets the duration of the pre-reset phase to be greater than or equal to a third reset time threshold, so as to add a bias operation on the driving transistor before resetting the potential of the first terminal of the driving circuit, thereby improving the hysteresis phenomenon of the driving transistor.

[0143] Optionally, the third reset time threshold is greater than or equal to 4H and less than or equal to 20H, where 1H is the scan time for one line.

[0144] In at least one embodiment of this disclosure, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes:

[0145] During the pre-reset phase, the compensation control circuit is used to control the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

[0146] In practical implementation, during the pre-reset phase, the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit, thereby strengthening the stress effect on the drive transistor, improving the hysteresis phenomenon of the drive transistor, and improving the afterimage.

[0147] In at least one embodiment of this disclosure, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes:

[0148] During the pre-reset phase, the compensation control circuit is used to control the connection between the control terminal of the drive circuit and the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

[0149] In practice, during the pre-reset phase, the compensation control circuit, under the control of the first scan signal, controls the connection between the control terminal of the drive circuit and the first terminal of the drive circuit.

[0150] In at least one embodiment of this disclosure, the pixel circuit further includes a second light-emitting control circuit, which is used to control the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit under the control of the light-emitting control signal; the display cycle further includes a light-emitting stage disposed after the light-emitting preparation stage; the driving method includes:

[0151] During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the first voltage terminal to disconnect from the second terminal of the driving circuit;

[0152] During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the connection between the first voltage terminal and the second terminal of the driving circuit.

[0153] In a specific implementation, the pixel circuit may further include a second light-emitting control circuit. During the light-emitting preparation stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the first voltage terminal to disconnect from the second terminal of the driving circuit. During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the first voltage terminal to connect with the second terminal of the driving circuit.

[0154] Optionally, the first voltage terminal can be a power supply voltage terminal.

[0155] As shown in Figure 4, based on at least one embodiment of the pixel circuit shown in Figure 3, the pixel circuit further includes a second light-emitting control circuit 32;

[0156] The second light-emitting control circuit is electrically connected to the light-emitting control terminal EM, the first voltage terminal V1, and the second terminal of the driving circuit 10, respectively, and is used to control the connection or disconnection between the first voltage terminal V1 and the second terminal of the driving circuit 10 under the control of the light-emitting control signal.

[0157] In at least one embodiment of this disclosure, the pixel circuit further includes a third reset circuit; the third reset circuit is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of a third reset control signal provided by the third reset control terminal, and the second electrode of the light-emitting element is electrically connected to the second voltage terminal; the driving method further includes:

[0158] During the second reset time period, under the control of the third reset control signal, the third reset circuit writes the third initial voltage provided by the third initial voltage terminal into the first electrode of the light-emitting element.

[0159] In a specific implementation, the pixel circuit may further include a third reset circuit. During the second reset time period, under the control of the third reset control signal, the third reset circuit writes a third initial voltage into the first electrode of the light-emitting element to clear the residual charge on the first electrode of the light-emitting element and pre-charge the first electrode of the light-emitting element to improve the problem of ghosting and brightening.

[0160] Optionally, the second voltage terminal can be a low voltage terminal.

[0161] As shown in Figure 5, based on at least one embodiment of the pixel circuit shown in Figure 4, the pixel circuit further includes a third reset circuit 13;

[0162] The third reset circuit 13 is electrically connected to the third reset control terminal R3, the third initial voltage terminal I3, and the first electrode of the light-emitting element E1, respectively. It is used to control the connection or disconnection between the third initial voltage terminal I3 and the first electrode of the light-emitting element E1 under the control of the third reset control signal provided by the third reset control terminal R3. The third initial voltage terminal I3 is used to provide the third initial voltage Vinit3.

[0163] The second electrode of the light-emitting element E1 is electrically connected to the second voltage terminal V2.

[0164] In at least one embodiment of this disclosure, the display period further includes a pre-reset phase set before the first reset time period; the driving method includes:

[0165] During the pre-reset phase, the third reset circuit, under the control of the third reset control signal, writes the third initial voltage into the first electrode of the light-emitting element;

[0166] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0167] In specific implementation, before the first reset time period, the display cycle may also include a pre-reset phase. In the pre-reset phase, under the control of the third reset control signal, the third reset circuit resets the potential of the first electrode of the light-emitting element, writes the third initial voltage into the first electrode of the light-emitting element to clear the residual charge of the first electrode of the light-emitting element, and pre-charges the first electrode of the light-emitting element to improve the problem of ghosting and brightening.

[0168] Optionally, the second reset control terminal and the third reset control terminal are the same control terminal.

[0169] In practice, the second reset control terminal and the third reset control terminal can be the same control terminal to reduce the number of control terminals used.

[0170] As shown in Figure 6, based on at least one embodiment of the pixel circuit shown in Figure 5, the pixel circuit may further include a data writing circuit 61 and an energy storage circuit 62.

[0171] The data writing circuit 61 is electrically connected to the second scanning terminal GP, the data line DL and the second terminal of the driving circuit 10, respectively, and is used to write the data voltage provided by the data line DL into the second terminal of the driving circuit 10 under the control of the second scanning signal provided by the second scanning terminal GP.

[0172] The energy storage circuit 62 is electrically connected to the first node N1 and is used to maintain the potential of the first node N1.

[0173] As shown in Figure 7, based on at least one embodiment of the pixel circuit shown in Figure 6, the driving circuit includes a driving transistor T0, the first reset control circuit includes a first transistor T1, and the second reset circuit includes a second transistor T2; the compensation control circuit includes a third transistor T3, the first light-emitting control circuit includes a fourth transistor T4, and the light-emitting element is an organic light-emitting diode O1; the second light-emitting control circuit includes a fifth transistor T5, the third reset circuit includes a sixth transistor T6, the data writing circuit includes a seventh transistor, and the energy storage circuit includes a storage capacitor Cst; the organic light-emitting diode O1 is a double-layer tandem OLED (organic light-emitting diode).

[0174] The gate of T0 is electrically connected to the first node N1, the source of T0 is electrically connected to the second node N2, and the drain of T0 is electrically connected to the third node N3; the first terminal of the driving circuit is the drain of T0, and the second terminal of the driving circuit is the source of T0.

[0175] The gate of T1 is electrically connected to the first reset control terminal RP, the source of T1 is electrically connected to the first initial voltage terminal I1, and the drain of T1 is electrically connected to the third node N3.

[0176] The gate of T2 is electrically connected to the second reset control terminal RH, the source of T2 is electrically connected to the second initial voltage terminal I2, and the drain of T2 is electrically connected to the second node N2.

[0177] The gate of T3 is electrically connected to the first scan terminal GN, the drain of T3 is electrically connected to the first node N1, and the source of T3 is electrically connected to the third node N3.

[0178] The gate of T4 is electrically connected to the light-emitting control terminal EM, the source of T4 is electrically connected to the third node N3, the drain of T4 is electrically connected to the anode of O1, and the cathode of O1 is electrically connected to the low voltage terminal VSS.

[0179] The gate of T5 is electrically connected to the light-emitting control terminal EM, the source of T5 is electrically connected to the power supply voltage terminal VDD, and the drain of T5 is electrically connected to the second node N2.

[0180] The gate of T6 is electrically connected to the second reset control terminal RH, the source of T6 is electrically connected to the third initial voltage terminal I3, and the drain of T6 is electrically connected to the second node N2.

[0181] The gate of T7 is electrically connected to the second scan terminal GP, the source of T7 is electrically connected to the data line DL, and the drain of T7 is electrically connected to the second node N2.

[0182] The first terminal of Cst is electrically connected to the first node N1, and the second terminal of Cst is electrically connected to the power supply voltage terminal VDD.

[0183] In at least one embodiment of the pixel circuit shown in Figure 7, T3 is an n-type transistor, and T0, T1, T2, T4, T5, T6 and T7 are all p-type transistors.

[0184] In at least one embodiment of the pixel circuit shown in Figure 7, the voltage value of Vinit1 is greater than or equal to -5.5V and less than or equal to -2.5V, the voltage value of Vinit2 is greater than or equal to 2.5V and less than or equal to 6V, and the difference between the voltage values ​​of Vinit3 and Vss is greater than or equal to 0.3V and less than or equal to 1.5V.

[0185] Wherein, Vinit1 is the first initial voltage provided by I1, Vinit2 is the second initial voltage provided by I2, Vinit3 is the third initial voltage provided by I3, and Vss is the low voltage signal provided by VSS.

[0186] In at least one embodiment of the pixel circuit shown in Figure 7, the first control terminal includes a first reset control terminal RP and a first scan terminal GN; the second reset control terminal and the third reset control terminal are the same control terminal, the first voltage terminal is the power supply voltage terminal VDD, and the second voltage terminal is the low voltage terminal VSS.

[0187] As shown in Figure 8, when at least one embodiment of the pixel circuit shown in Figure 7 is in operation, the display cycle may include a pre-light-emitting stage S1 and a light-emitting stage S2 that are set sequentially.

[0188] The light-preparing phase S1 includes a first reset time period S11, a data writing time period S12, and a second reset time period S13.

[0189] During the first reset time period S11, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a low voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T1 is turned on, T3 is turned on, N1 and N3 are connected, I1 provides a first initial voltage Vinit1 to N1 so that T0 can be turned on when the data write time period S12 begins; T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off, T7 is turned off;

[0190] During the data writing period S12, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a low voltage signal, RH provides a high voltage signal, T7 is turned on, DL provides data voltage Vdata to N3; T3 is turned on; T1 is turned off, T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off;

[0191] At the start of the data writing period S12, T0 is turned on, and Vdata charges Cst through T7, T0 and T3, changing the potential of N1 until the potential of N1 becomes Vdata+Vth, at which point T0 is turned off to perform data voltage writing and threshold voltage compensation; where Vth is the threshold voltage of T0.

[0192] During the second reset period S13, RH provides a low voltage signal, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, T2 and T6 are turned on, I2 provides a second initial voltage Vinit2 to N2, and I3 provides a third initial voltage Vinit3 to the anode of O1 to clear the residual charge on the anode of O1 and perform pre-charging; T1, T3, T4, T5 and T7 are all turned off.

[0193] During the light-emitting phase S2, EM provides a low voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light; T1, T2, T3, T6 and T7 are all turned off.

[0194] As shown in Figure 8, in at least one embodiment of the pixel circuit shown in Figure 7, the duration of the first reset time period S11 is set to be greater than or equal to 8H and less than or equal to 20H, where 1H is the scan time of one line.

[0195] During the first reset time period S11, T1 and T3 are turned on, I1 provides the first initial voltage Vinit1 to N1, and the longer the potential of the first reset control signal provided by RP remains at a low voltage, the longer T0 is subjected to a negative gate-source voltage, and the better the hysteresis performance of T0, thus improving image retention.

[0196] In at least one embodiment shown in Figure 8, the duration of the second reset time period S13 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0197] The interval between the end time of the second reset time period S13 and the start time of the light emission stage S2 can be set to be greater than or equal to 4H.

[0198] As shown in Figure 9, when at least one embodiment of the pixel circuit shown in Figure 7 is in operation, the display cycle may include a pre-light-emitting stage S1 and a light-emitting stage S2 that are set sequentially.

[0199] The light-preparing phase S1 includes a first reset time period S11, a data writing time period S12, and a second reset time period S13.

[0200] During the first reset time period S11, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a low voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T1 is turned on, T3 is turned on, N1 and N3 are connected, I1 provides a first initial voltage Vinit1 to N1 so that T0 can be turned on when the data write time period S12 begins; T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off, T7 is turned off;

[0201] During the data writing period S12, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a low voltage signal, RH provides a high voltage signal, T7 is turned on, DL provides data voltage Vdata to N3; T3 is turned on; T1 is turned off, T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off;

[0202] At the start of the data writing period S12, T0 is turned on, and Vdata charges Cst through T7, T0 and T3, changing the potential of N1 until the potential of N1 becomes Vdata+Vth, at which point T0 is turned off to perform data voltage writing and threshold voltage compensation; where Vth is the threshold voltage of T0.

[0203] During the second reset period S13, RH provides a low voltage signal, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, T2 and T6 are turned on, I2 provides a second initial voltage Vinit2 to N2, and I3 provides a third initial voltage Vinit3 to the anode of O1, clearing the residual charge on the anode of O1 and performing pre-charging; T0 is turned on, and T1, T3, T4, T5 and T7 are all turned off;

[0204] During the light-emitting phase S2, EM provides a low voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light; T1, T2, T3, T6 and T7 are all turned off.

[0205] As shown in Figure 9, in at least one embodiment of the pixel circuit shown in Figure 7, the duration of the second reset time period S13 is greater than or equal to 8H and less than or equal to 20H, where 1H is the scan time of one line.

[0206] During the second reset period S13, RH provides a low voltage signal. The duration of the second reset period S13 affects the turn-on time of T2 and T6. After T2 turns on, I2 writes the second initial voltage Vinit2 into N2 and N3. The longer the second reset period S13 lasts, the longer T0 is biased, and the better the hysteresis performance of T0 is, which can improve the afterimage.

[0207] In at least one embodiment shown in Figure 9, the duration of the first reset time period S11 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0208] The interval between the end time of the second reset time period S13 and the start time of the light emission stage S2 can be set to be greater than or equal to 4H.

[0209] As shown in Figure 10, when at least one embodiment of the pixel circuit shown in Figure 7 is in operation, the display cycle may include a pre-light-emitting stage S1 and a light-emitting stage S2 that are set sequentially.

[0210] The light-preparing phase S1 includes a first reset time period S11, a data writing time period S12, and a second reset time period S13.

[0211] During the first reset time period S11, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a low voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T1 is turned on, T3 is turned on, N1 and N3 are connected, I1 provides a first initial voltage Vinit1 to N1 so that T0 can be turned on when the data write time period S12 begins; T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off, T7 is turned off;

[0212] During the data writing period S12, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a low voltage signal, RH provides a high voltage signal, T7 is turned on, DL provides data voltage Vdata to N3; T3 is turned on; T1 is turned off, T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off;

[0213] At the start of the data writing period S12, T0 is turned on, and Vdata charges Cst through T7, T0 and T3, changing the potential of N1 until the potential of N1 becomes Vdata+Vth, at which point T0 is turned off to perform data voltage writing and threshold voltage compensation; where Vth is the threshold voltage of T0.

[0214] During the second reset period S13, RH provides a low voltage signal, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, T2 and T6 are turned on, I2 provides a second initial voltage Vinit2 to N2, and I3 provides a third initial voltage Vinit3 to the anode of O1 to clear the residual charge on the anode of O1 and perform pre-charging; T1, T3, T4, T5 and T7 are all turned off.

[0215] During the light-emitting phase S2, EM provides a low voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light; T1, T2, T3, T6 and T7 are all turned off.

[0216] As shown in Figure 10, in at least one embodiment of the pixel circuit shown in Figure 7, the time interval t0 between the end time of the second reset time period S13 and the start time of the light emission stage S2 is greater than or equal to 4H, so as to strengthen the holding time of the second initial voltage Vinit2 after writing in N2 and N3, strengthen the bias effect on T0, improve the hysteresis phenomenon of T0, and improve the image retention; wherein, 1H is the scan time of one line.

[0217] In at least one embodiment shown in Figure 10, the duration of the first reset time period S11 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0218] The duration of the second reset time period S13 can be set to be greater than or equal to 8H and less than or equal to 20H.

[0219] As shown in Figure 11, when at least one embodiment of the pixel circuit shown in Figure 7 is in operation, the display cycle may include a pre-light emission stage S1 and a light emission stage S2 that are set sequentially.

[0220] The light-preparing phase S1 includes a pre-reset time period S10, a first reset time period S11, a data writing time period S12, and a second reset time period S13.

[0221] During the pre-reset period S10, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, and RH provides a low voltage signal. T3 is turned on, T2 is turned on, T6 is turned on, and N1 and N3 are connected. I2 provides a second initial voltage Vinit2 to N2, which puts T0 in a bias state, improves the hysteresis phenomenon of T0, and improves the afterimage. I3 provides a third initial voltage Vinit3 to the anode of O1, which clears the residual charge on the anode of O1. T1, T4, T5, and T7 are all turned off.

[0222] During the first reset time period S11, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a low voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T1 is turned on, T3 is turned on, N1 and N3 are connected, I1 provides a first initial voltage Vinit1 to N1 so that T0 can be turned on at the beginning of the data write time period S12; T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off, T7 is turned off;

[0223] During the data writing period S12, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a low voltage signal, RH provides a high voltage signal, T7 is turned on, DL provides data voltage Vdata to N3; T3 is turned on; T1 is turned off, T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off;

[0224] At the start of the data writing period S12, T0 is turned on, and Vdata charges Cst through T7, T0 and T3, changing the potential of N1 until the potential of N1 becomes Vdata+Vth, at which point T0 is turned off to perform data voltage writing and threshold voltage compensation; where Vth is the threshold voltage of T0.

[0225] During the second reset period S13, RH provides a low voltage signal, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, T2 and T6 are turned on, I2 provides a second initial voltage Vinit2 to N2, and I3 provides a third initial voltage Vinit3 to the anode of O1 to clear the residual charge on the anode of O1 and perform pre-charging; T1, T3, T4, T5 and T7 are all turned off.

[0226] During the light-emitting phase S2, EM provides a low voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light; T1, T2, T3, T6 and T7 are all turned off.

[0227] As shown in Figure 11, at least one embodiment of the pixel circuit shown in Figure 7 sets a pre-reset time period S10 before the first reset time period S11 during operation, which is used to control T0 to be in a bias state in advance and improve the hysteresis phenomenon of T0; the duration of the pre-reset time period S10 can be greater than or equal to 4H and less than or equal to 20H.

[0228] In at least one embodiment shown in Figure 11, the duration of the first reset time period S11 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0229] The duration of the second reset time period S13 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0230] The interval between the end time of the second reset time period S13 and the start time of the light emission stage S2 can be set to be greater than or equal to 4H.

[0231] As shown in Figure 12, when at least one embodiment of the pixel circuit shown in Figure 7 is in operation, the display cycle may include a pre-light-emitting stage S1 and a light-emitting stage S2 that are set sequentially.

[0232] The light-preparing phase S1 includes a pre-reset time period S10, a first reset time period S11, a data writing time period S12, and a second reset time period S13.

[0233] During the pre-reset period S10, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, and RH provides a low voltage signal. T3 is off, T2 is on, T6 is on, and N1 and N3 are connected. I2 provides a second initial voltage Vinit2 to N2, which puts T0 in a bias state, improving the hysteresis phenomenon of T0 and improving the afterimage. I3 provides a third initial voltage Vinit3 to the anode of O1, clearing the residual charge on the anode of O1. T1, T4, T5, and T7 are all off.

[0234] During the first reset time period S11, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a low voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T1 is turned on, T3 is turned on, N1 and N3 are connected, I1 provides a first initial voltage Vinit1 to N1 so that T0 can be turned on at the beginning of the data write time period S12; T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off, T7 is turned off;

[0235] During the data writing period S12, EM provides a high voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a low voltage signal, RH provides a high voltage signal, T7 is turned on, DL provides data voltage Vdata to N3; T3 is turned on; T1 is turned off, T2 is turned off, T4 is turned off, T5 is turned off, T6 is turned off;

[0236] At the start of the data writing period S12, T0 is turned on, and Vdata charges Cst through T7, T0 and T3, changing the potential of N1 until the potential of N1 becomes Vdata+Vth, at which point T0 is turned off to perform data voltage writing and threshold voltage compensation; where Vth is the threshold voltage of T0.

[0237] During the second reset period S13, RH provides a low voltage signal, EM provides a high voltage signal, GN provides a low voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, T2 and T6 are turned on, I2 provides a second initial voltage Vinit2 to N2, and I3 provides a third initial voltage Vinit3 to the anode of O1 to clear the residual charge on the anode of O1 and perform pre-charging; T1, T3, T4, T5 and T7 are all turned off.

[0238] During the light-emitting phase S2, EM provides a low voltage signal, GN provides a high voltage signal, RP provides a high voltage signal, GP provides a high voltage signal, RH provides a high voltage signal, T4 and T5 are turned on, and T0 drives O1 to emit light; T1, T2, T3, T6 and T7 are all turned off.

[0239] As shown in Figure 12, at least one embodiment of the pixel circuit shown in Figure 7 sets a pre-reset time period S10 before the first reset time period S11 during operation. This is used to control T0 to be in a bias state in advance and T3 to be in a closed state. Therefore, the stress effect on T0 is stronger, and the hysteresis phenomenon of T0 is better and the afterimage performance is the best. The duration of the pre-reset time period S10 can be greater than or equal to 4H and less than or equal to 20H.

[0240] In at least one embodiment shown in Figure 12, the duration of the first reset time period S11 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0241] The duration of the second reset time period S13 can be set to be greater than or equal to 8 hours and less than or equal to 20 hours; and / or,

[0242] The interval between the end time of the second reset time period S13 and the start time of the light emission stage S2 can be set to be greater than or equal to 4H.

[0243] The difference between at least one embodiment of the pixel circuit shown in Figure 13 and at least one embodiment of the pixel circuit shown in Figure 6 is as follows: the second reset circuit 12 is electrically connected to the second reset control terminal RH, the second initial voltage terminal I2 and the first terminal of the driving circuit 10 respectively, and is used to control the connection or disconnection between the second initial voltage terminal I2 and the first terminal of the driving circuit 10 under the control of the second reset control signal provided by the second reset control terminal RH.

[0244] The difference between at least one embodiment of the pixel circuit shown in Figure 14 and at least one embodiment of the pixel circuit shown in Figure 6 is as follows: the first control terminal includes a first reset control terminal RP, and the first control circuit includes a first reset control circuit 20; the at least one embodiment of the pixel circuit shown in Figure 14 also includes a compensation control circuit 21.

[0245] The first reset control circuit 20 is electrically connected to the first reset control terminal RP, the first initial voltage terminal I1, and the control terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the first initial voltage terminal I1 and the control terminal of the drive circuit 10 under the control of the first reset control signal provided by the first reset control terminal RP.

[0246] The compensation control circuit 21 is electrically connected to the first scanning terminal GN, the control terminal of the driving circuit 10, and the first terminal of the driving circuit 10, respectively, and is used to control the connection or disconnection between the control terminal of the driving circuit 10 and the first terminal of the driving circuit 10 under the control of the first scanning signal provided by the first scanning terminal GN.

[0247] The differences between at least one embodiment of the pixel circuit shown in Figure 15 and at least one embodiment of the pixel circuit shown in Figure 14 are as follows:

[0248] The second reset circuit 12 is electrically connected to the second reset control terminal RH, the second initial voltage terminal I2 and the first terminal of the drive circuit 10, respectively, and is used to control the connection or disconnection between the second initial voltage terminal I2 and the first terminal of the drive circuit 10 under the control of the second reset control signal provided by the second reset control terminal RH.

[0249] The difference between at least one embodiment of the pixel circuit shown in Figure 16 and at least one embodiment of the pixel circuit shown in Figure 7 is as follows: the drain of T2 is electrically connected to N3.

[0250] The timing diagram of at least one embodiment of the pixel circuit shown in Figure 16 can be illustrated as shown in Figures 8-12.

[0251] The differences between at least one embodiment of the pixel circuit shown in Figure 17 and at least one embodiment of the pixel circuit shown in Figure 7 are as follows:

[0252] The drain of T1 is electrically connected to N1.

[0253] The timing diagram of at least one embodiment of the pixel circuit shown in Figure 17 can be illustrated as shown in Figures 8-12.

[0254] The differences between at least one embodiment of the pixel circuit shown in Figure 18 and at least one embodiment of the pixel circuit shown in Figure 7 are as follows:

[0255] The drain of T2 is electrically connected to N3.

[0256] The timing diagram of at least one embodiment of the pixel circuit shown in Figure 18 can be shown in Figures 8-12.

[0257] The driving module described in this embodiment is applied to a pixel circuit, which includes a driving circuit, a first reset circuit, and a second reset circuit. The first reset circuit, under the control of a first control signal provided by a first control terminal, controls the connection or disconnection between a first initial voltage terminal and the control terminal of the driving circuit. The second reset circuit, under the control of a second reset control signal provided by a second reset control terminal, controls the connection or disconnection between a second initial voltage terminal and the reset terminal of the driving circuit. The reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit. The display cycle includes a pre-light-emitting phase, which includes a first reset time period and a second reset time period.

[0258] As shown in Figure 19, the drive module includes a first control signal generation circuit 191 and a second reset control signal generation circuit 192.

[0259] The first control signal generation circuit 191 is electrically connected to the first control terminal R1 and is used to provide a first control signal to the first control terminal R1 so that during the first reset time period, the first reset circuit writes the first initial voltage into the control terminal of the drive circuit under the control of the first control signal.

[0260] The second reset control signal generation circuit 192 is electrically connected to the second reset control terminal RH and is used to provide a second reset control signal to the second reset control terminal RH so that during the second reset time period, the second reset circuit writes the second initial voltage to the reset terminal of the drive circuit under the control of the second reset control signal.

[0261] The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

[0262] In at least one embodiment of this disclosure,

[0263] By setting the duration of the first reset time period to be greater than or equal to the first reset time threshold, in conjunction with the compensation control circuit, the reset time of the control terminal of the drive circuit is increased, which indirectly affects the hysteresis performance of the drive transistors included in the drive circuit and optimizes the image retention problem.

[0264] By setting the duration of the second reset time period to be greater than or equal to the second reset time threshold, the stress time of the driving transistor is increased, thereby improving the hysteresis phenomenon of the driving transistor.

[0265] Optionally, the first reset time threshold is greater than or equal to 8H and less than or equal to 20H, the second reset time threshold is greater than or equal to 8H and less than or equal to 20H, and 1H is the scan time of one line.

[0266] In at least one embodiment of this disclosure, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal.

[0267] As shown in Figure 20, based on at least one embodiment shown in Figure 19, the first control terminal includes a first reset control terminal RP and a first scan terminal GN; the first control signal generation circuit 191 includes a first reset control signal generation circuit 201 and a first scan signal generation circuit 202.

[0268] The first reset control signal generation circuit 201 is electrically connected to the first reset control terminal RP and is used to provide a first reset control signal to the first reset control terminal RP, so that during the first reset time period, the first reset control circuit writes the first initial voltage into the first terminal of the drive circuit under the control of the first reset control signal.

[0269] The first scan signal generation circuit 202 is electrically connected to the first scan terminal GN and is used to provide a first scan signal to the first scan terminal GN, so that during the first reset time period, the compensation control circuit controls the control terminal of the drive circuit to connect with the first terminal of the drive circuit under the control of the first scan signal, and during the second reset time period, the compensation control circuit controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal.

[0270] In at least one embodiment of this disclosure, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, wherein the first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal; the display cycle further includes a light-emitting stage disposed after the light-emitting preparation stage;

[0271] As shown in Figure 21, based on at least one embodiment shown in Figure 20, the driving module further includes a light emission control signal generation circuit 211;

[0272] The light emission control signal generation circuit 211 is electrically connected to the light emission control terminal EM and is used to provide a light emission control signal to the light emission control terminal EM so that, in the light emission preparation stage, the first light emission control circuit controls the first terminal of the driving circuit to disconnect from the first electrode of the light emission element under the control of the light emission control signal, and in the light emission stage, the first light emission control circuit controls the first terminal of the driving circuit to connect with the first electrode of the light emission element under the control of the light emission control signal.

[0273] The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

[0274] In a specific implementation, the pixel circuit may further include a light-emitting element and a first light-emitting control circuit. Under the control of a light-emitting control signal, the first light-emitting control circuit controls the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element. After the light-emitting preparation stage, the display cycle may further include a light-emitting stage. In the light-emitting stage, under the control of a light-emitting control signal, the first light-emitting control circuit controls the connection between the first terminal of the driving circuit and the first electrode of the light-emitting element, so that the driving circuit drives the light-emitting element to emit light. By setting the time interval between the end time of the second reset time period and the start time of the light-emitting stage to be greater than or equal to the interval time threshold, the stress time of the driving transistor included in the driving circuit is increased, and the hysteresis phenomenon of the driving transistor is improved.

[0275] Optionally, the interval time threshold is greater than or equal to 4H, where 1H is the scan time for one line.

[0276] In at least one embodiment of this disclosure, the display period further includes a pre-reset phase set before the first reset time period;

[0277] The second reset control signal generation circuit is used to provide the second reset control signal so that, during the pre-reset phase, the second reset circuit, under the control of the second reset control signal, writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit;

[0278] The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

[0279] In a specific implementation, before the first reset time period, the display cycle may also include a pre-reset phase. During the pre-reset phase, under the control of the second reset control signal, the second reset circuit writes the second initial voltage into the reset terminal of the driving circuit, and sets the duration of the pre-reset phase to be greater than or equal to a third reset time threshold, so as to add a bias operation on the driving transistor before resetting the potential of the first terminal of the driving circuit, thereby improving the hysteresis phenomenon of the driving transistor.

[0280] Optionally, the third reset time threshold is greater than or equal to 4H and less than or equal to 20H, where 1H is the scan time for one line.

[0281] In at least one embodiment of this disclosure, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit;

[0282] The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the pre-reset phase, the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit.

[0283] In at least one embodiment of this disclosure, the pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit;

[0284] The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the pre-reset phase, the compensation control circuit controls the control terminal of the drive circuit to connect with the first terminal of the drive circuit under the control of the first scan signal.

[0285] The display device described in this embodiment includes a pixel circuit and the aforementioned driving module; the pixel circuit includes a driving circuit, a first reset circuit, and a second reset circuit; the reset terminal of the driving circuit includes a first terminal and / or a second terminal of the driving circuit.

[0286] The first reset circuit is electrically connected to the first control terminal, the first initial voltage terminal, and the control terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the control terminal of the drive circuit under the control of the first control signal provided by the first control terminal;

[0287] The second reset circuit is electrically connected to the second reset control terminal, the second initial voltage terminal, and the reset terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the second initial voltage terminal and the reset terminal of the drive circuit under the control of the second reset control signal provided by the second reset control terminal;

[0288] The driving circuit is used to generate a driving current under the control of the potential at its control terminal.

[0289] In at least one embodiment of this disclosure, the first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scanning terminal.

[0290] The first reset control circuit is electrically connected to the first reset control terminal, the first initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the drive circuit under the control of the first reset control signal provided by the first reset control terminal.

[0291] The compensation control circuit is electrically connected to the first scanning end, the control end of the driving circuit, and the first end of the driving circuit, respectively, and is used to control the connection or disconnection between the control end of the driving circuit and the first end of the driving circuit under the control of the first scanning signal provided by the first scanning end.

[0292] In at least one embodiment of this disclosure, the pixel circuit further includes a light-emitting element and a first light-emitting control circuit, a second light-emitting control circuit, and a third reset circuit;

[0293] The first light-emitting control circuit is electrically connected to the light-emitting control terminal, the first terminal of the driving circuit and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal.

[0294] The second light-emitting control circuit is electrically connected to the light-emitting control terminal, the first voltage terminal, and the second terminal of the driving circuit, respectively, and is used to control the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit under the control of the light-emitting control signal.

[0295] The third reset circuit is electrically connected to the third reset control terminal, the third initial voltage terminal and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of the third reset control signal provided by the third reset control terminal.

[0296] The second electrode of the light-emitting element is electrically connected to the second voltage terminal.

[0297] Optionally, the light-emitting element can be a multi-layer series light-emitting element, for example, the light-emitting element can be a double-layer series light-emitting element.

[0298] The above description represents the preferred embodiments of this disclosure. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles described herein, and these improvements and modifications should also be considered within the scope of protection of this disclosure.

Claims

1. A driving method applied to a pixel circuit, the pixel circuit comprising a driving circuit, a first reset circuit, and a second reset circuit; the first reset circuit being configured to control a first initial voltage terminal to connect or disconnect from a control terminal of the driving circuit under the control of a first control signal provided by a first control terminal; the second reset circuit being configured to control a second initial voltage terminal to connect or disconnect from a reset terminal of the driving circuit under the control of a second reset control signal provided by a second reset control terminal; the reset terminal of the driving circuit comprising a first terminal and / or a second terminal of the driving circuit; a display cycle comprising a pre-light emission phase, the pre-light emission phase comprising a first reset time period and a second reset time period; the driving method comprising: During the first reset time period, under the control of the first control signal, the first reset circuit writes the first initial voltage provided by the first initial voltage terminal into the control terminal of the drive circuit. During the second reset time period, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit; The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

2. The driving method as described in claim 1, wherein, The first reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time, and the second reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time.

3. The driving method as described in claim 1, wherein, The first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal; the driving method includes: During the first reset time period, the first reset control circuit, under the control of the first reset control signal, writes the first initial voltage into the first terminal of the drive circuit; the compensation control circuit, under the control of the first scan signal, controls the connection between the control terminal of the drive circuit and the first terminal of the drive circuit. During the second reset time period, the first reset control circuit, under the control of the first reset control signal, controls the first initial voltage terminal to disconnect from the first terminal of the drive circuit, and the compensation control circuit, under the control of the first scan signal, controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit.

4. The driving method as described in claim 3, wherein, The first reset time period and the second reset time period are set sequentially.

5. The driving method as described in claim 1, wherein, The pixel circuit further includes a light-emitting element and a first light-emitting control circuit, wherein the first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal; the display cycle further includes a light-emitting stage set after the light-emitting preparation stage; the driving method further includes: During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to disconnect from the first electrode of the light-emitting element; During the light-emitting stage, the first light-emitting control circuit, under the control of the light-emitting control signal, controls the first terminal of the driving circuit to connect with the first electrode of the light-emitting element; The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

6. The driving method as described in claim 5, wherein, The interval time threshold is greater than or equal to the four-line scan time.

7. The driving method according to any one of claims 1 to 6, wherein, The display cycle further includes a pre-reset phase set before the first reset time period; the driving method includes: During the pre-reset phase, under the control of the second reset control signal, the second reset circuit writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit; The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

8. The driving method as described in claim 7, wherein, The third reset time threshold is greater than or equal to four lines of scan time but less than or equal to twenty lines of scan time.

9. The driving method as described in claim 7, wherein, The pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes: During the pre-reset phase, the compensation control circuit is used to control the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

10. The driving method as described in claim 7, wherein, The pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving method includes: During the pre-reset phase, the compensation control circuit is used to control the connection between the control terminal of the drive circuit and the first terminal of the drive circuit under the control of the first scan signal provided by the first scan terminal.

11. The driving method according to any one of claims 1 to 6, wherein, The pixel circuit further includes a second light-emitting control circuit, which, under the control of the light-emitting control signal, controls the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit; the display cycle further includes a light-emitting stage set after the light-emitting preparation stage; the driving method includes: During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the first voltage terminal to disconnect from the second terminal of the driving circuit; During the light-emitting stage, the second light-emitting control circuit, under the control of the light-emitting control signal, controls the connection between the first voltage terminal and the second terminal of the driving circuit.

12. The driving method as described in claim 5, wherein, The pixel circuit further includes a third reset circuit; the third reset circuit is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of the third reset control signal provided by the third reset control terminal, and the second electrode of the light-emitting element is electrically connected to the second voltage terminal; the driving method further includes: During the second reset time period, the third reset circuit, under the control of the third reset control signal, writes the third initial voltage provided by the third initial voltage terminal into the first electrode of the light-emitting element.

13. The driving method as described in claim 12, wherein, The display cycle further includes a pre-reset phase set before the first reset time period; the driving method includes: During the pre-reset phase, the third reset circuit, under the control of the third reset control signal, writes the third initial voltage into the first electrode of the light-emitting element; The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

14. The driving method as described in claim 13, wherein, The second reset control terminal and the third reset control terminal are the same control terminal.

15. A driving module applied to a pixel circuit, the pixel circuit comprising a driving circuit, a first reset circuit, and a second reset circuit; the first reset circuit is configured to control a first initial voltage terminal to connect or disconnect from a control terminal of the driving circuit under the control of a first control signal provided by a first control terminal; the second reset circuit is configured to control a second initial voltage terminal to connect or disconnect from a reset terminal of the driving circuit under the control of a second reset control signal provided by a second reset control terminal; the reset terminal of the driving circuit comprises a first terminal and / or a second terminal of the driving circuit; the display cycle includes a pre-light emission phase, the pre-light emission phase including a first reset time period and a second reset time period; the driving module comprises a first control signal generation circuit and a second reset control signal generation circuit; The first control signal generation circuit is used to provide a first control signal to the first control terminal, so that during the first reset time period, the first reset circuit writes the first initial voltage into the control terminal of the drive circuit under the control of the first control signal. The second reset control signal generation circuit is used to provide a second reset control signal to the second reset control terminal, so that during the second reset time period, the second reset circuit, under the control of the second reset control signal, writes the second initial voltage into the reset terminal of the drive circuit; The duration of the first reset time period is greater than or equal to the first reset time threshold; and / or, the duration of the second reset time period is greater than or equal to the second reset time threshold.

16. The drive module as described in claim 15, wherein, The first reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time, and the second reset time threshold is greater than or equal to eight lines of scan time and less than or equal to twenty lines of scan time.

17. The drive module as described in claim 15, wherein, The first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal; the first reset control circuit is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the driving circuit under the control of a first reset control signal provided by the first reset control terminal; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of a first scan signal provided by the first scan terminal; the first control signal generation circuit includes a first reset control signal generation circuit and a first scan signal generation circuit. The first reset control signal generation circuit is used to provide a first reset control signal to the first reset control terminal, so that during the first reset time period, the first reset control circuit writes the first initial voltage into the first terminal of the drive circuit under the control of the first reset control signal. The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the first reset time period, the compensation control circuit controls the control terminal of the drive circuit to connect with the first terminal of the drive circuit under the control of the first scan signal, and controls the control terminal of the drive circuit to disconnect from the first terminal of the drive circuit under the control of the first scan signal during the second reset time period.

18. The drive module as described in claim 15, wherein, The pixel circuit further includes a light-emitting element and a first light-emitting control circuit. The first light-emitting control circuit is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal. The display cycle also includes a light-emitting stage set after the light-emitting preparation stage. The driving module further includes a light-emitting control signal generation circuit. The light emission control signal generation circuit is used to provide a light emission control signal to the light emission control terminal, so that in the light emission preparation stage, the first light emission control circuit controls the first terminal of the driving circuit to disconnect from the first electrode of the light emission element under the control of the light emission control signal, and in the light emission stage, the first light emission control circuit controls the first terminal of the driving circuit to connect with the first electrode of the light emission element under the control of the light emission control signal. The time interval between the end time of the second reset time period and the start time of the light emission stage is greater than or equal to the interval time threshold.

19. The drive module as described in claim 18, wherein, The interval time threshold is greater than or equal to the four-line scan time.

20. The drive module as described in claim 15, 16, 18, or 19, wherein, The display cycle also includes a pre-reset phase set before the first reset time period; The second reset control signal generation circuit is used to provide the second reset control signal so that, during the pre-reset phase, the second reset circuit, under the control of the second reset control signal, writes the second initial voltage provided by the second initial voltage terminal into the reset terminal of the drive circuit; The duration of the pre-reset phase is greater than or equal to the third reset time threshold.

21. The drive module as described in claim 20, wherein, The third reset time threshold is greater than or equal to four lines of scan time but less than or equal to twenty lines of scan time.

22. The drive module as described in claim 20, wherein, The pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit; The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that in the... During the pre-reset phase, the compensation control circuit, under the control of the first scan signal, controls the disconnection between the control terminal of the drive circuit and the first terminal of the drive circuit.

23. The drive module as described in claim 20, wherein, The pixel circuit further includes a compensation control circuit; the compensation control circuit is used to control the connection or disconnection between the control terminal of the driving circuit and the first terminal of the driving circuit under the control of the first scanning signal provided by the first scanning terminal; the driving module further includes a first scanning signal generation circuit; The first scan signal generation circuit is used to provide a first scan signal to the first scan terminal, so that during the pre-reset phase, the compensation control circuit controls the connection between the control terminal of the drive circuit and the first terminal of the drive circuit under the control of the first scan signal.

24. A display device, comprising a pixel circuit and a driving module as described in any one of claims 15 to 23; the pixel circuit comprising a driving circuit, a first reset circuit, and a second reset circuit; the reset terminal of the driving circuit comprising a first terminal and / or a second terminal of the driving circuit; The first reset circuit is electrically connected to the first control terminal, the first initial voltage terminal, and the control terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the control terminal of the drive circuit under the control of the first control signal provided by the first control terminal; The second reset circuit is electrically connected to the second reset control terminal, the second initial voltage terminal, and the reset terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the second initial voltage terminal and the reset terminal of the drive circuit under the control of the second reset control signal provided by the second reset control terminal; The driving circuit is used to generate a driving current under the control of the potential at its control terminal.

25. The display device as claimed in claim 24, wherein, The first reset circuit includes a first reset control circuit and a compensation control circuit; the first control terminal includes a first reset control terminal and a first scan terminal. The first reset control circuit is electrically connected to the first reset control terminal, the first initial voltage terminal, and the first terminal of the drive circuit, respectively, and is used to control the connection or disconnection between the first initial voltage terminal and the first terminal of the drive circuit under the control of the first reset control signal provided by the first reset control terminal. The compensation control circuit is electrically connected to the first scanning end, the control end of the driving circuit, and the first end of the driving circuit, respectively, and is used to control the connection or disconnection between the control end of the driving circuit and the first end of the driving circuit under the control of the first scanning signal provided by the first scanning end.

26. The display device as claimed in claim 24, wherein, The pixel circuit also includes a light-emitting element, a first light-emitting control circuit, a second light-emitting control circuit, and a third reset circuit; The first light-emitting control circuit is electrically connected to the light-emitting control terminal, the first terminal of the driving circuit and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the first terminal of the driving circuit and the first electrode of the light-emitting element under the control of the light-emitting control signal provided by the light-emitting control terminal. The second light-emitting control circuit is electrically connected to the light-emitting control terminal, the first voltage terminal, and the second terminal of the driving circuit, respectively, and is used to control the connection or disconnection between the first voltage terminal and the second terminal of the driving circuit under the control of the light-emitting control signal; The third reset circuit is electrically connected to the third reset control terminal, the third initial voltage terminal and the first electrode of the light-emitting element, respectively, and is used to control the connection or disconnection between the third initial voltage terminal and the first electrode of the light-emitting element under the control of the third reset control signal provided by the third reset control terminal. The second electrode of the light-emitting element is electrically connected to the second voltage terminal.

27. The display device as claimed in claim 26, wherein, The light-emitting element is a multilayer series light-emitting element.

Images