A radio frequency tag
By employing a dual-memory structure in the RFID tag and switching between high-power non-volatile memory and low-power static random access memory, the problem of high power consumption during RFID tag reading is solved, thereby improving sensitivity and reading reliability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI QUANRAY ELECTRONICS
- Filing Date
- 2026-03-13
- Publication Date
- 2026-06-19
AI Technical Summary
The power consumption of existing RFID tags is difficult to reduce, which prevents them from being further improved in terms of sensitivity. In addition, the traditional design increases hardware overhead and system adaptation difficulty.
It adopts a dual-memory structure, including high-power non-volatile memory and low-power static random access memory, and reduces read power consumption by switching the memory's operating state at different working stages.
It effectively reduces the reading power consumption of RFID tags, improves their sensitivity, and enhances reading reliability and efficiency under energy-limited conditions.
Smart Images
Figure CN122242547A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of communication technology, and more particularly to an radio frequency tag. Background Technology
[0002] As applications demand increasingly higher sensitivity from RFID tags, the design of low-power memory for RFID tags is becoming increasingly challenging. This is because the low-power design of memory in RFID tags needs to consider issues such as data read / write success rate and reliability resulting from reduced power consumption. Simply optimizing the memory module itself already faces problems such as insufficient voltage redundancy in the read module, parasitic interference in the storage array, and leakage current, all of which reduce the read reliability of the low-power memory.
[0003] Many existing designs incorporate redundancy to enhance the reliability of low-power memory reads, using techniques such as parity bits, ECC algorithms, and critical margin read instructions to ensure data reliability in RFID tags. However, these designs not only increase chip hardware overhead but also complicate system compatibility development, and the resulting power reduction fails to meet requirements.
[0004] To further improve the sensitivity of RFID tags and achieve a power consumption of 100nW for memory reads, a level of power consumption presents significant challenges to memory reliability design. Reducing memory read power consumption is often limited by the manufacturing process of non-volatile memory (NVM), such as high turn-on thresholds and leakage current. Therefore, the memory in traditional RFID tags is increasingly constraining further improvements in RFID tag sensitivity. Summary of the Invention
[0005] This invention provides an RFID tag to solve the problem that the power consumption of existing RFID tags is difficult to reduce, which in turn restricts the further improvement of the sensitivity of RFID tags.
[0006] This invention provides an RFID tag, including an antenna, an RF demodulation module, a digital baseband module, a first memory, and a second memory; The antenna is communicatively connected to an external device and an RF demodulation module, respectively, and is used to receive the RF signal output by the external device and transmit the RF signal to the RF demodulation module. The radio frequency demodulation module is electrically connected to the digital baseband module and is used to demodulate the radio frequency signal to obtain control commands and transmit the control commands to the digital baseband module. The digital baseband module is electrically connected to the first memory and the second memory respectively, and is used to determine the working stage of the radio frequency tag according to the control command, and control the working state of the first memory and the second memory according to the working stage; Specifically, when the RFID tag is in the first working stage, at least the first memory is in an operating state; when the RFID tag is in the second working stage, the first memory is in an idle state, and the second memory is in an operating state; the available energy of the RFID tag in the first working stage is greater than the available energy of the RFID tag in the second working stage; and the power consumption of the first memory is greater than the power consumption of the second memory.
[0007] Optionally, the first working stage includes a power-on initialization stage, a write instruction writing stage, and a write instruction readback stage; the second working stage includes a read instruction stage. When the RFID tag is in the power-on initialization phase, the first memory is in a read state and the second memory is in a write state, and the second memory writes data stored in the first memory; when the RFID tag is in the write instruction writing phase, the first memory is in a write state and the second memory is in an idle state; when the RFID tag is in the write instruction readback phase, the first memory is in a read state and the second memory is in a write state, and the second memory writes data stored in the first memory; when the RFID tag is in the read instruction phase, the first memory is in an idle state and the second memory is in a read state.
[0008] Optionally, the RFID tag may further include an RF rectification module and a power supply module; The radio frequency rectification module is electrically connected to the antenna and the power supply module respectively, and is used to convert the radio frequency energy in the received radio frequency signal into DC power and transmit the DC power to the power supply module; The power supply module is electrically connected to the digital baseband module, the radio frequency demodulation module, the first memory, and the second memory, respectively, and is used to supply power to the digital baseband module, the radio frequency demodulation module, the first memory, and the second memory.
[0009] Optionally, the power supply module includes a first linear regulator and a second linear regulator; The first linear regulator is electrically connected to the radio frequency rectifier module and the first memory respectively, and is used to acquire the DC power and transmit the DC power to the first memory after converting the DC power into a stable and smooth first DC voltage. The second linear regulator is electrically connected to the RF rectifier module, the digital baseband module, the RF demodulation module, and the second memory, respectively, for acquiring the DC power and transmitting it to the second memory after converting the DC power into a stable and smooth second DC voltage; The first DC voltage is greater than the second DC voltage.
[0010] Optionally, the RFID tag may also include a switch; The first terminal of the switch is electrically connected to the first linear regulator, the second terminal of the switch is electrically connected to the first memory, and the control terminal of the switch is electrically connected to the digital baseband module. The digital baseband module is used to control the on / off state of the switch according to the working stage; Specifically, the switch is turned on when the RFID tag is in the first operating stage; and the switch is turned off when the RFID tag is in the second operating stage.
[0011] Optionally, the first memory further includes a level converter and a storage module; The level converter includes a first power supply terminal, a second power supply terminal, a first signal transmission terminal, and a second signal transmission terminal; The first power supply terminal is electrically connected to the first linear regulator, the second power supply terminal is electrically connected to the second linear regulator, the first signal transmission terminal is electrically connected to the digital baseband module, and the second signal transmission terminal is electrically connected to the storage module.
[0012] Optionally, the first memory includes a first read module and a first write module; the first read module includes a first read enable terminal and a first output terminal; the first write module includes a first write enable terminal and a first input terminal; The second memory includes a second read module and a second write module; the second read module includes a second read enable terminal and a second output terminal; the second write module includes a second write enable terminal and a second input terminal. The digital baseband module is electrically connected to the first read enable terminal, the first write enable terminal, the second read enable terminal, and the second write enable terminal, respectively, and is used to control the enable signals output to the first read enable terminal, the first write enable terminal, the second read enable terminal, and the second write enable terminal according to the working stage, thereby controlling the state of the first output terminal, the first input terminal, the second output terminal, and the second input terminal.
[0013] Optionally, the RFID tag may further include an RFID modulation module; The radio frequency modulation module is electrically connected to the digital baseband module and the antenna, respectively, and is used to receive the read data output by the digital baseband module when the radio frequency tag is in the read command stage, and transmit the read data to the external device through the antenna.
[0014] Optionally, the external device includes a reader.
[0015] Optionally, the first memory includes non-volatile memory; The second memory includes static random access memory.
[0016] The technical solution of this invention, by setting the second memory with low power consumption to be in operation only when the RFID tag is in the second working stage with low available energy, helps to reduce the reading power consumption of the RFID tag and so that it no longer restricts the improvement of the RFID tag sensitivity.
[0017] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 A schematic diagram of the structure of an RFID tag provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of another radio frequency tag structure provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of another radio frequency tag provided in an embodiment of the present invention; Figure 4 A schematic diagram of the structure of a digital baseband module, a first memory, and a second memory provided in an embodiment of the present invention; Figure 5 This invention provides a diagram showing the signal and data flow of an RFID tag during its power-on initialization phase. Figure 6 The signal and data flow diagrams provided in this embodiment of the invention show the signal and data flow of an RFID tag during the write instruction writing stage and the write instruction readback stage. Figure 7 The signal and data flow diagram of the RFID tag in the read command stage provided in the embodiments of the present invention; Figure 8 This is a schematic diagram of another radio frequency tag provided in an embodiment of the present invention. Detailed Implementation
[0020] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0021] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or devices. The terms "upper," "lower," "left," "right," etc., indicate orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings and are only used to describe the relative positional relationships between components or constituent parts, and do not specifically limit the specific installation orientation of each component or constituent part.
[0022] Figure 1 This is a schematic diagram of the structure of an RFID tag provided in an embodiment of the present invention, with reference to... Figure 1 The RFID tag provided in this embodiment of the invention includes an antenna 10, an RFID demodulation module 20, a digital baseband module 30, a first memory 40, and a second memory 50. The antenna 10 is communicatively connected to an external device 200 and the RFID demodulation module 20, respectively, for receiving RFID signals output by the external device 200 and transmitting the RFID signals to the RFID demodulation module 20. The RFID demodulation module 20 is electrically connected to the digital baseband module 30, for demodulating the RFID signals to obtain control commands, and transmitting the control commands to the digital baseband module 30. The digital baseband module 30 is electrically connected to the first memory 40 and the second memory 50, respectively, for determining the working stage of the RFID tag according to the control commands, and controlling the working state of the first memory 40 and the second memory 50 according to the working stage.
[0023] Specifically, when the RFID tag is in the first working stage, at least the first memory 40 is in an operating state; when the RFID tag is in the second working stage, the first memory 40 is in an idle state, and the second memory 50 is in an operating state; the available energy of the RFID tag in the first working stage is greater than the available energy of the RFID tag in the second working stage; and the power consumption of the first memory 40 is greater than the power consumption of the second memory 50.
[0024] For example, in this embodiment of the invention, the antenna 10 is located within the communication range of the external device 200, and can receive the radio frequency (RF) signal output by the external device 200 and transmit the RF signal to the RF demodulation module 20. The RF demodulation module 20 can demodulate the received RF signal to obtain corresponding control commands (such as read commands, write commands, etc.), and then transmit the obtained control commands to the digital baseband module 30. The digital baseband module 30 can then determine what the RFID tag should do next and what working stage it is based on the received control commands, and then control the working state of the first memory 40 and the second memory 50 according to the working stage indicated by the control commands.
[0025] It should be noted that the radio frequency (RF) signal received by antenna 10 can consist of two parts: a carrier wave and a modulated signal. The carrier wave serves as the data transmission carrier and can be a high-frequency sine wave, the frequency of which is determined by the operating frequency band of antenna 10. It can provide power to the RFID tag. The modulated signal is a low-frequency baseband signal that carries control commands (such as read commands, write commands, etc.) from external device 200 and can be loaded onto the carrier wave through a specific modulation method. The RF signal received by antenna 10 can also consist of only the carrier wave; in this case, the control command demodulated by RF demodulation module 20 is a null command.
[0026] In one feasible implementation, the first memory 40 in this embodiment of the invention includes a non-volatile memory; the second memory 50 includes a static random access memory.
[0027] Understandably, non-volatile memory (NVMemory) does not lose data after power failure and can preserve data even after the RFID tag is powered off (communication with external device 200 is disconnected), preventing data loss due to power failure. Static random access memory (SRAM) loses data after power failure, but the data stored in the NVOLD is retrieved from the NVOLD after the RFID tag is powered on again (reconnected to external device 200), and the data retrieved from the NVOLD is preserved while the RFID tag maintains communication with external device 200.
[0028] In this embodiment of the invention, the power consumption of the first memory 40 in operation is greater than that of the second memory 50 in operation. For example, the current required for non-volatile memory operation is greater than that required for static random access memory operation.
[0029] In this embodiment of the invention, the first working stage can be an earlier working stage after the RFID tag is powered on again. At this time, the RFID tag still has sufficient energy from the received radio frequency signal to support the operation of the high-power first memory 40. In this working stage, the synchronization of data stored in the first memory 40 and the second memory 50 can be completed. The second working stage can be a later working stage after the RFID tag is powered on again. At this time, much of the energy obtained by the RFID tag from the received radio frequency signal has been consumed. In this case, to ensure that the RFID tag can work normally, only the lower-power second memory can be selected to operate.
[0030] In this embodiment of the invention, by setting the second working stage when the RFID tag is in a low-power-capacity second operating stage, only the low-power second memory is in operation, which helps to reduce the reading power consumption of the RFID tag and prevents it from restricting the improvement of the RFID tag's sensitivity.
[0031] As a feasible implementation, the first working stage includes a power-on initialization stage, a write instruction writing stage, and a write instruction readback stage; the second working stage includes a read instruction stage; when the RFID tag is in the power-on initialization stage, the first memory 40 is in a read state, the second memory 50 is in a write state, and the second memory 50 writes data stored in the first memory 40; when the RFID tag is in the write instruction writing stage, the first memory 40 is in a write state, and the second memory 50 is in an idle state; when the RFID tag is in the write instruction readback stage, the first memory 40 is in a read state, the second memory 50 is in a write state, and the second memory 50 writes data stored in the first memory 40; when the RFID tag is in the read instruction stage, the first memory 40 is in an idle state, and the second memory 50 is in a read state; the power consumption of the first memory 40 is greater than the power consumption of the second memory 50.
[0032] For example, when the control command received by the digital baseband module 30 is an empty command, it is determined that the RFID tag should be in the power-on initialization stage next. At this time, the digital baseband module 30 will control the first memory 40 to be in the read state and the second memory 50 to be in the write state. The second memory 50 will write the data stored in the first memory 40. That is, the second memory 50 will transfer the data saved by the RFID tag after the last power failure to the second memory 50.
[0033] When the control command received by the digital baseband module 30 is a write command, it is determined that the RFID tag should then enter the write command writing stage and the write command readback stage in sequence. At this time, the digital baseband module 30 will first control the first memory 40 to be in a write state and the second memory 50 to be in an idle state, so that the first memory 40 can write the data required by the external device 200. After the data writing of the first memory 40 is completed, the digital baseband module 30 will control the first memory 40 to be in a read state and the second memory 50 to be in a write state. The second memory 50 will write the data stored in the first memory 40 again to ensure that the data stored in the first memory 40 and the data stored in the second memory 50 are consistent after power-on.
[0034] When the control command received by the digital baseband module 30 is a read command, it determines that the RFID tag should be in the read command stage next. At this time, the digital baseband module 30 will control the first memory 40 to be in an idle state and the second memory 50 to be in a read state, and the external device 200 can read the data stored in the second memory 50.
[0035] Compared to existing technologies that use non-volatile memory for reading and writing, this embodiment of the invention sets the first memory 40 in a read state and the second memory 50 in a write state when the RFID tag is in the power-on initialization stage and the write command readback stage. The second memory 50 writes the data stored in the first memory 40, which ensures that the data in the second memory 50 is consistent with the data in the first memory 40. Therefore, when the RFID tag is in the read command stage, only the lower-power second memory 50 is used to perform data reading operations, instead of starting the higher-power first memory 40 to read data. This helps to reduce the reading power consumption of the RFID tag and prevents it from restricting the improvement of the RFID tag's sensitivity.
[0036] In addition to the advantages of power consumption, the second memory 50 (static random access memory) has a simple structure and more stable, reliable and fast read capability under various temperature and process conditions. Compared with the first memory 40 (non-volatile memory), it is more suitable for read operations in the most energy-constrained read instruction stage, which helps to improve the reliability and efficiency of reading.
[0037] Figure 2 This is a schematic diagram of another radio frequency tag structure provided in an embodiment of the present invention, with reference to... Figure 2The RFID tag also includes an RF rectifier module 60 and a power supply module 70. The RF rectifier module 60 is electrically connected to the antenna 10 and the power supply module 70, respectively, and is used to convert the RF energy in the received RF signal into DC power and transmit the DC power to the power supply module 70. The power supply module 70 is electrically connected to the digital baseband module 30, the RF demodulation module 20, the first memory 40 and the second memory 50, respectively, and is used to supply power to the digital baseband module 30, the RF demodulation module 20, the first memory 40 and the second memory 50.
[0038] For example, after receiving the carrier wave (i.e., the radio frequency energy in the aforementioned radio frequency signal) through the antenna 10, the radio frequency rectification module 60 converts it into DC power to provide energy for the passive RFID tag. Specifically, it supplies power to the digital baseband module 30, the radio frequency demodulation module 20, the first memory 40, and the second memory 50 through the power supply module 70.
[0039] refer to Figure 2 The power supply module 70 includes a first linear regulator 71 and a second linear regulator 72. The first linear regulator 71 is electrically connected to the RF rectifier module 60 and the first memory 40, respectively, for acquiring DC power and transmitting it to the first memory 40 after converting the DC power into a stable and smooth first DC voltage. The second linear regulator 72 is electrically connected to the RF rectifier module 60, the digital baseband module 30, the RF demodulation module 20, and the second memory 50, respectively, for acquiring DC power and transmitting it to the second memory 50 after converting the DC power into a stable and smooth second DC voltage. The first DC voltage is greater than the second DC voltage.
[0040] It is understandable that, due to the unstable strength of the radio frequency signal received by the antenna 10, the DC power output by the radio frequency rectifier module 60 will also be unstable and fluctuate. If this DC power is directly supplied to the digital baseband module 30, the radio frequency demodulation module 20, the first memory 40 and the second memory 50, it will cause the operation of each module device to be unstable. Therefore, a corresponding linear regulator is set up to process the DC power output by the radio frequency rectifier module 60, converting the unstable DC power into a stable and constant DC voltage, so as to provide a stable and reliable power supply for the subsequent circuits (digital baseband module 30, memory, etc.).
[0041] Figure 3 This is a schematic diagram of another radio frequency tag provided in an embodiment of the present invention, with reference to... Figure 3The RFID tag also includes a switch 80; the first terminal of the switch 80 is electrically connected to the first linear regulator 71, the second terminal of the switch 80 is electrically connected to the first memory 40, and the control terminal of the switch 80 is electrically connected to the digital baseband module 30; the digital baseband module 30 is used to control the on / off state of the switch 80 according to the working stage; wherein, when the RFID tag is in the first working stage, the switch 80 is turned on; when the RFID tag is in the second working stage, the switch 80 is turned off.
[0042] To ensure that the high-power first memory 40 is powered only when it is in operation, this embodiment of the invention provides a switch 80 between the first linear regulator 71 and the first memory 40. The switching on and off of the switch 80 is controlled by the digital baseband module 30. The switch 80 is only turned on when the control command received by the digital baseband module 30 is an empty command or a write command or read command, i.e., when the RFID tag is in the power-on initialization stage, the write command writing stage, or the write command readback stage. At this time, the first linear regulator circuit will supply power to the first memory 40 to ensure that it can perform read and write operations. When the control command received by the digital baseband module 30 is a read command, i.e., when the RFID tag is in the read command stage, the switch 80 will be turned off to ensure that the high-power first memory 40 is not working or in standby mode when the RFID tag is in the read command stage, which helps to reduce the reading power consumption of the RFID tag.
[0043] refer to Figure 3 The first memory 40 also includes a level converter 41 and a storage module 42; the level converter 41 includes a first power supply terminal, a second power supply terminal, a first signal transmission terminal and a second signal transmission terminal; the first power supply terminal is electrically connected to the first linear regulator 71, the second power supply terminal is electrically connected to the second linear regulator 72, the first signal transmission terminal is electrically connected to the digital baseband module 30, and the second signal transmission terminal is electrically connected to the storage module 42.
[0044] During read and write operations in the first memory 40, data is transmitted with the digital baseband module 30. However, the digital baseband module 30 and the first memory 40 operate at different voltages and have different high and low level signal standards, preventing direct interconnection. The level converter 41 converts the signal voltage into a voltage that the other party can recognize, allowing them to transmit data normally. In this embodiment, the level converter 41 mainly functions during the write instruction phase. At this time, the switch 80 is turned on, and the first linear regulator 71 and the second linear regulator 72 can respectively input different first DC voltages and second DC voltages to the level converter 41 to ensure that the level converter 41 can work normally. Consequently, the level converter 41 can correctly write the write data received by the digital baseband module 30 through the RF demodulation module 20 and the antenna 10 into the storage module 42 of the first memory 40.
[0045] This invention employs different linear voltage regulator circuits for the first and second memories 50, and can completely shut off the power supply to the first memory 40 by turning off the switch 80 when the first memory 40 is not working (or directly enable the first memory 40 with an enable signal to shut down the internal power-consuming module). This ensures that when the RFID tag has sufficient energy (power-on initialization phase, write instruction writing phase, write instruction readback phase), the first memory 40 can reliably perform read and write operations with a relatively high voltage, while in the phase of insufficient energy (read instruction phase), only the low-power second memory 50 is allowed to perform read operations at a lower voltage.
[0046] Figure 4 This is a schematic diagram of the structure of a digital baseband module, a first memory, and a second memory provided in an embodiment of the present invention. (Refer to...) Figure 4 The first memory 40 includes a first read module 401 and a first write module 402; the first read module 401 includes a first read enable terminal and a first output terminal; the first write module 402 includes a first write enable terminal and a first input terminal; the second memory 50 includes a second read module 501 and a second write module 502; the second read module 501 includes a second read enable terminal and a second output terminal; the second write module 502 includes a second write enable terminal and a second input terminal; the digital baseband module 30 is electrically connected to the first read enable terminal, the first write enable terminal, the second read enable terminal and the second write enable terminal respectively, and is used to control the enable signals output to the first read enable terminal, the first write enable terminal, the second read enable terminal and the second write enable terminal according to the working stage, thereby controlling the state of the first output terminal, the first input terminal, the second output terminal and the second input terminal.
[0047] For example, the digital baseband module 30 can enable the first memory 40 to perform a read operation by inputting a read enable signal to the first read enable terminal of the first read module 401, that is, the first memory 40 can output data to the digital baseband module 30 through the first output terminal. The digital baseband module 30 can enable the first memory 40 to perform a write operation by inputting a write enable signal to the first write enable terminal of the first write module 402, that is, the first memory 40 can obtain the data output by the digital baseband module 30 through the first input terminal. The digital baseband module 30 can enable the second memory 50 to perform a read operation by inputting a read enable signal to the second read enable terminal of the second read module 501, that is, the second memory 50 can output data to the digital baseband module 30 through the second output terminal. The digital baseband module 30 can enable the second memory 50 to perform a write operation by inputting a write enable signal to the second write enable terminal of the second write module 502, that is, the second memory 50 can obtain the data output by the digital baseband module 30 through the second input terminal. It should be noted that writing and reading from the same memory cannot be performed simultaneously; that is, only a read operation or a write operation can be performed at any given time.
[0048] Specifically, Figure 5 The signal and data flow diagram of the RFID tag during the power-on initialization phase provided in this embodiment of the invention is shown in the reference diagram. Figure 5 It needs to be explained that... Figure 5 In the diagram, ER1 represents the read enable signal of the first memory 40, EW1 represents the write enable signal of the first memory 40, D1 represents the data flow direction of the first memory 40, ER2 represents the read enable signal of the second memory 50, EW2 represents the write enable signal of the second memory 50, and D2 represents the data flow direction of the second memory 50. When the RFID tag is in the power-on initialization phase S1, the read enable of the first memory 40 is turned on, allowing the first memory 40 to output data to the digital baseband module 30. Simultaneously, the write enable of the second memory 50 is turned on, allowing the digital baseband module 30 to write the data received from the first memory 40 into the second memory 50 according to certain timing requirements.
[0049] Figure 6 The signal and data flow diagrams provided in this embodiment of the invention when the RFID tag is in the write instruction writing stage and the write instruction readback stage are shown in the reference diagram. Figure 6 It needs to be explained that... Figure 6 In the diagram, ER1 represents the read enable signal of the first memory 40, EW1 represents the write enable signal of the first memory 40, and D1 represents the data flow direction of the first memory 40. ER2 represents the read enable signal of the second memory 50, EW2 represents the write enable signal of the second memory 50, and D2 represents the data flow direction of the second memory 50. The write command stage of the RFID tag circuit can be divided into a write command writing stage S2 and a write command readback stage S3. When the RFID tag is in the write command writing stage S2, the write operation of the first memory 40 is enabled, and the digital baseband module 30 writes data to the first memory 40 according to the address and data requirements of the received write command. When the RFID tag is in the write instruction readback stage S3, the read operation of the first memory 40 is enabled. The first memory 40 will transmit all the data after writing the data to the digital baseband module 30. The digital baseband module 30 can confirm whether the data requested by the external device 200 has been written by the acquired data. At the same time, the write operation of the second memory 50 is also enabled. The digital baseband module 30 will also write the data read back from the first memory 40 to the second memory 50 to ensure that the data stored in the second memory 50 is consistent with the data stored in the first memory 40.
[0050] Figure 7 The signal and data flow diagram of the RFID tag in the read command stage provided in the embodiment of the present invention is shown in the reference diagram. Figure 7 It needs to be explained that... Figure 7In the diagram, ER1 represents the read enable signal of the first memory 40, EW1 represents the write enable signal of the first memory 40, and D1 represents the data flow direction of the first memory 40. ER2 represents the read enable signal of the second memory 50, EW2 represents the write enable signal of the second memory 50, and D2 represents the data flow direction of the second memory 50. When the RFID tag is in the read command stage S4, only the read operation of the second memory 50 is enabled, and the second memory 50 will output data to the digital baseband module 30.
[0051] Figure 8 This is a schematic diagram of another radio frequency tag provided in an embodiment of the present invention, with reference to... Figure 8 The RFID tag also includes an RFID modulation module 90; the RFID modulation module 90 is electrically connected to the digital baseband module 30 and the antenna 10 respectively, and is used to receive the read data output by the digital baseband module 30 when the RFID tag is in the read command stage, and transmit the read data to the external device 200 through the antenna 10.
[0052] For example, when the RFID tag is in the read instruction stage, the second memory 50 outputs the data that the external device 200 needs to read to the digital baseband module 30. The digital baseband module 30 then transmits the received read data to the RF modulation module 90. The RF modulation module 90 loads the read data onto the RF carrier and sends it back to the external device 200 through the antenna 10.
[0053] As a feasible implementation, the power consumption P1 of the first memory 40 satisfies: 200nW≤P1≤300nW; the power consumption P2 of the second memory 50 satisfies: 30nW≤P2≤50nW.
[0054] Specifically, during the power-on initialization phase, the first memory 40 and the second memory 50 operate simultaneously. The first memory 40 operates at a medium power consumption level (200~300nW), while the second memory 50 operates at a low power consumption level (30~50nW). During the write instruction writing phase, the first memory 40 operates at a high power consumption level (1~3uW), while the second memory 50 is not operating. During the write instruction readback phase, the first memory 40 operates at a medium power consumption level (200~300nW), while the second memory 50 operates at a low power consumption level (30~50nW). During the read instruction phase, the second memory 50 operates at a low power consumption level (30~50nW), while the first memory 40 is not operating. The read sensitivity of the RFID tag is the most important indicator, which depends on the power consumption during the read instruction phase. The power consumption during the power-on phase generally does not become a bottleneck for read sensitivity because the available power consumption during the power-on phase is twice that during the read instruction phase (that is, it is permissible to have 600~700nW more power consumption than during the read instruction phase). The main advantage of this embodiment of the invention is that the second memory 50 can be used to perform data reading operations during the read instruction stage, instead of starting the first memory 40 which consumes more power to read data.
[0055] In one possible implementation, the external device 200 includes a reader.
[0056] It should be noted that the type of external device 200 is not limited in the embodiments of the present invention, and it can be any device capable of reading and writing communication with the radio frequency tag.
[0057] In this embodiment of the invention, the RFID tag includes a first memory circuit 40 and a second memory circuit 50. The first memory 40 is a non-volatile memory (NVM) capable of full read and write functionality. Its hardware complexity is relatively high, requiring read and write operations to be performed during periods of sufficient RF energy (such as power-on initialization and write command phases), and the updated data to be copied to the second memory 50. The second memory 50 can be implemented using relatively energy-efficient static random access memory (SRAM). During periods of relatively insufficient RF energy (such as read command phases), reliable communication is achieved through the second memory 50. This dual-memory operating mode effectively resolves the conflict between memory performance and power consumption.
[0058] Specifically, in one feasible implementation, the RFID tag uses a 55nm CMOS process, and the first memory 40 adopts a logic memory structure. Reliable read and write operations are only possible at a power supply voltage of approximately 0.9V (VBB = 0.9V), with read power consumption around 300nW and write power consumption around 1µW. The second memory 50 and other circuits operate at a power supply voltage of VBB = 0.6V, with read power consumption of only 40nW. To achieve a sensitivity of -25dBm, the overall power consumption of the RFID tag needs to be reduced to approximately 0.7µW. Since the maximum power consumption of the RFID tag during power-on is allowed to be around 1.4µW, this meets the requirements for using the first memory 40 within this timeframe. The write sensitivity can also reach -22dBm. This represents an improvement of at least 1dBm in read sensitivity compared to the original RFID tag.
[0059] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. An RFID tag, characterized in that, Includes an antenna, a radio frequency demodulation module, a digital baseband module, a first memory, and a second memory; The antenna is communicatively connected to an external device and an RF demodulation module, respectively, and is used to receive the RF signal output by the external device and transmit the RF signal to the RF demodulation module. The radio frequency demodulation module is electrically connected to the digital baseband module and is used to demodulate the radio frequency signal to obtain control commands and transmit the control commands to the digital baseband module. The digital baseband module is electrically connected to the first memory and the second memory respectively, and is used to determine the working stage of the radio frequency tag according to the control command, and control the working state of the first memory and the second memory according to the working stage; Specifically, when the RFID tag is in the first working stage, at least the first memory is in an operating state; when the RFID tag is in the second working stage, the first memory is in an idle state, and the second memory is in an operating state; the available energy of the RFID tag in the first working stage is greater than the available energy of the RFID tag in the second working stage; and the power consumption of the first memory is greater than the power consumption of the second memory.
2. The radio frequency tag according to claim 1, characterized in that, The first working phase includes a power-on initialization phase, a write instruction writing phase, and a write instruction readback phase; the second working phase includes a read instruction phase. When the RFID tag is in the power-on initialization phase, the first memory is in read mode and the second memory is in write mode, and the second memory writes the data stored in the first memory. When the RFID tag is in the write instruction writing stage, the first memory is in the write state and the second memory is in the idle state. When the RFID tag is in the write instruction readback stage, the first memory is in read state and the second memory is in write state, and the second memory writes the data stored in the first memory. When the RFID tag is in the read command stage, the first memory is in an idle state and the second memory is in a read state.
3. The radio frequency tag according to claim 1, characterized in that, The RFID tag also includes an RFID rectification module and a power supply module; The radio frequency rectification module is electrically connected to the antenna and the power supply module respectively, and is used to convert the radio frequency energy in the received radio frequency signal into DC power and transmit the DC power to the power supply module; The power supply module is electrically connected to the digital baseband module, the radio frequency demodulation module, the first memory, and the second memory, respectively, and is used to supply power to the digital baseband module, the radio frequency demodulation module, the first memory, and the second memory.
4. The radio frequency tag according to claim 3, characterized in that, The power supply module includes a first linear regulator and a second linear regulator; The first linear regulator is electrically connected to the radio frequency rectifier module and the first memory respectively, and is used to acquire the DC power and transmit the DC power to the first memory after converting the DC power into a stable and smooth first DC voltage. The second linear regulator is electrically connected to the RF rectifier module, the digital baseband module, the RF demodulation module, and the second memory, respectively, for acquiring the DC power and transmitting it to the second memory after converting the DC power into a stable and smooth second DC voltage; The first DC voltage is greater than the second DC voltage.
5. The radio frequency tag according to claim 4, characterized in that, The RFID tag also includes a switch; The first terminal of the switch is electrically connected to the first linear regulator, the second terminal of the switch is electrically connected to the first memory, and the control terminal of the switch is electrically connected to the digital baseband module. The digital baseband module is used to control the on / off state of the switch according to the working stage; Specifically, the switch is turned on when the RFID tag is in the first operating stage; and the switch is turned off when the RFID tag is in the second operating stage.
6. The radio frequency tag according to claim 4, characterized in that, The first memory also includes a level converter and a storage module; The level converter includes a first power supply terminal, a second power supply terminal, a first signal transmission terminal, and a second signal transmission terminal; The first power supply terminal is electrically connected to the first linear regulator, the second power supply terminal is electrically connected to the second linear regulator, the first signal transmission terminal is electrically connected to the digital baseband module, and the second signal transmission terminal is electrically connected to the storage module.
7. The radio frequency tag according to claim 2, characterized in that, The first memory includes a first read module and a first write module; the first read module includes a first read enable terminal and a first output terminal; the first write module includes a first write enable terminal and a first input terminal; The second memory includes a second read module and a second write module; the second read module includes a second read enable terminal and a second output terminal; the second write module includes a second write enable terminal and a second input terminal. The digital baseband module is electrically connected to the first read enable terminal, the first write enable terminal, the second read enable terminal, and the second write enable terminal, respectively, and is used to control the enable signals output to the first read enable terminal, the first write enable terminal, the second read enable terminal, and the second write enable terminal according to the working stage, thereby controlling the state of the first output terminal, the first input terminal, the second output terminal, and the second input terminal.
8. The radio frequency tag according to claim 1, characterized in that, The RFID tag also includes an RFID modulation module; The radio frequency modulation module is electrically connected to the digital baseband module and the antenna, respectively, and is used to receive the read data output by the digital baseband module when the radio frequency tag is in the read command stage, and transmit the read data to the external device through the antenna.
9. The radio frequency tag according to claim 1, characterized in that, The external device includes a reader.
10. The radio frequency tag according to claim 1, characterized in that, The first memory includes non-volatile memory; The second memory includes static random access memory.