Method for generating quantum circuit and related apparatus

Abstract

This application discloses a method and related apparatus for generating quantum circuits, relating to the field of quantum computing technology. The method transforms the correspondence between a first matrix, a second vector, and a third vector into a ratio between a first expression and a second expression. The first result is obtained by applying the first matrix to the second vector. The first expression indicates the inner product of the first result and the third vector, and the second expression indicates the norm of the first result. Therefore, by constructing circuits corresponding to the inner product result and the norm result, the quantum circuit can be generated. In other words, this transformation converts the correspondence of linear equations into the ratio of the inner product of vectors to their magnitudes, thereby generating circuits corresponding to the numerator (first expression) and denominator (second expression) respectively, thus obtaining a quantum circuit. This allows for the determination of unknown variables in the correspondence of linear equations using quantum circuits, improving determination efficiency.

Description

Technical Field

[0001] This invention relates to the field of quantum computing technology, and in particular to a method and apparatus for generating quantum circuits. Background Technology

[0002] A quantum computer is a physical device that performs high-speed mathematical and logical operations, stores and processes quantum information in accordance with the laws of quantum mechanics. When a device processes and calculates quantum information and runs quantum algorithms, it is a quantum computer. Because of its ability to process mathematical problems more efficiently than ordinary computers—for example, reducing the time to crack RSA keys from hundreds of years to hours—quantum computers have become a key technology under research.

[0003] Due to the high efficiency of quantum computing, it has been applied in some scenarios, such as password cracking and big data analysis, where quantum algorithms can be used to improve processing efficiency.

[0004] In other words, quantum computers can achieve efficient data processing. However, how to use quantum computers for data processing depends on quantum circuits. How to generate reasonable quantum circuits according to the data to be processed is a technical problem faced in quantum computing. Summary of the Invention

[0005] This application provides a method and related apparatus for generating quantum circuits. It can convert linear expressions into the ratio of inner product to norm, and generate inner product expressions and norm expressions corresponding to the circuit through tensor derivation. This enables the construction of quantum circuits corresponding to linear equation systems, thereby allowing the use of quantum computers to solve linear equation systems and improving the efficiency of solving linear equation systems.

[0006] A first aspect of this application provides a method for generating a quantum circuit, comprising: converting the correspondence between a first matrix, a second vector, and a third vector into a ratio relationship between a first expression and a second expression; wherein the first matrix is ​​used to indicate parameter data, the second vector is used to indicate variable data, and the third vector is used to indicate target result information; the first expression is used to indicate the inner product of a first result and the third vector, and the second expression is used to indicate the norm of the first result; the first result is obtained by applying the first matrix to the second vector, and the ratio of the first expression to the second expression is used to indicate the second vector; and generating the quantum circuit based on the first expression and the second expression, wherein the quantum circuit is used to determine the second vector.

[0007] Optionally, the generation of a quantum circuit based on the first and second expressions described above includes:

[0008] The first expression above is subjected to tensor derivation and transformation to obtain the inner product expression, and the second expression above is subjected to tensor derivation and transformation to obtain the modulus expression;

[0009] Based on the above inner product expression, a first computing circuit is generated, and based on the above modulus expression, a second computing circuit is generated.

[0010] The quantum circuit is generated based on the first computing circuit and the second computing circuit described above.

[0011] Optionally, the first computing circuit includes: at least two H gates and a parameterized control circuit; the at least two H gates include a first H gate whose activation timing precedes that of the parameterized control circuit, and a second H gate whose activation timing follows that of the parameterized control circuit; the parameterized control circuit includes a first controlled circuit, a second controlled circuit, and a third control circuit, wherein the first controlled circuit is used to generate a second matrix based on the second vector, the second controlled circuit is used to generate a third matrix based on the third vector, and the third control circuit is used to generate a first matrix; the activation timing of the third control circuit follows that of the first and second controlled circuits.

[0012] Optionally, the second computing circuit includes: a fourth control circuit acting on each qubit and a fifth control circuit acting on each qubit; the timing of the fifth control circuit is after the timing of the fourth control circuit; the fourth control circuit is used to generate based on the second matrix, and the fifth control circuit is used to generate based on the third matrix and the conjugate transpose of the third matrix.

[0013] Optionally, the correspondence between the above-mentioned first matrix, the above-mentioned second vector, and the third vector includes: Ax = b;

[0014] Wherein, A is used to indicate the first matrix, x is used to indicate the second vector, and b is used to indicate the third vector;

[0015] The ratio relationship between the first expression and the second expression mentioned above includes:

[0016] Among them, the above<b|A|x> The above ||A|x>|| is used to indicate the first expression, and the above ||A|x>|| is used to indicate the second expression;

[0017] Furthermore, the above inner product expression includes:

[0018]

[0019] The above modulus expression includes:

[0020] Wherein, U is used to indicate the second matrix corresponding to the second vector, U(θ)|0>=|x(θ)>; the above V is used to indicate the third matrix that generates the above third vector, V|0>=|b>.

[0021] Optionally, the second matrix corresponds to parameter θ, wherein parameter θ is used to indicate the rotation angle of the logic rotary gate in the circuit corresponding to the second matrix; and the generation of the quantum circuit based on the first computing circuit and the second computing circuit includes: adjusting the value of parameter θ in the first controlled circuit and correspondingly adjusting the value of parameter θ in the fourth controlled circuit; determining whether to continue adjusting the value of parameter θ based on the first observation value of the first computing circuit and the second observation value of the second computing circuit; and obtaining the quantum circuit based on the current first computing circuit and the second computing circuit in response to detecting that the value of parameter θ has been adjusted; wherein, when the value of parameter θ has been adjusted, the ratio of the first observation value to the second observation value is at its maximum value.

[0022] Optionally, the first expression and the second expression are obtained as follows: the first matrix is ​​decomposed into a first subunitary matrix and a second subunitary matrix; the first expression is obtained based on the inner product of the first subunitary matrix acting on the second vector and the third vector, and the inner product of the second subunitary matrix acting on the second vector and the third vector; the second expression is obtained based on the norm of the inverse of the first subunitary matrix and the norm of the second subunitary matrix acting on the second vector.

[0023] A second aspect of this application provides a quantum circuit generation apparatus, comprising: a conversion unit, configured to convert the correspondence between a first matrix, a second vector, and a third vector into a ratio relationship between a first expression and a second expression; wherein the third vector is obtained by applying the first matrix to the second vector, the first matrix indicates parameter data, the second vector indicates variable data, and the third vector indicates target result information; the first expression indicates the inner product of the result of applying the first matrix to the second vector and the third vector, and the second expression indicates the norm of the result of applying the first matrix to the second vector; the ratio of the first expression to the second expression indicates the second vector; and a generation unit, configured to generate the quantum circuit based on the first expression and the second expression, wherein the quantum circuit is used to determine the second vector.

[0024] A third aspect of this application provides an electronic device, including: a processor and a memory;

[0025] The processor is connected to a memory, wherein the memory is used to store computer programs and the processor is used to invoke the computer programs to execute the methods as described in the first aspect of the embodiments of this application.

[0026] A fourth aspect of this application provides a computer-readable storage medium storing a computer program, the computer program including program instructions that, when executed by a processor, perform the method as described in the first aspect of this application.

[0027] The quantum circuit generation method and related apparatus provided in this application convert the correspondence between the first matrix, the second vector, and the third vector into a ratio relationship between the first expression and the second expression. The first expression indicates the inner product of the first matrix acting on the second vector and the third vector, while the second expression indicates the norm of the result of the first matrix acting on the second vector. Therefore, by constructing circuits corresponding to the inner product result and the norm result, the quantum circuit can be generated. In other words, through this conversion, the correspondence of linear equations is transformed into the ratio of the inner product of vectors to their magnitudes. This allows for the generation of circuits corresponding to the numerator (first expression) and the denominator (second expression), respectively, thus obtaining a quantum circuit. This enables the determination of unknown variables in the correspondence of linear equations using quantum circuits, improving the efficiency of the determination process.

[0028] In this disclosure, the process of determining x in a system of linear equations is transformed into the process of determining the ratio of two expressions, both of which can be characterized by matrix interactions. That is, the values ​​corresponding to the two expressions can be determined using a circuit, which can also be understood as using quantum circuits to solve the system of linear equations, thereby improving the efficiency of solving the system of linear equations. In other words, this disclosure transforms the solution of a system of linear equations into the process of quantum circuits interacting with qubits, thus enabling the solution of the system of linear equations using quantum circuits. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 An example system block diagram for implementing the methods provided in this disclosure is shown in one embodiment of this application;

[0031] Figure 2 A schematic flowchart of a method for generating a quantum circuit according to an embodiment of this application is shown;

[0032] Figure 3 An equivalent schematic diagram of a possible first circuit provided in one embodiment of this application is shown;

[0033] Figure 4 An equivalent schematic diagram of a possible second circuit provided in one embodiment of this application is shown;

[0034] Figure 5 An equivalent schematic diagram of a possible circuit structure provided in one embodiment of this application is shown;

[0035] Figure 6 An equivalent schematic diagram of a possible circuit structure provided in one embodiment of this application is shown;

[0036] Figure 7 A schematic diagram of the structure of a quantum circuit generation apparatus provided in one embodiment of this application is shown;

[0037] Figure 8 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown. Detailed Implementation

[0038] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0039] Classical computers use transistors to encode information in binary data, such as bits, where each bit can represent a value of 1 or 0. These 1s and 0s act as switches to drive the functions of a classical computer. If there are n bits of data, then there are 2... n Possible classical states, and represent one state at a time.

[0040] Quantum computers use quantum processors that operate on data represented by qubits, also known as quantum bits. A single qubit can represent the classical binary states "0" or "1", or a superposition of "0" and "1". Because it can represent a superposition of "0" and "1", a qubit can represent both "0" and "1" states simultaneously. For example, if there are n bits of data, then 2^n qubits can represent n bits of data. nA quantum state can be represented simultaneously. Furthermore, qubits in a superposition can be correlated with each other, a phenomenon known as entanglement, where the state of one qubit (whether 1, 0, or both) depends on the state of another qubit, and more information can be encoded within two entangled qubits. Based on the principles of superposition and entanglement, qubits enable quantum computers to perform functions that might be relatively complex and time-consuming for classical computers.

[0041] Please refer to Figure 1 This illustrates an example system block diagram of a method for generating quantum circuits according to an embodiment of this application. System 100 may be a hybrid computing system comprising a combination of one or more quantum computers, quantum systems, and / or classical computers. Figure 1 In the example shown, system 100 may include a quantum system 110 and a classical computer 120. In one implementation, the quantum system 110 and the classical computer 120 may be configured to communicate via one or more wired and / or wireless connections (e.g., wireless networks). The quantum system 110 may include a quantum chipset consisting of one or more quantum chips, comprising various hardware components for processing data encoded in qubits. The quantum chipset may be a quantum computing core surrounded by infrastructure to protect the quantum chips from electromagnetic noise sources, mechanical vibration sources, heat sources, and other noise sources that can degrade the performance of the quantum chips. The classical computer 120 may be electronically integrated with the quantum system 110 via any suitable wired and / or wireless electronic connection.

[0042] exist Figure 1 In the example shown, quantum system 110 can be any suitable set of components capable of performing quantum operations on a physical system. Quantum operations, such as quantum gate operations, manipulate the quantum states of qubits to evolve and / or become entangled. Figure 1 In the illustrated example embodiment, the quantum system 110 may include a measurement and control unit 111, an interface 112, and a quantum chip 113. In some embodiments, all or part of each of the measurement and control unit 111, interface 112, and quantum chip 113 may be located in a cryogenic environment to facilitate the performance of quantum operations. The quantum chip 113 may be any hardware capable of processing information using quantum states. This hardware may include multiple qubits and means for coupling or entanglement of the qubits to process information using quantum states. Qubits may include, but are not limited to, charge qubits, flux qubits, phase qubits, spin qubits, and ion qubits. The quantum chip may include a set of quantum logic gates configured to perform quantum logic operations on the qubits stored in a quantum register. The quantum gates may include one or more single-qubit gates, two-qubit gates, and / or other multi-qubit gates.

[0043] The measurement and control unit 111 can be any combination of digital computing devices capable of performing quantum computing (e.g., executing quantum circuits) in conjunction with interface 112. This digital computing device may include a digital processor and memory for storing and executing quantum instructions using interface 112. The digital computing device may also include a communication protocol device for receiving instructions and sending the results of the performed quantum computing to a classical computer. Additionally, the digital computing device may include a communication interface having interface 112. In one embodiment, the measurement and control unit 111 may be configured to receive classical instructions (e.g., from classical computer 120) and convert these classical instructions into measurement and control instructions for interface 112. The measurement and control instructions provided by the measurement and control unit 111 to interface 112 may be, for example, digital signals indicating which quantum gates in a quantum gate array need to be applied to the qubits to perform a specific function. Interface 112 may be configured to convert these digital signals into analog signals (e.g., analog pulses of microwave pulses), which can be used to apply quantum gates to the qubits to manipulate the interactions between the qubits.

[0044] Interface 112 may be a classical-quantum interface, comprising a combination of devices capable of receiving instructions from the integrated measurement and control unit 111 and converting those instructions into a means for implementing quantum operations. In one embodiment, interface 112 may convert instructions from the integrated measurement and control unit 111 into drive signals capable of driving or manipulating qubits, and / or applying quantum gates to qubits. Additionally, interface 112 may be configured to convert signals received from the quantum chip 113 into digital signals capable of being processed and transmitted by the integrated measurement and control unit 111. Devices included in interface 112 may include, but are not limited to, digital-to-analog converters, analog-to-digital converters, waveform generators, attenuators, amplifiers, optical fibers, lasers, and filters. Interface 112 may further include circuitry configured to measure multiple qubits after the application of quantum gates, wherein the measurements may produce results represented in classical bits. Each measurement performed by interface 112 may be read out to a device connected to the quantum system 110, such as a classical computer 120. The multiple measurement results provided by interface 112 may represent probabilistic results.

[0045] The classical computer 120 can include hardware components such as a processor and storage devices (e.g., including memory devices and classical registers) for processing data encoded in classical bits. In one embodiment, the classical computer 120 can be configured to provide the quantum system 110 with various control signals, instructions, and data encoded in classical bits. Further, quantum states measured by the quantum system 110 can be read out by the classical computer 120, and the classical computer 120 can store the measured quantum states as classical bits in classical registers. In one embodiment, the classical computer 120 can be any suitable combination of computer-executable hardware and / or computer-executable software capable of executing the preparation module 121 to perform quantum computation using data stored in the data storage module 122 as part of the construction and computation. The data storage module 122 can be a repository for data to be analyzed using quantum computing algorithms and the results of that analysis. The preparation module 121 can be a program or module capable of preparing classical data from the data storage module 122 as part of a quantum circuit implementation. Preparation module 121 can be instantiated as part of a larger algorithm, such as an application programming interface (API) function call, or by resolving hybrid classical-quantum computing into aspects of quantum and classical computing. For example, preparation module 121 can generate instructions for creating quantum circuits using quantum gates. In an embodiment, such instructions can be stored by the measurement and control unit 111 and can be instantiated by components of interface 112 to execute, enabling quantum operations of quantum gates to be performed on quantum chip 113.

[0046] The classic computer 120 may be a laptop computer, desktop computer, vehicle-integrated computer, smart mobile device, tablet device, and / or any other suitable classic computing device. Additionally or alternatively, the classic computer 120 may also operate as part of a cloud computing service model, such as Software as a Service (SaaS), Platform as a Service (PaaS), or Infrastructure as a Service (IaaS). The classic computer 120 may also reside in a cloud computing deployment model, such as a private cloud, community cloud, public cloud, or hybrid cloud.

[0047] Based on the above background information, it is clear that quantum computing helps improve computational efficiency during data processing.

[0048] For example, in some scenarios, a system of linear equations, Ax = b, might be established for data analysis. In structural analysis of engineering problems, linear equations can be used to analyze stress and strain. In computer graphics, linear equations are used in ray tracing algorithms to determine the intersection points of rays with objects. In physics, linear equations can describe the dynamic behavior of multibody systems. In quantum mechanics, linear equations can be used to describe the evolution of quantum states. In biostatistics, they can be used to analyze biological data, such as linkage analysis in genetics. In medical imaging, linear equations are used to reconstruct images in CT scans and MRI. In image processing, they can be used for image compression and denoising. In traffic flow analysis, they can be used to optimize traffic flow and reduce congestion. In network design, they can be used to maximize data transmission efficiency. In short, linear equations can be applied in multiple scenarios.

[0049] Furthermore, Ax = b can be understood as an expression for a system of linear equations. In specific scenarios, A, x, and b may have different meanings. For example, in circuit analysis, A can be used to indicate the admittance matrix (including resistance, inductance, and capacitance) of each node in the circuit; x can be used to indicate the voltage or current of each node in the circuit; and b can be used to indicate the voltage or current source applied by an external power source.

[0050] In mechanical systems (structural analysis), A can be used to indicate information composed of the stiffness matrix of the structure, representing the physical properties of the structure; x can be used to indicate the displacement vector of each point in the structure; and b can be used to indicate the external force vector acting on the structure.

[0051] In linear programming (economics), A can be used to indicate the coefficient matrix of constraints, representing resource limitations; x can be used to indicate decision variables, such as production volume, investment amount, etc.; b can be used to indicate the total amount of resources or the total amount of demand.

[0052] In computer graphics (ray tracing), A can be used to indicate the geometric relationship matrix of the intersection of a ray and an object; x can be used to indicate the coordinates of the intersection point; and b can be used to indicate the starting point and direction vector of the ray.

[0053] In quantum mechanics, A can be used to indicate the evolution matrix of a quantum state, representing the dynamics of a quantum system; x can be used to indicate the coefficient vector of a quantum state; and b can be used to indicate the coefficient vector of the initial quantum state.

[0054] In chemometrics, A can be used to indicate the stoichiometric matrix of a chemical reaction; x can be used to indicate the concentration of each component; and b can be used to indicate the total amount of reactants and products.

[0055] In data science and machine learning (linear regression), A can be used to indicate the design matrix, which contains eigenvalues ​​and possible bias terms; x can be used to indicate model parameters, such as weights and biases; and b can be used to indicate the observation or target value.

[0056] In medical imaging (CT scan), A can be used to indicate the projection matrix of the imaging system, describing the interaction between the rays and the object; x can be used to indicate the density or absorption coefficient of each point in the image; and b can be used to indicate the intensity of the rays measured by the detector.

[0057] In traffic flow analysis, A can be used to indicate the flow relationship matrix of each road segment in the traffic network; x can be used to indicate the flow of each road segment; and b can be used to indicate the flow demand or supply of each node.

[0058] In other words, linear equations may be involved in many scenarios. Determining the data indicated by x in a linear equation system can usually be done by using a large model in classical computers. However, this method may take a lot of time to complete, which greatly affects the computational efficiency for the data.

[0059] Based on this, this disclosure provides a method for generating quantum circuits. This method can be used to generate quantum circuits that solve specific linear equation systems. In this way, a quantum computer can run the quantum circuit to determine the data indicated by x in the linear equation system. Obviously, this method can determine the data indicated by x in the linear equation system more efficiently.

[0060] Please refer to Figure 2 This document illustrates a flowchart of a method for generating a quantum circuit according to an embodiment of this application. This method can be applied to computer devices, which refer to electronic devices capable of data computation and processing. For example, the entity executing each step may be... Figure 1 The quantum computer or classical computer shown can be selected as needed. The method for generating this quantum circuit may include the following steps:

[0061] Step 201: Convert the correspondence between the first matrix, the second vector, and the third vector into a ratio relationship between the first expression and the second expression;

[0062] Step 202: Generate a quantum circuit based on the first and second expressions.

[0063] Here, the first matrix is ​​used to indicate the first parameter data, the second vector is used to indicate the second variable data, and the third vector is used to indicate the target result information.

[0064] The first result is obtained by applying the first matrix to the second vector; the first expression indicates the inner product of the first result and the third vector; the second expression indicates the norm of the first result; and the ratio of the first expression to the second expression indicates the second vector.

[0065] Of course, the information represented by parameter data, variable data, and target result information may differ in specific scenarios. For specific examples, please refer to the scenarios mentioned above. For the sake of brevity, the data represented by parameter data, variable data, and target result information in specific scenarios will not be elaborated here.

[0066] Here, the first matrix can be understood as A, the second vector as x, and the third vector as b. Alternatively, it can be understood as: A is the coefficient matrix, x is the unknown vector, and b is the constant vector. That is, under normal circumstances, A and b are fixed, while x is the data that needs to be solved.

[0067] As an example, the dot product of the result of the first matrix acting on the second vector (the first result) and the third vector can also be understood as:<b|A|x(θ)> The norm of the result of the first matrix acting on the second vector can be understood as ||A|x>||.

[0068] It should be understood that the ratio of the inner product result to the norm result can be viewed as a measure of x, that is, it can be understood as... In this way, the problem of solving linear equations is transformed into a ratio comparison problem, which allows us to construct circuits corresponding to the inner product result and the norm result respectively, thereby obtaining quantum circuits.

[0069] As an example, vectors can be converted into matrix representations. Therefore, by converting the second and third vectors into matrix representations of quantum states, both the inner product result and the norm result can be converted into matrix representations of quantum states. This allows for circuit construction based on the construction method of variable quantum circuits, thereby obtaining quantum circuits.

[0070] As can be seen, in this disclosure, the correspondence between the first matrix, the second vector, and the third vector is transformed into a ratio between the first expression and the second expression. The first result is obtained by applying the first matrix to the second vector, the first expression indicates the inner product of the first result and the third vector, and the second expression indicates the norm of the first result. Therefore, by constructing circuits corresponding to the inner product result and the norm result, the generation of a quantum circuit can be completed. That is, through this transformation, the correspondence of linear equations is converted into the ratio of the inner product of vectors and their magnitudes, thereby generating circuits corresponding to the numerator (first expression) and the denominator (second expression) respectively, obtaining a quantum circuit. This allows for the determination of unknown variables in the correspondence of linear equations using quantum circuits, improving the determination efficiency.

[0071] In this disclosure, the process of determining x in a system of linear equations is transformed into the process of determining the ratio of two expressions, both of which can be characterized by matrix interactions. That is, the values ​​corresponding to the two expressions can be determined using a circuit, which can also be understood as using quantum circuits to solve the system of linear equations, thereby improving the efficiency of solving the system of linear equations. In other words, this disclosure transforms the solution of a system of linear equations into the process of quantum circuits interacting with qubits, thus enabling the solution of the system of linear equations using quantum circuits.

[0072] In some embodiments, step 202 (generating a quantum circuit based on the first and second expressions) may specifically include:

[0073] The first expression is subjected to tensor derivation transformation to obtain an inner product expression, and the second expression is subjected to tensor derivation transformation to obtain a modulus expression; a first computing circuit is generated based on the inner product expression, and a second computing circuit is generated based on the modulus expression; a quantum circuit is generated based on the first computing circuit and the second computing circuit.

[0074] As an example, after the derivation of the tensor formula, both the inner product expression and the magnitude expression can be represented as matrices and vectors. Thus, it is easy to determine the first computational circuit corresponding to the inner product expression and the second computational circuit corresponding to the magnitude expression, and thus the quantum circuit can be easily determined.

[0075] It should be understood that combining the first and second computing circuits can produce a quantum circuit, but it should not be interpreted as the output of the first computing circuit being used as the input of the second computing circuit. The first and second computing circuits can be understood as two independent computing circuits, while the quantum circuit includes both the first and second computing circuits. Running the first and second computing circuits on a quantum chip can produce a second vector.

[0076] As an example, the number of qubits corresponding to the first circuit can be 2n+1, while the number of qubits corresponding to the second circuit can be 2n. Where 2 n Used to indicate the latitude of the first matrix.

[0077] In some embodiments, the number of qubits operated by the first computing circuit and the second computing circuit can be determined according to the dimensions of the first matrix. This helps to reduce the number of qubits used, thereby helping to improve the operating efficiency of the quantum circuit.

[0078] In some embodiments, the first computing circuit may include: at least two H gates and a parameterized control circuit;

[0079] The at least two H gates include a first H gate whose activation timing precedes the activation timing of the parametric control circuit, and a second H gate whose activation timing follows the parametric control circuit;

[0080] The parameter-controlled circuit includes a first controlled circuit, a second controlled circuit, and a third control circuit. The first controlled circuit is used to generate a second matrix based on a second vector, the second controlled circuit is used to generate a third matrix based on a third vector, and the third control circuit is used to generate a first matrix.

[0081] The timing of the third control circuit follows that of the first and second controlled circuits.

[0082] As an example, after a qubit is acted upon by an H-gate, it can become a superposition state. The first and second controlled circuits are affected by the state of the qubit after the H-gate, which corresponds to the interaction relationship of the qubit. After the first and second controlled circuits are acted upon, the qubit can pass through a third control circuit. Since the third control circuit is generated by the first matrix, the third control circuit can act as an auxiliary bit. In this way, after passing through an H-gate, the value of the first calculation circuit can be observed, thereby determining the inner product value.

[0083] In other words, a portion of the qubits in the first computing circuit are used to create superposition states (two superposition states are created, the first being applied before the conditional application of the first controlled gate, and the second being applied after the application of the third control circuit), a portion of the qubits are conditionally applied to the first and second controlled circuits, and auxiliary qubits are applied to the third control circuit. In this way, the inner product value is calculated using the first computing circuit.

[0084] In some embodiments, the second computing circuit includes: a fourth control circuit acting on each qubit and a fifth control circuit acting on each qubit;

[0085] The timing sequence of the fifth control circuit is after that of the fourth control circuit;

[0086] The fourth control circuit is used for generation based on the second matrix, and the fifth control circuit is used for generation based on the third matrix and the conjugate transpose of the third matrix.

[0087] As an example, the second computing circuit can calculate the modulus value.

[0088] In some embodiments, the equation correspondence between the first matrix, the second vector, and the third vector includes: Ax = b;

[0089] Where A can be used to indicate the first matrix, x can be used to indicate the second vector mentioned above, and b can be used to indicate the third vector;

[0090] The ratio between the first expression and the second expression can include:

[0091] in,<b|A|x> The first expression is indicated by ||A|x>||, and the second expression is indicated by ||A|x>||.

[0092] In some embodiments, the inner product expression includes:

[0093]

[0094] Modulus expressions include:

[0095] Where U is used to indicate the second matrix corresponding to the second vector, U(θ)|0>=|x(θ)>; V is used to indicate the third matrix that generates the third vector, V|0>=|b>.

[0096] In a specific implementation, the variable quantum circuit can be constructed first, so that the matrix corresponding to the variable quantum circuit can be determined as the matrix corresponding to the second vector.

[0097] To facilitate understanding, we can continue the explanation using the above embodiments. Assume that the matrix corresponding to ansatz is U(θ), ​​and U(θ)|0>=|x(θ)>; while the generating unitary matrix corresponding to b is V and V|0>=|b>. In this case, U(θ) can be solved as the matrix corresponding to the variable quantum circuit, which transforms the ground state |0> into the solution vector |x(θ)>, and V is the generating unitary matrix corresponding to b, which transforms |0> into the vector |b>.

[0098] As an example, the process of performing tensor derivation on the first expression to obtain the inner product expression can be shown below:

[0099]

[0100] As can be seen, by using tensor formula transformation, the inner product result can be converted into an observable measurement of a quantum circuit, thereby enabling circuit construction and result reading.

[0101] To facilitate understanding of the first circuit corresponding to the inner product expression, we can set... Figure 3 To explain, Figure 3 This can be understood as the equivalent circuit diagram corresponding to the first circuit in the inner product expression. Figure 3 In this circuit, there is a series of H gates (Hadamard gates), measurement gates (M), and the conjugate transpose of the unitary transformation matrix (second matrix) U(θ). And the generation of the unitary matrix (third unitary matrix) V and its conjugate transpose. Regarding the role of |A》.

[0102] |A》 can be used to flatten matrix A into a one-dimensional vector.

[0103] Specifically, in Figure 3 In this circuit, the input qubit is the first qubit in the circuit, typically initialized to the |1> state. The first Hadamard gate acts on the input qubit, converting it into a superposition state.

[0104] Next is the parametric control circuit, where the control U(θ) is a controlled operation, where U(θ) is a parameterized unitary matrix that acts on the second qubit. If the first qubit is |1>, then U(θ) acts on the second qubit.

[0105] Control V can also be a unitary matrix: if the first qubit is |1>, then V acts on the third qubit.

[0106] Auxiliary qubit: The third qubit is initialized to the |A> state. It is an auxiliary qubit used to store information about matrix A.

[0107] Applying the Hadamard gate (H) again: After the control operation, a second Hadamard gate is applied to the first qubit, converting it back into a superposition state.

[0108] Measurement (M): Finally, the first qubit is measured. The probability distribution of the measurement result depends on the value of the inner product.

[0109] As an example, the norm result can be expressed as ||A|x>||. In this case, the tensor derivation and transformation process can be as follows:

[0110]

[0111] In this way, the modulus expression can be obtained, and the second circuit corresponding to the modulus expression can be constructed. To facilitate understanding of the second circuit, it can be combined with... Figure 4 To explain, Figure 4 This can be understood as a possible equivalent schematic diagram of the second circuit. It can be seen that this circuit includes a series of H gates, measurement gates (M), and the conjugate of the unitary transformation matrix (second matrix) U(θ). against Its function.

[0112] It should be understood that the quantum circuits corresponding to the matrix can all be constructed using single quantum rotation gates, which makes it easier to implement the final quantum circuits on quantum chips.

[0113] In some embodiments, the first expression and the second expression can be obtained in the following manner:

[0114] The first matrix is ​​decomposed into a first subunitary matrix and a second subunitary matrix; the first expression is obtained based on the inner product of the first subunitary matrix acting on the second vector and the third vector, and the inner product of the second subunitary matrix acting on the second vector and the third vector; and the second expression is obtained based on the norm of the inverse of the first subunitary matrix and the norm of the second vector acting on the second vector.

[0115] As an example, by using this first matrix approach, the first and second expressions include unitary matrices, which helps to determine the quantum circuit more efficiently and reduces the complexity of the quantum circuit, resulting in a lower overall complexity of the final quantum circuit.

[0116] For ease of understanding, assume there are two unitary matrices U1 and U2 and the target matrix is ​​A = U1 + U2. For any matrix A, there exist two unitary matrices such that A = α(U1 + U2), where α is the scaling factor. Therefore, this method can be used to find the inverse of any matrix.

[0117] At this point, variational circuits can be designed for calculation.<U1x,b> and<U2x,b> Since the objective to be maximized is: in<b|A|x> Then you can use segmented lines to calculate directly.

[0118] and Alternatively, it can be obtained directly using a line.

[0119] Alternatively, the tensor derivation and transformation process, as well as the final expression for the magnitude of the second matrix and vector (the expression for the magnitude after tensor derivation of the second expression), can be understood as follows:

[0120]

[0121] In some embodiments, the second matrix corresponds to parameter θ, wherein parameter θ can be used to indicate the rotation angle of a logic rotary gate in the circuit corresponding to the second matrix. The first and second computing circuits described above generate a quantum circuit, including:

[0122] Adjust the value of parameter θ in the first computing circuit and correspondingly adjust the value of parameter θ in the second computing circuit; determine whether to continue adjusting the value of parameter θ based on the first observation value of the first computing circuit and the second observation value of the second computing circuit after the adjustment is completed; in response to detecting that the adjustment of the value of parameter θ is completed, obtain the quantum circuit based on the current first computing circuit and the second computing circuit.

[0123] Here, when the value of parameter θ is adjusted, the ratio of the first observation to the second observation is at its maximum.

[0124] Can be combined Figure 3 and Figure 4 To explain, Figure 3 and Figure 4 To explain, by continuously changing the parameter θ, the ratio of the first expression to the second expression can be determined. When the value with the largest ratio of the first expression to the second expression is found, it can be determined that the parameter θ has been determined.

[0125] This can also be understood as follows: in the process of generating a quantum circuit based on the inner product expression and the module length expression, the structure of the quantum circuit is first generated based on the inner product expression and the module length expression, and then the parameter θ is continuously updated by the ratio of the first expression and the second expression. This can also be understood as continuously optimizing the quantum circuit, thereby obtaining the final quantum circuit used to solve x in the linear equation system.

[0126] To facilitate understanding of the ideas in this disclosure, the following example illustrates the conceptual process of creating quantum circuits:

[0127] Tensor multiplication of matrices and matrix multiplication have the following tensor formulas: Where |A>> represents tiling matrix A.

[0128] For a system of linear equations Ax = b, the usual goal is to find x = A. -1 b. To ensure the normalization property of the input, we can use the normalized vector of |A>> as the input, thus loading the non-unitary matrix. Then, we can complete the corresponding transformation learning using the tensor multiplication formula.

[0129] Suppose that the matrix corresponding to ansatz is U(θ), ​​where U(θ)|0>=|x(θ)>; and the generating unitary matrix corresponding to b is V, where V|0>=|b>. Then the objective function can be:

[0130]

[0131] The hadamard-test can be used to obtain the corresponding results; it can also perform normalization and scaling on the results using A-vectorization.

[0132] The circuit corresponding to ||A|x> can also be determined based on the following transformation:

[0133]

[0134] That is, once the corresponding first and second expressions are determined, tensor transformation derivation of the first and second expressions can be performed to obtain the inner product expression and the modulus expression, thus completing the construction of the quantum circuit.

[0135] Another approach is to assume there are two unitary matrices U1 and U2, and the target matrix is ​​A = U1 + U2. Then, a variational circuit can be designed to calculate...<U1x,b> and<U2x,b> The goal of maximization can still be: in<b|A|x> You can use segmented lines to calculate directly.<b|A|x> =<b|U1|x> +<b|U2|x> ,That<b|A|x> The corresponding routes are the same as those described above.

[0136] and At this point, it can also be obtained directly using a line.

[0137] For example, it can be like Figure 5 As shown, it illustrates one possible second matrix expression. For the corresponding circuit, the inner product can be calculated by measuring the probability of the circuit being in a completely zero state.

[0138] Continue to combine Figure 6 As shown, Figure 6 It can be understood as a circuit diagram used to implement a specific inner product, by Figure 6 It can be seen that using Figure 6 The circuit shown can achieve a specific inner product, not just the square of the modulus. This circuit can produce negative values; however, its fundamental condition is that it can only calculate the inner product between real vectors. In this case, we can let U1 make... Vector becomes The unitary matrix U2 is such that Vector becomes The unitary matrix, thus enabling the completion of... Figure 6 The circuit shown allows for a simple and efficient determination of the inner product result. For example, the probability of measuring the result of the upper register as 1 is...

[0139] It should be noted that the prerequisite for this approach is that the second vector (x) must be a real vector.

[0140] Figure 7 A schematic diagram of a quantum circuit generation device according to this application is shown. The device 700 includes:

[0141] The conversion unit 701 is used to convert the correspondence between the first matrix, the second vector, and the third vector into a ratio relationship between the first expression and the second expression; wherein the first matrix is ​​used to indicate parameter data, the second vector is used to indicate variable data, and the third vector is used to indicate target result information; the first expression is used to indicate the inner product of the first result and the third vector, and the second expression is used to indicate the norm of the first result; the first result is obtained by applying the first matrix to the second vector, and the ratio of the first expression to the second expression is used to indicate the second vector;

[0142] The generation unit 702 is used to generate the quantum circuit based on the first expression and the second expression, wherein the quantum circuit is used to determine the second vector.

[0143] In some embodiments, the generation unit 702 is further configured to: perform tensor derivation transformation on the first expression to obtain an inner product expression, and perform tensor derivation transformation on the second expression to obtain a modulus expression; generate a first computing circuit based on the inner product expression, and generate a second computing circuit based on the modulus expression; and generate the quantum circuit based on the first computing circuit and the second computing circuit.

[0144] In some embodiments, the first computing circuit described above includes: at least two H gates and a parameterized control circuit;

[0145] The above-mentioned at least two H gates include a first H gate whose activation timing precedes the activation timing of the parameterized control circuit, and a second H gate whose activation timing follows the parameterized control circuit;

[0146] The aforementioned parameter-controlled circuit includes a first controlled circuit, a second controlled circuit, and a third control circuit, wherein the first controlled circuit is used to generate a second matrix based on the second vector, the second controlled circuit is used to generate a third matrix based on the third vector, and the third control circuit is used to generate a first matrix.

[0147] The timing sequence of the third control circuit described above is after the timing sequence of the first controlled circuit and the second controlled circuit described above.

[0148] In some embodiments, the second computing circuit includes: a fourth control circuit acting on each qubit and a fifth control circuit acting on each qubit.

[0149] The timing sequence of the fifth control circuit described above is after that of the fourth control circuit described above;

[0150] The fourth control circuit is used to generate based on the second matrix, and the fifth control circuit is used to generate based on the third matrix and the conjugate transpose of the third matrix.

[0151] In some embodiments, the correspondence between the first matrix, the second vector, and the third vector includes: Ax = b;

[0152] Wherein, A is used to indicate the first matrix, x is used to indicate the second vector, and b is used to indicate the third vector;

[0153] The ratio relationship between the first expression and the second expression mentioned above includes:

[0154] Among them, the above<b|A|x> The above ||A|x>|| is used to indicate the first expression, and the above ||A|x>|| is used to indicate the second expression.

[0155] In some embodiments, the above inner product expression includes:

[0156]

[0157] The above modulus expression includes:

[0158] Wherein, U is used to indicate the second matrix corresponding to the second vector, U(θ)|0>=|x(θ)>; the above V is used to indicate the third matrix that generates the above third vector, V|0>=|b>.

[0159] In some embodiments, the second matrix corresponds to parameter θ, wherein the parameter θ is used to indicate the rotation angle of the logic rotating gate in the circuit corresponding to the second matrix; and the generation unit 702 is further configured to: adjust the value of parameter θ in the first controlled circuit, and correspondingly adjust the value of parameter θ in the fourth controlled circuit; determine whether to continue adjusting the value of parameter θ based on the first observation value of the first computing circuit and the second observation value of the second computing circuit; in response to detecting that the value of parameter θ has been adjusted, obtain the quantum circuit based on the current first computing circuit and the second computing circuit; wherein, when the value of parameter θ has been adjusted, the ratio of the first observation value to the second observation value is a maximum value.

[0160] In some embodiments, the apparatus 700 is further configured to: decompose the first matrix into a first subunitary matrix and a second subunitary matrix; obtain the first expression based on the inner product of the result of the first subunitary matrix acting on the second vector and the third vector, and the inner product of the result of the second subunitary matrix acting on the second vector and the third vector; and obtain the second expression based on the norm of the inverse of the first subunitary matrix and the result of the second subunitary matrix acting on the second vector.

[0161] Figure 8 A schematic diagram of the structure of a computer device provided in one embodiment of this application is shown, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the functions of the computer system of the quantum circuit generation method in any of the above embodiments.

[0162] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a computer, causes the computer to perform the functions of a computer system for generating quantum circuits in any of the above embodiments.

[0163] This application also provides a computer program product containing instructions that, when executed by a computer, cause the computer to perform the functions of the computer system of the quantum circuit generation method in any of the above embodiments.

[0164] It is understood that the specific examples in this application are only intended to help those skilled in the art better understand the implementation methods of this application, and are not intended to limit the scope of the invention.

[0165] It is understood that in the various embodiments of this application, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not limit the implementation process of the embodiments of this application in any way.

[0166] It is understood that the various implementation methods described in this application can be implemented individually or in combination, and the implementation methods in this application are not limited in this respect.

[0167] Unless otherwise stated, all technical and scientific terms used in the embodiments of this application have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this application includes any and all combinations of one or more of the associated listed items. The singular forms "a," "the," and "the" as used in the embodiments of this application and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise.

[0168] It is understood that the processor in the embodiments of this application can be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method embodiments can be completed by the integrated logic circuits in the processor's hardware or by instructions in software form. The processor can be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. This storage medium is located in memory; the processor reads information from the memory and, in conjunction with its hardware, completes the steps of the above method.

[0169] It is understood that the memory in the embodiments of this application may be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Specifically, non-volatile memory may be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory may be random access memory (RAM). It should be noted that the memory in the systems and methods described herein is intended to include, but is not limited to, these and any other suitable types of memory.

[0170] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0171] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the aforementioned method implementations, and will not be repeated here.

[0172] In the several embodiments provided in this application, it should be understood that the disclosed systems, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0173] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment, depending on actual needs.

[0174] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0175] If a function is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0176] The above are merely specific embodiments of this application, but the scope of protection of this invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this invention should be determined by the scope of the claims.

Claims

1. A method for generating a quantum circuit, characterized in that, include: The correspondence between the first matrix, the second vector, and the third vector is converted into a ratio relationship between the first expression and the second expression; wherein, the first matrix is ​​used to indicate parameter data, the second vector is used to indicate variable data, and the third vector is used to indicate target result information; the first expression is used to indicate the inner product of the first result and the third vector, and the second expression is used to indicate the norm of the first result; the first result is obtained by applying the first matrix to the second vector, and the ratio of the first expression to the second expression is used to indicate the second vector; A quantum circuit is generated based on the first expression and the second expression, wherein the quantum circuit is used to determine the second vector.

2. The method according to claim 1, characterized in that, The generation of quantum circuits based on the first expression and the second expression includes: The first expression is subjected to tensor derivation transformation to obtain the inner product expression, and the second expression is subjected to tensor derivation transformation to obtain the modulus expression; Based on the inner product expression, a first computing circuit is generated, and based on the modulus expression, a second computing circuit is generated. The quantum circuit is generated based on the first computing circuit and the second computing circuit.

3. The method according to claim 2, characterized in that, The first computing circuit includes: at least two H gates and a parameterized control circuit; The at least two H gates include a first H gate whose activation timing precedes that of the parameterized control circuit, and a second H gate whose activation timing follows that of the parameterized control circuit. The parameterized control circuit includes a first controlled circuit, a second controlled circuit, and a third control circuit, wherein the first controlled circuit is used to generate a second matrix based on the second vector, the second controlled circuit is used to generate a third matrix based on the third vector, and the third control circuit is used to generate a third matrix based on the first matrix. The timing of the third control circuit is after that of the first controlled circuit and the second controlled circuit.

4. The method according to claim 3, characterized in that, The second computing circuit includes: a fourth control circuit acting on each quantum bit and a fifth control circuit acting on each quantum bit; The timing sequence of the fifth control circuit is after that of the fourth control circuit. The fourth control circuit is used to generate based on the second matrix, and the fifth control circuit is used to generate based on the third matrix and the conjugate transpose of the third matrix.

5. The method according to claim 2, characterized in that, The equations corresponding to the first matrix, the second vector, and the third vector include: Ax = b; Wherein, A is used to indicate the first matrix, x is used to indicate the second vector, and b is used to indicate the third vector; The ratio between the first expression and the second expression includes: Among them, the<b|A|x> The ||A|x>|| is used to indicate the first expression, and the ||A|x>|| is used to indicate the second expression; And, the inner product expression includes: The modulus expression includes: Wherein, U is used to indicate the second matrix corresponding to the second vector, U(θ)|0>=|x(θ)>; and V is used to indicate the third matrix that generates the third vector, V|0>=|b>.

6. The method according to claim 4, characterized in that, The second matrix corresponds to parameter θ, wherein parameter θ is used to indicate the rotation angle of the logic rotation gate in the circuit corresponding to the second matrix; and the generation of the quantum circuit based on the first computing circuit and the second computing circuit includes: Adjust the value of parameter θ in the first controlled circuit, and correspondingly adjust the value of parameter θ in the fourth controlled circuit; Based on the first observation value of the first computing circuit and the second observation value of the second computing circuit, determine whether to continue adjusting the value of the parameter θ; In response to the detection that the value of the parameter θ has been adjusted, the quantum circuit is obtained according to the current first computing circuit and the second computing circuit; wherein, when the value of the parameter θ has been adjusted, the ratio of the first observation value to the second observation value is at its maximum value.

7. The method according to claim 1, characterized in that, The first and second expressions are obtained as follows: Decompose the first matrix into a first subunitary matrix and a second subunitary matrix; The first expression is obtained based on the inner product of the result of the first subunitary matrix acting on the second vector and the third vector, and the inner product of the result of the second subunitary matrix acting on the second vector and the third vector. The second expression is obtained based on the norm of the result of the inverse of the first subunitary matrix and the second subunitary matrix acting on the second vector.

8. A device for generating quantum circuits, characterized in that, include: A conversion unit is used to convert the correspondence between the first matrix, the second vector, and the third vector into a ratio relationship between the first expression and the second expression; wherein, the first matrix is ​​used to indicate parameter data, the second vector is used to indicate variable data, and the third vector is used to indicate target result information; the first expression is used to indicate the inner product of the first result and the third vector, and the second expression is used to indicate the norm of the first result; the first result is obtained by applying the first matrix to the second vector, and the ratio of the first expression to the second expression is used to indicate the second vector; A generation unit is configured to generate a quantum circuit based on the first expression and the second expression, wherein the quantum circuit is used to determine the second vector.

9. An electronic device, characterized in that, include: Processor and memory; The processor is connected to a memory, wherein the memory is used to store a computer program, and the processor is used to invoke the computer program to perform the method as described in any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program, the computer program including program instructions that, when executed by a processor, perform the method as described in any one of claims 1-7.

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