High reflectivity micro light emitting diode and micro light emitting diode chip

Abstract

This invention discloses a high-reflectivity micro light-emitting diode and a type light-emitting diode chip, which adds a reflective layer to the existing micro light-emitting diode, thereby increasing the reflectivity of light emitted from below the light-emitting platform, increasing the light emitted from the front of the pixel, and improving the light extraction efficiency of the light-emitting platform, thereby effectively improving the brightness or light efficiency of the micro light-emitting diode chip.

Description

Technical Field

[0001] This invention relates to the field of light-emitting diode technology, and in particular to a high-reflectivity miniature light-emitting diode and a miniature light-emitting diode chip. Background Technology

[0002] A micro light-emitting diode (LED) microdisplay chip is a new type of LED structure obtained by thinning, miniaturizing, and arraying the original LED structure. It integrates arrayed micron-sized LED units on an active addressable driver panel to realize the lighting and individual control of the LED units, thereby outputting the desired display image.

[0003] The LED unit, also known as the epitaxial layer EP I, is typically bonded to the active addressing driver panel via a bonding layer. In existing micro LED chips, such as... Figure 1 As shown, the bonding layer is typically made of AuSn alloy. Furthermore, to prevent the AuSn alloy from diffusing during the melting process, a barrier layer such as Ti / Pt can be provided, while a metal with good adhesion, such as Cr, can be used as the initial layer to increase the adhesion between the EPI and the metal layer of the active addressing drive panel.

[0004] The core structure of a miniature light-emitting diode (LED) is a PN junction diode, which is made of a direct bandgap semiconductor material. When a forward bias voltage is applied to the upper and lower electrodes of the miniature LED, causing current to flow, electrons and holes recombine in the active region, simultaneously emitting monochromatic photons. Since these photons are emitted in all directions, to improve the light extraction efficiency of the miniature LED, the light should be emitted from the front of the PN junction diode as much as possible. To this end, on the one hand, structures such as microlenses can be set in the optical path to converge and collimate the light; on the other hand, appropriate structures can be used to reflect the light emitted from below the PN junction diode, ultimately causing it to exit from the front of the PN junction diode. Summary of the Invention

[0005] To address some or all of the problems of the prior art, the first aspect of the present invention provides a high-reflectivity micro light-emitting diode, comprising:

[0006] A light-emitting platform, which can be used to emit light; and

[0007] A reflective layer is disposed below the light-emitting platform to reflect the light emitted by the light-emitting platform.

[0008] Furthermore, the reflective layer is made of metal, and the reflectivity of the metal is not less than 60% in each of the red, green and blue bands.

[0009] Furthermore, the material of the reflective layer is a metal or alloy such as Au, Sn, Al, Ag, Cu, or Rh.

[0010] Furthermore, the thickness of the reflective layer is 20 to 500 nm.

[0011] Furthermore, the high-reflectivity micro-light-emitting diode also includes a bonding layer.

[0012] Furthermore, the material of the bonding layer is PbSn, AuSn, CuSn, AuSi alloy, etc.

[0013] Furthermore, the high-reflectivity micro-light-emitting diode also includes a blocking layer, wherein the blocking layer is disposed between the bonding layer and the reflective layer.

[0014] Furthermore, the material of the barrier layer is Ti or Pt or an alloy thereof.

[0015] Furthermore, the high-reflectivity micro-light-emitting diode also includes an adhesive layer, wherein the adhesive layer is disposed on the surface of the reflective layer.

[0016] Furthermore, the material of the adhesive layer is a metal with good adhesion, such as Cr, Ni, or Ti.

[0017] Furthermore, the thickness of the adhesive layer is less than the thickness of the barrier layer, and the thickness of the barrier layer is less than the thickness of the bonding layer.

[0018] Furthermore, the thickness of the adhesive layer is 0.5 to 50 nm, the thickness of the barrier layer is 50 to 1000 nm, and the thickness of the bonding layer is 50 to 1000 nm.

[0019] Based on the high-reflectivity micro light-emitting diodes as described above, a second aspect of the present invention provides a micro light-emitting diode chip, which includes a micro light-emitting diode array bonded to a driving backplane, wherein the micro light-emitting diode array includes a plurality of high-reflectivity micro light-emitting diodes as described above.

[0020] Furthermore, the micro-LED array includes a continuous top conductive layer disposed above the micro-LED array and contacting and covering the top of each light-emitting platform.

[0021] Furthermore, a metal layer is provided on the surface of the driving backplane, and a plurality of IC copper pillars are provided on the driving backplane. The IC copper pillars are electrically connected to the metal layer, and each light-emitting mesa of the micro LED array area corresponds to one IC copper pillar.

[0022] Furthermore, the material of the metal layer is one or more alloys of the following metals: Ni, Al, Ti, Ni, Pt, Au.

[0023] Furthermore, a second electrode is provided between adjacent light-emitting platforms.

[0024] Furthermore, the second electrode is a ring-shaped reflective electrode, which is disposed around the semiconductor light-emitting platform.

[0025] Furthermore, the second electrode between adjacent light-emitting mesa has at least two peaks.

[0026] Furthermore, the second electrodes are interconnected.

[0027] Furthermore, the light-emitting mesa sequentially includes a first epitaxial layer, a light-emitting layer, and a second epitaxial layer.

[0028] Furthermore, the material of the second epitaxial layer is a material layer of the second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of the first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first conductivity type is different from the second conductivity type.

[0029] Furthermore, the light-emitting layer includes a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

[0030] Furthermore, an electron blocking layer is provided on the first side of the light-emitting layer, where the first side refers to the side along which electrons migrate out of the light-emitting layer.

[0031] Furthermore, the light-emitting layer is at least partially transparent to allow light reflected by the reflective layer to leave the light-emitting diode chip.

[0032] Furthermore, the micro LED chip also includes at least one first electrode, which is electrically connected to the IC copper pillar.

[0033] Furthermore, the polarity of the first electrode is opposite to that of the second electrode.

[0034] Furthermore, the micro LED chip also includes:

[0035] A passivation barrier layer covers the surface of the light-emitting platform, but exposes at least a portion of the second epitaxial layer.

[0036] Furthermore, the material of the passivation barrier layer is a SiO2 film or an Al2O3 film.

[0037] Furthermore, the passivation barrier layer is at least partially transparent to allow light reflected by the reflective layer to leave the LED chip.

[0038] Furthermore, the micro-light-emitting diode chip also includes a microlens array, which is located above the micro-light-emitting diode array area and includes multiple microlenses, wherein at least one microlens is disposed on the surface of the conductive layer on top of the micro-light-emitting diode.

[0039] Furthermore, the microlens has an air gap inside.

[0040] Furthermore, there are gaps between adjacent micro-projection lenses, but they are at least partially connected.

[0041] The present invention provides a high reflectivity micro light-emitting diode, which adds a reflective layer to the existing micro light-emitting diode, thereby increasing the reflectivity of light emitted from below the light-emitting platform, increasing the light emitted from the front of the pixel, and improving the light extraction efficiency of the light-emitting platform, thereby effectively improving the brightness or light efficiency of the micro light-emitting diode chip. Attached Figure Description

[0042] To further illustrate the above and other advantages and features of the various embodiments of the present invention, a more specific description of the various embodiments of the present invention will be presented with reference to the accompanying drawings. It is to be understood that these drawings depict only typical embodiments of the invention and are therefore not intended to limit its scope. In the drawings, identical or corresponding parts will be indicated by identical or similar reference numerals for clarity.

[0043] Figure 1 This diagram illustrates the structure of a high-reflectivity micro light-emitting diode in the prior art.

[0044] Figure 2 This diagram illustrates the structure of a high-reflectivity micro light-emitting diode according to an embodiment of the present invention.

[0045] Figure 3 This diagram illustrates the structure of a miniature light-emitting diode chip according to an embodiment of the present invention.

[0046] Figures 4A to 4D A schematic diagram showing a partial topography of a micro light-emitting diode chip according to different embodiments of the present invention;

[0047] Figure 5 A schematic flowchart illustrating a method for manufacturing a miniature light-emitting diode chip according to an embodiment of the present invention; and

[0048] Figure 6A-6I The chip state is shown after each step of the method for manufacturing a miniature light-emitting diode chip according to the present invention has been performed. Detailed Implementation

[0049] In the following description, the invention is described with reference to various embodiments. However, those skilled in the art will recognize that the embodiments may be practiced without one or more specific details or with other alternatives and / or additional methods, materials, or components. In other instances, well-known structures, materials, or operations are not shown or described in detail so as not to obscure the inventive points of the invention. Similarly, for illustrative purposes, specific quantities, materials, and configurations are set forth to provide a comprehensive understanding of embodiments of the invention. However, the invention is not limited to these specific details. Furthermore, it should be understood that the embodiments shown in the drawings are illustrative representations and are not necessarily drawn to scale.

[0050] In this specification, references to "an embodiment" or "this embodiment" mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment of the invention. The phrase "in one embodiment" appearing throughout this specification does not necessarily refer to the same embodiment in all instances.

[0051] It should be noted that the embodiments of the present invention describe the process steps in a specific order; however, this is only for illustrating the specific embodiment and not to limit the order of the steps. On the contrary, in different embodiments of the present invention, the order of the steps can be adjusted according to the process.

[0052] In this invention, "arranged below the light-emitting platform" means arranged on the side of the light-emitting platform facing away from the microlens (light-emitting side). "Arranged above the light-emitting platform" means arranged on the side of the light-emitting platform facing the microlens (light-emitting side).

[0053] In micro LED chips, the epitaxial layer EP I is typically bonded to the driver backplane IC via an AuSn alloy. Since metals like Au and Sn have high reflectivity, the bonding layer also reflects light, thereby increasing the light extraction efficiency of the LED. However, in practical applications, a barrier layer is often placed on the surface of the bonding layer to prevent diffusion during alloy melting. This barrier layer is typically made of metals like Ti and Pt, which have relatively low reflectivity, thus reducing the light extraction efficiency of the LED to some extent. To address this issue, this invention further incorporates a reflective layer on the surface of the existing barrier layer. This reflective layer is made of metals with high reflectivity, such as Au or Sn, which effectively increases the reflectivity of light emitted from below the multi-quantum-well (MQW), increasing the amount of light emitted from the front of the pixel and further improving the light extraction efficiency of the micro LED chip.

[0054] A miniature light-emitting diode (LED) chip includes an integrated circuit (IC) backplane and an array of miniature LEDs. The miniature LED array comprises multiple miniature LEDs. Each miniature LED can form at least a portion of a pixel element on the miniature LED chip.

[0055] In embodiments of the present invention, the size of each micro-LED chip is no more than 1 cm, preferably no more than 20 micrometers. The micro-LED structures are formed in an array within the micro-LED chips, with resolutions such as 720*480, 640*480, 1920*1080, 1280*720, 2K, or 4K. The diameter of the micro-LED structures is in the nanometer range, for example, from 20 nm to 100 nm.

[0056] In some embodiments of the present invention, an integrated circuit (IC) backplane may be electrically connected to each micro-light-emitting diode in a micro-light-emitting diode array via separate metal interconnects. In some embodiments, each micro-light-emitting diode may be electrically controlled individually by the IC backplane. In some embodiments, the IC backplane may be electrically connected to the electrodes of the micro-light-emitting diode chip via metal interconnects. In some embodiments, a dielectric layer may be formed in the gaps between the micro-light-emitting diodes. In some embodiments, a dielectric layer may also be formed in the gaps between interconnects.

[0057] In some embodiments of the present invention, each micro-LED in the micro-LED array may include a micrometer-scale light-emitting mesa structure. In some embodiments, the light-emitting mesa structure may include, from bottom to top, a first type epitaxial layer, a light-emitting layer, and a second type epitaxial layer. That is, in the three-layer structure, the first type epitaxial layer is closest to the IC backplane; the light-emitting layer is located above the first type epitaxial layer and further away from the IC backplane; the second type epitaxial layer is located above the light-emitting layer and furthest away from the IC backplane. In some embodiments, the light-emitting layer is formed by multiple stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In some embodiments, the first type epitaxial layer is a semiconductor material having a first conductivity type and includes multiple semiconductor layers. The main substrate material of the first type epitaxial layer may be, but is not limited to, Ga, N, As, P, In and includes, but is not limited to, waveguide layers, confinement layers, transition layers, and window layers; in addition, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary matrix material of the second type of epitaxial layer may be, but is not limited to, composed of at least two or more elements selected from Ga, N, As, P, In, and Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in some embodiments, an ohmic contact layer may be formed on the confinement layer.

[0058] In some embodiments, a top conductive layer may be formed on the top surface of the micro-LED array. In some embodiments, the top conductive layer may be shared by all micro-LEDs in the micro-LED array. In some embodiments, the light-emitting layer may include at least one quantum well layer. In some embodiments, the micro-LED array may include a single-layer micro-LED structure. In some embodiments, the micro-LED array may include a multi-layer vertically stacked micro-LED structure.

[0059] In some embodiments, the micro-LED array may include blue micro-LEDs. In some embodiments, the spacing between the micro-LED arrays, i.e., the minimum center-to-center distance between the micro-LEDs, may be between about 2 micrometers and about 50 micrometers. In some embodiments, the number of pixels on the micro-LED chip may be between thousands and millions.

[0060] The technical solution of the present invention will be further described below with reference to the accompanying drawings of the embodiments.

[0061] Figure 2 A schematic diagram of a high-reflectivity micro light-emitting diode according to an embodiment of the present invention is shown. Figure 2As shown, compared to existing micro-light-emitting diodes, the high-reflectivity micro-light-emitting diode of the present invention adds a reflective layer 203 to its bottom stack. Specifically, the bottom stack of the high-reflectivity micro-light-emitting diode sequentially includes a bonding layer 201, a barrier layer 202, a reflective layer 203, and an adhesive layer 204. The bonding layer 201 is made of materials such as PbSn, AuSn, CuSn, and AuSi alloys; the barrier layer 202 is made of metals such as Ti and Pt to prevent diffusion of the alloy during the bonding process; and the adhesive layer 204 is made of metals with good adhesion such as Cr, Ni, and Ti to increase the adhesion between the epitaxial layer and the IC metal layer. In one embodiment of the present invention, the reflective layer 203 is made of a metal with high reflectivity. Preferably, the reflectivity of the metal in all red, green, and blue bands is not less than 60%, such as Au, Sn, Al, Ag, Cu, Rh, or their alloys. Adding highly reflective metals such as Au or Sn to high-reflectivity micro LEDs can improve the reflectivity of light emitted from below a multi-quantum-well (MQW). For example... Figure 2 As shown, the light reflected from the reflective layer can be refracted out from the passivation barrier layer covering the side of the light-emitting platform, or it can penetrate the light-emitting platform and exit from the top of the light-emitting platform.

[0062] In one embodiment of the present invention, the thickness of the adhesive layer is less than the thickness of the barrier layer, and the thickness of the barrier layer is less than the thickness of the bonding layer. In another embodiment of the present invention, the thickness of the adhesive layer is 0.5 to 50 nm, the thickness of the barrier layer is 50 to 1000 nm, and the thickness of the bonding layer is 50 to 1000 nm. In another embodiment of the present invention, the thickness of the reflective layer is 20 to 500 nm.

[0063] Based on the high-reflectivity micro light-emitting diodes described above Figure 3 A schematic diagram of a micro light-emitting diode chip according to an embodiment of the present invention is shown. Figure 3 As shown, the micro light-emitting diode chip 300 according to the present invention includes a micro light-emitting diode array, the micro light-emitting diode array including a plurality of high-reflectivity micro light-emitting diodes 302 as described above, the micro light-emitting diode array being bonded to the driving backplane 301 by bottom stacking as described above.

[0064] like Figure 3 As shown, the high-reflectivity micro-light-emitting diode 302 is disposed on the surface of the driving backplate 301, and from bottom to top includes a bonding layer 321, a barrier layer 322, a reflective layer 323, and an adhesive layer 324. The micro-light-emitting diode array is disposed on the surface of the adhesive layer 324.

[0065] In one embodiment of the present invention, the micro-light-emitting diode array includes a plurality of light-emitting mesa 303 and a continuous top conductive layer 305. The continuous top conductive layer 305 is disposed above the micro-light-emitting diode array and contacts and covers the top of each light-emitting mesa 303, making electrical contact with the second epitaxial layer of the light-emitting mesa, so as to connect the second epitaxial layers of each semiconductor light-emitting mesa 303 in series. It is a transparent conductive layer. In one embodiment of the present invention, the light-emitting mesa 303 can be arranged in a regular or irregular manner on the driving panel 301, serving as pixels of the micro-light-emitting diode chip.

[0066] like Figure 3 As shown, there are gaps between the pixels formed by the various semiconductor light-emitting mesa 303, and a second electrode 306 is disposed at each gap, and the second electrode 306 is disposed on the surface of the continuous top conductive layer 305. In one embodiment of the present invention, the second electrode 306 is a ring-shaped reflective electrode, disposed around the light-emitting mesa 303, and is formed by magnetron sputtering or vapor deposition. Its material can be, for example, Al or Al alloy metal for the sidewall reflective mirrors, and the electrode stack metal can be Ni, Al, Ti, Ni, Pt, Au, or other metal materials. In one embodiment of the present invention, the second electrodes are interconnected.

[0067] Figures 4A to 4D Schematic diagrams showing partial topographic features of micro light-emitting diode chips according to different embodiments of the present invention are shown. Figure 4A and 4C As shown, in some embodiments of the present invention, a deep trench is provided at the partition between two adjacent light-emitting mesa 303. The deep trench penetrates the micro-light-emitting diode array; specifically, it penetrates the bottom stack of the partition, and the second electrode 306 is disposed at the deep trench. As shown, in one embodiment of the present invention, the second electrode between adjacent light-emitting mesa has at least two peaks. Figure 4B and 4D As shown, in some embodiments of the present invention, deep trenches are not provided at the interval between two adjacent light-emitting mesa 303, but a passivation isolation layer and a continuous top conductive layer are directly formed. Therefore, the surface of the continuous top conductive layer between two adjacent light-emitting mesa 303 is a horizontal or substantially horizontal plane. The second electrode is formed here, and its morphological interface is trapezoidal or approximately trapezoidal. The surface of the second electrode is not higher than the highest point of the continuous top conductive layer.

[0068] In one embodiment of the present invention, as shown in the figure, the semiconductor light-emitting mesa 303 includes a first epitaxial layer 331, a light-emitting layer 332, and a second epitaxial layer 333 deposited sequentially. In one embodiment of the present invention, the light-emitting mesa of each micro-LED in the micro-LED array can be a micrometer-scale light-emitting mesa. In one embodiment of the present invention, the micrometer-scale light-emitting mesa may include, from bottom to top, a first type epitaxial layer, a light-emitting layer, and a second type epitaxial layer. That is, in the three-layer structure, the first type epitaxial layer is closest to the driving backplane; the light-emitting layer is located above the first type epitaxial layer and further away from the driving backplane; the second type epitaxial layer is located above the light-emitting layer and furthest away from the driving backplane. In one embodiment of the present invention, the light-emitting layer is formed by multiple stacked quantum well layers, particularly superlattice stacked quantum well layers. Preferably, the superlattice stacked quantum well layers include multiple pairs of quantum well layers stacked with quantum barrier layers. In one embodiment of the present invention, the first type epitaxial layer is a semiconductor material having a first conductivity type and includes multiple semiconductor layers. The primary substrate material of the first type of light-emitting mesa may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the first type of epitaxial layer may, from top to bottom, include, but is not limited to, a waveguide layer, a confinement layer, a transition layer, and a window layer; additionally, an ohmic contact layer may be formed below the window layer. In some embodiments, the second type of epitaxial layer is a semiconductor material having a second conductivity type and includes multiple semiconductor layers. The primary substrate material of the second type of epitaxial layer may be, but is not limited to, materials such as Ga, N, As, P, In, or Al. Furthermore, the second type of epitaxial layer may, from top to bottom, include, but is not limited to, a confinement layer and a waveguide layer; additionally, in one embodiment of the invention, an ohmic contact layer may be formed on the confinement layer. In one embodiment of the invention, the first conductivity type is different from the second conductivity type.

[0069] In one embodiment of the present invention, the first epitaxial layer is an N-type GaN layer or an N-type Al GaN layer, and the second epitaxial layer is a P-type GaN layer or a P-type Al GaN layer. That is, the material of the second epitaxial layer can be a material layer of a second conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P, and the first epitaxial layer can be a material layer of a first conductivity type comprising at least two or more elements of Ga, N, As, Al, In, and P. The multiple quantum well layer is an InGaN / GaN multiple quantum well layer, an InGaN / Al GaN multiple quantum well layer, or an InGaAs / Al GaAs multiple quantum well layer. The electron blocking device is disposed on a first side of the light-emitting layer, where the first side refers to the side along which electrons migrate out of the light-emitting layer. In another embodiment of the present invention, the first epitaxial layer can also be a P-type GaN layer or a P-type Al GaN layer, and the second epitaxial layer is an N-type GaN layer or an N-type Al GaN layer. As shown in the figure, the semiconductor light-emitting mesa 303 is stepped. Figure 4A and 4C ) or trapezoidal ( Figure 4B and 4D In one embodiment of the invention, the light-emitting layer is at least partially transparent to allow light reflected by the reflective layer to leave the light-emitting diode chip.

[0070] In one embodiment of the invention, the light-emitting layer includes at least one quantum well layer. The thickness of the quantum well layer is between 20 nm and 40 nm, for example, 30 nm. In some embodiments, the material of the quantum well layer is GaInP / (Al). x Ga 1-x ) y In 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the light-emitting layer is a multiple quantum well (MQW).

[0071] In embodiments of the present invention, one of the first type epitaxial layer and the second type epitaxial layer is an N-type semiconductor layer, and the other is a P-type semiconductor layer. In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer. The doped N-type contact layer is configured to be bonded to a bonding layer, and the N-type cladding layer is formed on the doped N-type contact layer. The material of the N-type cladding layer is Al. x I n 1-x P, where x ranges from 0.1 to 0.5, for example, x is 0.5. Furthermore, in these embodiments, the thickness of the N-type cladding layer is no greater than 350 nm, for example, the thickness of the N-type cladding layer is 320 nm. The doping concentration of the N-type cladding layer is 5e⁻¹.17 cm -3 up to 1e 18 cm -3 In some embodiments, the N-type semiconductor layer further includes a doped N-type contact layer and an N-type cladding layer formed on the doped N-type contact layer. The doped N-type contact layer is configured to be bonded to the bonding layer. The material of the doped N-type contact layer is GaAs. In some embodiments, the thickness of the doped N-type contact layer is 10 nm to 30 nm. In some embodiments, the doping concentration of the doped N-type contact layer is 2e⁻¹. 18 cm -3 up to 1e 19 cm -3 In some embodiments, the N-type semiconductor layer further includes an N-type spacer layer formed on the N-type cladding layer. The material of the N-type spacer layer is (Al). x Ga 1-x ) y I n 1-y P, where x ranges from 0.5 to 0.9 and y ranges from 0.1 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. The thickness of the N-type spacer layer is 50 nm to 75 nm, for example, 65 nm. In some embodiments, the P-type semiconductor layer includes a P-type cladding layer and a doped P-type contact layer. The P-type cladding layer is formed on the light-emitting layer, and the doped P-type contact layer is formed on the P-type cladding layer.

[0072] In some embodiments, the material of the P-type coating is Al. x I n 1-x P, where x is 0.3 to 0.5, for example, x is 0.5. In such an embodiment, the thickness of the P-type coating is no greater than 380 nm, for example, the thickness of the P-type coating is 360 nm.

[0073] In some embodiments, the material of the doped P-type contact layer is GaAs. The thickness of the doped P-type contact layer is 10 nm to 30 nm, for example, 20 nm.

[0074] In some embodiments, the P-type semiconductor layer further includes a P-type spacer layer formed under the P-type cladding layer, a first-doped P-type transition layer formed on the P-type cladding layer, and a second-doped P-type transition layer formed on the first-doped P-type transition layer. In some embodiments, the material of the P-type spacer layer is (Al). x Ga 1-x ) y I n 1-yP, where x ranges from 0.5 to 0.9 and y ranges from 0.3 to 0.5. For example, x is 0.8 and y is 0.5. In some embodiments, the relationship between x and y is that x is 1 to 2 times y. In some embodiments, the thickness of the P-type spacer layer is 50 nm to 70 nm, for example, 65 nm.

[0075] In some embodiments, the material of the first doped P-type transition layer is (Al) x Ga 1-x ) y I n 1-y P, where x ranges from 0.1 to 0.3 and y ranges from 0.3 to 0.5. For example, x is 0.17 and y is 0.5. In some embodiments, the relationship between x and y is that y is 1 to 5 times x. In some embodiments, the thickness of the first doped P-type transition layer is 20 nm to 40 nm, for example, 30 nm.

[0076] In some embodiments, the material of the second doped P-type transition layer is Al. x Ga 1-x As, where x ranges from 0.5 to 0.9, for example, x is 0.6. In some embodiments, the thickness of the second doped P-type transition layer is from 10 nm to 30 nm, for example, 20 nm.

[0077] In some embodiments, the doping concentration of the second-doped P-type transition layer is greater than the doping density of the first-doped P-type transition layer. The doping concentration of the doped P-type contact layer is 1 to 10 times that of the second-doped P-type transition layer.

[0078] In some embodiments, the doping concentration of the doped P-type contact layer is greater than the doping concentration of the second-doped P-type transition layer. Furthermore, in some embodiments, the doping concentration of the second-doped P-type transition layer is 2 to 4 times that of the first-doped P-type transition layer.

[0079] For example, the doping concentration of the first doped P-type transition layer is greater than 1e. 18 cm -3 The doping density of the second-doped P-type transition layer is 2e 18 cm -3 -4e 18 cm -3 Within the range, the doping density of the doped P-type contact layer is greater than 5e 18 cm -3 .

[0080] As shown in the figure, in one embodiment of the present invention, the micro light-emitting diode chip further includes a passivation barrier layer 304. The passivation barrier layer 304 covers the surface and side surfaces of the semiconductor light-emitting mesa 303, but exposes at least a portion of the surface of the second epitaxial layer 334. The top conductive layer 305 is disposed on the surface of the passivation barrier layer 304. In one embodiment of the present invention, the passivation barrier layer 304 can be formed by CVD deposition of SiO2 or ALD deposition of Al2O3 film to effectively reduce the chip leakage rate. Simultaneously, the passivation barrier layer 304 is at least partially transparent, allowing light emitted by the reflective layer to exit the light-emitting diode chip from the passivation barrier layer. Figure 4A and 4B As shown, in some embodiments of the present invention, the passivation barrier layer only covers the side surface of the light-emitting platform, but not the top surface, and the highest point of the passivation barrier layer is flush with the top surface of the light-emitting platform. In these embodiments, the continuous top conductive layer covering the top of the light-emitting platform is horizontal or substantially horizontal. And as... Figure 4C and 4D As shown, in some embodiments of the present invention, the passivation barrier layer not only covers the side surface of the light-emitting platform, but also covers the top edge of the light-emitting platform, and thus has a protrusion at the top edge of the light-emitting platform, so that the continuous top conductive layer 305 covering it also forms a protrusion at the top edge of the light-emitting platform.

[0081] In one embodiment of the present invention, the driving backplane 301 includes a substrate, a driving circuit, and IC copper pillars 311 connected to the driving circuit, and the micro-light-emitting diode array is electrically connected to the IC copper pillars 311. The substrate may be a transparent substrate, such as a glass substrate. Examples of other substrates include GaAs, GaP, InP, SiC, ZnO, and sapphire substrates. In some embodiments, the substrate is approximately 700 micrometers thick. The driving circuit includes, for example, a complementary metal-oxide-semiconductor (CMOS) device or a TFT device. As shown, the IC copper pillars 311 include a first IC copper pillar and a second IC copper pillar, wherein the first IC copper pillar is electrically connected to a first epitaxial layer of the semiconductor light-emitting module, and the second IC copper pillar is electrically connected to a first electrode 307. In one embodiment of the present invention, the polarity of the first electrode is opposite to that of the second electrode. In one embodiment of the present invention, each semiconductor light-emitting module has a common first electrode. The first electrode may be, for example, a P-electrode or an anode electrode, and the second electrode is an electrode with a polarity opposite to that of the first electrode, such as an N-electrode or a cathode electrode. In one embodiment of the invention, the first and second electrodes and their connecting components may be made of materials such as graphene, indium tin oxide (ITO), aluminum-doped zinc oxide (AZO), or fluorine-doped tin oxide (FTO), or any combination thereof. In another embodiment of the invention, the first and second electrodes and their connecting components may be made of non-transparent or transparent conductive materials, such as indium tin oxide (ITO).

[0082] As shown in the figure, in one embodiment of the present invention, the micro-light-emitting diode chip further includes a microlens array. The microlens array is disposed above the micro-light-emitting diode array, wherein at least one microlens 308 is disposed on the surface of the conductive layer on top of the micro-light-emitting diode, and the horizontal profile of the microlens is larger than the maximum horizontal profile of the micro-light-emitting diode. The microlens is mainly used for focusing and / or collimating optical fibers; for example, the focal point of the microlens can be located in the light-emitting mesa of the micro-light-emitting diode by adjusting parameters such as the thickness and curvature of the microlens.

[0083] As shown in the figure, in one embodiment of the present invention, the microlenses of the microlens array correspond one-to-one with the light-emitting platform. Meanwhile, as... Figure 4A and 4B As shown, in some embodiments of the present invention, adjacent microlenses have gaps between them and their bottoms are connected to each other. The bottom of the gap may be lower than the top of the light-emitting platform of the micro-light-emitting diode, or lower than the bottom of the light-emitting layer of the light-emitting platform, or located above the second electrode, or located between the two peaks of the second electrode. Figure 4Cand 4D As shown, in some other embodiments of the present invention, adjacent microlenses are completely connected, but there is a gap at the connection. Furthermore, the bottom of the connection may be lower than the top of the light-emitting platform of the micro-light-emitting diode, or lower than the bottom of the light-emitting layer of the light-emitting platform, or located above the second electrode, or located between the two peaks of the second electrode.

[0084] In addition, such as Figures 4A to 4D As shown, in one embodiment of the present invention, the microlens has an air gap inside.

[0085] In an embodiment of the present invention, the microlens can be formed by multiple depositions. In the process of forming the microlens, a SiO2 film layer needs to be deposited first, and then ion etching is performed. The microlens 308 is formed on the surface of the passivation barrier layer at the position corresponding to each light-emitting platform.

[0086] Figure 5 A schematic flowchart illustrating the manufacturing method of the micro light-emitting diode chip as described above is shown. Figure 5 As shown, a method for manufacturing a miniature light-emitting diode chip includes:

[0087] First, in step 501, as Figure 6A As shown, a semiconductor light-emitting module is provided. A second epitaxial layer 333, an electron blocking layer 3322, a multilayer quantum well 3321, and a first epitaxial layer 331 are sequentially deposited on a substrate 001, and then the substrate is thinned. In one embodiment of the present invention, the substrate may be a Si substrate, a SiC substrate, or a sapphire substrate. Simultaneously, a transparent electrode layer, an adhesive layer, a reflective layer, and a bonding metal layer may also be sequentially deposited on the surface of the first epitaxial layer 331.

[0088] Next, in step 502, as Figure 6B As shown, the semiconductor light-emitting module is bonded to a driving backplane. The semiconductor light-emitting module is bonded to the driving backplane 301 to form a bonding layer. The driving backplane includes a driving circuit to provide driving signals to the micro-light-emitting diode chip and control the switching of pixels. The driving backplane is provided with a plurality of IC copper pillars 311, which, after being electrically interconnected with the semiconductor light-emitting module, enable control of the pixels. In one embodiment of the present invention, after chip bonding, the substrate of the semiconductor light-emitting module can be further thinned by grinding or laser lift-off to further thin the buffer layer structure, facilitating subsequent fabrication of the PN step structure. In embodiments of the present invention, the bonding process may, for example, employ thermosetting bonding, etc., which will not be elaborated further here.

[0089] Next, in step 503, as Figure 6CAs shown, etched steps are formed. The semiconductor light-emitting module is subjected to step etching. By adjusting the photolithographic morphology, it is ion-etched to form positive trapezoidal structure pixels. In one embodiment of the present invention, the horizontal angle of the positive trapezoidal structure pixels can be, for example, 65° to 85°.

[0090] Next, in step 504, as Figure 6D As shown, deep trenches are etched. Further deep trench etching is performed at the intervals between each pixel, for example, using photolithography and IBE inert gas physical etching processes. It should be understood that this step may be omitted in some embodiments of the invention.

[0091] Next, in step 505, as Figure 6E As shown, a passivation barrier layer is formed. A passivation barrier layer 304 is formed on the sidewalls and surface of each pixel. In one embodiment of the invention, the passivation barrier layer is formed by CVD deposition of a SiO2 film or ALD deposition of an Al2O3 film to reduce chip leakage current. After deposition, photolithography is performed to etch openings above the corresponding pixel to expose at least a portion of the surface of the N-type semiconductor layer.

[0092] Next, in step 506, as Figure 6F As shown, a transparent conductive layer is formed. A top conductive layer 305 is formed on the passivated and isolated surface to achieve shared series connection of the second epitaxial layer for each pixel.

[0093] Next, in step 507, as Figure 6G As shown, a second electrode is formed. An annular reflective electrode 306 is formed at the deep trench. In one embodiment of the invention, the annular reflective electrode is implemented using magnetron sputtering or vapor deposition. In another embodiment of the invention, the second electrode uses Al or Al alloy metal as the sidewall reflective mirror, and the electrode stack metal uses metal materials such as Ni, Al, Ti, Pt, and Au.

[0094] Next, in step 508, as Figure 6H As shown, a first electrode is formed. A first electrode 307 is formed on the drive backplane. The first electrode is connected to the IC copper pillar, which serves to protect and elevate the IC, and facilitates subsequent wire bonding.

[0095] Next, in step 509, as Figure 6IAs shown, a microlens is deposited. SiO2 is deposited, and the photolithographic morphology is adjusted to form a microlens 308. In one embodiment of the present invention, a SiO2 film layer, i.e., the first transmission layer, is deposited by PECVD. The thickness of the film layer is approximately 2.5 to 3.5 μm. Subsequently, by adjusting the photolithographic morphology of the microlens, such as the resist thickness, exposure energy, and hardening temperature, the photolithographic array morphology corresponding to the pixel position is completed. The SiO2 material of the microlens passivation protective layer is ion-etched to form a hemispherical SiO2 microlens with a lens-like morphology, which can improve the light extraction efficiency to a certain extent. Thus, the initial structure of the micro-LED chip is formed. However, due to the poor step coverage of the SiO2 deposited by PECVD, microcracks easily form in the deep trenches of the pixels, causing diffuse reflection of the quantum well light source and reducing the light extraction efficiency of the microlens. In addition, due to the photolithography size and ion etching of the microlens, the overall radius of curvature, lower spacer height, spherical height, and lens spherical width of the microlens are all relatively small, failing to achieve the optimal conditions for the lens. Therefore, in some embodiments of the present invention, a secondary deposition can be performed to increase the radius of curvature, lower spacer height, spherical height, and lens spherical width of the microlens. In one embodiment of the present invention, the film thickness of the secondary SiO2 deposition needs to be determined based on the film thickness of the SiO2 deposited in the previous microlens deposition and the microlens etching morphology. In one embodiment of the present invention, the film thickness of the secondary deposition is preferably between 0.2 and 1 μm, and it can be performed in a single or multiple deposition operations. In one embodiment of the present invention, the secondary SiO2 deposition uses a mixed gas of SiH4 and N2O, with the ratio of SiH4 to N2O being 1:5. At the same time, the gas flow rate is controlled at a low level so that the deposition rate is much lower than that of the previous microlens deposition. The secondary deposition adopts a high vacuum environment process condition and a large flow rate of inert gas N2 to further improve the step coverage effect of the secondary SiO2 deposition, making it less prone to defects and even able to repair micro-defects in the previous microlens deposition, resulting in a better brightness improvement effect.

[0096] Although various embodiments of the invention have been described above, it should be understood that they are presented by way of example only and not as limitations. It will be apparent to those skilled in the art that various combinations, modifications, and alterations can be made without departing from the spirit and scope of the invention. Therefore, the breadth and scope of the invention disclosed herein should not be limited by the exemplary embodiments disclosed above, but should be defined solely by the appended claims and their equivalents.

Claims

1. A high-reflectivity miniature light-emitting diode, characterized in that, include: A light-emitting platform, configured to emit light; as well as A reflective layer is disposed below the luminescent platform and configured to reflect the light emitted by the luminescent platform.

2. The high-reflectivity micro light-emitting diode as described in claim 1, characterized in that, The reflective layer is made of metal, and the reflectivity of the metal is not less than 60% in the red, green, and blue bands.

3. The high-reflectivity micro light-emitting diode as described in claim 1, characterized in that, The material of the reflective layer is Au, Sn, Al, Ag, Cu, Rh, or an alloy thereof.

4. The high-reflectivity micro light-emitting diode as described in claim 1, characterized in that, The thickness of the reflective layer is 20 to 500 nm.

5. The high-reflectivity micro light-emitting diode as described in claim 1, characterized in that, It also includes an adhesive layer made of a transparent material, which is disposed between the luminescent platform and the reflective layer to facilitate bonding between the luminescent platform and the reflective layer.

6. The high-reflectivity micro light-emitting diode as described in claim 5, characterized in that, The material of the adhesive layer is Cr, Ni, or Ti.

7. The high-reflectivity micro light-emitting diode as described in claim 5, characterized in that, The thickness of the adhesive layer is 0.5 to 50 nm.

8. The high-reflectivity micro light-emitting diode as described in claim 1, characterized in that, It also includes a bonding layer.

9. The high-reflectivity micro light-emitting diode as described in claim 8, characterized in that, The bonding layer is made of AuSn alloy, or PbSn alloy, or CuSn alloy, or AuSi alloy.

10. The high-reflectivity micro light-emitting diode as described in claim 8, characterized in that, The thickness of the bonding layer is 50 to 1000 nm.

11. The high-reflectivity micro light-emitting diode as described in claim 8, characterized in that, It also includes a barrier layer, wherein the barrier layer is disposed between the bonding layer and the reflective layer.

12. The high-reflectivity micro light-emitting diode as described in claim 11, characterized in that, The barrier layer is made of Ti or Pt or their alloys.

13. The high-reflectivity micro light-emitting diode as described in claim 11, characterized in that, The thickness of the barrier layer is 50 to 1000 nm.

14. A miniature light-emitting diode chip, characterized in that, include: A micro light-emitting diode chip array, comprising a plurality of high-reflectivity micro light-emitting diodes as described in any one of claims 1 to 13; as well as The driving backplane is bonded to the micro-LED array via a bonding layer.

15. The micro light-emitting diode chip as described in claim 14, characterized in that, The micro LED array includes a continuous top conductive layer disposed above the micro LED array and contacting and covering the top of each light-emitting platform.

16. The micro light-emitting diode chip as described in claim 14, characterized in that, The surface of the drive backplate is provided with a metal layer.

17. The micro light-emitting diode chip as described in claim 16, characterized in that, The drive backplane is provided with a plurality of IC copper pillars, which are electrically connected to the metal layer.

18. The micro light-emitting diode chip as described in claim 17, characterized in that, Each light-emitting mesa in the micro LED array region corresponds to an IC copper pillar.

19. The micro light-emitting diode chip as described in claim 16, characterized in that, The material of the metal layer is one or more alloys of the following metals: Ni, Al, Ti, Ni, Pt, Au.

20. The micro light-emitting diode chip as described in claim 14, characterized in that, A second electrode is provided between adjacent light-emitting platforms.

21. The micro light-emitting diode chip as described in claim 20, characterized in that, The second electrode is a ring-shaped reflective electrode, which is arranged around the light-emitting platform.

22. The micro light-emitting diode chip as described in claim 20, characterized in that, A deep trench is provided between adjacent light-emitting platforms, the deep trench penetrates the high-reflectivity micro light-emitting diode array, and the second electrode is disposed at the deep trench.

23. The micro light-emitting diode chip as described in claim 22, characterized in that, The second electrode between adjacent light-emitting mesa has at least two peaks.

24. The micro light-emitting diode chip as described in claim 20, characterized in that, The second electrodes are interconnected.

25. The micro light-emitting diode chip as described in claim 14, characterized in that, The light-emitting platform comprises, in sequence, a first epitaxial layer, a light-emitting layer, and a second epitaxial layer.

26. The micro light-emitting diode chip as described in claim 25, characterized in that, The second epitaxial layer is a material layer of the second conductivity type, comprising at least two or more elements including Ga, N, As, Al, In, and P, and the first epitaxial layer is a material layer of the first conductivity type, comprising at least two or more elements including Ga, N, As, Al, In, and P, and the first conductivity type is different from the second conductivity type.

27. The micro light-emitting diode chip as described in claim 25, characterized in that, The light-emitting layer includes a multi-quantum well layer, wherein the multi-quantum well layer is an InGaN / GaN multi-quantum well layer, an InGaN / AlGaN multi-quantum well layer, or an InGaAs / AlGaAs multi-quantum well layer.

28. The miniature light-emitting diode chip as described in claim 27, characterized in that, An electron blocking layer is provided on the first side of the light-emitting layer, and the first side refers to the side along which electrons migrate out of the light-emitting layer.

29. The micro light-emitting diode chip as described in claim 25, characterized in that, The light-emitting layer is at least partially transparent to allow light reflected by the reflective layer to leave the LED chip.

30. The micro light-emitting diode chip as described in claim 17, characterized in that, Also includes: At least one first electrode is electrically connected to the copper pillar of the IC.

31. The micro light-emitting diode chip as described in claim 30, characterized in that, The polarity of the first electrode is opposite to that of the second electrode.

32. The micro light-emitting diode chip as described in claim 14, characterized in that, Also includes: A passivation barrier layer covers the surface of the light-emitting platform, but exposes at least a portion of the top surface of the light-emitting platform.

33. The miniature light-emitting diode chip as described in claim 32, characterized in that, The passivation barrier layer is at least partially transparent to allow light reflected by the reflective layer to leave the LED chip.

34. The micro light-emitting diode chip as described in claim 32, characterized in that, The passivation barrier layer does not cover the top surface of the light-emitting platform, and the surface of the passivation barrier layer is flush with the top surface of the light-emitting platform.

35. The micro light-emitting diode chip as described in claim 32, characterized in that, The passivation barrier layer covers part of the top surface of the light-emitting platform.

36. The micro light-emitting diode chip as described in claim 32, characterized in that, The material of the passivation barrier layer is a SiO2 film or an Al2O3 film.

37. The micro light-emitting diode chip as described in claim 14, characterized in that, It also includes a microlens array, which is located above the micro-light-emitting diode array and includes multiple microlenses, wherein at least one microlens is disposed on the surface of the conductive layer on top of the micro-light-emitting diode.

38. The micro light-emitting diode chip as described in claim 14, characterized in that, It also includes a microlens array, which is located above the micro-light-emitting diode array and includes multiple microlenses, each of which corresponds to a light-emitting platform.

39. The micro light-emitting diode chip as described in claim 38, characterized in that, The microlens has an air gap inside.

40. The micro light-emitting diode chip as described in claim 38, characterized in that, Adjacent micro-projection lenses are interconnected, but there is a gap at the connection point.

41. The micro light-emitting diode chip as described in claim 38, characterized in that, The bottoms of adjacent micro-projection lenses are connected to each other.

42. A bottom stack for a micro light-emitting diode chip, characterized in that, include: An adhesive layer configured to bond to the light-emitting mesa of a micro LED chip; A reflective layer, which is disposed beneath the adhesive layer and configured to reflect the light emitted by the light-emitting platform; as well as A bonding layer is disposed beneath the reflective layer and configured to bond with the drive backplane.

43. The bottom stack as described in claim 42, characterized in that, Also includes: A barrier layer is disposed between the bonding layer and the reflective layer.

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