A method and system for globally invalidating an address translation cache based on a generation flag

By introducing a generational flag mechanism in PCIe devices, a flag is recorded for each function identifier and address mapping entry, achieving O(1) time complexity and low latency for ATC global invalidation, solving the performance jitter problem caused by ATC global invalidation, and maintaining cache consistency.

CN122285554BActive Publication Date: 2026-07-24BEIJING YUNMAI XINLIAN TECH CO LTD
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Patent Information

Application Number
CN202610740809.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-05-27
Publication Date
2026-07-24
Estimated Expiration
2046-05-27

AI Technical Summary

Technical Problem

In PCIe devices, the global invalidation operation of the address translation cache (ATC) requires traversing a large number of entries, resulting in performance jitter and service quality degradation. Existing technologies struggle to achieve O(1) time completion without increasing hardware complexity.

Method used

A generational flag mechanism is adopted, which maintains a current generational flag for each function identifier and records an entry generational flag for each address mapping entry. Global invalidation is achieved by flipping the generational flag of the function identifier, thus avoiding traversing the address mapping entries.

Benefits of technology

The global invalidation time complexity is reduced from O(N) to O(1), eliminating performance jitter and maintaining cache consistency with extremely low hardware overhead and query path latency.

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Abstract

The present application relates to address translation cache invalidation technology field, particularly to a kind of address translation cache global invalidation method and system based on generation mark.This application maintains current generation mark for each function mark, and records entry generation mark for each address mapping entry.When receiving global invalidation request, only flip the current generation mark of target function mark, without traversing any address mapping entry.Inquiry, compare entry generation mark with function mark current generation mark: if not equal, mark the entry as invalid and trigger re-request.Therefore, global invalidation is reduced from traversing N entries to flipping only one flag bit, time complexity is reduced from O (N) to O (1), eliminating performance jitter;Storage overhead is only a few KB, and hardware implementation is simple;Comparison operation can be parallel with query step, without increasing delay.
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