A method and system for extracting and associating physical logic loops of a direct current control protection system

Abstract

This invention discloses a method and system for extracting and associating physical and logical circuits in a DC control and protection system. The method includes: constructing physical circuits based on engineering design drawings and optical cable documents; parsing the graphical program of the DC control and protection device to extract communication-related symbol information and constructing logical circuits; and representing the circuit data using a directed graph to associate the physical and logical circuits. This invention can efficiently realize the automatic construction and association of communication circuits, improving the efficiency of communication circuit diagnosis, debugging, and operation and maintenance in ultra-high voltage DC control and protection systems.

Description

Technical Field

[0001] This invention belongs to the field of DC control and protection, and relates to a method for extracting and associating communication circuits, and particularly to a method and system for extracting and associating physical logic circuits in a DC control and protection system. Background Technology

[0002] DC control and protection devices commonly communicate via fiber optics and Ethernet. While this method offers advantages such as flexibility and speed, it also presents drawbacks, including difficulties in locating faults and a lack of intuitive status monitoring. Fault localization often requires reviewing thousands of pages of graphical program pages, resulting in low efficiency. Therefore, automatically extracting and constructing physical and logical circuits, and visually displaying the status and connections of each area of ​​the DC station, the status and connections of each device, and signal transmission based on circuit diagrams, is extremely important.

[0003] Currently, in the research and development of communication circuits, the industry focuses on the field of AC digital substations, and analyzes them based on the IEC61850 configuration integration file (SCD) for substations and the extended physical circuit definition file SPCD. However, there is no analysis, correlation and display of communication circuits for DC control and protection programs with visual programming. This case arises from this. Summary of the Invention

[0004] The purpose of this invention is to provide a method and system for extracting and associating physical logic circuits in a DC control and protection system, which can efficiently realize the automatic construction and association of communication circuits, and improve the efficiency of communication circuit diagnosis, debugging and operation and maintenance of UHVDC control and protection systems.

[0005] To achieve the above objectives, the solution of the present invention is:

[0006] A method for extracting and associating physical logic circuits in a DC control and protection system, comprising:

[0007] Construct the physical circuit based on the engineering design drawings and optical cable documents;

[0008] Analyze the graphical program of the DC control and protection device, extract communication-related symbol information, and construct the logic circuit;

[0009] Loop data is represented using a directed graph, and the physical loops and logical loops are associated.

[0010] This includes constructing physical circuits based on engineering design drawings and fiber optic cable documents, including...

[0011] Based on the engineering design drawings, obtain the attributes of the cabinets, devices, plugs, ports, switches, fiber optic distribution frames and fiber optic elements in the drawings, and generate the physical loop data structure.

[0012] According to the optical cable list document, obtain the optical cable connection information, and according to the transceiver port names in the connection information, find the ports from the physical loop data structure to construct the transceiver connection relationship between the ports.

[0013] This includes analyzing the graphical program of the DC control and protection device, extracting communication-related symbol information, and constructing logic circuits, including...

[0014] Retrieve all symbols from the graphical application's page;

[0015] Iterate through all symbols, construct a transmit signal queue based on the transmit symbols, and construct a receive signal queue based on the receive symbols.

[0016] Search for matching ports in the transmit signal queue and receive signal queue respectively, and construct a logical loop based on the matching ports.

[0017] This involves iterating through all symbols, constructing a transmit signal queue based on the transmit symbols, and constructing a receive signal queue based on the receive symbols, including...

[0018] For each symbol, determine whether it is a transmit symbol or a receive symbol; if it is a transmit symbol, obtain its corresponding transmit device name, transmit port name, transmit variable, destination port name, and destination device name information, and construct a transmit signal queue; if it is a receive symbol, obtain its corresponding receive variable, receive port name, receive device name, source port name, and source device name information, and construct a receive signal queue.

[0019] Search for matching ports in both the transmit and receive signal queues, and construct a logical loop based on the matching ports, including:

[0020] Iterate through the transmit signal queue in sequence and search in the receive signal queue. If <transmit device name + transmit port name + destination port name + destination device name> and <source device name + source port name + receive port name + receive device name> match, then a logical loop is formed.

[0021] Specifically, a directed graph is used to represent the loop data, and the physical loops and logical loops are automatically associated, including:

[0022] Construct a directed graph of physical loops, with devices, switches, and fiber optic distribution frames in the physical loops as nodes of the directed graph, and each node containing several ports;

[0023] Construct a directed graph of logical loops, using devices in the virtual loops as nodes of the directed graph, and the ports defined by the communication configuration symbols in the graphical program within the device as the ports of the device.

[0024] Obtain the transmitting device name and transmitting port name of each logical loop, find the corresponding device and port from the physical loop, and realize the association between the physical loop and the logical loop.

[0025] This involves obtaining the transmitting device name and transmitting port name for each logical loop, finding the corresponding device and port from the physical loop, and establishing the association between the physical loop and the logical loop.

[0026] Obtain the name of the transmitting device and the name of the transmitting port for each logical loop. Using the port as the starting point, perform a depth-first recursive search. During each recursion, process the opposite point of the starting point in turn, and use the opposite point as the new starting point for recursive processing until a physical loop node that matches the name of the receiving device and the receiving port of the logical loop is found, thus realizing the association between the physical loop and the logical loop.

[0027] A physical logic loop extraction and correlation system for a DC control and protection system, comprising,

[0028] The physical loop construction module is configured to construct physical loops based on engineering design drawings and optical cable documents;

[0029] The logic loop construction module is configured to parse the graphical program of the DC control and protection device, extract communication-related symbol information, and construct the logic loop; and,

[0030] The association module is configured to use a directed graph to represent loop data and associate the physical loops and logical loops.

[0031] A computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor; when the processor executes the computer program, it implements the steps of the method for extracting and associating physical logic circuits of a DC control and protection system as described above.

[0032] A computer-readable storage medium storing a computer program; when executed by a processor, the computer program implements the steps of the aforementioned method for extracting and associating physical logic circuits of a DC control and protection system.

[0033] A computer program product, when executed by a processor, implements the steps of the aforementioned method for extracting and associating physical logic circuits of a DC control and protection system.

[0034] By adopting the above solution, this invention has the following beneficial effects: Users input design drawings, optical cable lists, and a visualization program for DC control and protection engineering. The system can automatically analyze and construct the physical and logical circuits of the entire DC project and complete the automatic association between circuits. This invention solves the problem of the inability to automatically construct and associate virtual and physical circuits in DC control and protection engineering, and addresses the issue of communication circuits being unobservable and unmeasurable during maintenance and debugging. The technical solution provided by this invention has been successfully applied in numerous DC projects both domestically and internationally, improving the efficiency of debugging and maintenance. Attached Figure Description

[0035] Figure 1 This is a schematic diagram of the implementation scheme in this invention;

[0036] Figure 2 This is a flowchart of the physical circuit construction process in this invention;

[0037] Figure 3 This is a flowchart of the logic loop construction process in this invention;

[0038] Figure 4 This is a flowchart illustrating the relationship between physical and logical circuits in this invention;

[0039] Figure 5 This is a top-level schematic diagram showing the relationship between physical and logical circuits in this invention;

[0040] Figure 6 This is a topology diagram of the device logic circuit in this invention;

[0041] Figure 7 This is a schematic diagram of the signal transmission hierarchy between devices in this invention;

[0042] Figure 8 This is a list of signals transmitted between devices in this invention. Detailed Implementation

[0043] like Figure 1 As shown, the present invention provides a method for extracting and associating physical logic circuits in a DC control and protection system, comprising the following steps:

[0044] Step 1: Read the engineering design drawings and optical cable files, and automatically construct the physical circuit;

[0045] Step 2: Analyze the graphical program of the DC control and protection device, extract communication-related symbol information, and automatically construct the logic circuit;

[0046] Step 3: Represent the loop data using a directed graph data structure of <node, edge>, and use a depth-first traversal algorithm to automatically associate physical and logical loops. Use graphical symbols to draw and display the association information.

[0047] In step 1, the steps of automatically constructing physical loops include: first, reading the design drawings (preferably supporting EPLAN, CAD, and PDF formats), identifying the attributes of cabinets, devices, plug-ins, ports, switches, fiber optic distribution frames, and fiber optic elements in the drawings, and generating a physical loop data structure; then, reading the optical cable list file (preferably in Excel format), obtaining the optical cable connection information, extracting the transceiver port names from the connection information, searching for ports in the physical loop data structure based on the port names, and constructing the transceiver connection relationship between ports.

[0048] In step 2, the automatic construction of the logical loop includes: designing a communication program based on graphical communication configuration symbols; reading the graphical program page of each DC control and protection device in a DC engineering control and protection system; obtaining the configuration attributes and input-output connection relationships of the communication configuration symbols (including sending symbols and receiving symbols) on the page; statistically analyzing the sending device name, sending port name, sending variable, destination port name, and destination device name information of the sending symbol, and constructing a sending signal queue; statistically analyzing the receiving variable, receiving port name, receiving device name, source port name, and source device name information of the receiving symbol, and constructing a receiving signal queue; sequentially traversing the sending signal queue and searching in the receiving signal queue; if <sending device name + sending port name + destination port name + destination device name> and <source device name + source port name + receiving port name + receiving device name> match, then a logical loop is formed.

[0049] In step 3, the automatic association between physical circuits and logical circuits includes the following steps:

[0050] a) Construct a directed graph of physical loops, with devices, switches, and fiber optic distribution frames in the physical loops serving as nodes in the directed graph, and each node containing several ports.

[0051] b) Construct a directed graph of logical loops, with devices in the virtual loops serving as nodes in the directed graph, and the ports defined by the communication configuration symbols in the graphical program within the device serving as the device's ports.

[0052] c) Obtain the transmitting device name and transmitting port name of each logical loop, find the corresponding device and port in the physical loop, and use the port as the starting point to perform a depth-first recursive search. During each recursion, the opposite point of the starting point will be processed in turn, and the opposite point will be used as the new starting point for recursive processing until a physical loop node that matches the receiving device name and receiving port name of the logical loop is found, thus realizing the association between the physical loop and the logical loop.

[0053] d) Figures 5 to 8 A schematic diagram illustrating the association between physical and logical circuits in this embodiment is shown. Figure 5 This displays a top-level schematic diagram showing the physical and logical connections between devices within the automatically generated cabinet. Figure 6 For the automatically generated device logic loop topology diagram; click Figure 6 One connecting line can display as follows Figure 7 The diagram shows the signal transmission hierarchy between the two devices; click here. Figure 7 The signal transmission lines in the diagram can be displayed as follows: Figure 8 List of signals transmitted between the devices shown.

[0054] The implementation of each step in this invention will be described below with reference to the accompanying drawings.

[0055] like Figure 2 As shown, the specific steps for automatically constructing physical loops include:

[0056] Step 11: Read all graphic elements in the design drawing, and iterate through each graphic element in turn, performing the following operations on each graphic element:

[0057] Extract the geometric information of the current graphic element, and determine whether the graphic element is a port graphic element based on the extracted geometric information. If it is a port graphic element, extract its port name.

[0058] Step 12: After all primitives have been traversed, generate the physical loop data structure.

[0059] Step 13: Then read the optical cable connection information from the optical cable list file, and iterate through all the connection information, performing the following operations on each connection information:

[0060] Extract the transmit and receive port names from the current connection information, find the ports in the physical loop data structure generated in step 12 based on the extracted transmit and receive port names, and construct the port connection relationship;

[0061] Step 14: Once all connection information has been traversed, the physical loop construction is complete.

[0062] like Figure 3 As shown, the specific steps for automatically constructing logical loops include:

[0063] Step 21: Read all symbols on the graphical program page, and iterate through each symbol in turn, performing the following operations on each symbol:

[0064] Determine whether the current symbol is a transmitting symbol or a receiving symbol. If it is a transmitting symbol, collect the transmitting device name, transmitting port name, transmitting variables, destination port name, and destination device name information of the transmitting symbol, and construct a transmitting signal queue (i.e., a transmitting signal list). If it is a receiving symbol, collect the receiving variables, receiving port name, receiving device name, source port name, and source device name information of the receiving symbol, and construct a receiving signal queue (i.e., a receiving signal list).

[0065] Step 22: For the constructed transmit signal list and receive signal list, traverse all transmit signal lists, and for each transmit signal list, traverse the receive signal list to find objects with corresponding port names and device names, thereby forming a logical loop.

[0066] like Figure 4 As shown, the specific steps for associating physical circuits with logical circuits include:

[0067] Step 31: Traverse all logical loops. For each logical loop, obtain its transmitting device name, transmitting port name, receiving device name, and receiving port name, and determine the transmitting node in the actual loop based on the transmitting device name and transmitting port name.

[0068] Step 32: Locate the corresponding transmitting node in the physical loop and determine the receiving node on the opposite side of the found transmitting node;

[0069] Step 33: Using the receiving node on the opposite side of the physical loop as the sending node, perform a recursive traversal until a physical loop node with the same receiving device name and receiving port name as the logical loop is found. This results in a physical loop receiving node and a logical loop destination node with consistent information, thereby realizing the association between the physical loop and the logical loop.

[0070] This invention also provides another computer device, including a processor and a memory configured to store a computer program capable of running on the processor; wherein, when the processor is configured to run the computer program, it performs the method steps described in the foregoing embodiments.

[0071] In practical applications, the aforementioned processor includes a Field-Programmable Gate Array (FPGA), and the processor can be a Central Processing Unit (CPU) or a Digital Signal Processor (DSP). It is understood that for different devices, the electronic devices used to implement the above-mentioned processor functions can also be other types, and this embodiment of the invention does not impose specific limitations.

[0072] The aforementioned memory can be volatile memory, such as random-access memory (RAM); or non-volatile memory, such as read-only memory (ROM), flash memory, hard disk drive (HDD), or solid-state drive (SSD); or a combination of the above types of memory, and provides instructions and data to the processor.

[0073] In an exemplary embodiment, the present invention also provides a computer-readable storage medium for storing a computer program.

[0074] Optionally, the computer-readable storage medium can be applied to any of the methods in the embodiments of the present invention, and the computer program causes the computer to execute the corresponding processes implemented by the processor in the various methods of the embodiments of the present invention. For the sake of brevity, these will not be described in detail here.

[0075] In an exemplary embodiment, the present invention also provides a computer program product that, when executed by a processor, implements the various method steps of the present invention. For the sake of brevity, these steps will not be described in detail here.

[0076] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The solutions in the embodiments of the present invention can be implemented using various computer languages, such as the object-oriented programming language Java and the interpreted scripting language JavaScript.

[0077] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0078] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0079] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0080] Although preferred embodiments of the invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including both the preferred embodiments and all changes and modifications falling within the scope of the invention.

[0081] Obviously, those skilled in the art can make various modifications and variations to this invention without departing from its spirit and scope. Therefore, if these modifications and variations fall within the scope of the claims of this invention and their equivalents, this invention also intends to include these modifications and variations.

Claims

1. A method for extracting and associating physical logic circuits in a DC control and protection system, characterized in that: include, Construct the physical circuit based on the engineering design drawings and optical cable documents; Analyze the graphical program of the DC control and protection device, extract communication-related symbol information, and construct the logic circuit; Loop data is represented using a directed graph, and the physical loops and logical loops are associated.

2. The method as described in claim 1, characterized in that: Based on the engineering design drawings and fiber optic cable documents, construct the physical circuit, including: Based on the engineering design drawings, obtain the attributes of the cabinets, devices, plugs, ports, switches, fiber optic distribution frames and fiber optic elements in the drawings, and generate the physical loop data structure. According to the optical cable list document, obtain the optical cable connection information, and according to the transceiver port names in the connection information, find the ports from the physical loop data structure to construct the transceiver connection relationship between the ports.

3. The method as described in claim 1, characterized in that: The graphical program of the DC control and protection device is analyzed, communication-related symbol information is extracted, and logic circuits are constructed, including... Retrieve all symbols from the graphical application's page; Iterate through all symbols, construct a transmit signal queue based on the transmit symbols, and construct a receive signal queue based on the receive symbols. Search for matching ports in the transmit signal queue and receive signal queue respectively, and construct a logical loop based on the matching ports.

4. The method as described in claim 3, characterized in that: Iterate through all symbols, construct a transmit signal queue based on the transmit symbols, and construct a receive signal queue based on the receive symbols, including... For each symbol, determine whether it is a transmit symbol or a receive symbol; if it is a transmit symbol, obtain its corresponding transmit device name, transmit port name, transmit variable, destination port name, and destination device name information, and construct a transmit signal queue; if it is a receive symbol, obtain its corresponding receive variable, receive port name, receive device name, source port name, and source device name information, and construct a receive signal queue. Search for matching ports in both the transmit and receive signal queues, and construct a logical loop based on the matching ports, including: Iterate through the transmit signal queue in sequence and search in the receive signal queue. If <transmit device name + transmit port name + destination port name + destination device name> and <source device name + source port name + receive port name + receive device name> match, then a logical loop is formed.

5. The method as described in claim 1, characterized in that: Loop data is represented using a directed graph, and the physical loops and logical loops are automatically associated, including: Construct a directed graph of physical loops, with devices, switches, and fiber optic distribution frames in the physical loops as nodes of the directed graph, and each node containing several ports; Construct a directed graph of logical loops, using devices in the virtual loops as nodes of the directed graph, and the ports defined by the communication configuration symbols in the graphical program within the device as the ports of the device. Obtain the transmitting device name and transmitting port name of each logical loop, find the corresponding device and port from the physical loop, and realize the association between the physical loop and the logical loop.

6. The method as described in claim 5, characterized in that: Obtain the transmitting device name and transmitting port name for each logical loop, locate the corresponding device and port from the physical loop, and establish the association between the physical loop and the logical loop, including... Obtain the name of the transmitting device and the name of the transmitting port for each logical loop, and perform a depth-first recursive search starting from that port; During each recursion, the opposite point of the starting point will be processed in sequence, and the opposite point will be used as the new starting point for recursive processing until a physical loop node that matches the logical loop receiving device name and receiving port name is found, thus realizing the association between the physical loop and the logical loop.

7. A system for extracting and associating physical logic circuits in a DC control and protection system, characterized in that: include, The physical loop construction module is configured to construct physical loops based on engineering design drawings and optical cable documents; The logic loop construction module is configured to parse the graphical program of the DC control and protection device, extract communication-related symbol information, and construct the logic loop; and, The association module is configured to use a directed graph to represent loop data and associate the physical loops and logical loops.

8. A computer device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor; characterized in that: When the processor executes the computer program, it implements the steps of the method for extracting and associating physical logic circuits of a DC control and protection system as described in any one of claims 1 to 6.

9. A computer-readable storage medium storing a computer program; characterized in that: When the computer program is executed by the processor, it implements the steps of the method for extracting and associating physical logic circuits of a DC control and protection system as described in any one of claims 1 to 6.

10. A computer program product, characterized in that: When the computer program product is executed by a processor, it implements the steps of the method for extracting and associating physical logic circuits of a DC control and protection system as described in any one of claims 1 to 6.

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