Three-phase unbalance and harmonic compensation method and device

Abstract

This application discloses a method and apparatus for three-phase imbalance and harmonic compensation, relating to the field of power distribution network control technology. It synchronously collects three-phase voltage on the grid side, three-phase current on the load side, and DC bus voltage at multiple consecutive moments from an active power control device. Based on this, a time-series data sequence is constructed and input into a pre-trained gated cyclic unit network to obtain the initial compensation current. The DC bus current compensation component is determined based on the DC bus voltage and its reference value. The loss current component is estimated based on the current switching state function and output current of the active power control device, and the target compensation current is determined accordingly. A current tracking error vector is determined based on the target compensation current and the actual compensation current. A switching drive signal is generated based on the current tracking error vector. Under the control of the switching drive signal, the target compensation current is output, thereby achieving the mitigation of load harmonics, reactive power, and three-phase imbalance components.

Description

Technical Field

[0001] This application relates to the field of power distribution network control technology, and in particular to a method and device for three-phase imbalance and harmonic compensation. Background Technology

[0002] Unbalanced current can cause additional heat generation in transformers, increased line losses, and malfunctions in protection devices. Harmonics can cause electrical equipment malfunctions and interfere with communication systems. Rapid and accurate detection of the fundamental negative sequence, harmonics, and reactive components in the load current, and the generation of corresponding real-time compensation commands, are crucial prerequisites for implementing effective active power management and restoring the grid-side current to a three-phase symmetrical sine wave.

[0003] In related technologies, detection methods based on fixed algorithms such as instantaneous no-power theory suffer from inherent filtering delays in the computation stage, making it difficult to achieve instantaneous and lag-free generation of compensation commands. Furthermore, the compensation effect deteriorates when the load changes rapidly. At the control level, traditional proportional-integral controllers have slow dynamic responses, while advanced algorithms such as conventional model prediction have fixed weights, limiting their effectiveness in multi-objective optimization and adaptation. More importantly, existing solutions typically treat signal detection, command generation, and current tracking as independent, serially connected components, lacking collaborative optimization based on the global state. Additionally, when compensating for reactive power and unbalanced load components, the losses of active devices and DC-side energy balance are often ignored, affecting the long-term stability of the system. Summary of the Invention

[0004] In view of this, this application provides a three-phase imbalance and harmonic compensation method and apparatus to solve the above-mentioned problems existing in the prior art.

[0005] The objective of this application can be achieved through the following technical solutions: The first aspect of this application is to provide a method for three-phase imbalance and harmonic compensation, including: The active power control device simultaneously collects the grid-side three-phase voltage, load-side three-phase current, and DC-side bus voltage at multiple consecutive moments. Based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage, a time-series data sequence is constructed. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The time-series data sequence is input into a pre-trained gated recurrent unit network to predict the initial compensation current, which includes load harmonics, reactive power, and negative sequence components. The DC-side bus current compensation component is determined based on the DC-side bus voltage and the DC-side bus voltage reference value; Estimate the loss current component based on the switching state function and output current of the current active power control device; The target compensation current is determined based on the loss current component, the DC bus current compensation component, and the initial compensation current. The current tracking error vector is determined based on the target compensation current and the actual compensation current. Based on the current tracking error vector, generate two-phase switching logic signals; Based on the two-phase switch logic signals, switch drive signals are generated by mapping. The target compensation current is output under the control of the switch drive signal.

[0006] In one optional embodiment, a time-series data sequence is constructed based on the grid-side three-phase voltage, the load-side three-phase current, and the DC-side bus voltage, including: Clarke transform is performed on the three-phase voltage on the grid side and the three-phase current on the load side respectively to obtain two-phase voltage components and two-phase current components; The two-phase voltage components, two-phase current components, and DC-side bus voltage are normalized separately to obtain the per-unit values ​​of the two-phase voltage components, the two-phase current components, and the DC-side bus voltage. A time-series data sequence is constructed based on the per-unit values ​​of the two-phase voltage components, the per-unit values ​​of the two-phase current components, and the per-unit value of the DC-side bus voltage.

[0007] In one optional embodiment, determining the DC-side bus current compensation component based on the DC-side bus voltage and a DC-side bus voltage reference value includes: The DC-side bus voltage error is calculated based on the DC-side bus voltage and the DC-side bus voltage reference value. Based on the DC-side bus voltage error, the DC-side bus current compensation component is calculated using the following formula: ; in, This represents the DC-side bus current compensation component, where k represents the current index. This indicates the DC bus voltage error corresponding to the k-th time point. This represents the sum of DC-side bus voltage errors up to the current time, corresponding to time k, where n represents the historical time index. This represents the proportionality coefficient. Represents the integral coefficient. Indicates the control cycle.

[0008] In one optional embodiment, estimating the loss current component based on the current switching state function and output current of the active control device includes: Based on the switching state function and output current of the current active control device, the effective value of the output current and the average switching frequency are calculated. Based on the RMS value of the output current, the average switching frequency, and the DC-side bus voltage, the loss current component is estimated using the following formula: ; in, This indicates the loss current component corresponding to the k-th time point. The power function representing conduction loss, This indicates that the current time is the effective value of the output current corresponding to the k-th time. The power function representing switching losses. This indicates that the current time is the instantaneous value of the output current corresponding to the k-th time. This indicates that the current time is the voltage of the straight-line bus corresponding to the k-th time. This represents the average switching frequency.

[0009] In one optional embodiment, two-phase switching logic signals are generated based on the current tracking error vector, including: If the current tracking error vector is greater than the preset first boundary threshold, then the first two-phase switching logic signal is output. If the current tracking error vector is less than the preset second boundary threshold, then the second two-phase switching logic signal is output.

[0010] In one optional embodiment, a switch drive signal is generated by mapping based on the two-phase switch logic signal, including: Based on the two-phase switching logic signals, the switch drive signals are generated by mapping using the following formula: ; in, Indicates the switch drive signal. Represents a mapping function. This represents a two-phase switch logic signal.

[0011] In one optional embodiment, the training process of the gated recurrent unit network includes: Obtain the sample training dataset, which includes sample time-series data sequences and the target compensation current labels corresponding to the sample time-series data sequences; The sample time series data sequence is input into the gated recurrent unit network to obtain the predicted target compensation current corresponding to the sample time series data sequence; Calculate the error between the predicted target compensation current and the target compensation current label to obtain the loss value; Based on the loss value, the model parameters of the gated recurrent unit network are adjusted until convergence.

[0012] A second aspect of this application is to provide a three-phase imbalance and harmonic compensation device, comprising: The acquisition module is used to simultaneously acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage of the active power control device at multiple consecutive moments. The construction module is used to construct a time-series data sequence based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The input module is used to input the time-series data sequence into the pre-trained gated recurrent unit network to predict the initial compensation current containing load harmonics, reactive power and negative sequence components. The first determining module is used to determine the DC-side bus current compensation component based on the DC-side bus voltage and the DC-side bus voltage reference value. The estimation module is used to estimate the loss current component based on the current switching state function and output current of the active power control device. The second determining module is used to determine the target compensation current based on the loss current component, the DC side bus current compensation component, and the initial compensation current. The third determination module is used to determine the current tracking error vector based on the target compensation current and the actual compensation current. The first generation module is used to generate two-phase switching logic signals based on the current tracking error vector; The second generation module is used to map and generate switch drive signals based on two-phase switch logic signals. The output module is used to output the target compensation current under the control of the switch drive signal.

[0013] A third aspect of this application is to provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the method of the first aspect.

[0014] A fourth aspect of this application is to provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the method of the first aspect.

[0015] Compared with existing technologies, the three-phase imbalance and harmonic compensation method provided in this application simultaneously collects the grid-side three-phase voltage, load-side three-phase current, and DC-side bus voltage at multiple consecutive moments from the active power control device. Based on this, a time-series data sequence is constructed and input into a pre-trained gated recurrent unit network to obtain the initial compensation current. The DC-side bus current compensation component is determined based on the DC-side bus voltage and its reference value. The loss current component is estimated based on the current switching state function and output current of the active power control device, and the target compensation current is determined accordingly. The current tracking error vector is determined based on the target compensation current and the actual compensation current. A switching drive signal is generated based on the current tracking error vector. Under the control of the switching drive signal, the target compensation current is output, thereby achieving the control of load harmonics, reactive power, and three-phase imbalance components. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 A schematic flowchart of a three-phase imbalance and harmonic compensation method provided in an embodiment of this application; Figure 2 A structural block diagram of a three-phase imbalance and harmonic compensation device provided in an embodiment of this application; Figure 3 This is a structural block diagram of an electronic device for implementing a three-phase imbalance and harmonic compensation method, as provided in an embodiment of this application. Detailed Implementation

[0018] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present application.

[0019] It should be noted that the terms "first," "second," etc., used in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such terms can be used interchangeably where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0020] It should be understood that in the embodiments of this application, "at least one" means one or more, and "more than one" means two or more. "And / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. The character " / " generally indicates that the related objects before and after it are in an "or" relationship. "Contains A, B and / or C" means containing any one, two, or three of A, B, and C.

[0021] It should be understood that in the embodiments of this application, "B corresponding to A", "B corresponding to A", "A corresponds to B" or "B corresponds to A" means that B is associated with A, and B can be determined based on A. Determining B based on A does not mean that B is determined solely based on A; B can also be determined based on A and / or other information.

[0022] To address the technical problems existing in related technologies, this application provides a method and apparatus for three-phase imbalance and harmonic compensation.

[0023] The three-phase imbalance and harmonic compensation method provided in this application can be executed by an electronic device, such as a terminal or a server. The terminal can be a smartphone, tablet, laptop, or other similar device. The server can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. It is understood that this application does not limit the specific entity executing the three-phase imbalance and harmonic compensation method.

[0024] The technical solution of this application will be described in detail below through specific embodiments. It should be noted that the following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments described below are used to explain the technical solution of this application and are not intended to limit actual use.

[0025] To address the technical problems existing in related technologies, embodiments of this application provide a method for three-phase imbalance and harmonic compensation, such as... Figure 1 As shown, Figure 1 This is a flowchart illustrating a three-phase imbalance and harmonic compensation method provided in an embodiment of this application. It should be noted that the steps shown may be executed in a different logical order than those shown in the flowchart. The method may include the following steps S101 to S110.

[0026] Step S101: Synchronously collect the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage at multiple consecutive moments from the active power control device.

[0027] In one specific embodiment, an analog-to-digital converter circuit with multi-channel synchronous sampling function is used to simultaneously collect the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage at the port of the active power management device at the same sampling time.

[0028] In a more specific embodiment, the active control device can be a voltage source inverter.

[0029] In a more specific embodiment, the grid-side three-phase voltage can be used , , This indicates that the three-phase current on the load side can be expressed as follows: , , This indicates that the DC-side bus voltage can be used The symbols represent: t represents time, a, b, c represent phases A, B, and C of a three-phase AC power supply, s represents the grid side, L represents the load side, and dc represents DC power.

[0030] Step S102: Construct a time-series data sequence based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage.

[0031] It should be noted that the time-series data includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC-side bus voltage.

[0032] In one optional embodiment, a time-series data sequence is constructed based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage, specifically including the following steps: Clarke transform is performed on the three-phase voltage on the grid side and the three-phase current on the load side to obtain two-phase voltage components and two-phase current components. The two-phase voltage components, two-phase current components and DC bus voltage are normalized to obtain the per-unit values ​​of the two-phase voltage components, the two-phase current components and the DC bus voltage. A time series data sequence is constructed based on the per-unit values ​​of the two-phase voltage components, the two-phase current components and the DC bus voltage.

[0033] In one specific embodiment, the three-phase current on the load side is subjected to a Clarke transformation using the following formula to obtain two-phase current components: ; in, , , This indicates the three-phase current on the load side. and This represents two-phase current components, L represents the load side, and a, b, and c represent phases A, B, and C of the three-phase AC power supply. Representing the new coordinates Axial components, Represents the new coordinate axes Quantity.

[0034] In another specific embodiment, the three-phase voltage on the grid side is subjected to Clarke transformation using the following formula to obtain two-phase voltage components: ; in, , , Indicates the three-phase voltage on the grid side. and This represents two-phase voltage components, where a, b, and c represent phases A, B, and C of a three-phase AC power supply, and s represents the grid side. Representing the new coordinates Axial components, Represents the new coordinate axes Quantity.

[0035] In another specific embodiment, the two-phase voltage components, two-phase current components, and DC-side bus voltage are normalized using the following formulas to obtain the per-unit values ​​of the two-phase voltage components, the two-phase current components, and the DC-side bus voltage: ; in, and This represents the per-unit value of the two-phase current components. and This represents the per-unit value of the two-phase voltage components. This indicates the per-unit value of the DC-side bus voltage. and Represents two-phase voltage components. Indicates the DC-side bus voltage. and Represents the two-phase current components. Indicates the peak value of the rated current on the load side. Indicates the peak value of the rated phase voltage on the grid side. This indicates the reference value for the DC-side bus voltage.

[0036] In another specific embodiment, a time-series data sequence is constructed based on the per-unit values ​​of the two-phase voltage components, the per-unit values ​​of the two-phase current components, and the per-unit value of the DC-side bus voltage, including: The per-unit values ​​of the two-phase voltage components, the per-unit values ​​of the two-phase current components, and the per-unit value of the DC-side bus voltage are combined into a multi-dimensional feature vector. The feature vectors from multiple consecutive time points are arranged in chronological order to construct a time-series data sequence, which can be represented as: Where M represents the total number of times, and k represents the time index. .

[0037] In this step, multi-signal synchronous acquisition provides complete system status information to distinguish between load disturbances and grid background disturbances, thereby improving the accuracy and robustness of the governance.

[0038] Step S103: Input the time-series data sequence into the pre-trained gated recurrent unit network to predict the initial compensation current containing load harmonics, reactive power, and negative sequence components.

[0039] It should be noted that the GRU (Gated Recurrent Unit) learns and memorizes the dynamic changes in the nonlinearity and imbalance characteristics of the load through its update and reset gates, and outputs the preliminary compensation current in the two-phase stationary coordinate system in a forward propagation manner. This preliminary compensation current is generated synchronously within one control cycle, achieving synchronous and delay-free generation of compensation.

[0040] In one alternative embodiment, the internal computation process of the GRU within time step t is controlled by an update gate. Reset door and candidate hidden state The decision is made jointly, and its mathematical description is as follows: ; in, This is the time series data sequence at the current time step t. Let be the hidden state vector of the previous time step t-1. To update the gate vector; To reset the gate vector; The candidate hidden state vector for the current time step is a potential new state calculated based on the current input and the historical state after adjustment by the reset gate. The final hidden state vector at the current time step is the result of the update gate performing a weighted combination of the previous state and the candidate state; and These are the trainable network weights and biases, respectively. ( ) represents the Sigmoid activation function. This represents element-wise multiplication, and tanh() represents the hyperbolic tangent activation function. This indicates updating the gate input weights. This indicates updating the hidden weight of the door. This indicates an update to the gate bias. This indicates resetting the gate input weights. This indicates resetting the door's hidden weight. This indicates that the door offset is being reset. Indicates the input weights of the candidate states. This indicates that the candidate state has hidden weights. This indicates the candidate state bias.

[0041] It should be noted that GRU adaptively memorizes or forgets key information from historical states through a gating mechanism, thereby extracting deep features that characterize the nonlinear and unbalanced dynamic properties of the load.

[0042] In another alternative embodiment, the final hidden state of the GRU neural network It is mapped to an initial compensation current containing load harmonics, reactive power, and negative sequence components through a fully connected output layer.

[0043] In one specific embodiment, the expression for the initial compensation current is: ; in, Indicates the initial compensation current. Indicates in The initial compensation current of the shaft, Indicates in The initial compensation current of the axis, k indicates that the current time is the kth time, and T indicates transpose.

[0044] In another specific embodiment, the mapping relationship is as follows: ; in, Indicates the initial compensation current. Indicates the weights of the fully connected output layer. Indicates the final hidden state. This indicates the bias of the fully connected output layer.

[0045] In another optional embodiment, before inputting the time-series data sequence into the pre-trained gated recurrent unit network to predict the initial compensation current including load harmonics, reactive power, and negative sequence components, the gated recurrent unit network needs to be pre-trained to obtain the pre-trained gated recurrent unit network. The training process of the gated recurrent unit network includes: Obtain a sample training dataset, which includes sample time-series data sequences and corresponding target compensation current labels. Input the sample time-series data sequences into a gated recurrent unit network to obtain the predicted target compensation current corresponding to the sample time-series data sequences. Calculate the error between the predicted target compensation current and the target compensation current label to obtain the loss value. Based on the loss value, adjust the model parameters of the gated recurrent unit network until convergence.

[0046] In one specific embodiment, the loss function can be mean squared error, etc.

[0047] In another specific embodiment, based on the loss value, the weight matrix and bias parameters of the gated recurrent unit network are iteratively updated using the backpropagation algorithm and optimizer until convergence.

[0048] Step S104: Determine the DC-side bus current compensation component based on the DC-side bus voltage and the DC-side bus voltage reference value.

[0049] In one optional embodiment, determining the DC-side bus current compensation component based on the DC-side bus voltage and a DC-side bus voltage reference value includes: The DC-side bus voltage error is calculated based on the DC-side bus voltage and the DC-side bus voltage reference value. Based on the DC-side bus voltage error, the DC-side bus current compensation component is calculated using the following formula: ; in, This represents the DC-side bus current compensation component, where k represents the current index. This indicates the DC bus voltage error corresponding to the k-th time point. This represents the sum of DC-side bus voltage errors up to the current time, corresponding to time k, where n represents the historical time index. This represents the proportionality coefficient. Represents the integral coefficient. Indicates the control cycle.

[0050] In one specific embodiment, the DC-side bus voltage error is calculated using the following formula based on the DC-side bus voltage and the DC-side bus voltage reference value: ; in, Indicates the DC-side bus voltage error. This indicates the reference value for the DC-side bus voltage. This indicates the DC-side bus voltage.

[0051] In another specific embodiment, the DC-side bus voltage error is calculated by a digital proportional-integral regulator to obtain a DC-side bus current compensation component for stabilizing the DC-side voltage. This DC-side bus current compensation component adjusts the active power exchanged between the active device and the grid to maintain the constant energy stored in the DC-side capacitor.

[0052] Step S105: Estimate the loss current component based on the current switching state function and output current of the active control device.

[0053] In one optional embodiment, estimating the loss current component based on the current switching state function and output current of the active control device includes: Based on the switching state function and output current of the active control device, the effective value of the output current and the average switching frequency are calculated. Based on the RMS value of the output current, the average switching frequency, and the DC-side bus voltage, the loss current component is estimated using the following formula: ; in, This indicates the loss current component corresponding to the k-th time point. The power function representing conduction loss, This indicates that the current time is the effective value of the output current corresponding to the k-th time. The power function representing switching losses. This indicates that the current time is the instantaneous value of the output current corresponding to the k-th time. This indicates that the current time is the voltage of the straight-line bus corresponding to the k-th time. This represents the average switching frequency.

[0054] By adjusting the DC-side voltage in a closed loop and observing the system losses in real time, the active current required to maintain the power balance inside the active device is calculated, and the compensation commands generated by the intelligent neural network are corrected to ensure the stability of the system itself.

[0055] Step S106: Determine the target compensation current based on the loss current component, the DC side bus current compensation component, and the initial compensation current.

[0056] In one alternative embodiment, the target compensation current is calculated using the following formula based on the loss current component, the DC-side bus current compensation component, and the initial compensation current: ; in, This indicates that the current time is the target compensation current corresponding to the k-th time. This indicates that the current time is the initial compensation current corresponding to the k-th time. This indicates the DC-side bus current compensation component corresponding to the k-th time point. This represents the loss current component corresponding to the k-th time point.

[0057] This step addresses the DC-side voltage fluctuation problem caused by the output compensation power and its own losses in the active power management device during dynamic compensation. It achieves precise energy self-balancing by combining feedforward and feedback.

[0058] This step ensures that the energy requirements of the active power control device are met while accurately compensating for load harmonics and unbalanced components, thus achieving global power balance of the system.

[0059] Step S107: Determine the current tracking error vector based on the target compensation current and the actual compensation current.

[0060] In an optional embodiment, the current tracking error vector is calculated based on the target compensation current and the actual compensation current using the following formula: ; in, This represents the current tracking error vector corresponding to the k-th time point. This indicates that the current time is the target compensation current corresponding to the k-th time. This represents the actual compensation current at the current time being the k-th time.

[0061] It should be noted that the current time is the target compensation current corresponding to the k-th time. The current time is the actual compensation current corresponding to the k-th time. .

[0062] Step S108: Generate two-phase switching logic signals based on the current tracking error vector.

[0063] In one optional embodiment, a two-phase switching logic signal is generated based on the current tracking error vector, specifically including the following steps: If the current tracking error vector is greater than the preset first boundary threshold, the first two-phase switching logic signal is output; if the current tracking error vector is less than the preset second boundary threshold, the second two-phase switching logic signal is output.

[0064] In one specific embodiment, the current tracking error components of the α-axis and β-axis are... and The signals are fed into independent hysteresis comparators. Each hysteresis comparator has a preset, constant hysteresis width ± h When the error exceeds the upper boundary of the hysteresis band, the comparator outputs a high level (or logic "1"); when the error is below the lower boundary of the hysteresis band, the comparator outputs a low level (or logic "0").

[0065] It should be noted that the hysteresis comparators for the α and β axes output logic signals and Together, these constitute a two-bit switch state combination. This combination is directly mapped to a switch drive signal through a predefined switch table. The design principle of the switch meter is based on... Given the current state, select the switching combination that most effectively reduces the current error of the output voltage vector of the active control device. The mapping relationship can be simplified to a lookup table function: ; This process is repeated in each control cycle. Once the current error exceeds the hysteresis band, the switching state immediately changes, forcing the output voltage of the active control device to switch within a finite vector, thereby controlling the actual output current of the device. Limited to reference instructions Centered on, with a width of 2 h Within the ring band, high dynamic performance current tracking is achieved.

[0066] Among them, the switching drive signal can be a switching drive signal for a specific bridge arm of a three-phase two-level voltage source inverter.

[0067] In this step, a hysteresis current controller is used to compare the target compensation current with the actual output current of the active power treatment device and directly generate a switching signal, which forces the output current of the active power treatment device to track the command in real time without error, thereby achieving physical closed-loop rapid control.

[0068] Step S109: Based on the two-phase switch logic signals, map and generate drive signals.

[0069] In one optional embodiment, a switch drive signal is generated by mapping based on the two-phase switch logic signal, including: Based on the two-phase switching logic signals, the switch drive signals are generated by mapping using the following formula: ; in, Indicates the switch drive signal. Represents a mapping function. This represents a two-phase switch logic signal.

[0070] In one specific embodiment, the switching logic signal output by the hysteresis current controller, based on the two-phase stationary αβ coordinate system, is used to... Through a predefined switching table or logic decoupling circuit, three pairs of complementary PWM drive signals are generated to drive the six power switches of a three-phase two-level voltage source inverter. , , This mapping relationship must ensure that the inverter output voltage vector can effectively track the current command and meet the dead time requirements of the upper and lower switches on the same bridge arm. Its logical relationship can be expressed as follows:

[0071] in, This represents a fixed mapping function from two-phase switching logic to three-phase bridge arm drive signals. The generated drive signals, after isolation and amplification, are directly applied to the gates of each power switch.

[0072] In this step, the active control device operates according to the switching drive signal generated by the hysteresis controller, injecting precise compensation current into the common connection point of the grid and the load, so that the grid-side current is restored to a balanced three-phase sinusoidal fundamental active current, while maintaining the stability of its own DC-side voltage, thereby simultaneously achieving comprehensive control of harmonics, reactive power and three-phase imbalance.

[0073] Step S110: Under the control of the switch drive signal, output the target compensation current.

[0074] In one alternative embodiment, under the control of a drive signal, the active control device converts the energy stored in its DC-side capacitor into a target compensation current. Consistent three-phase alternating current , , Output. The target compensation current is injected in real time into the point of common coupling between the power grid and the load, and is related to the load current. , , Superimposed. According to Kirchhoff's Current Law, the grid-side current... , , The difference between the load current and the compensation current:

[0075] Due to compensation current Controlled to precisely track all negative sequence, harmonic, and reactive components in the load current, the grid-side current, after being superimposed, It contains only the fundamental positive-sequence active power component required by the load. Simultaneously, through DC-side energy balance control, the active power control device absorbs or releases a small amount of active power from the grid to compensate for its own losses and maintain the DC voltage. Constant.

[0076] In this embodiment, the traditional cascaded detection and calculation process is abandoned, and an innovative intelligent mapping method for compensation commands based on GRU neural networks is adopted. This method is based on the synchronous acquisition of multiple state variables at the front end. Through the powerful learning and memory capabilities of the GRU network for time-series dynamic features, it achieves end-to-end, delay-free direct generation of compensation current commands from system signals. This not only eliminates the phase lag introduced by multiple transformations and filtering stages in traditional methods, significantly improving the real-time performance and accuracy of the commands, but also endows it with adaptive capabilities for complex, time-varying load conditions, ensuring the effectiveness of the governance from the source of intelligent sensing.

[0077] A collaborative control architecture from intelligent decision-making to rapid execution was constructed. In the tracking and execution phase, a direct current control strategy based on hysteresis comparison was adopted. Leveraging its physical closed-loop and Bang-Bang control characteristics, it forces the active device to track commands with deadbeat-free and ultra-high dynamic response. This method eliminates the need for complex modulation algorithms and parameter tuning, and its dynamic performance far surpasses that of traditional linear controllers, providing a solid execution guarantee for achieving accurate compensation.

[0078] It achieves global synergistic optimization of managing external loads and maintaining internal balance. Through a unique dynamic energy balance mechanism on the DC side that takes into account system losses, it combines closed-loop regulation of stable DC voltage with real-time feedforward observation of switching / conduction losses. This ensures that while the active device outputs complex compensation currents, its internal power remains balanced, and the DC side voltage remains stable. This fundamentally guarantees the system's long-term operational stability and reliability while pursuing high-performance load mitigation, forming a complete technical closed loop that addresses both internal and external factors.

[0079] Corresponding to the three-phase imbalance and harmonic compensation method provided in the embodiments of this application, the embodiments of this application also provide a three-phase imbalance and harmonic compensation device, such as... Figure 2 As shown, the three-phase imbalance and harmonic compensation device includes: The acquisition module 201 is used to synchronously acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage of the active power control device at multiple consecutive moments. Module 202 is used to construct a time-series data sequence based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. Input module 203 is used to input the time-series data sequence into the pre-trained gated recurrent unit network to predict the initial compensation current containing load harmonics, reactive power and negative sequence components. The first determining module 204 is used to determine the DC-side bus current compensation component based on the DC-side bus voltage and the DC-side bus voltage reference value. The estimation module 205 is used to estimate the loss current component based on the current switching state function and output current of the active power control device. The second determining module 206 is used to determine the target compensation current based on the loss current component, the DC side bus current compensation component and the initial compensation current. The third determining module 207 is used to determine the current tracking error vector based on the target compensation current and the actual compensation current; The first generation module 208 is used to generate two-phase switching logic signals based on the current tracking error vector; The second generation module 209 is used to map and generate switch drive signals based on two-phase switch logic signals. The output module 210 is used to output the target compensation current under the control of the switch drive signal.

[0080] Corresponding to the three-phase imbalance and harmonic compensation method provided in the embodiments of this application, the embodiments of this application also provide an electronic device for performing the three-phase imbalance and harmonic compensation method, such as... Figure 3 As shown, the electronic device includes: a processor 301; and a memory 302 for storing a program for a three-phase imbalance and harmonic compensation method. After the device is powered on and the processor runs the program for the three-phase imbalance and harmonic compensation method, it performs the following steps: The active power control device simultaneously collects the grid-side three-phase voltage, load-side three-phase current, and DC-side bus voltage at multiple consecutive moments. Based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage, a time-series data sequence is constructed. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The time-series data sequence is input into a pre-trained gated recurrent unit network to predict the initial compensation current, which includes load harmonics, reactive power, and negative sequence components. The DC-side bus current compensation component is determined based on the DC-side bus voltage and the DC-side bus voltage reference value; Estimate the loss current component based on the switching state function and output current of the current active power control device; The target compensation current is determined based on the loss current component, the DC bus current compensation component, and the initial compensation current. The current tracking error vector is determined based on the target compensation current and the actual compensation current. Based on the current tracking error vector, generate two-phase switching logic signals; Based on the two-phase switch logic signals, switch drive signals are generated by mapping. The target compensation current is output under the control of the switch drive signal.

[0081] Corresponding to the three-phase imbalance and harmonic compensation method provided in the embodiments of this application, the embodiments of this application also provide a computer-readable storage medium storing a program for the three-phase imbalance and harmonic compensation method, which is executed by a processor to perform the following steps: The active power control device simultaneously collects the grid-side three-phase voltage, load-side three-phase current, and DC-side bus voltage at multiple consecutive moments. Based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage, a time-series data sequence is constructed. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The time-series data sequence is input into a pre-trained gated recurrent unit network to predict the initial compensation current, which includes load harmonics, reactive power, and negative sequence components. The DC-side bus current compensation component is determined based on the DC-side bus voltage and the DC-side bus voltage reference value; Estimate the loss current component based on the switching state function and output current of the current active power control device; The target compensation current is determined based on the loss current component, the DC bus current compensation component, and the initial compensation current. The current tracking error vector is determined based on the target compensation current and the actual compensation current. Based on the current tracking error vector, generate two-phase switching logic signals; Based on the two-phase switch logic signals, switch drive signals are generated by mapping. Under the control of the switch drive signal, the target compensation current is output. Corresponding to the three-phase imbalance and harmonic compensation method provided in this application embodiment, this application embodiment also provides a computer program containing instructions that, when executed by a computer, cause the computer to perform the following steps: The active power control device simultaneously collects the grid-side three-phase voltage, load-side three-phase current, and DC-side bus voltage at multiple consecutive moments. Based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage, a time-series data sequence is constructed. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The time-series data sequence is input into a pre-trained gated recurrent unit network to predict the initial compensation current, which includes load harmonics, reactive power, and negative sequence components. The DC-side bus current compensation component is determined based on the DC-side bus voltage and the DC-side bus voltage reference value; Estimate the loss current component based on the switching state function and output current of the current active power control device; The target compensation current is determined based on the loss current component, the DC bus current compensation component, and the initial compensation current. The current tracking error vector is determined based on the target compensation current and the actual compensation current. Based on the current tracking error vector, generate two-phase switching logic signals; Based on the two-phase switch logic signals, switch drive signals are generated by mapping. The target compensation current is output under the control of the switch drive signal.

[0082] It should be noted that for a detailed description of the three-phase imbalance and harmonic compensation device, electronic device, computer-readable storage medium and computer program product provided in the embodiments of this application, please refer to the relevant description of the embodiments of the three-phase imbalance and harmonic compensation method provided in the embodiments of this application, which will not be repeated here.

[0083] Although this application discloses preferred embodiments as described above, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be determined by the scope defined in the claims of this application.

[0084] In a typical configuration, an electronic device includes one or more processors (Central Processing Units), input / output interfaces, network interfaces, and memory.

[0085] Memory may include non-persistent storage in computer-readable media, such as random access memory and / or non-volatile memory, like read-only memory or flash memory. Memory is an example of computer-readable media.

[0086] Computer-readable media, including both permanent and non-permanent, removable and non-removable media, can store information using any method or technology. Information can be computer-readable operations, data structures, program modules, or other data. Examples of computer storage media include, but are not limited to, phase-change memory, static random access memory, dynamic random access memory, other types of random access memory, read-only memory, electrically erasable programmable read-only memory, flash memory or other memory technologies, compact disc read-only memory, digital video disc or other optical storage, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include non-transitory computer-readable media, such as modulated data signals and carrier waves.

[0087] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, compact disc read-only memory, optical storage, etc.) containing computer-usable program code.

[0088] Although this application discloses preferred embodiments as described above, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A method of three-phase unbalance and harmonic compensation, characterized by, The method comprises the following steps: synchronously collecting grid-side three-phase voltage, load-side three-phase current and DC bus voltage of the active management device at continuous multiple time points; constructing a time series data sequence based on the grid-side three-phase voltage, load-side three-phase current and DC bus voltage, wherein the time series data sequence comprises two-phase voltage component normalized values, two-phase current component normalized values and DC bus voltage normalized values; inputting the time series data sequence into a pre-trained gated recurrent unit network to predict an initial compensation current containing load harmonic and reactive and negative sequence components; determining a DC bus current compensation component based on the DC bus voltage and a DC bus voltage reference value; estimating a loss current component based on a switching state function and an output current of the current active management device; determining a target compensation current based on the loss current component, the DC bus current compensation component and the initial compensation current; determining a current tracking error vector based on the target compensation current and an actual compensation current; generating a two-phase switching logic signal based on the current tracking error vector; mapping and generating a switching drive signal based on the two-phase switching logic signal; outputting the target compensation current under the control of the switching drive signal.

2. The method of claim 1, wherein, The method comprises the following steps: performing Clark transformation on the grid-side three-phase voltage and load-side three-phase current respectively to obtain two-phase voltage components and two-phase current components; performing normalization processing on the two-phase voltage components, two-phase current components and DC bus voltage to obtain two-phase voltage component normalized values, two-phase current component normalized values and DC bus voltage normalized values; constructing a time series data sequence based on the two-phase voltage component normalized values, two-phase current component normalized values and DC bus voltage normalized values.

3. The method of claim 1, wherein, The method comprises the following steps: calculating a DC bus voltage error based on the DC bus voltage and a DC bus voltage reference value; calculating the DC bus current compensation component based on the DC bus voltage error by using the following formula: ； wherein, represents a direct current side bus current compensation component, k represents a current time index, represents a direct current side bus voltage error corresponding to the kth time in the current time, represents a sum of direct current side bus voltage errors corresponding to the kth time up to the current time, n represents a history time index, represents a proportional coefficient, represents an integral coefficient, represents a control period.

4. The method of claim 1, wherein, The method comprises the following steps: calculating an output current effective value and an average switching frequency based on the switching state function and the output current of the current active management device; estimating the loss current component based on the output current effective value, the average switching frequency and the DC bus voltage by using the following formula: ； wherein, represents the loss current component corresponding to the kth time instant, represents the power function of conduction loss, represents the output current effective value corresponding to the kth time instant, represents the power function of switching loss, represents the output current instantaneous value corresponding to the kth time instant, represents the straight line side bus voltage corresponding to the kth time instant, represents the average switching frequency.

5. The method of claim 1, wherein, The method comprises the following steps: if the current tracking error vector is greater than a preset first boundary threshold, outputting a first two-phase switching logic signal; if the current tracking error vector is less than a preset second boundary threshold, outputting a second two-phase switching logic signal.

6. The method of claim 1, wherein, The method comprises the following steps: mapping and generating the switching drive signal based on the two-phase switching logic signal by using the following formula: ； wherein, denotes a switch drive signal, denotes a mapping function, denotes a two-phase switch logic signal.

7. The method of claim 6, wherein, The training process of the gated recurrent unit network comprises the following steps: Obtain a sample training dataset, which includes a sample time series data sequence and the target compensation current label corresponding to the sample time series data sequence; The sample time series data sequence is input into the gated recurrent unit network to obtain the predicted target compensation current corresponding to the sample time series data sequence. Calculate the error between the predicted target compensation current and the target compensation current label to obtain the loss value; Based on the loss value, the model parameters of the gated recurrent unit network are adjusted until convergence.

8. A three-phase unbalance and harmonic compensation device, characterized by, include: The acquisition module is used to simultaneously acquire the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage of the active power control device at multiple consecutive moments. The construction module is used to construct a time-series data sequence based on the three-phase voltage on the grid side, the three-phase current on the load side, and the DC bus voltage on the DC side. The time-series data sequence includes per-unit values ​​of two-phase voltage components, per-unit values ​​of two-phase current components, and per-unit values ​​of DC bus voltage. The input module is used to input the time-series data sequence into a pre-trained gated recurrent unit network to predict the initial compensation current containing load harmonics, reactive power, and negative sequence components. The first determining module is used to determine the DC-side bus current compensation component based on the DC-side bus voltage and the DC-side bus voltage reference value; The estimation module is used to estimate the loss current component based on the current switching state function and output current of the active power control device. The second determining module is used to determine the target compensation current based on the loss current component, the DC side bus current compensation component, and the initial compensation current. The third determining module is used to determine the current tracking error vector based on the target compensation current and the actual compensation current. The first generation module is used to generate two-phase switching logic signals based on the current tracking error vector; The second generation module is used to map and generate switch drive signals based on the two-phase switch logic signals; The output module is used to output the target compensation current under the control of the switch drive signal.

9. An electronic device, comprising: It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the three-phase imbalance and harmonic compensation method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the three-phase imbalance and harmonic compensation method according to any one of claims 1-7.

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