Busbar Connection Fault Detection and Judgment Method Based on Fault Self-Diagnosis

Abstract

This invention discloses a method for detecting and determining busbar connection faults based on fault self-diagnosis, relating to the field of power system condition monitoring technology. The invention includes the following steps: Wireless transceiver modules are deployed in a snap-fit ​​manner on the secondary circuits of current transformers and voltage transformers in each bay, and a network is established to create a communication link between the diagnostic host and each test point; the same reference calibration signal is synchronously injected into all transceiver modules at the station, and after eliminating abnormal branches through a group consistency check, the inherent transmission characteristic parameters of each branch are extracted as subsequent compensation references; the diagnostic host controls the transceiver modules to inject spread spectrum characteristic signal sequences into designated phase circuits of designated bays; the amplitude and phase of the response signal are first compensated using the inherent parameters of each branch, and then the corrected response is compared with a fault feature database; this invention improves diagnostic sensitivity compared to traditional methods, achieving high-sensitivity fault detection independent of busbar energized operation conditions.

Description

Technical Field

[0001] This invention relates to the field of power system condition monitoring technology, and in particular to a method for detecting and determining busbar connection faults based on fault self-diagnosis. Background Technology

[0002] Busbars are the core nodes for collecting and distributing electrical energy in substations. The correctness of their wiring directly determines whether the power grid can be put into safe operation. Busbar wiring faults, such as reversed polarity of current transformers, loose secondary circuit connections, and incorrect phase sequence, if not detected before commissioning, may directly lead to malfunction or failure of protection during power supply, causing large-scale power outages or even equipment burnout. Therefore, a comprehensive fault diagnosis of busbar wiring before commissioning is an indispensable key step in substation acceptance.

[0003] Currently, busbar connection fault detection relies on a programmed verification system to inject ampere-level current into the secondary circuits of CTs and PTs before commissioning, automatically comparing amplitude and phase to generate reports. However, this cannot be implemented under cold, non-disassembly conditions, and its sensitivity to early loose connections at the tens of milliohm level is insufficient, making early warning difficult. After commissioning, infrared imaging or distributed fiber optic temperature measurement systems are used to continuously monitor the connection point temperature, but this relies on the Joule heating effect of the load current. Under no-load or light-load conditions, the temperature rise of the defect is insufficient to trigger an alarm, resulting in a time-domain blind zone. The positioning accuracy is limited by the sensor resolution, usually only reaching the interval level and not accurate to the terminal.

[0004] Most existing methods for detecting busbar wiring faults rely on passive investigation and cannot achieve highly sensitive and accurate quantitative self-diagnosis of wiring faults under cold conditions before commissioning. Summary of the Invention

[0005] The purpose of this invention is to provide a bus wiring fault detection and judgment method based on fault self-diagnosis, which solves the problem that in the prior art, bus wiring fault detection must rely on the bus being energized, and cannot achieve non-invasive, highly sensitive and precise quantification to specific terminals in a cold standby state.

[0006] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution: This invention relates to a method for detecting and determining bus wiring faults based on fault self-diagnosis, comprising the following steps: S1: Pre-select test points on the secondary circuits of current transformers and voltage transformers in each bay, and non-intrusively connect the transceiver module to the test point in a snap-fit ​​manner. Each transceiver module wirelessly networks with the diagnostic host. S2: The diagnostic host controls all transceiver modules to synchronously inject a reference calibration signal into the same phase of their respective loops, synchronously collect the response of each loop to the reference calibration signal, and upload the response data. After extracting features from the response data of each branch, the diagnostic host uses the historical health baseline as the calibration reference. If there is no historical record, the reference is selected based on the response clustering results. When clustering, the reference group is manually specified. When uniform, the group mean is taken. Using the calibration reference as the benchmark, the response deviation of each branch is calculated. If the deviation of a branch exceeds the preset health threshold, it is marked as a suspected faulty branch and removed from the reference group. The calibration reference is recalculated and corrected based on the response of the remaining healthy branches. The suspected faulty branches are then diagnosed. After confirming that they are not faulty, they are reinstated. Finally, the inherent transmission characteristic parameters of each branch are formed and stored in the database. S3: The diagnostic host controls each transceiver module to inject a characteristic signal sequence into a specified phase circuit of a specified interval. At the same time as injecting the characteristic signal sequence, all transceiver modules synchronously acquire the response signals of the current interval and the adjacent interval circuits under the synchronous clock control of the diagnostic host. S4: The diagnostic host first retrieves the inherent transmission characteristic parameters of each branch to perform amplitude attenuation compensation and phase offset compensation on the response signals of each circuit to obtain the corrected response signals; then it compares the corrected response signals with the wiring fault feature database to determine if a fault template is hit, and at the same time calculates the difference between the corrected response signals of each branch of the same bus as the basis for fault judgment. S5: Output the fault type and specific location to the graphical human-machine interface.

[0007] Furthermore, step S1 specifically includes: S1.1 On the secondary terminal blocks of the current transformers and voltage transformers in each bay, select the exposed terminals as pre-selected test points and record the correspondence between each test point and the bay and phase. S1.2 Attach the front-end acquisition fixture of the transceiver module to the exposed conductor of the pre-selected test point. The front-end acquisition fixture is a clamp-shaped structure with metal contacts on the inside. The tail end of the fixture is connected in series with the signal acquisition and injection unit inside the transceiver module through an isolation transformer. The isolation transformer is used to block the DC electrical path between the transceiver module and the secondary circuit. S1.3 After each transceiver module is powered on, it initiates wireless registration with the diagnostic host through the built-in control communication unit and completes the self-organizing network. The diagnostic host then synchronously allocates the clock.

[0008] Furthermore, step S2 specifically includes: S2.1 The diagnostic host broadcasts a synchronization trigger command to all transceiver modules. Under the same clock cycle, each transceiver module injects a reference calibration signal into the same designated phase of its connected circuit. The reference calibration signal is a low-voltage sine wave signal with preset known amplitude, frequency, and phase. S2.2 Each transceiver module synchronously acquires the response waveform of its own circuit to the reference calibration signal, extracts the amplitude attenuation rate and phase offset of the response waveform as characteristic parameters, and uploads the characteristic parameters to the diagnostic host. S2.3 The diagnostic host performs a consistency comparison of the characteristic parameters of each branch and calculates the deviation value of the characteristic parameters of each branch based on the calibration reference. The deviation value includes the amplitude attenuation rate deviation and the phase offset deviation. S2.4 If either the amplitude attenuation rate deviation or the phase offset deviation of a branch exceeds the preset health threshold, it is marked as a suspected faulty branch and removed from the benchmark group. The calibration reference is corrected by the average characteristic parameters of the remaining healthy branches. The deviation of the suspected faulty branch is then checked. After confirming that it is not a fault, it is reinstated into the benchmark group and the calibration reference is updated. S2.5 The final inherent transmission characteristic parameters of each branch, including the amplitude attenuation rate calibration value and phase offset calibration value of the branch, are stored in the database for use in step S4.

[0009] Furthermore, step S3 specifically includes: S3.1 The diagnostic host divides all the bays connected to the bus into multiple injection groups. Each bay in each injection group is used as an injection bay in a preset order, and the remaining bays are used as acquisition bays. S3.2 The diagnostic host controls the transceiver module in the current injection interval to inject a characteristic signal sequence into the designated phase circuit of the interval; the characteristic signal sequence is generated by the diagnostic host using spread spectrum modulation and contains three sweep frequency signals with different center frequencies. S3.3 During the duration of the injected characteristic signal sequence, the diagnostic host controls all transceiver modules through a synchronous clock to synchronously acquire the response signals of the loops in this interval and the acquisition intervals adjacent to the current injection interval on the same bus. S3.4 The sampling frequency and timestamp of synchronous acquisition are uniformly allocated by the synchronous clock of the diagnostic host to ensure that the acquisition windows of each transceiver module are strictly aligned in time.

[0010] Furthermore, step S4 specifically includes: S4.1 The diagnostic host retrieves the inherent transmission characteristic parameters of each branch stored in step S2 from the database. The inherent transmission characteristic parameters include the amplitude attenuation rate calibration value and phase offset calibration value of the branch. S4.2 The diagnostic host multiplies the acquired response signals of each loop by the reciprocal of the amplitude attenuation rate calibration value of the corresponding branch, and shifts the phase offset calibration value of the corresponding branch in the opposite direction on the time axis to obtain the corrected response signal. S4.3 The diagnostic host performs waveform matching between the corrected response signal and the fault templates pre-stored in the wiring fault feature library. The wiring fault feature library pre-stores six types of fault templates, including reverse polarity connection, phase sequence error, high impedance connection, CT secondary open circuit, PT secondary disconnection, and multi-point grounding. Each type of fault template includes the amplitude frequency response curve and phase frequency response curve under the fault condition. S4.4 The diagnostic host calculates the difference between the corrected response signals of adjacent branches under the same bus. The difference is the vector difference between the response signals of the branches within the synchronous acquisition window, which includes two dimensions: amplitude difference and phase difference. S4.5. The vector difference is used as the basis for fault determination. When the vector difference exceeds the preset fault threshold in a specific frequency band, it is determined that there is a wiring fault in the corresponding branch.

[0011] Furthermore, step S5 specifically includes: S5.1 The diagnostic host will associate the determined fault type and fault location with the pre-drawn substation single-line diagram, and highlight the fault interval and phase on the single-line diagram in a red flashing manner; S5.2 Next to the highlighted position on the single-line diagram, a fault information window pops up, displaying the fault type name, fault phase, and terminal number where the fault is located. S5.3 When multiple faults are identified, the diagnostic host will simultaneously highlight all fault locations on the single-line diagram and summarize all fault information in a list in the sidebar of the interface. Each record in the list includes the interval number, phase, fault type, and terminal number.

[0012] The present invention has the following beneficial effects: This invention solves the problem of extracting weak fault signals in a cold state by injecting characteristic signal sequences into designated phase circuits in groups and calculating the vector difference after acquiring the response signals of the tested branch and adjacent normal branches under synchronous clock control. The tested branch and adjacent branches are in the same electromagnetic environment, and common-mode interference is canceled in the difference calculation. Only the abnormal response of the faulty branch caused by wiring defects is retained, which improves the diagnostic sensitivity compared with traditional methods and realizes high-sensitivity fault detection without relying on the energized operation of the bus.

[0013] This invention solves the problem of interference in fault diagnosis caused by inherent differences between branches due to CT manufacturing differences, different secondary cable lengths, and discrete components of transceiver modules. It ensures that the difference value purely reflects the fault characteristics and greatly reduces the misjudgment rate. By performing synchronous self-calibration of all branches in the entire station before formal diagnosis, the inherent transmission characteristic parameters of each branch are obtained in advance. During diagnosis, the amplitude attenuation compensation and phase offset compensation of the response signal are performed before the difference value is calculated.

[0014] This invention introduces a group consistency verification mechanism in the self-calibration stage. By calculating the response deviation of each branch and removing branches exceeding the threshold from the reference group, the calibration reference is re-corrected. This solves the problem that the abnormal characteristics of branches with existing faults during self-calibration are incorrectly recorded as inherent parameters, causing subsequent compensation operations to cancel out the fault characteristics and miss the detection, thus ensuring the purity of the calibration reference.

[0015] This invention prioritizes retrieving historical health baseline records as calibration references during the self-calibration stage. When no historical records are available, cluster analysis is performed on the responses. During clustering, a benchmark group is manually specified. This solves the problem that when most branches under the bus have early common defects of the same type and similar degree, the group mean is lowered, causing faulty branches to be misjudged as healthy. It also eliminates the risk of calibration benchmarks being contaminated in most defective states. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is a flowchart of the method of the present invention. Detailed Implementation

[0018] To make the technical means, creative features, objectives and effects of this invention easier to understand, the invention will be further described below in conjunction with specific embodiments.

[0019] See Figure 1 This invention relates to a method for detecting and determining bus wiring faults based on fault self-diagnosis, comprising the following steps: S1: Pre-select test points on the secondary circuits of current transformers and voltage transformers in each bay, and non-intrusively connect the transceiver module to the test point in a snap-fit ​​manner. Each transceiver module wirelessly networks with the diagnostic host. Step S1 specifically includes: S1.1 On the secondary terminal blocks of the current transformers and voltage transformers in each bay, select the exposed terminals as pre-selected test points and record the correspondence between each test point and the bay and phase. S1.2. The front-end acquisition clamp of the transceiver module is clamped onto the exposed conductor of the pre-selected test point. The front-end acquisition clamp is a clamp-shaped structure with metal contacts on the inside. The tail end of the clamp is connected in series with the signal acquisition and injection unit inside the transceiver module via an isolation transformer. The isolation transformer is used to block the DC electrical path between the transceiver module and the secondary circuit. In this invention, the clamp-shaped buckle clamp is clamped onto the cable or terminal in a clamp-shaped or buckling manner to achieve electrical contact. The isolation transformer is connected in series with the isolation transformer in the secondary circuit measurement system to achieve electrical isolation. The withstand voltage between the primary and secondary sides of the isolation transformer is not less than 2kV. The isolation transformer and the clamp-shaped buckle clamp are both existing technologies and are common knowledge in the field, so they will not be described in detail. S1.3 After each transceiver module is powered on, it initiates wireless registration with the diagnostic host through the built-in control communication unit and completes the self-organizing network. The diagnostic host then synchronously allocates the clock.

[0020] S2: The diagnostic host controls all transceiver modules to synchronously inject a reference calibration signal into the same phase of their respective loops, synchronously collect the response of each loop to the reference calibration signal, and upload the response data. After extracting features from the response data of each branch, the diagnostic host uses the historical health baseline as the calibration reference. If there is no historical record, the reference is selected based on the response clustering results. When clustering, the reference group is manually specified. When uniform, the group mean is taken. Using the calibration reference as the benchmark, the response deviation of each branch is calculated. If the deviation of a branch exceeds the preset health threshold, it is marked as a suspected faulty branch and removed from the reference group. The calibration reference is recalculated and corrected based on the response of the remaining healthy branches. The suspected faulty branches are then diagnosed. After confirming that they are not faulty, they are reinstated. Finally, the inherent transmission characteristic parameters of each branch are formed and stored in the database. Step S2 specifically includes: S2.1 The diagnostic host broadcasts a synchronization trigger command to all transceiver modules. Under the same clock cycle, each transceiver module injects a reference calibration signal into the same designated phase of its connected circuit. The reference calibration signal is a low-voltage sine wave signal with preset known amplitude, frequency, and phase. S2.2 Each transceiver module synchronously acquires the response waveform of its own circuit to the reference calibration signal, extracts the amplitude attenuation rate and phase offset of the response waveform as characteristic parameters, and uploads the characteristic parameters to the diagnostic host. S2.3 The diagnostic host performs a consistency comparison of the characteristic parameters of each branch and calculates the deviation value of the characteristic parameters of each branch based on the calibration reference. The deviation value includes the amplitude attenuation rate deviation and the phase offset deviation. S2.4 If either the amplitude attenuation rate deviation or the phase offset deviation of a branch exceeds the preset health threshold, it is marked as a suspected faulty branch and removed from the benchmark group. The calibration reference is corrected by the average characteristic parameters of the remaining healthy branches. The deviation of the suspected faulty branch is then checked. After confirming that it is not a fault, it is reinstated into the benchmark group and the calibration reference is updated. S2.5 The final inherent transmission characteristic parameters of each branch, including the amplitude attenuation rate calibration value and phase offset calibration value of the branch, are stored in the database for use in step S4.

[0021] S3: The diagnostic host controls each transceiver module to inject a characteristic signal sequence into a specified phase circuit of a specified interval. At the same time as injecting the characteristic signal sequence, all transceiver modules synchronously acquire the response signals of the current interval and the adjacent interval circuits under the synchronous clock control of the diagnostic host. Step S3 specifically includes: S3.1 The diagnostic host divides all the bays connected to the bus into multiple injection groups. Each bay in each injection group is used as an injection bay in a preset order, and the remaining bays are used as acquisition bays. S3.2 The diagnostic host controls the transceiver module in the current injection interval to inject a characteristic signal sequence into the designated phase circuit of the interval; the characteristic signal sequence is generated by the diagnostic host using spread spectrum modulation and contains three sweep frequency signals with different center frequencies. S3.3 During the duration of the injected characteristic signal sequence, the diagnostic host controls all transceiver modules through a synchronous clock to synchronously acquire the response signals of the loops in this interval and the acquisition intervals adjacent to the current injection interval on the same bus. S3.4 The sampling frequency and timestamp of synchronous acquisition are uniformly allocated by the synchronous clock of the diagnostic host to ensure that the acquisition windows of each transceiver module are strictly aligned in time.

[0022] S4: The diagnostic host first retrieves the inherent transmission characteristic parameters of each branch to perform amplitude attenuation compensation and phase offset compensation on the response signals of each circuit to obtain the corrected response signals; then it compares the corrected response signals with the wiring fault feature database to determine if a fault template is hit, and at the same time calculates the difference between the corrected response signals of each branch of the same bus as the basis for fault judgment. Step S4 specifically includes: S4.1 The diagnostic host retrieves the inherent transmission characteristic parameters of each branch stored in step S2 from the database. The inherent transmission characteristic parameters include the amplitude attenuation rate calibration value and phase offset calibration value of the branch. S4.2 The diagnostic host multiplies the acquired response signals of each loop by the reciprocal of the amplitude attenuation rate calibration value of the corresponding branch, and shifts the phase offset calibration value of the corresponding branch in the opposite direction on the time axis to obtain the corrected response signal. S4.3 The diagnostic host performs waveform matching between the corrected response signal and the fault templates pre-stored in the wiring fault feature library. The wiring fault feature library pre-stores six types of fault templates, including reverse polarity connection, phase sequence error, high impedance connection, CT secondary open circuit, PT secondary disconnection, and multi-point grounding. Each type of fault template includes the amplitude frequency response curve and phase frequency response curve under the fault condition. S4.4 The diagnostic host calculates the difference between the corrected response signals of adjacent branches under the same bus. The difference is the vector difference between the response signals of the branches within the synchronous acquisition window, which includes two dimensions: amplitude difference and phase difference. S4.5. The vector difference is used as the basis for fault determination. When the vector difference exceeds the preset fault threshold in a specific frequency band, it is determined that there is a wiring fault in the corresponding branch.

[0023] S5: Output the fault type and specific location to the graphical human-machine interface.

[0024] Step S5 specifically includes: S5.1 The diagnostic host will associate the determined fault type and fault location with the pre-drawn substation single-line diagram, and highlight the fault interval and phase on the single-line diagram in a red flashing manner; S5.2 Next to the highlighted position on the single-line diagram, a fault information window pops up, displaying the fault type name, fault phase, and terminal number where the fault is located. S5.3 When multiple faults are identified, the diagnostic host will simultaneously highlight all fault locations on the single-line diagram and summarize all fault information in a list in the sidebar of the interface. Each record in the list includes the interval number, phase, fault type, and terminal number.

[0025] In this invention, the diagnostic host is the core control and computing unit, deployed in the main control room of the substation or in the bus protection cabinet. During the deployment phase, the diagnostic host is responsible for receiving wireless registration requests from each transceiver module, allocating synchronization clocks, and completing network formation. During the self-calibration phase, the diagnostic host controls all transceiver modules to synchronously inject reference calibration signals, receive response data from each branch, perform feature extraction and group consistency checks, and generate and store inherent transmission characteristic parameters of each branch. During the diagnostic phase, the diagnostic host controls each transceiver module to inject feature signal sequences according to preset groups and sequences, synchronously collect response signals, retrieve inherent parameters for compensation and correction, compare the corrected response with the fault feature database, calculate the vector difference between branches, and comprehensively determine the fault type and location. During the output phase, the diagnostic host associates the diagnostic results with the substation single-line diagram and presents them graphically, while generating a diagnostic report. The transceiver module is deployed at the pre-selected test points of each secondary circuit in each bay. It is the front-end device for performing signal injection and response acquisition. Each transceiver module contains three parts: a control and communication unit, a signal acquisition and injection unit, and an isolation transformer. The control and communication unit is responsible for wireless data exchange with the diagnostic host, receiving injection commands and synchronous trigger commands. The signal acquisition and injection unit is responsible for generating and injecting reference calibration signals and characteristic signal sequences according to the commands of the diagnostic host, and simultaneously acquiring the response waveform of the secondary circuit. The isolation transformer is connected in series between the signal acquisition and injection unit and the front-end acquisition fixture to block the DC electrical path between the internal circuit of the transceiver module and the secondary circuit, ensuring that the diagnostic process does not damage the integrity and safety of the original secondary circuit. The front-end acquisition fixture is a clamp-shaped structure with metal contacts on the inside, which is snapped onto the exposed conductor of the test point to achieve non-intrusive access.

[0026] The working principle of this invention is as follows: During the self-calibration stage, all transceiver modules under the control bus of the diagnostic host synchronously inject the same reference calibration signal into the same phase of their respective circuits. Since the injected signals are consistent, the difference in the response of each branch comes only from its inherent transmission characteristics. The diagnostic host extracts the amplitude attenuation rate and phase offset of each branch. After eliminating suspected faulty branches through group consistency verification, the inherent transmission characteristic parameters of each branch are formed and stored in the database.

[0027] During the formal diagnostic phase, the diagnostic host injects characteristic signal sequences into designated phase circuits within a specified interval. When these injected signals are transmitted in the secondary circuit, wiring faults such as reversed polarity, high-impedance loose connections, or open-circuit current transformers (CTs) will cause abnormal signal attenuation or phase abrupt changes at specific frequency bands. All transceiver modules synchronously acquire response signals from their own interval and adjacent intervals under synchronous clock control. The diagnostic host first compensates and corrects the responses of each circuit using self-calibrated inherent parameters to eliminate interference from inherent branch differences in the diagnostic results. Then, it performs waveform matching between the corrected responses and templates in the fault feature library. Simultaneously, it calculates the vector difference between the corrected responses of the tested branch and adjacent normal branches. Since adjacent branches are in the same electromagnetic environment, environmental common-mode interference is canceled out in the difference calculation, highlighting the abnormal response of the faulty branch caused by wiring defects. When the corrected response hits the fault template and the vector difference exceeds a preset threshold, a wiring fault is determined in the corresponding branch, and the fault type and terminal-level location are output to the graphical interface.

[0028] This method separates weak fault signals in the cold state from inherent branch differences and common-mode interference in the field through hierarchical processing of calibration, compensation, and differential. It achieves high sensitivity and accurate fault location self-diagnosis without relying on the busbar being energized or without disassembling the secondary circuit.

[0029] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A method for busbar connection fault detection and determination based on fault self-diagnosis, characterized in that, Includes the following steps: S1: Pre-select test points on the secondary circuits of current transformers and voltage transformers in each bay, and non-intrusively connect the transceiver module to the test point in a snap-fit ​​manner. Each transceiver module wirelessly networks with the diagnostic host. S2: The diagnostic host controls all transceiver modules to synchronously inject the reference calibration signal into the same phase of their respective circuits, synchronously collect and upload the response, extract features from the response of each branch, prioritize the historical health baseline as the calibration reference, and select based on response clustering when there is no historical record. The cluster is manually specified as the reference group, and the group mean is taken uniformly. Calculate the response deviation of each branch. If it exceeds the threshold, mark it as a suspected fault and remove it. Use the response of the remaining healthy branches to correct the calibration reference. Review the suspected branches. After confirming that they are not faulty, they are reintroduced. Form the inherent transmission characteristic parameters of each branch and store them in the database. S3: The diagnostic host controls each transceiver module to inject a characteristic signal sequence into a specified phase circuit of a specified interval. At the same time as injecting the characteristic signal sequence, all transceiver modules synchronously acquire the response signals of the current interval and the adjacent interval circuits under the synchronous clock control of the diagnostic host. S4: The diagnostic host first retrieves the inherent transmission characteristic parameters of each branch to perform amplitude attenuation compensation and phase offset compensation on the response signals of each circuit to obtain the corrected response signals; then it compares the corrected response signals with the wiring fault feature database to determine if a fault template is hit, and at the same time calculates the difference between the corrected response signals of each branch of the same bus as the basis for fault judgment. S5: Output the fault type and specific location to the graphical human-machine interface.

2. The busbar connection fault detection and determination method based on fault self-diagnosis according to claim 1, characterized in that, Step S1 specifically includes: S1.1 On the secondary terminal blocks of the current transformers and voltage transformers in each bay, select the exposed terminals as pre-selected test points and record the correspondence between each test point and the bay and phase. S1.

2. The front-end acquisition fixture of the transceiver module is clamped onto the exposed conductor of the pre-selected test point. The front-end acquisition fixture is a clamp-shaped structure with metal contacts on the inside. The tail end of the fixture is connected in series with the signal acquisition and injection unit inside the transceiver module via an isolation transformer. The isolation transformer is used to block the DC electrical path between the transceiver module and the secondary circuit. S1.3 After each transceiver module is powered on, it initiates wireless registration with the diagnostic host through the built-in control communication unit and completes the self-organizing network. The diagnostic host then synchronously allocates the clock.

3. The busbar connection fault detection and determination method based on fault self-diagnosis according to claim 1, characterized in that, Step S2 specifically includes: S2.1 The diagnostic host broadcasts a synchronization trigger command to all transceiver modules. Under the same clock cycle, each transceiver module injects a reference calibration signal into the same designated phase of its connected circuit. The reference calibration signal is a low-voltage sine wave signal with preset known amplitude, frequency, and phase. S2.2 Each transceiver module synchronously acquires the response waveform of its own circuit to the reference calibration signal, extracts the amplitude attenuation rate and phase offset of the response waveform as characteristic parameters, and uploads the characteristic parameters to the diagnostic host. S2.3 The diagnostic host performs a consistency comparison of the characteristic parameters of each branch, and calculates the deviation value of the characteristic parameters of each branch based on the calibration reference. The deviation value includes the amplitude attenuation rate deviation and the phase offset deviation. S2.4 If either the amplitude attenuation rate deviation or the phase offset deviation of a certain branch exceeds the preset health threshold, it is marked as a suspected faulty branch and removed from the benchmark group. The calibration reference is corrected by the average characteristic parameters of the remaining healthy branches. The deviation of the suspected faulty branch is then checked. After confirming that it is not a fault, it is reinstated into the benchmark group and the calibration reference is updated. S2.5 The final inherent transmission characteristic parameters of each branch, including the amplitude attenuation rate calibration value and phase offset calibration value of the branch, are stored in the database for use in step S4.

4. The busbar connection fault detection and determination method based on fault self-diagnosis according to claim 1, characterized in that, Step S3 specifically includes: S3.1 The diagnostic host divides all the intervals connected to the bus into multiple injection groups. Each interval in each injection group is used as an injection interval in a preset order, and the remaining intervals are used as acquisition intervals. S3.2 The diagnostic host controls the transceiver module in the current injection interval to inject the characteristic signal sequence into the designated phase loop of the interval; the characteristic signal sequence is generated by the diagnostic host using spread spectrum modulation and contains three sweep frequency signals with different center frequencies; S3.3 During the duration of the injected characteristic signal sequence, the diagnostic host controls all transceiver modules through a synchronization clock to synchronously acquire the response signals of the loops of the current interval and the acquisition intervals adjacent to the current injection interval on the same bus. S3.4 The sampling frequency and timestamp of the synchronous acquisition are uniformly allocated by the synchronous clock of the diagnostic host to ensure that the acquisition windows of each transceiver module are strictly aligned in time.

5. The busbar wiring fault detection and judgment method based on fault self-diagnosis according to claim 1, characterized in that, Step S4 specifically includes: S4.1 The diagnostic host retrieves the inherent transmission characteristic parameters of each branch stored in step S2 from the database. The inherent transmission characteristic parameters include the amplitude attenuation rate calibration value and the phase offset calibration value of the branch. S4.2 The diagnostic host multiplies the acquired response signals of each loop by the reciprocal of the amplitude attenuation rate calibration value of the corresponding branch, and shifts the phase offset calibration value of the corresponding branch in the opposite direction on the time axis to obtain the corrected response signal. S4.3 The diagnostic host performs waveform matching between the corrected response signal and the fault templates pre-stored in the wiring fault feature library. The wiring fault feature library pre-stores six types of fault templates, including reverse polarity connection, phase sequence error, high impedance connection, CT secondary open circuit, PT secondary disconnection, and multi-point grounding. Each type of fault template includes the amplitude frequency response curve and phase frequency response curve under the fault condition. S4.4 The diagnostic host calculates the difference between the corrected response signals of adjacent branches under the same bus. The difference is the vector difference between the response signals of the branches within the synchronous acquisition window, which includes two dimensions: amplitude difference and phase difference. S4.

5. The vector difference is used as the basis for fault determination. When the vector difference exceeds the preset fault threshold in a specific frequency band, it is determined that there is a wiring fault in the corresponding branch.

6. The bus wiring fault detection and determination method based on fault self-diagnosis according to claim 1, characterized in that, Step S5 specifically includes: S5.1 The diagnostic host will associate the determined fault type and fault location with the pre-drawn substation single-line diagram, and highlight the fault interval and phase on the single-line diagram in a red flashing manner; S5.2 Next to the highlighted position on the single-line diagram, a fault information window pops up, which displays the fault type name, fault phase, and terminal number where the fault is located. S5.3 When multiple faults are identified, the diagnostic host will simultaneously highlight all fault locations on the single-line diagram and summarize all fault information in a list in the sidebar of the interface. Each record in the list includes the interval number, phase, fault type, and terminal number.

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