Supporting custom task flow association methods

Abstract

This invention relates to the field of management and task scheduling technology, specifically to a method for supporting custom task flow association, comprising the following steps: receiving intervention instructions, parsing and extracting various code bits to establish entity associations, reading bitmaps to determine occupancy and generate scheduling registrations, matching identities and addresses to locate based on indexes and generate association registrations, writing devices and addresses to pointers, locking masks to construct bindings, reading and filtering sequential records, writing to structure addresses, and verifying status. In this invention, dynamic allocation is achieved by parsing and extracting code bits and comparing them with indexes to determine occupancy in the bitmap, precise location is achieved by matching identities and addresses, execution relationships are established by combining pointer writing and mask locking, flow verification is performed based on the read sequential records, and the mapping order between work nodes is dynamically established. This effectively eliminates the blocking caused by reading data tables row by row, decouples business logic from storage dependencies, and improves orchestration flexibility and concurrent processing efficiency.

Description

Technical Field

[0001] This invention relates to the fields of management and task scheduling technology, and in particular to a method that supports custom task flow association. Background Technology

[0002] The management and task scheduling technology field mainly involves the orchestration, allocation, and lifecycle tracking of business flows within or across organizations. Its core aspects include task creation, dependency establishment, executor assignment, and status transition control. By pre-setting a business flow node system and flow path rules, complex business objectives are broken down into specific work units that can be executed in a specific order, and subsequent work unit execution is triggered based on business conditions. Traditional customizable task flow association methods refer to orchestration techniques that establish the sequence and dependencies of work items at different stages of a business flow. Traditionally, this involves directly writing node connection logic files at the code level. Developers manually write text configuration files containing identifiers for preceding and subsequent work items, as well as flow trigger conditions, and store these files in a relational database table. When a work item flow request is received, the identifier fields in the aforementioned table are read line by line, and the status field of the current work item is compared with the preset flow trigger conditions. If the conditions match, the subsequent work item identifier is extracted and a new to-do record is written to the corresponding personnel account's to-do list.

[0003] Traditional business processes require writing node connection logic files at the code level when handling workflows. This involves manually writing text configuration files containing pre- and post-identifiers and trigger conditions, and then statically storing these configuration files in a relational database. When a request is received, the identifier fields must be read line by line for comparison. This operating mode results in extremely high coupling between business nodes. Frequent line-by-line database read operations can easily cause response delays and resource blockages in concurrent scenarios. When business rules change, the underlying files need to be manually modified for maintenance, which greatly increases operational costs and the risk of process stagnation. Summary of the Invention

[0004] To achieve the above objectives, the present invention adopts the following technical solution, which supports a custom task flow association method, including the following steps: S1: Receive the electrical signal sequence of intervention instructions through the mobile communication terminal, parse the sequence to extract the device code, identity code and node index, establish entity association based on the device code, identity code and node index, and generate task flow association instructions; S2: Extract the device code according to the task flow association instruction, read the machine tool operation bitmap, compare the machine tool operation bitmap with the idle code to determine the occupancy status, schedule the device code according to the occupancy status, and generate the device scheduling registration; S3: Extract the identity code according to the task flow association instructions, read the address, match the identity code and the address, perform positioning in the R&D table and the procurement table according to the node index, and generate task node association registration; S4: Extract the structure address based on the task node association registration, write the device code into the device pointer, write the address into the personnel pointer, lock the process mask for the structure address, and generate the task execution binding registration; S5: Based on the task execution binding registration, extract the device code and address, read the sequential records from the R&D table and the procurement table, filter the sequential records and write them into the structure address, determine the status register area in the structure address, and generate a customizable task flow association scheme.

[0005] As a further aspect of the present invention, the task flow association instruction includes a device address code identifier, a personnel identification identifier, a task node index identifier, and a task flow association identifier; the device scheduling registration includes a device address identification item, a device occupancy status identifier, a device idle determination identifier, and a device scheduling flag item; the task node association registration includes a personnel identification item, a terminal communication address identifier, a task node index identifier, and a flow node source identifier; the task execution binding registration includes a device execution address field, a personnel communication address field, a flow lock identifier, and a task node structure identifier; and the customizable task flow association scheme includes a task node sequence identifier, a task flow status identifier, a flow node configuration item, and a flow extension identifier.

[0006] As a further aspect of the present invention, the process mask for locking the structure address sets a process control mask for a specified structure address to restrict and fix the access and execution permissions of the task process.

[0007] As a further aspect of the present invention, the sequential recording and writing of the structure address extracts relevant record data in a predetermined order and stores it in the corresponding structure address to obtain a readable and executable process data structure.

[0008] As a further aspect of the present invention, the specific steps of S1 are as follows: S101: Obtain the electrical signal sequence of the intervention instruction received by the mobile communication terminal, perform bit-by-bit segmentation and numerical conversion according to the preset bit segment rules, obtain the device code sequence, identity code sequence and task node index sequence, and generate the instruction field parsing matrix; S102: Based on the instruction field parsing matrix, perform merging processing on the device address encoding sequence to establish a device node index table, perform deduplication verification on the personnel identification code sequence to form a personnel number sequence, and perform sequential sorting according to the task node index sequence to establish an execution entity node mapping table; S103: Based on the execution entity node mapping table, the device address code and personnel number sequence of the device node index table are matched to execute key values, the task node index is written into the corresponding entity unit, the correspondence between the task node and the execution entity is established, and the task flow association instruction is generated.

[0009] As a further aspect of the present invention, the specific steps of S2 are as follows: S201: Retrieve the device address code according to the task flow association instruction, call the control bus to read the corresponding machine tool operation bitmap signal, perform bit order expansion and rearrangement processing on the bitmap signal to form a device status bit value sequence, and generate a machine tool operation status matrix. S202: Based on the machine tool operating status matrix, obtain the preset idle feature code, perform a bit-by-bit equal value comparison between the status bit sequence and the idle feature code, count the number of consistent bits and perform an occupancy determination operation to obtain the equipment occupancy status table; S203: Retrieve the device address code sequence according to the device occupancy status table, perform status filtering operation on the occupancy mark, retain the idle device address code and establish an index correspondence, and generate a device scheduling registration.

[0010] As a further aspect of the present invention, the specific steps of S3 are as follows: S301: Retrieve the personnel identification code sequence according to the task flow association instruction, read the terminal communication address record of the global memory mapping table, perform address index comparison on the personnel identification code sequence and establish an identity address correspondence table, and generate a terminal identity matching table. S302: Retrieve the task node index sequence according to the terminal identity matching table, read the R&D task process node table and the procurement task process node table, perform node location retrieval on the task node index and form a node number sequence to obtain the task node location table. S303: Based on the task node positioning table and the terminal identity matching table, execute the node number and personnel identification code association record, write the node number into the terminal communication address index unit, establish the node and identity correspondence relationship, and generate task node association registration.

[0011] As a further aspect of the present invention, the specific steps of S4 are as follows: S401: Based on the task node association registration, retrieve the task node structure address sequence, perform field location and parsing of the structure address, extract the device execution pointer address segment and the personnel execution pointer address segment, establish a node address index sequence, and generate a task node address table; S402: Retrieve the device address code and terminal communication address according to the task node address table, perform address replacement on the device execution pointer address field and write it into the device address code, perform address replacement on the personnel execution pointer address field and write it into the terminal communication address, and establish a node execution pointer mapping table; S403: Based on the node, retrieve the process lock mask field from the pointer mapping table, perform bit order lock bit construction operation on the process lock mask, write the lock bit into the corresponding task node structure address unit, and generate task execution binding registration.

[0012] As a further aspect of the present invention, the specific steps of S5 are as follows: S501: Based on the task execution binding registration and retrieval device address code and terminal communication address sequence, read the task node sequence record of the R&D task process node table and the procurement task process node table, perform indexing and sorting on the node sequence record, and generate a task node sequence table. S502: Retrieve the node sequence according to the task node sequence table, perform process flow filtering on the node sequence and write it into the field corresponding to the task node structure address, establish the index relationship between the node sequence and the task node structure address, and obtain the task node write table. S503: Based on the task node write table, retrieve the task node structure address, perform status bit determination on the process status register value and record the running status mark, establish a node status and node sequence association record, and generate a customizable task process association scheme.

[0013] As a further aspect of the present invention, the node status is associated with the node sequence record, establishing a correspondence between the running status information of the task node and the sequential position in the task flow to form a recorded data structure.

[0014] Compared with the prior art, the advantages and positive effects of the present invention are as follows: In this invention, the underlying entity association is constructed by extracting device codes and node indexes through sequence parsing. The machine tool operation bitmap and idle code are compared in real time to determine the occupancy status and complete dynamic allocation. This eliminates the dependency on fixed configurations. The identity code and address are matched and precise positioning is performed in the R&D table and the procurement table. The extracted structural address is written into the device and personnel pointers. The structural address is locked by the process mask to construct the execution binding relationship. Based on the binding relationship, the sequential records are read in the two tables and written into the structural address. The status register area is judged for flow verification. The execution order mapping between work nodes is dynamically established, eliminating the resource blocking caused by reading the data table row by row. The business logic and storage dependency are deeply decoupled, providing orchestration flexibility and concurrent processing efficiency. Attached Figure Description

[0015] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0016] Figure 1 This is a schematic diagram of the steps of the present invention; Figure 2 This is a detailed schematic diagram of S1 of the present invention; Figure 3 This is a detailed schematic diagram of S2 of the present invention; Figure 4 This is a detailed schematic diagram of S3 of the present invention; Figure 5 This is a detailed schematic diagram of S4 of the present invention; Figure 6 This is a detailed schematic diagram of S5 of the present invention. Detailed Implementation

[0017] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0018] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0019] Please see Figure 1 This invention provides a method for supporting custom task flow association, including the following steps: S1: Receive the intervention instruction electrical signal sequence through the mobile communication terminal, perform bit-by-bit parsing of the intervention instruction electrical signal sequence, and analyze the device address code, personnel identification code and task node index in the electrical signal sequence. Based on the device address code, personnel identification code and task node index, establish the correspondence between task nodes and execution entities, and generate task flow associated instructions. S2: Extract the device address code according to the task flow association instructions, read the machine tool running bitmap signal corresponding to the device address code through the control bus, compare the machine tool running bitmap signal with the idle feature code and determine the device occupancy status, perform device scheduling filtering on the device address code according to the comparison result, and generate device scheduling registration; S3: Extract the identity code according to the task flow association instruction, read the terminal communication address record in the global memory mapping table, perform identity matching judgment on the personnel identity identification code and the terminal communication address record, and perform node positioning comparison in the R&D task flow node table and the procurement task flow node table according to the task node index to generate task node association registration; S4: Extract the task node structure address based on the task node association registration, replace and adjust the device execution pointer and personnel execution pointer execution addresses in the task node structure address, write the device address code into the device execution pointer position, write the terminal communication address into the personnel execution pointer position, and perform bitmap locking construction on the process locking mask in the task node structure address to generate task execution binding registration; S5: Extract the device address code and terminal communication address based on the task execution binding registration, read the task node sequence record from the R&D task process node table and the procurement task process node table, filter the execution process sequence of the task node sequence record and write it into the task node structure address, perform running status judgment on the process status register area in the task node structure address, and generate a task process association scheme that supports customization.

[0020] The task flow association instructions include device address code identifier, personnel identification identifier, task node index identifier, and task flow association identifier. The device scheduling registration includes device address identification item, device occupancy status identifier, device idle judgment identifier, and device scheduling flag item. The task node association registration includes personnel identification item, terminal communication address identifier, task node index identifier, and flow node source identifier. The task execution binding registration includes device execution address field, personnel communication address field, flow lock identifier bit, and task node structure identifier. The customizable task flow association scheme includes task node sequence identifier, task flow status identifier, flow node configuration item, and flow extension identifier.

[0021] Please see Figure 2 The specific steps of S1 are as follows: S101: Obtain the electrical signal sequence of the intervention instruction received by the mobile communication terminal, perform bit-by-bit segmentation and numerical conversion according to the preset bit segment rules, obtain the device code sequence, identity code sequence and task node index sequence, and generate the instruction field parsing matrix; The system continuously reads the serial electrical signal data stream received by the mobile communication terminal in the 2400 MHz band via the underlying hardware interface. It performs discretization sampling on the serial electrical signal data stream at a sampling rate of 1024 times per second, storing the collected discrete signal values ​​in a 4096-byte first-in-first-out (FIFO) circular buffer. Noise denoising preprocessing is performed on the discrete signal values ​​imported into the buffer, extracting the voltage amplitude data of the current sampling point and its two adjacent sampling points. The weight coefficient for the center sampling point is set to 0.4, the weight coefficient for the two directly adjacent sampling points is set to 0.2, and the weight coefficient for the two outermost sampling points is set to 0.1. The extracted voltage amplitude values ​​of the five sampling points are multiplied sequentially by their corresponding weight coefficients. The five multiplication results are then summed to derive the smoothed actual reference voltage amplitude. For example, the voltage amplitudes of five consecutive sampling points are extracted as 3 mV, 4 mV, 5 mV, 4 mV, and 3 mV, respectively. These are multiplied by weighting coefficients of 0.1, 0.2, 0.4, 0.2, and 0.1 to obtain 0.3 mV, 0.8 mV, 2.0 mV, 0.8 mV, and 0.3 mV. Summing these five products yields a smoothed actual reference voltage amplitude of 4.2 mV. The advantage of this calculation logic is that by introducing a center-weighted summation calculation method based on a fixed time window, high-frequency spike fluctuations caused by spatial electromagnetic interference are removed. The smoothed voltage amplitude is then compared with a preset high / low level threshold of 1.5 mV. Values ​​higher than 1.5 mV are recorded as logic high (1), and values ​​lower than 1.5 mV are recorded as logic low (0), thus reconstructing a standard binary intervention command electrical signal sequence of length 128 bits. The 128-bit sequence is segmented bit-by-bit according to a preset segmentation rule. This rule defines bits 1 to 32 as the device address segment, bits 33 to 96 as the personnel identification segment, and bits 97 to 128 as the task node segment. The binary data from bits 1 to 32 is extracted. Each bit is multiplied by a power of 2 according to its positional weight from least significant bit to most significant bit. The 32 products are then summed to obtain a decimal device address code sequence. For example, if the extracted partial binary data has a 1 in the first bit and a 1 in the fourth bit, with the rest being 0, it is multiplied by 1 and 8 respectively and summed to obtain a single device address code of 9. Following the same bit order expansion and weighted summation logic, the extracted binary data from bits 33 to 96 is converted to decimal values ​​to obtain a personnel identification code sequence. For example, the calculated personnel identification code is 10025. Similarly, convert the binary data from the 97th to the 128th bit into decimal values ​​to obtain the task node index sequence. For example, the conversion and calculation result in a task node index value of 7.A contiguous address space with 100 rows and 3 columns is dynamically allocated in the memory heap area. All converted device address codes are written sequentially into the first column of this contiguous address space, all personnel identification codes are written sequentially into the second column, and the corresponding calculated task node index sequences are written sequentially into the third column. An instruction field parsing matrix data structure is established according to the row correspondence.

[0022] S102: Based on the instruction field parsing matrix, perform merging processing on the device address encoding sequence to establish a device node index table, perform deduplication verification on the personnel identification code sequence to form a personnel number sequence, and perform sequential sorting according to the task node index sequence to establish an execution entity node mapping table; The instruction field parsing matrix generated in the memory heap is read. All device address codes in the first column of the matrix are scanned row by row. A hash map data structure with an initial capacity of 256 is declared. Each read device address code is stored as a key in this hash map table. For duplicate device address codes where key-value hash collisions occur, a discard operation is performed, retaining only the device address code of the first record. After a full scan and hash merging, a device node index table containing only unique key-value pairs is generated. Next, the personnel identification code sequence in the second column of the instruction field parsing matrix is ​​scanned. A double-loop comparison mechanism is used to perform deduplication verification. Specifically, the first personnel identification code is extracted as the baseline matching item, and then compared with all subsequent personnel identification codes. If a value with a difference of 0 is found, the corresponding memory address is marked as invalid. The baseline matching item is pushed forward until the traversal is complete. Finally, all values ​​marked as invalid are filtered out, and the remaining valid values ​​are concatenated to form a personnel number sequence. For example, if the initial data of the extracted personnel identification code sequence is 10025, 10026, 10025, 10027, the first value 10025 is used as the benchmark and subtracted from the subsequent values. If the difference between the subtraction and the third value is found to be 0, the memory address of the third value is marked as invalid. After filtering, a personnel number sequence containing only 10025, 10026, and 10027 is formed. The task node index sequence in the third column of the instruction field parsing matrix is ​​extracted. A bubble sort loop mechanism is established to compare the numerical values ​​of two adjacent task node indices. If the previous task node index value is greater than the next task node index value, the memory data bits of the two are cross-swapped. This cross-swapping process is continued until all values ​​in the sequence are arranged in ascending order from smallest to largest. Based on the aforementioned hash-merged device node index table, the deduplicated personnel number sequence, and the ascending-ordered task node index sequence, a relational data table with three data columns is established in the database. These three sets of sequences are then written into the corresponding column cells of the relational data table in ascending order of row number, thereby establishing an execution entity node mapping table in the storage medium.

[0023] S103: Based on the execution entity node mapping table, call the device node index table to perform key-value matching of device address code and personnel number sequence, write the task node index into the corresponding entity unit, establish the correspondence between task node and execution entity, and generate task flow association instructions; The established execution entity node mapping table is read, and the data matching pointer is invoked to sequentially point to the device address code column and personnel number sequence column stored in the device node index table. The device address code corresponding to the current row (e.g., the aforementioned value 9) and the personnel number corresponding to the current row (e.g., the aforementioned value 10025) are extracted. A string concatenation operation is performed on the device address code and personnel number to construct a composite primary key, for example, concatenating them to form a composite primary key text of 9 concatenated with 10025. Using the generated composite primary key as the index, the corresponding free entity storage unit address is searched in global memory. Once a valid entity storage unit physical address is obtained, the task node index sequence value corresponding to the same row in the execution entity node mapping table is immediately extracted (e.g., the previously calculated value 7). A memory direct write instruction is invoked to precisely write the extracted task node index value 7 into the entity unit data segment located by the composite primary key, and a hexadecimal base value of 1 indicating the active state is written into the associated status flag of that entity unit. Through the above data segment overwrite and status flag flipping operations, the logical binding between a single task node and a specific physical execution entity is completed, solidifying the correspondence between the task node and the execution entity. Repeat the entire process of pointer movement, primary key concatenation, address retrieval, data writing, and status bit flipping, traverse all valid data rows in the entity node mapping table, serialize and encapsulate all binding relationships in chronological order, and generate a long text format stream of task flow associated instructions containing complete scheduling context information.

[0024] Table 1 Simulation Data Table of Execution Entity Node Correspondence

[0025] As shown in Table 1, some simulated record information is presented in the process of constructing entity correspondence based on the sequences obtained from the analysis, reflecting the result status of the mapping of data items to entity units after deduplication and sorting.

[0026] Please see Figure 3 The specific steps of S2 are as follows: S201: Retrieve the device address code according to the task flow association instruction, call the control bus to read the corresponding machine tool operation bitmap signal, perform bit order expansion and rearrangement processing on the bitmap signal to form a device status bit value sequence and generate a machine tool operation status matrix. The encapsulated task flow-related instruction long text stream is deserialized and disassembled. The device address code at the beginning is extracted based on the delimiter. This extracted device address code, for example, the value 9, is packaged into a request data frame containing an 11-bit identifier according to the Controller Area Network Bus (CAN) protocol format. The underlying control bus transmission engine is invoked to inject this request data frame into the communication bus network, sending a read pulse to the specified device address. After receiving the response signal from the target machine tool, the bus network captures the machine tool operation bitmap signal, containing 32 consecutive bits, returned with the response signal. The received 32-bit machine tool operation bitmap signal is loaded into the central processing unit's general-purpose register, where bit order expansion and rearrangement are performed. The specific logic of bit-order unfolding is as follows: The 32-bit machine tool operation bitmap signal, originally arranged in big-endian mode, is divided into two data segments: a high-order 16-bit segment and a low-order 16-bit segment. A 16-bit right shift operation moves the high-order data segment to the low-order segment, while a 16-bit left shift operation moves the low-order data segment to the high-order segment. Then, a bitwise OR operation is performed on both segments to reverse the high-order and low-order byte order. For example, if the initial bitmap signal read has a high-order segment decimal representation of 65280 and a low-order segment of 255, after shifting, interleaving, and bitwise OR operations, a new reversed bit value sequence is generated. The rearranged 32-bit data is then decomposed bit by bit and mapped to a one-dimensional array of length 32. Each index position in the array corresponds to an independent status bit value, forming a device status bit value sequence. A two-dimensional matrix space with a specification of 1 row and 32 columns is allocated in the dynamic memory area. The sequence of device status bit values ​​is completely filled into the matrix to form a machine tool operation status matrix representing the real-time operating parameters of each component of the current physical machine tool.

[0027] S202: Obtain the preset idle feature code based on the machine tool operation status matrix, perform a bit-by-bit equal value comparison between the status bit sequence and the idle feature code, count the number of consistent bits and perform an occupancy determination operation to obtain the equipment occupancy status table; The preset idle feature code, representing the machine tool's complete standby state, is read from the configuration storage area. This preset idle feature code is a standard 32-bit binary constant. The specific values ​​of the state bit sequence are extracted sequentially from the previously generated machine tool operating state matrix, and a bitwise XOR operation is performed between each value and the corresponding bit value of the preset idle feature code. That is, the result is recorded as 1 when the two compared bit values ​​are the same, and as 0 when they are different. A consistency bit counter with an initial value of 0 is established. The XOR operation results are iterated 32 times. Each time a bit value with a result of 1 is encountered, the consistency bit counter value is incremented by 1. After the count is complete, the value in the counter is the current number of consistent bits. The occupancy determination stage then begins. First, the occupancy determination threshold needs to be obtained. The logic for setting this threshold is to extract the baseline matching bit number recorded in the equipment's factory parameter table and add the equipment aging compensation constant. For example, if the factory-set baseline matching bit depth of the device is 28 bits and the device aging compensation constant is -2 bits, then adding these two bits together (28 plus -2) yields an occupancy threshold of 26 bits. The advantage of this logic is that by introducing the device aging compensation constant for additive compensation, the idle determination condition for older devices is dynamically relaxed, reducing false occupancy judgments due to sensor aging. The number of consistent bits obtained from the aforementioned statistics is extracted. For example, if the number of consistent bits is 22, this number is compared with the occupancy threshold of 26 bits. Since 22 bits is less than 26 bits, the current device status is marked as non-idle and occupied. Conversely, if the number of consistent bits is 29 bits, which is greater than the threshold of 26 bits, it is marked as idle. The data records containing the device address, number of consistent bits, determination threshold, and occupancy status marking fields are entered into a data record table. Data rows for multiple devices are appended sequentially, and finally, a device occupancy status table is output.

[0028] S203: Retrieve the equipment address code sequence according to the equipment occupancy status table, perform status filtering operation on the occupancy mark, retain the address code of the idle equipment and establish an index correspondence, and generate the equipment scheduling registration; The device occupancy status table generated earlier is scanned row by row, extracting all device address code sequences and their corresponding occupancy status marker fields. A status filtering operation is performed on the extracted occupancy status markers, with the filtering criterion being to discard all data rows marked as occupied and only extract the device address codes corresponding to data rows marked as idle. A dynamically growing idle queue container is established, and the retained idle device address codes are sequentially pushed into this idle queue container. For example, if the device occupancy status table contains device address 9 marked as occupied, device address 15 marked as idle, and device address 22 marked as idle, after the status filtering operation, 9 is filtered out, while 15 and 22 are retained and stored in the idle queue. A globally monotonically increasing scheduling index generator is declared, with its initial base set to 1000. Each time an idle device address code is popped, the current scheduling index base is incremented by 1, and a key-value corresponding record is generated. For example, for the reserved idle device address code 15, a scheduling index 1001 is generated; for the idle device address code 22, a scheduling index 1002 is generated, establishing a strict one-to-one index correspondence between the idle device address and the incrementing scheduling index. This data with established index correspondence is then packaged and written into the scheduling registration area of ​​non-volatile memory, and a runtime log containing a creation timestamp is generated, thus completing the generation of the device scheduling registration file.

[0029] Table 2 Equipment Occupancy Status and Scheduling Filtering Details

[0030] As shown in Table 2, the number of consistent bits obtained by each device after comparison operation and the result of the occupancy status determination are clearly listed, and the specific retention and rejection actions after the filtering operation is performed based on the status flag are shown.

[0031] Please see Figure 4 The specific steps of S3 are as follows: S301: Retrieve personnel identification code sequence according to task flow association instructions, read terminal communication address records from global memory mapping table, perform address index comparison on personnel identification code sequence and establish identity address correspondence table, and generate terminal identity matching table; The device scheduling registration file is opened, and the file pointer is used to locate a specific offset. The previously matched and reserved personnel identification code sequence is retrieved by the fixed-length byte field. The underlying direct memory access interface is invoked to fully read the global memory mapping table residing in the operating kernel space. This mapping table is pre-loaded with communication address records of all registered terminals in the enterprise intranet. During the reading of the mapping table, each terminal communication address record and its associated user ID are unpacked and extracted. The extracted personnel identification code sequence, such as the aforementioned value 10025, is used as the query key. A memory address offset matching search is performed on the unpacked mapping records. Specifically, the matching logic is to add a fixed memory segment start offset constant to the value of the personnel identification code sequence to calculate the exact physical address pointer of the terminal communication address corresponding to that identity in the global memory mapping table. For example, if the segment start offset constant is set to 400000, adding the personnel identification code 10025 to it yields the actual physical address pointer 410025. Based on the calculated physical address pointer 410025, the integer value of the Internet Protocol address stored at that memory address is directly read, for example, the integer communication address value read is 3232235535. The personnel identification code 10025 used for retrieval and the retrieved integer communication address 3232235535 are merged and encapsulated in a custom structure data type to establish a one-to-one identity address mapping table between the two. The above primary key offset calculation and memory address addressing and reading operations are repeated until all values ​​in the personnel identification code sequence have found corresponding communication address values. These structure instances are then written to the cache database and assembled to generate a terminal identity matching table.

[0032] S302: Retrieve the task node index sequence based on the terminal identity matching table, read the R&D task process node table and the procurement task process node table, perform node location retrieval on the task node index and form a node number sequence to obtain the task node location table. Extract the associated task node index sequence data stream from the terminal identity matching table stored in the cache database. Establish a file reading stream channel to load the R&D task flow node table and the procurement task flow node table stored in external persistent storage. These two tables record the processing path information of various tasks in a two-dimensional plain text format with fixed column widths. Extract the current processing value from the task node index sequence, such as the task node index value 7 passed down in the previous step. Use this value as the keyword for full-text matching and perform a top-down string content search and comparison in the first field column of the R&D task flow node table. If no completely identical keyword is found in the current table, seamlessly switch to the procurement task flow node table to continue the top-down search. When a completely identical keyword 7 is found in a row, immediately stop scanning downwards, capture the row number value of that row, and multiply the row number value by the step coefficient to obtain the node position reference coordinates. For example, if the retrieved row number is 15 and the preset step coefficient is 100, multiplying the two (15 multiplied by 100) yields a node location reference coordinate of 1500. Adding this node location reference coordinate 1500 to the current task node index value 7 results in a unique node number sequence value of 1507. This location retrieval and parameter multiplication / addition operation is then performed on all index values ​​within the task node index sequence to obtain a series of uniformly structured node number sequences. These node numbers and their corresponding retrieval source table identifiers are then integrated and output as a task node location table.

[0033] S303: Based on the task node location table and the terminal identity matching table, execute the node number and personnel identification code association record, write the node number into the terminal communication address index unit, establish the node-identity correspondence, and generate task node association registration; The previously generated task node location table and terminal identity matching table are synchronously loaded from the memory area. Based on nested loop comparison logic, the outer loop extracts the unique node number (e.g., value 1507) from the task node location table line by line, while the inner loop matches the personnel identification code (e.g., value 10025) with the same context identifier in the terminal identity matching table. The matching node number 1507 and personnel identification code 10025 are bound to an independent record entity, thus establishing a record in memory that associates node number with personnel identification code. Subsequently, based on personnel identification code 10025, the corresponding integer communication address 3232235535 is extracted by backtracking. An absolute address write request is sent to the memory controller to lock the unique terminal communication address index physical unit bound to the integer communication address 3232235535, and the node number 1507 is hard-coded into this physical unit in the form of a binary byte stream. Once the write instruction returns a success status code, a ready flag is marked in the associated record database, thus completely establishing the data path for the correspondence between node number and hardware identity at the underlying data link layer. After looping through all mapping pairs in the two tables and completing the underlying write operation, a text report containing all corresponding verification sums is exported, and a task node association registration record file with anti-tampering characteristics is generated based on the text report.

[0034] Please see Figure 5 The specific steps of S4 are as follows: S401: Based on the task node association registration, retrieve the task node structure address sequence, perform field location and parsing of the structure address, extract the device execution pointer address segment and the personnel execution pointer address segment, establish a node address index sequence, and generate a task node address table; Extract the encapsulated task node association registration record file from the storage area, and retrieve the encapsulated task node structure address sequence data in byte stream mode. For each extracted independent task node structure address, perform field location parsing according to the predetermined protocol header width. Specifically, the parsing process is as follows: a 64-bit task node structure address is sent to a bitwise operation register, and an extraction mask is set to mask and intercept the data in the register. First, a bitwise AND operation is performed on the structure address and the value composed of all zeros in the high bits and all ones in the low bits of the mask hexadecimal number. The result is then shifted 16 bits to the right to accurately segment and extract the device execution pointer address bit segment data located at bits 17 to 32. Subsequently, the original structure address is reloaded, and a bitwise AND operation is performed again using a mask with all ones in a different range. The result is then shifted 32 bits to the right to accurately separate the personnel execution pointer address bit segment data located at bits 33 to 48. These two sets of independent bit segment values ​​extracted by the mask shift operation are extracted into temporary working memory. For example, the extracted device execution pointer raw segment value is 2048, and the personnel execution pointer raw segment value is 8192. These two sets of pointer values ​​derived from the same task node structure address are bound together, and the starting base address of the structure address itself is added, forming a node address index sequence containing three element sequence pairs. All node address index sequences generated during this operation are batch-structured and compressed to generate a uniformly formatted task node address table for subsequent address redirection and replacement updates.

[0035] S402: Retrieve the device address code and terminal communication address according to the task node address table, perform address replacement on the device execution pointer address field and write it into the device address code, perform address replacement on the personnel execution pointer address field and write it into the terminal communication address, and establish a node execution pointer mapping table; Load the task node address table data, retrieve the actual physical device address code (e.g., value 15) and its corresponding actual terminal communication address (e.g., value 3232235535) from the table by index primary key. Call the memory overwrite modification function library to locate the heap memory area where the task node structure address is actually stored. Clear the content of the storage space where the device execution pointer address bit field data (i.e., the aforementioned value 2048) was originally stored. Perform a data type cast operation on the cleared space, and then directly overwrite the actual device address code 15 into the memory space of the device execution pointer address bit field, completing the address replacement update of the device pointer. Similarly, locate the storage space where the personnel execution pointer address bit field (i.e., the aforementioned value 8192) is located, perform an overwrite and clear operation on the space content, and forcibly inject the actual terminal communication address 3232235535 into the memory space, completing the address replacement write of the personnel pointer. During this replacement process, a memory pointer mapping dictionary data structure is maintained. The structure address, the old pointer value, the newly written real physical device address (encoded as 15), and the newly written terminal communication address (3232235535) are all recorded as mapping entries with a tracing relationship. All mapping entries are compiled into a book, and finally, a node execution pointer mapping table is persistently established in the relational database.

[0036] S403: Based on the node execution pointer mapping table, retrieve the process lock mask field, perform bit order lock bit construction operation on the process lock mask, write the lock bit into the corresponding task node structure address unit, and generate task execution binding registration; The process accesses the node pointer mapping table stored in the relational database and retrieves the associated process lock mask field value based on the primary key in the table. A bitwise lock bit construction operation is then performed on the obtained process lock mask value. The specific steps of this construction operation are as follows: a base lock baseline value of 65535 is set, and a bitwise OR operation is performed between the extracted process lock mask value and the base lock baseline value. The result is the comprehensive mask value carrying the lock attribute. This comprehensive mask value is then summed with a preset security bias coefficient to enhance the anti-cracking dimension of the lock encoding. For example, if the original process lock mask value extracted from the table is 256, performing a bitwise OR operation with the base lock baseline value 65535 still yields 65535. Then, with the security bias coefficient set to 10, 65535 and 10 are summed to calculate the final constructed lock bit feature code value of 65545. The advantage of this operational logic lies in its disruption of the linearity of the original locking mask by introducing a security bias coefficient and performing addition logic with the bitwise OR result, significantly increasing the security threshold against malicious overwriting of task nodes. The memory addressing method, using the base address plus offset, is invoked to lock the state attribute unit corresponding to the task node's structural address. The calculated lock bit feature code value 65545 is converted into a bitstream sequence and forcibly written into a contiguous memory block of that state attribute unit, causing the task node to completely enter an immutable read-only locked state. After completing the locking operations for all corresponding nodes, a list of locked completion states is automatically compiled, generating a task execution binding registration file with a globally unique identifier sequence number.

[0037] Table 3: Task Node Execution Order Queue Data Table

[0038] As shown in Table 3, the execution order of some task nodes after address mapping and lock bit feature code construction is given, which is used to illustrate the baseline information of each node after the parameter writing is completed and the node enters the locking state.

[0039] Please see Figure 6 The specific steps of S5 are as follows: S501: Based on the task execution binding registration, retrieve the device address code and terminal communication address sequence, read the task node sequence records of the R&D task process node table and the procurement task process node table, perform indexing and sorting on the node sequence records, and generate a task node sequence table. Based on the underlying file reading interface, the generated task execution binding registration file is loaded and decompressed. Regular expression filtering is used to retrieve the device address codes and terminal communication address sequence information streams embedded in the registration file. According to the metadata reference paths contained in the sequence information stream, a formatted structured query language command is sent to the database server to extract the task node sequence record columns stored in the R&D task process node table and the procurement task process node table. The jumbled node sequence records extracted from the two different table structures are then introduced into a sorting cache for indexing and sorting operations. The specific algorithm logic for sorting is as follows: a linked list data structure supporting bidirectional traversal is established, using the numerical value of the device address code as the first priority sorting factor and the original timestamp parameter of the extracted task node sequence record as the second priority sorting factor. When the device address code value is smaller, it is inserted at the head of the linked list; when the device address codes are the same, the timestamp parameters are compared, and the one with the smaller timestamp is inserted at the head of the linked list. For example, given two sequential records, the first with device address 15 and timestamp parameter 500, and the second with device address 15 and timestamp parameter 450, according to the comparison rules mentioned above, since the device addresses are the same, the timestamp 450 of the second record is less than the timestamp 500 of the first record. Therefore, the second record is placed before the first record in the linked list. This process of traversing, comparing, and inserting records is repeated until the linked list is stable. Then, the contents of this sorted doubly linked list are exported as an array, formally generating a strictly ordered task node sequence list.

[0040] S502: Retrieve the node sequence according to the task node sequence table, filter the node sequence according to the execution flow order and write it into the field corresponding to the task node structure address, establish the index relationship between the node sequence and the task node structure address, and obtain the task node written table. The process retrieves the sequence values ​​of nodes line by line and transmits these sequence values ​​to the process filter for process order filtering. A filtering boundary parameter is set: valid step records with sequence values ​​greater than or equal to the baseline starting number are retained, while invalid historical steps with sequence values ​​less than the baseline starting number are removed. For example, if the baseline starting number for the current task batch is preset to 3, and the retrieved node sequence values ​​are 1, 2, 3, and 4, after filtering by comparing the values ​​with the baseline starting number 3, only values ​​3 and 4 are considered valid process sequences. For the retained valid process sequence values, the physical base address of the corresponding task node structure address is obtained (e.g., value 80004 in Table 3), and the absolute offset of the reserved sequence storage field in the structure address relative to the physical base address is calculated. A write memory operation instruction is invoked to directly write the valid process sequence value, such as value 3, into the calculated memory space containing the physical offset. After the write operation is complete, the sequential value 3 and the physical base address 80004 of the task node structure are concatenated in the index database and saved as a key-value pair, thus establishing a strong correspondence between the node sequence and the underlying pointer index of the task node structure address. After all valid sequential values ​​have had their storage fields overwritten and key-value pairs established, this part of the index database is persisted, ultimately resulting in the task node write table.

[0041] S503: Based on the task node write table, retrieve the task node structure address, perform status bit determination on the process status register value and record the running status mark, establish a node status and node sequence association record, and generate a customizable task process association scheme. The system mounts and retrieves the output task nodes, writing them to a table to obtain the structure addresses of all task nodes currently in the activation scheduling phase. It accesses the 8-bit process status register area allocated within the physical memory block for each task node structure address, performing a bitwise read operation. Each bit in the process status register area is then used to determine its status. Specifically, the 8-bit value is extracted and bitwise ANDed with the hexadecimal mask value (all bits set to one). If the result is all zeros, the node is considered not started; if the first bit is 1, it is considered waiting for resources; and if the second bit is 1, it is considered running. If the result indicates running, a running status flag string with a specific identifier is appended to the log (e.g., hexadecimal value AA corresponds to decimal value 170, indicating normal operation). The generated running status flag is then concatenated with the previously established node sequence value to establish a record reflecting the node state and node sequence association process. It aggregates the associated record data and process flow relationships of all nodes, dynamically generates the jump link code segment for the next operation based on the preset process flow branch condition algorithm, and finally packages all these link code segments and data dictionary into an independent library file to generate a customizable task flow association scheme that can support multi-branch logical flow.

[0042] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of protection of the technical solution.

Claims

1. Supports custom task flow association methods, characterized in that, Includes the following steps: S1: Receive the electrical signal sequence of intervention instructions through the mobile communication terminal, parse the sequence to extract the device code, identity code and node index, establish entity association based on the device code, identity code and node index, and generate task flow association instructions; S2: Extract the device code according to the task flow association instruction, read the machine tool operation bitmap, compare the machine tool operation bitmap with the idle code to determine the occupancy status, schedule the device code according to the occupancy status, and generate the device scheduling registration; S3: Extract the identity code according to the task flow association instructions, read the address, match the identity code and the address, perform positioning in the R&D table and the procurement table according to the node index, and generate task node association registration; S4: Extract the structure address based on the task node association registration, write the device code into the device pointer, write the address into the personnel pointer, lock the process mask for the structure address, and generate the task execution binding registration; S5: Based on the task execution binding registration, extract the device code and address, read the sequential records from the R&D table and the procurement table, filter the sequential records and write them into the structure address, determine the status register area in the structure address, and generate a customizable task flow association scheme.

2. The method for supporting custom task flow association according to claim 1, characterized in that, The task flow association instruction includes a device address code identifier, a personnel identification identifier, a task node index identifier, and a task flow association identifier. The device scheduling registration includes a device address identification item, a device occupancy status identifier, a device idle determination identifier, and a device scheduling flag item. The task node association registration includes a personnel identification item, a terminal communication address identifier, a task node index identifier, and a flow node source identifier. The task execution binding registration includes a device execution address field, a personnel communication address field, a flow lock identifier, and a task node structure identifier. The customizable task flow association scheme includes a task node sequence identifier, a task flow status identifier, a flow node configuration item, and a flow extension identifier.

3. The method for supporting custom task flow association according to claim 1, characterized in that: The process mask for locking the structure address sets a process control mask for a specified structure address to restrict and fix the access and execution permissions of the task process.

4. The method for supporting custom task flow association according to claim 1, characterized in that: The sequential recording and writing of the structure address involves extracting relevant record data in a predetermined order and storing it in the corresponding structure address to obtain a readable and executable process data structure.

5. The method for supporting custom task flow association according to claim 1, characterized in that, The specific steps of S1 are as follows: S101: Obtain the electrical signal sequence of the intervention instruction received by the mobile communication terminal, perform bit-by-bit segmentation and numerical conversion according to the preset bit segment rules, obtain the device code sequence, identity code sequence and task node index sequence, and generate the instruction field parsing matrix; S102: Based on the instruction field parsing matrix, perform merging processing on the device address encoding sequence to establish a device node index table, perform deduplication verification on the personnel identification code sequence to form a personnel number sequence, and perform sequential sorting according to the task node index sequence to establish an execution entity node mapping table; S103: Based on the execution entity node mapping table, the device address code and personnel number sequence of the device node index table are matched to execute key values, the task node index is written into the corresponding entity unit, the correspondence between the task node and the execution entity is established, and the task flow association instruction is generated.

6. The method for supporting custom task flow association according to claim 1, characterized in that, The specific steps of S2 are as follows: S201: Retrieve the device address code according to the task flow association instruction, call the control bus to read the corresponding machine tool operation bitmap signal, perform bit order expansion and rearrangement processing on the bitmap signal to form a device status bit value sequence, and generate a machine tool operation status matrix. S202: Based on the machine tool operating status matrix, obtain the preset idle feature code, perform a bit-by-bit equal value comparison between the status bit sequence and the idle feature code, count the number of consistent bits and perform an occupancy determination operation to obtain the equipment occupancy status table; S203: Retrieve the device address code sequence according to the device occupancy status table, perform status filtering operation on the occupancy mark, retain the idle device address code and establish an index correspondence, and generate a device scheduling registration.

7. The method for supporting custom task flow association according to claim 1, characterized in that, The specific steps of S3 are as follows: S301: Retrieve the personnel identification code sequence according to the task flow association instruction, read the terminal communication address record of the global memory mapping table, perform address index comparison on the personnel identification code sequence and establish an identity address correspondence table, and generate a terminal identity matching table. S302: Retrieve the task node index sequence according to the terminal identity matching table, read the R&D task process node table and the procurement task process node table, perform node location retrieval on the task node index and form a node number sequence to obtain the task node location table. S303: Based on the task node positioning table and the terminal identity matching table, execute the node number and personnel identification code association record, write the node number into the terminal communication address index unit, establish the node and identity correspondence relationship, and generate task node association registration.

8. The method for supporting custom task flow association according to claim 1, characterized in that, The specific steps of S4 are as follows: S401: Based on the task node association registration, retrieve the task node structure address sequence, perform field location and parsing of the structure address, extract the device execution pointer address segment and the personnel execution pointer address segment, establish a node address index sequence, and generate a task node address table; S402: Retrieve the device address code and terminal communication address according to the task node address table, perform address replacement on the device execution pointer address field and write it into the device address code, perform address replacement on the personnel execution pointer address field and write it into the terminal communication address, and establish a node execution pointer mapping table; S403: Based on the node, retrieve the process lock mask field from the pointer mapping table, perform bit order lock bit construction operation on the process lock mask, write the lock bit into the corresponding task node structure address unit, and generate task execution binding registration.

9. The method for supporting custom task flow association according to claim 1, characterized in that, The specific steps of S5 are as follows: S501: Based on the task execution binding registration and retrieval device address code and terminal communication address sequence, read the task node sequence record of the R&D task process node table and the procurement task process node table, perform indexing and sorting on the node sequence record, and generate a task node sequence table; S502: Retrieve the node sequence according to the task node sequence table, perform process flow filtering on the node sequence and write it into the field corresponding to the task node structure address, establish the index relationship between the node sequence and the task node structure address, and obtain the task node write table. S503: Based on the task node write table, retrieve the task node structure address, perform status bit determination on the process status register value and record the running status mark, establish a node status and node sequence association record, and generate a customizable task process association scheme.

10. The method for supporting custom task flow association according to claim 9, characterized in that: The node status and node sequence are associated with a record, which establishes a correspondence between the running status information of the task node and its sequential position in the task flow, forming a recorded data structure.

Images