Element analysis method, device, system and computer equipment for chip adhesive layer

Abstract

This application relates to a method, apparatus, system, and computer device for elemental analysis of chip adhesion layers. The method includes: removing a first passivation layer from a target area in the chip to be analyzed to obtain a target chip; obtaining a sample sheet based on the target chip; removing a second passivation layer from the sample sheet to obtain a target sample sheet; and performing elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed. This method can improve the elemental analysis effect of chip adhesion layers.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to a method, apparatus, system and computer device for elemental analysis of chip adhesion layers. Background Technology

[0002] As the chip industry continues to develop, chips are gradually becoming more refined. While the size of chips is shrinking, the functions they perform are increasing, and their computing power is growing. This allows chips to be configured in more devices to achieve richer functions.

[0003] However, the small size of the chip also leads to poor elemental analysis results in the chip's adhesive layer. Summary of the Invention

[0004] Therefore, it is necessary to provide a method, apparatus, system, and computer device for elemental analysis of chip adhesive layers that can improve the analysis effect of chip adhesive layers, in order to address the above-mentioned technical problems.

[0005] In a first aspect, this application provides an elemental analysis method for a chip adhesion layer, comprising: performing a first passivation layer removal process on a target area in the chip to be analyzed to obtain a target chip; obtaining a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer in the target chip; performing a second passivation layer removal process on the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and performing elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

[0006] In one embodiment, a first passivation layer removal process is performed on a target region in the chip to be analyzed to obtain a target chip, including: controlling a first focused ion beam to perform atomic peeling on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; controlling a second focused ion beam to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain the target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0007] In one embodiment, the cross-sections of the first passivation layer, the second passivation layer, and the adhesion layer are parallel to the placement platform corresponding to the chip to be analyzed, and the placement platform has a first angle relative to the reference plane.

[0008] In one embodiment, obtaining a sample sheet based on a target chip includes: controlling a second focused ion beam to cut off the sample sheet connected to a gas injection component and a probe of an ion beam emitting device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesion layer and connects to the adhesion layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesion layer and connects to the adhesion layer and a second passivation layer.

[0009] In one embodiment, a second passivation layer removal process is performed on the sample sheet to obtain a target sample sheet, including: controlling a third focused ion beam to perform atomic stripping on the sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain the target sample sheet; wherein the sample sheet is disposed on a copper mesh substrate, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0010] In one embodiment, the adhesion layer includes multiple transition layers. Elemental analysis is performed on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed. This includes: for each transition layer, mass spectrometry analysis is performed on the target sample sheet using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; and each mass spectrometry analysis result is used as the elemental analysis result.

[0011] In one embodiment, before performing a first passivation layer removal process on the target area in the chip to be analyzed to obtain the target chip, the method further includes: performing gold sputtering on the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0012] Secondly, this application also provides an elemental analysis apparatus for a chip adhesion layer, comprising: a first removal module for removing a first passivation layer from a target area in the chip to be analyzed to obtain a target chip; a sample sheet acquisition module for acquiring a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer in the target chip; a second removal module for removing a second passivation layer from the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and an elemental analysis module for performing elemental analysis on the target sample sheet to obtain elemental analysis results corresponding to the chip to be analyzed.

[0013] Thirdly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of the method described in the first aspect.

[0014] Fourthly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the method described in the first aspect.

[0015] Fifthly, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps of the method described in the first aspect.

[0016] Sixthly, this application also provides an elemental analysis system for a chip adhesion layer. The system includes an ion beam emission device, a mass spectrometry analysis device, and a computer device. The computer device is connected to the ion beam emission device and the mass spectrometry analysis device. The ion beam emission device is used to remove the passivation layer from the target area in the chip to be analyzed, thereby obtaining a target sample sheet. The mass spectrometry analysis device is used to perform elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed. The computer device is used to implement the steps of the method described in the first aspect.

[0017] The aforementioned method, apparatus, system, and computer equipment for elemental analysis of chip adhesion layers first remove the first passivation layer from the target area of ​​the chip to be analyzed, obtaining the target chip. Then, a sample sheet containing a second passivation layer and an adhesion layer is obtained from the target chip. The second passivation layer is removed from the sample sheet, resulting in a target sample sheet including the adhesion layer. Elemental analysis is then performed on the sample sheet to obtain the elemental analysis results of the adhesion layer corresponding to the chip to be analyzed. By removing the passivation layer before performing elemental analysis, the influence of other layers on the elemental analysis process is avoided, thus improving the elemental analysis effect. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is an application environment diagram of the elemental analysis method for the chip adhesion layer in one embodiment;

[0020] Figure 2 This is a flowchart illustrating an elemental analysis method for a chip adhesion layer in one embodiment;

[0021] Figure 3 This is a flowchart illustrating step 201 in one embodiment;

[0022] Figure 4 This is a flowchart illustrating step 202 in one embodiment;

[0023] Figure 5 This is a flowchart illustrating step 203 in one embodiment;

[0024] Figure 6 This is a flowchart illustrating step 204 in one embodiment;

[0025] Figure 7 This is a flowchart illustrating the gold spraying step in one embodiment;

[0026] Figure 8 This is a flowchart illustrating the elemental analysis method for the chip adhesion layer in another embodiment;

[0027] Figure 9 This is a structural block diagram of an elemental analysis device for a chip adhesion layer in one embodiment;

[0028] Figure 10 This is an internal structural diagram of a computer device in one embodiment;

[0029] Figure 11 This is a schematic diagram of the composition of an elemental analysis system for a chip adhesion layer in one embodiment. Detailed Implementation

[0030] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0031] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0032] The elemental analysis method for chip adhesion layers provided in this application embodiment can be applied to, for example... Figure 1 The application environment shown includes at least a computer device 101, an ion beam emission device 102, and a mass spectrometry analysis device 103.

[0033] The computer device 101 controls the ion beam emission device 102 to remove the first passivation layer from the target area of ​​the chip to be analyzed, thereby obtaining the target chip. Based on the target chip, a sample sheet is obtained, and a second passivation layer is removed from the sample sheet to obtain the target sample sheet. The mass spectrometry analysis device is then controlled to perform elemental analysis on the target sample sheet to obtain the elemental analysis results of the adhesion layer of the chip to be analyzed. The computer device 101 can be a server, which can be a standalone physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing cloud computing services. The server can have an operating system with an interactive interface installed, allowing users to input control commands for elemental analysis through the interface.

[0034] The ion beam emission device 102 is used to emit an ion beam under the control of the computer device 101 to remove the passivation layer and acquire sample slices. The mass spectrometry analysis device 103 is used to perform elemental analysis on the target sample slices under the control of the computer device 101.

[0035] In practical applications, the adhesion layer is a functional deposition layer used in semiconductor manufacturing processes to improve the bonding performance between the metal thin film and the wafer substrate. Commonly used materials include titanium (Ti), chromium (Cr), and titanium-tungsten alloy (TiW), which enhance interfacial adhesion through chemical bonding and lattice matching principles. In copper damascus processes, tetraethoxysilane (TEOS) adhesion layers are used to bond the dielectric layer and the anti-reflective coating, achieving stable connections in multilayer structures through single-damascene and dual-damascene process paths. In wafer-level packaging processes, titanium serves as a key adhesion layer for the under-bump metal layer, improving the bonding reliability between the redistribution layer and the substrate during sputtering processes. Material selection requires comprehensive consideration of corrosion resistance, thermal stability, and process compatibility, avoiding the use of metals such as aluminum that are prone to migration defects. Focused ion beam (FIB) ionizes liquid gallium at high temperatures into Ga ions, which are then accelerated by an electric field and focused using an electrostatic lens. The high-energy (high-speed) Ga ions are directed to a designated location, stripping atoms from the sample surface. The reaction products are vaporized and removed by a vacuum pump. Simultaneously, a gas injection system (GIS) can selectively remove or deposit certain materials using physical sputtering of chemical gases to achieve micro- and nano-scale surface morphology processing. FIB can obtain the most original morphology of the material. Time-of-flight secondary ion mass spectrometry (TOF-SIMS) is a mass spectrometry-based surface analysis technique. Its principle is based on the interaction between primary ions and the sample surface. A high-energy primary ion beam (such as Ga+, Bi3+, Arn+, Cs+, etc.) bombards the sample surface, generating charged particles, i.e. ions, in the bombardment region that contain information about the sample surface composition. After mass analysis, these charged ions are used to obtain a mass spectrum of surface composition information, which is called secondary ion mass spectrometry.

[0036] Currently, chips are the core components of modern electronic technology. Each layer of chip material undertakes specific electrical, physical, and chemical functions, and their selection and combination is an extremely precise science that directly affects the chip's quality and performance. Material selection is crucial in chip manufacturing. Appropriate material selection can improve chip efficiency, stability, and power consumption, while reducing energy consumption and failure rate. Researching and analyzing each layer of chip material is not only a requirement of the manufacturing process but also a core factor determining chip performance, reliability, power consumption, and future evolution. Therefore, accurate analysis and characterization of chip materials are essential. Current technologies utilize FIB (Fiber Optic Injection) to cut samples at specified locations, followed by SEM observation and EDS analysis of the cross-section. However, due to voltage selection, electron beam spot size, and energy dispersive spectroscopy (EDS) excitation depth, the compositional information of the chip's transition layers may be affected, potentially revealing components not belonging to that layer, or the detection limit of EDS may lead to the neglect of trace elements. Especially when encountering thin adhesive layers, data errors can be significant. Furthermore, placing a copper mesh containing the sample slice within a TEM (Transient Electron Microscopy) device allows for precise beam focusing down to a few nanometers, enabling accurate localization and compositional analysis even for thin transition layers. However, TEM sample preparation is complex; if the slice is too thick or too thin, it will affect EDS (Energy Dispersive Spectroscopy) analysis: too thick a slice hinders TEM observation and makes localization impossible; too thin a slice affects the energy dispersive spectroscopy count rate, preventing the acquisition of high-quality data. Additionally, while TOF-SIMS (Time-of-Flight-Sensitive Microscopy) can be used for in-depth chip analysis, its slow stripping rate and thick passivation layer mean that much of the analysis time is spent analyzing the meaningless passivation layer, impacting analytical efficiency.

[0037] To address this, this application avoids interference from other layers in the analysis of the adhesive layer by extracting the adhesive layer of the chip to be analyzed. At the same time, by removing the passivation layer in layers, the influence of the passivation layer on the elemental analysis is avoided, thus improving the elemental analysis results.

[0038] In one exemplary embodiment, such as Figure 2 As shown, an elemental analysis method for chip adhesion layers is provided, which can be applied to... Figure 1 The following steps are used as an example of computer equipment, including steps 201 to 204.

[0039] Step 201: Perform the first passivation layer removal process on the target area in the chip to be analyzed to obtain the target chip.

[0040] During the process, computer equipment controls an ion beam to remove the first passivation layer from the target area of ​​the chip to be analyzed using a high-energy ion beam, thus obtaining the target chip. The chip to be analyzed includes a first passivation layer, a second passivation layer, and an adhesion layer; the target chip includes a second passivation layer and an adhesion layer.

[0041] In this application, the various layers of the chip to be analyzed are stacked and the chip to be analyzed and / or sample sheet are placed on a stage for analysis; in an optional embodiment provided by this application, the cross-section of the first passivation layer, the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the stage corresponding to the chip to be analyzed, and the stage has a first angle with respect to the reference plane.

[0042] Step 202: Obtain a sample wafer based on the target chip.

[0043] During implementation, the computer equipment controls the acquisition component to acquire a sample sheet from the target chip. This sample sheet includes the second passivation layer and the adhesion layer from the target chip.

[0044] During the process, the computer equipment can control the probe in the ion beam emission device to peel the sample sheet from the target chip.

[0045] Step 203: Perform a second passivation layer removal process on the sample sheet to obtain the target sample sheet.

[0046] During the process, computer equipment controls a high-energy ion beam to remove the second passivation layer from the sample sheet, obtaining the target sample sheet. The target sample sheet includes an adhesion layer.

[0047] Step 204: Perform elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

[0048] During the process, the computer equipment controls the mass spectrometry analysis device to perform elemental analysis on the target sample slices and obtain the elemental analysis results corresponding to the chip to be analyzed.

[0049] In the above-mentioned elemental analysis method for chip adhesion layers, the first passivation layer in the target area of ​​the chip to be analyzed is first removed to obtain the target chip. Then, a sample sheet containing the second passivation layer and the adhesion layer is obtained from the target chip. The second passivation layer is removed from the sample sheet to obtain the target sample sheet including the adhesion layer. Elemental analysis is performed on the sample sheet to obtain the elemental analysis results of the adhesion layer corresponding to the chip to be analyzed. By removing the passivation layer before performing elemental analysis, the influence of other layers on the elemental analysis process is avoided, thus improving the elemental analysis effect.

[0050] Based on the above exemplary embodiment, the following provides an elemental analysis method for a chip adhesion layer in one or more exemplary embodiments, which can be applied to... Figure 1 The following is an explanation using computer equipment as an example.

[0051] During the removal of the first passivation layer, due to the curtain effect of the high-energy ion beam, a large beam current can be used for initial removal, followed by a small beam current for further refined removal to obtain the target chip; in one optional embodiment provided by this application, such as Figure 3 As shown, step 201 includes steps 301 to 302:

[0052] Step 301: Control the first focused ion beam to perform atomic stripping on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain the candidate chip.

[0053] During implementation, the computer equipment controls the ion beam emission device to perform atomic stripping on the chip to be analyzed through the first focused ion beam in a direction perpendicular to the cross-section of the first passivation layer, thereby obtaining the candidate chip.

[0054] Step 302: Control the second focused ion beam to perform atomic stripping on the candidate chip in a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth, and obtain the target chip.

[0055] During the process, a curtain effect occurs on the cut surface of the candidate chip. The computer equipment controls the ion beam emission device to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer using a second focused ion beam until the cut surface is smooth, thus obtaining the target chip. The beam current of the first focused ion beam is greater than that of the second focused ion beam; the beam current of the first focused ion beam can be 9.3 nA, and the beam current of the second focused ion beam can be 2.5 nA.

[0056] For example, the chip is placed in a dual-beam FIB (Helios G4 CX), and then the sample stage is connected to the chip cross-section with conductive adhesive to ensure charge neutralization and image stability. After vacuuming, the electron beam is turned on and observed at 30 kV. The sample stage is moved until the target position is found, and the sample stage is tilted at 52°. By raising and lowering the sample stage and moving the ion beam image, the confocal point of the electron and ion beams is achieved. The ion beam is turned on, the target position is found, and a 10 μm * 10 μm area is selected as the observation area. The four sides are cut with the ion beam at 9.3 nA. Based on the rough cut, a fine-tuning process is performed at 2.5 nA until there is no obvious curtain effect (when using an ion beam to cut, etch, or process materials across the cross-section, due to the tailing effect of the ion beam, redeposition phenomenon, or uneven sputtering of the material, the vertical sidewalls are not smooth and flat, but have a series of wavy, stepped, or irregular striped structures similar to curtain folds). One cross-section is observed, and the thickness of the passivation layer is recorded.

[0057] One optional implementation provided in this application removes the passivation layer from the chip using two different ion beams. This achieves passivation layer removal without producing a curtain effect, improving the effectiveness of passivation layer removal and thus enhancing the reliability of elemental analysis results.

[0058] During the acquisition of sample sections, the second passivation layer and adhesion layer of the target region can be scraped out using components of an ion beam emission device; in one optional embodiment provided in this application, such as Figure 4 As shown, step 202 includes step 401:

[0059] Step 401: Control the second focused ion beam to cut off the sample sheet connected to the gas injection assembly and the probe of the ion beam emission device.

[0060] During implementation, the computer equipment controls the ion beam emitting device to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emitting device through the second focused ion beam.

[0061] The gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and connects with the adhesive layer, while the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesive layer and connects with the adhesive layer and the second passivation layer.

[0062] For example, the sample is rotated 90°, the ion beam is set to 80 pA, and the ion beam and electron beam are positioned at the sample cutting point. The sample stage tilt angle is adjusted to 0°, the GIS-Pt is inserted, and then the probe is inserted. The probe is lowered until it makes slight contact with the sample surface, just touching the sample, and the sample and probe are welded together. A 2.5 nA beam is used to cut the sample, separating it from the substrate. In the ion window, the probe height is slowly increased using a parameter of 80 pA, moving the extracted sample away from the sample substrate. The probe is then raised to the inspection area, and the probe is rotated 180° to retract the GIS-Pt. Finally, the probe is retracted.

[0063] One optional implementation provided in this application uses the components of the ion beam emission device to collect sample slices, making full use of the components of the ion beam emission device, improving the utilization rate of the device, and thus improving the efficiency of elemental analysis.

[0064] During the removal of the second passivation layer, the target sheet can be placed on a copper mesh substrate, and the ion beam can be controlled to perform atomic exfoliation to obtain the target sample; in one optional embodiment provided in this application, such as Figure 5 As shown, step 203 includes step 501:

[0065] Step 501: Control the third focused ion beam to perform atomic stripping on the sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer, to obtain the target sample. The sample sheet is positioned on a copper mesh substrate, and the cross-sections of the second passivation layer and the adhesion layer are parallel to the cross-section of the copper mesh.

[0066] For example, place a copper mesh on a 0° sample stage, cut a groove at the raised section using an ion beam, insert a GIS-Pt probe, and then insert a probe. By observing the electron beam and ion beam windows, lower the probe and align it within the groove on the copper mesh. Use the GIS-Pt to spray gas to weld the sample and copper mesh together. Retract the GIS-Pt and finally the probe. Alternatively, place the copper mesh on a 90° sample stage, tilt the stage to 52° so the ion beam is perpendicular to the sample surface, and set the appropriate dimensional parameters based on the previously obtained passivation layer thickness. Use a beam angle of 0.79nA-2.5nA for fine-tuning until the distance to the layer of interest is within 50nm, retaining a small portion of the passivation layer as a protective layer.

[0067] During elemental analysis, a mass spectrometry analyzer can be controlled to perform mass spectrometry analysis on the target sample thin section to obtain elemental analysis results; in one optional embodiment provided in this application, such as Figure 6 As shown, step 204 includes steps 601 to 602:

[0068] Step 601: For each transition layer, perform mass spectrometry analysis on the target sample using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer.

[0069] During implementation, the computer equipment controls the mass spectrometry analysis device to perform mass spectrometry analysis on the target sample for each transition layer, and obtains the mass spectrometry analysis results of the transition layer.

[0070] Step 602: Use the mass spectrometry analysis results as elemental analysis results.

[0071] During the process, the computer equipment uses the mass spectrometry analysis results as elemental analysis results.

[0072] For example, a copper mesh is adhered at 0° to the TOF-SIMS sample stage using conductive adhesive, and then pushed into the sample injection chamber for vacuuming. Once the vacuum reaches a specified value, the sample is transferred from the injection chamber to the analysis chamber, dual-beam neutralization is activated, and the sample location is located using ion beam scanning imaging. Based on the material properties, appropriate parameters are selected, and the stripping rate is obtained through software; typically, the voltage is set to 3 keV. After the parameters and program are set, the transition layer beneath the passivation layer is analyzed layer by layer. After data acquisition, the data is analyzed and processed to obtain the compositional information of each transition layer.

[0073] In practical scenarios, the chip to be analyzed can also be pre-plated with gold to improve conductivity; in one optional implementation provided in this application, such as Figure 7 As shown, the method further includes step 701:

[0074] Step 701: The initial chip to be analyzed is sputtered with gold using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0075] During the process, computer equipment controls a magnetron sputtering coating machine to perform gold sputtering on the initial chip to be analyzed, thus obtaining the chip to be analyzed.

[0076] For example, the chip is used as an experimental object. The surface of the chip has an insulating passivation layer. To ensure good conductivity, the chip is placed in a magnetron sputtering coating machine for gold sputtering treatment (current 20mA, time 30s).

[0077] The one or more embodiments provided in this application allow TOF-SIMS to achieve a positioning accuracy higher than 50 μm. Samples of a 10 μm * 10 μm area can be prepared via FIB, and by removing excess parts of the surface, samples can be obtained within 50 nm of the layer of interest. This enables TOF-SIMS to perform exfoliation tests directly in a high-precision mode, and can be applied to the reverse structural analysis of local locations in chips with complex structures. The detection limit of TOF-SIMS can reach ppm, which is an accuracy that EDS cannot achieve, and can more accurately analyze the composition information of materials.

[0078] In one embodiment, see Figure 8 The document illustrates a flowchart of an elemental analysis method for a chip adhesion layer provided in an embodiment of this application. This elemental analysis method for chip adhesion layers can be applied to... Figure 1 In the computer device shown. For example... Figure 8 As shown, the elemental analysis method for the chip adhesion layer may include the following steps:

[0079] Step 801: The initial chip to be analyzed is sputtered with gold using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0080] Step 802: Control the first focused ion beam to perform atomic stripping on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain the candidate chip.

[0081] Step 803: Control the second focused ion beam to perform atomic stripping on the candidate chip in a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth, and obtain the target chip.

[0082] Step 804: Control the second focused ion beam to cut off the sample sheet connected to the gas injection assembly and the probe of the ion beam emission device.

[0083] Step 805: Control the third focused ion beam to perform atomic stripping on the sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer, to obtain the target sample sheet.

[0084] Step 806: For each transition layer, perform mass spectrometry analysis on the target sample using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer.

[0085] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0086] Based on the same inventive concept, this application also provides an elemental analysis apparatus for chip adhesive layers to implement the elemental analysis method for chip adhesive layers described above. The solution provided by this apparatus is similar to the implementation described in the above method; therefore, the specific limitations in one or more embodiments of the elemental analysis apparatus for chip adhesive layers provided below can be found in the limitations of the elemental analysis method for chip adhesive layers described above, and will not be repeated here.

[0087] In one exemplary embodiment, such as Figure 9 As shown, an elemental analysis device for a chip adhesion layer is provided, comprising: a first removal module 901, a sample sheet acquisition module 902, a second removal module 903, and an elemental analysis module 904, wherein: the first removal module 901 is used to remove a first passivation layer from a target area in the chip to be analyzed to obtain a target chip; the sample sheet acquisition module 902 is used to acquire a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer in the target chip; the second removal module 903 is used to remove a second passivation layer from the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and the elemental analysis module 904 is used to perform elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

[0088] In one embodiment, the first removal module 901 includes a first stripping unit and a second stripping unit, wherein: the first stripping unit is used to control the first focused ion beam to perform atomic stripping on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; the second stripping unit is used to control the second focused ion beam to perform atomic stripping on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain a target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0089] In one embodiment, the sample sheet acquisition module 902 includes a sample acquisition unit for controlling the second focused ion beam to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emission device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesion layer and then connects to the adhesion layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesion layer and then connects to the adhesion layer and the second passivation layer.

[0090] In one embodiment, the second removal module 903 includes a third stripping unit for controlling a third focused ion beam to atomically strip the sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain a target sample; wherein the sample sheet is disposed on a copper mesh base, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0091] In one embodiment, the elemental analysis module 904 includes a mass spectrometry analysis unit and an analysis result determination unit, wherein: the mass spectrometry analysis unit is used to perform mass spectrometry analysis on the target sample for each transition layer using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; the analysis result determination unit is used to use each mass spectrometry analysis result as the elemental analysis result.

[0092] In one embodiment, the apparatus further includes a gold sputtering module for sputtering gold onto the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0093] Each module in the aforementioned elemental analysis device for the chip adhesion layer can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0094] In one exemplary embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as follows: Figure 10As shown, this computer device includes a processor, memory, input / output interfaces (I / O), and a communication interface. The processor, memory, and I / O interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the I / O interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and a database. The internal memory provides the environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores elemental analysis data. The I / O interfaces are used for exchanging information between the processor and external devices. The communication interface is used for communication with external terminals via a network connection. When executed by the processor, the computer program implements an elemental analysis method for a chip adhesion layer.

[0095] Those skilled in the art will understand that Figure 10 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0096] In one exemplary embodiment, a computer device is provided, including a memory and a processor. The memory stores a computer program, and the processor executes the computer program to perform the following steps: removing a first passivation layer from a target area in a chip to be analyzed to obtain a target chip; obtaining a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer from the target chip; removing the second passivation layer from the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and performing elemental analysis on the target sample sheet to obtain elemental analysis results corresponding to the chip to be analyzed.

[0097] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a first focused ion beam to perform atomic peeling on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; controlling a second focused ion beam to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain a target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0098] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling the second focused ion beam to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emitting device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and is connected to the adhesive layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesive layer and is connected to the adhesive layer and the second passivation layer.

[0099] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a third focused ion beam to atomically peel off a sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain a target sample; wherein the sample sheet is disposed on a copper mesh substrate, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0100] In one embodiment, when the processor executes the computer program, it further performs the following steps: for each transition layer, mass spectrometry analysis of the target sample is performed using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; and each mass spectrometry analysis result is used as the elemental analysis result.

[0101] In one embodiment, when the processor executes the computer program, it also performs the following steps: sputtering gold onto the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0102] In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, it performs the following steps: removing a first passivation layer from a target region in a chip to be analyzed to obtain a target chip; obtaining a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer in the target chip; removing the second passivation layer from the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and performing elemental analysis on the target sample sheet to obtain elemental analysis results corresponding to the chip to be analyzed.

[0103] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a first focused ion beam to perform atomic peeling on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; controlling a second focused ion beam to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain a target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0104] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling the second focused ion beam to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emitting device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and is connected to the adhesive layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesive layer and is connected to the adhesive layer and the second passivation layer.

[0105] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a third focused ion beam to atomically peel off a sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain a target sample; wherein the sample sheet is disposed on a copper mesh substrate, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0106] In one embodiment, when the processor executes the computer program, it further performs the following steps: for each transition layer, mass spectrometry analysis of the target sample is performed using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; and each mass spectrometry analysis result is used as the elemental analysis result.

[0107] In one embodiment, when the processor executes the computer program, it also performs the following steps: sputtering gold onto the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0108] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, performs the following steps: removing a first passivation layer from a target region in a chip to be analyzed to obtain a target chip; obtaining a sample sheet based on the target chip, the sample sheet including a second passivation layer and an adhesion layer in the target chip; removing the second passivation layer from the sample sheet to obtain a target sample sheet, the target sample sheet including the adhesion layer; and performing elemental analysis on the target sample sheet to obtain elemental analysis results corresponding to the chip to be analyzed.

[0109] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a first focused ion beam to perform atomic peeling on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; controlling a second focused ion beam to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain a target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0110] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling the second focused ion beam to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emitting device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and is connected to the adhesive layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesive layer and is connected to the adhesive layer and the second passivation layer.

[0111] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a third focused ion beam to atomically peel off a sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain a target sample; wherein the sample sheet is disposed on a copper mesh substrate, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0112] In one embodiment, when the processor executes the computer program, it further performs the following steps: for each transition layer, mass spectrometry analysis of the target sample is performed using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; and each mass spectrometry analysis result is used as the elemental analysis result.

[0113] In one embodiment, when the processor executes the computer program, it also performs the following steps: sputtering gold onto the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0114] In one embodiment, an elemental analysis system for a chip adhesion layer is provided, such as... Figure 11 As shown, the system includes an ion beam emission device 102, a mass spectrometry analysis device 103, and a computer device 101. The computer device 101 is connected to the ion beam emission device 102 and the mass spectrometry analysis device 103. The ion beam emission device 102 is used to remove the passivation layer from the target area in the chip to be analyzed, thereby obtaining a target sample sheet. The mass spectrometry analysis device 103 is used to perform elemental analysis on the target sample sheet, thereby obtaining the elemental analysis results corresponding to the chip to be analyzed.

[0115] For a detailed description of the computer equipment, please refer to the embodiments of the computer equipment described above, which will not be repeated here. When the processor of the computer equipment executes the computer program, it performs the following steps: removing the first passivation layer in the target area of ​​the chip to be analyzed to obtain the target chip; obtaining a sample sheet based on the target chip, the sample sheet including the second passivation layer and the adhesion layer in the target chip; removing the second passivation layer in the sample sheet to obtain the target sample sheet, the target sample sheet including the adhesion layer; and performing elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

[0116] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a first focused ion beam to perform atomic peeling on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip; controlling a second focused ion beam to perform atomic peeling on the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth to obtain a target chip, wherein the beam current of the first focused ion beam is greater than the beam current of the second focused ion beam.

[0117] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling the second focused ion beam to cut off the sample sheet connected to the gas injection component and the probe of the ion beam emitting device; wherein the gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and is connected to the adhesive layer, and the probe penetrates into the target chip along a direction perpendicular to the cross-sectional direction of the adhesive layer and is connected to the adhesive layer and the second passivation layer.

[0118] In one embodiment, when the processor executes the computer program, it further performs the following steps: controlling a third focused ion beam to atomically peel off a sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain a target sample; wherein the sample sheet is disposed on a copper mesh substrate, and the cross-section of the second passivation layer and the cross-section of the adhesion layer are parallel to the cross-section of the copper mesh.

[0119] In one embodiment, when the processor executes the computer program, it further performs the following steps: for each transition layer, mass spectrometry analysis of the target sample is performed using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; and each mass spectrometry analysis result is used as the elemental analysis result.

[0120] In one embodiment, when the processor executes the computer program, it also performs the following steps: sputtering gold onto the initial chip to be analyzed using a magnetron sputtering coating machine to obtain the chip to be analyzed.

[0121] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, data stored, data displayed, etc.) involved in this application are all information and data authorized by the user or fully authorized by all parties, and the collection, use and processing of the relevant data must comply with relevant regulations.

[0122] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0123] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0124] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for elemental analysis of a chip adhesion layer, characterized in that, The method includes: The first passivation layer is removed from the target area in the chip to be analyzed to obtain the target chip. Based on the target chip, a sample sheet is obtained, the sample sheet including a second passivation layer and an adhesion layer in the target chip; The sample sheet is subjected to a second passivation layer removal process to obtain a target sample sheet, the target sample sheet including the adhesion layer; Elemental analysis is performed on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

2. The method according to claim 1, characterized in that, The process of removing the first passivation layer from the target region in the chip to be analyzed to obtain the target chip includes: The first focused ion beam is controlled to perform atomic stripping on the chip to be analyzed along a direction perpendicular to the cross-section of the first passivation layer to obtain a candidate chip. The second focused ion beam is controlled to atomically peel off the candidate chip along a direction perpendicular to the cross-section of the first passivation layer until the cut surface is smooth, thereby obtaining the target chip. The beam current of the first focused ion beam is greater than that of the second focused ion beam.

3. The method according to claim 2, characterized in that, The cross-sections of the first passivation layer, the second passivation layer, and the adhesion layer are parallel to the placement platform corresponding to the chip to be analyzed, and the placement platform has a first angle relative to the reference plane.

4. The method according to claim 3, characterized in that, The step of obtaining a sample wafer based on the target chip includes: Control the second focused ion beam to cut off the sample sheet connected to the gas injection assembly and the probe of the ion beam emission device; The gas injection component penetrates into the target chip along the cross-sectional direction of the adhesive layer and connects to the adhesive layer, while the probe penetrates into the target chip in a direction perpendicular to the cross-sectional direction of the adhesive layer and connects to the adhesive layer and the second passivation layer.

5. The method according to claim 1, characterized in that, The process of removing the second passivation layer from the sample sheet to obtain the target sample sheet includes: The third focused ion beam is controlled to perform atomic stripping on the sample sheet in a direction perpendicular to the cross-section of the second passivation layer and the cross-section of the adhesion layer to obtain the target sample sheet; The sample sheet is disposed on a copper mesh base, and the cross-sections of the second passivation layer and the adhesion layer are parallel to the cross-section of the copper mesh.

6. The method according to any one of claims 1-5, characterized in that, The adhesion layer includes multiple transition layers. The elemental analysis of the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed includes: For each of the transition layers, the target sample slice is analyzed by mass spectrometry using a mass spectrometry analysis device to obtain the mass spectrometry analysis results of the transition layer; The mass spectrometry analysis results are used as the elemental analysis results.

7. The method according to any one of claims 1-5, characterized in that, Before performing the first passivation layer removal process on the target area in the chip to be analyzed to obtain the target chip, the method further includes: The initial chip to be analyzed is subjected to gold sputtering using a magnetron sputtering coating machine to obtain the chip to be analyzed.

8. An elemental analysis device for a chip adhesion layer, characterized in that, The device includes: The first removal module is used to perform a first passivation layer removal process on the target area in the chip to be analyzed, so as to obtain the target chip. A sample sheet acquisition module is used to acquire a sample sheet based on the target chip, wherein the sample sheet includes a second passivation layer and an adhesion layer in the target chip; The second removal module is used to perform a second passivation layer removal process on the sample sheet to obtain a target sample sheet, wherein the target sample sheet includes the adhesion layer; The elemental analysis module is used to perform elemental analysis on the target sample sheet to obtain the elemental analysis results corresponding to the chip to be analyzed.

9. A computer device, characterized in that, The computer device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the steps of the method according to any one of claims 1-7.

10. An elemental analysis system for a chip adhesion layer, characterized in that, The system includes an ion beam emission device, a mass spectrometry analysis device, and a computer device, wherein the computer device is connected to the ion beam emission device and the mass spectrometry analysis device; The ion beam emission device is used to remove the passivation layer from the target area in the chip to be analyzed, so as to obtain a thin slice of the target sample. The mass spectrometry analysis device is used to perform elemental analysis on the target sample slice to obtain the elemental analysis results corresponding to the chip to be analyzed. The computer device is used to implement the steps of the method according to any one of claims 1-7.

Images