Display device and image quality compensation driving method thereof

Abstract

The application discloses a display device and a quality compensation driving method thereof. The display device comprises a first substrate and a second substrate arranged oppositely, a plurality of source lines, a plurality of gate lines, a plurality of pixel units defined by the intersection of the source lines and the gate lines, and at least one analog pixel unit arranged outside a display area on the first substrate; the second substrate is provided with a plurality of common electrode lines extending along the direction of the gate lines, and each common electrode line corresponds to a row of pixel units. The analog pixel unit comprises an analog switch element and an analog pixel electrode, the control end of the analog switch element is electrically connected with the gate line, the first end is electrically connected with the source line, the second end is electrically connected with the analog pixel electrode, and the analog pixel electrode is electrically connected with the corresponding common electrode line on the second substrate through a conductive connecting piece. The display device and the quality compensation driving method thereof fundamentally solve the display unevenness problem caused by RC delay, are simple in structure and do not increase additional cost.

Description

Technical Field

[0001] This invention relates to the field of display technology, and in particular to a display device and its image quality compensation driving method. Background Technology

[0002] Cholesteric liquid crystal displays (LCDs) have shown broad application prospects in fields such as electronic paper, electronic shelf labels, outdoor information signs, and smart cards due to their advantages including bistable properties, no need for backlighting, extremely low power consumption, and clear readability under sunlight. Cholesteric liquid crystal molecules can exhibit various optical states under different electric fields, mainly including planar state (P-state), focal conic state (FC-state), and vertically aligned state (H-state). In the planar state, the helical axis of the liquid crystal molecules is perpendicular to the substrate surface, exhibiting selective reflection and displaying vivid colors; in the focal conic state, the helical axis is disordered, causing strong scattering of incident light, resulting in a cloudy or opaque weak white state; in the vertically aligned state, the liquid crystal molecules are aligned perpendicular to the substrate surface, exhibiting a transparent state. During the driving process, by applying voltage pulses of specific waveforms and amplitudes to the pixel electrodes, the liquid crystal molecules can switch between different states, thereby achieving grayscale display.

[0003] Typical cholesteric liquid crystal display panels employ an active matrix driving architecture. Please refer to... Figure 1 and Figure 2 Conventional cholesteric liquid crystal display modules are typically composed of two to three stacked glass substrates. Taking a two-substrate structure as an example, it includes a first substrate and a second substrate arranged opposite each other. The first substrate has multiple source lines extending along the column direction, multiple gate lines extending along the row direction, and multiple pixel units defined by the intersection of the source lines and gate lines. Each pixel unit includes a thin-film transistor (TFT) switch and a pixel electrode, wherein the gate of the TFT is connected to the gate line, the drain is connected to the source line, and the source is connected to the pixel electrode. A common electrode layer covering the entire surface is formed on the second substrate, and a cholesteric liquid crystal layer fills the space between the first and second substrates.

[0004] However, due to the unavoidable parasitic resistance and capacitance inherent in the source line, an RC delay effect occurs when the drive signal propagates along the source line. For example... Figure 3 As shown, the charging process of the pixel electrode can be simplified to an equivalent circuit of series and parallel connection of resistor R and capacitor C, and its delay characteristics can be obtained through the time constant. To characterize, among which The smaller the value, the faster the charging speed. It is generally believed that after 5... The capacitor voltage can be charged to approximately 99.3% of the target voltage within a given time, which can be considered as essentially fully charged.

[0005] In actual display panels, for pixels on the same source line, the "near-end" pixels, closer to the source driver IC (source signal input terminal), have shorter transmission paths, smaller accumulated parasitic resistance and capacitance, and smaller RC delay. Conversely, the "far-end" pixels, farther from the source driver IC, have longer transmission paths, significantly increased accumulated parasitic resistance and capacitance, and larger RC delay. This difference in RC delay between near and far ends results in a significantly lower actual voltage being charged onto the far-end pixel electrode than onto the near-end pixel electrode within the same charging time.

[0006] Taking a 40-inch cholesteric liquid crystal display as an example, actual calculations show that the near-end pixels take approximately 0.12 microseconds to fully charge, while the far-end pixels take about 4 microseconds. If a conventional 1-microsecond charging time design is used, the near-end pixels can be fully charged to the target voltage, but the far-end pixels can only charge to about 1... The corresponding time is approximately 63% of the target voltage. This difference ultimately results in a significant brightness gradient in the image along the direction of the source line extension—near-end pixels are under-bright due to sufficient charging (too dark), while far-end pixels are over-bright due to insufficient charging (too bright), severely affecting the uniformity and display quality of the image.

[0007] Furthermore, for cholesteric liquid crystals, grayscale display is achieved by controlling the ratio between the P-state and FC-state of the liquid crystal, and precise control of grayscale depends on the accuracy of the voltage applied to the pixel electrodes. The aforementioned voltage difference between the near and far ends will directly cause deviations in the grayscale of pixels in the same row but different columns, making this image quality problem even more prominent.

[0008] To address the aforementioned issues, existing technologies typically employ methods such as increasing the source linewidth to reduce resistance, increasing storage capacitance, or optimizing drive timing. However, increasing the linewidth will reduce the pixel aperture area and decrease the aperture ratio; increasing the storage capacitance may affect the charging and discharging speed; and optimizing drive timing often requires complex circuit design with limited compensation effects. None of these solutions can fundamentally eliminate the impact of near-far RC delay differences on pixel voltage.

[0009] Therefore, there is an urgent need for a technical solution that is simple in structure, provides accurate compensation, does not significantly increase costs, and can fundamentally solve the problem of uneven brightness between the near and far ends of the display panel. Summary of the Invention

[0010] To address the technical problems existing in the background art, the present invention proposes a display device and its image quality compensation driving method.

[0011] The present invention provides a display device comprising: A first substrate has a plurality of source lines extending along a first direction, a plurality of gate lines extending along a second direction, a plurality of pixel units defined by the intersection of the source lines and the gate lines, and at least one analog pixel unit disposed outside the display area; the analog pixel unit includes an analog switching element and an analog pixel electrode, the control terminal of the analog switching element is electrically connected to a gate line, the first terminal of the analog switching element is electrically connected to a source line, and the second terminal of the analog switching element is electrically connected to the analog pixel electrode; The second substrate is disposed opposite to the first substrate, and a plurality of common electrode lines extending along the second direction are disposed thereon, each common electrode line corresponding to a row of pixel units. A display dielectric layer is disposed between the first substrate and the second substrate; A conductive connector is used to electrically connect the analog pixel electrode to a corresponding common electrode line on the second substrate. The driving circuit is configured to provide a data voltage to the pixel unit corresponding to the selected gate line during the pixel writing stage of a frame, and simultaneously provide a compensation voltage to the corresponding common electrode line on the second substrate through the source line and conductive connector electrically connected to the analog pixel unit; wherein the polarity of the compensation voltage is opposite to the polarity of the data voltage applied to the pixel unit in the same row.

[0012] Preferably, the compensation voltage input terminal of the common electrode line on the second substrate is located on the side of the display area away from the data voltage input terminal of the source electrode line, so that the transmission direction of the compensation voltage on the common electrode line is opposite to the transmission direction of the data voltage on the source electrode line.

[0013] Preferably, the analog pixel unit is disposed on one side of the display area near the data voltage input terminal of the source line, and the conductive connector electrically connects the analog pixel electrode to one end of the common electrode line near the data voltage input terminal of the source line.

[0014] Preferably, the area of ​​the simulated pixel electrode of the simulated pixel unit is equal to the area of ​​the pixel electrode of the pixel unit, and the width of each common electrode line in the second direction is consistent with the width of the pixel electrode corresponding to each row of pixel units in the second direction.

[0015] Preferably, there are two simulated pixel units, which are respectively disposed on both sides of the display area along the second direction; the common electrode line is broken at the middle position along the second direction and divided into a first segment and a second segment, wherein the first segment is electrically connected to the simulated pixel unit located on one side through a conductive connector, and the second segment is electrically connected to the simulated pixel unit located on the other side through a conductive connector.

[0016] Preferably, the number of simulated pixel units is one, which is disposed on one side of the display area along the second direction. The common electrode line is a continuous trace, and one end of the common electrode line is electrically connected to the simulated pixel unit through a conductive connector.

[0017] Preferably, the conductive connector is a conductive frame adhesive; the display medium layer is a cholesteric liquid crystal layer; and the compensation voltage output by the driving circuit is an AC voltage with an amplitude between 3V and 5V.

[0018] Preferably, the compensation voltage of the common electrode line is generated by a flip-chip film bonded to the near end of the source electrode of the first substrate, and led to the far end of the display area through the traces on the side of the first substrate, and then connected to the common electrode line of the second substrate through a conductive connector; or, the compensation voltage of the common electrode line is directly provided by an independent flip-chip film bonded to the far end of the display area.

[0019] The present invention provides a display device image quality compensation driving method, applied to the display device as described in any of the above claims, the method comprising: The display data of a frame is acquired, and a data voltage signal for each source line and a compensation voltage signal for each common line are generated based on the display data. The polarity of the compensation voltage signal is opposite to that of the corresponding data voltage signal. In the one-pixel writing stage, a target gate line is selected, and a data voltage signal is applied to the pixel unit of the corresponding row of the target gate line through each source line. At the same time, a compensation voltage signal is applied to the corresponding common electrode line on the second substrate through the analog pixel unit and conductive connector connected by the target gate line. This ensures that the difference between the pixel voltage at any pixel unit position on the first substrate and the common electrode voltage at the corresponding position on the second substrate remains essentially constant at the near and far ends of the source line.

[0020] Preferably, the time constant determined by the product of the equivalent resistance and equivalent capacitance of the simulated pixel unit is equal to the time constant determined by the product of the equivalent resistance and equivalent capacitance of the pixel unit.

[0021] In this invention, the proposed display device and its image quality compensation driving method add simulated pixel units with the same structural parameters as normal pixel units outside the display area of ​​the first substrate, and modify the common electrode layer on the second substrate into independent common electrode lines corresponding to each row of pixels. Conductive connectors are used to electrically connect the simulated pixel units to the corresponding row's common electrode lines. Simultaneously, a driving timing sequence that applies a compensation voltage with the opposite polarity to the data voltage to the common electrode lines during the pixel writing stage constructs a path-complementary, voltage-counteracting compensation architecture at the system level. Under this architecture, the RC delay decay direction of the data voltage on the source line is exactly opposite to the RC delay decay direction of the compensation voltage on the common electrode line. This results in a lower common electrode compensation voltage when the near-end pixel electrode voltage is higher, and a higher common electrode compensation voltage when the far-end pixel electrode voltage is lower. After subtracting the two, the final voltage difference across the liquid crystal molecules remains essentially constant at the near and far ends of the source line. Therefore, the problem of uneven display brightness caused by the difference in RC delay between the near and far ends of the source line is solved, improving the uniformity and image quality of the entire screen display. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of a conventional cholesteric phase single-module structure; Figure 2 This is a schematic diagram of a conventional cholesteric phase module stacking structure; Figure 3 This is a schematic diagram of a standard pixel arrangement and segment delay. Figure 4 for Figure 3 Equivalent diagram; Figure 5 This is a schematic diagram of the structure of the second substrate in one embodiment of a display device proposed in this invention; Figure 6 This is a schematic diagram of the structure of the first substrate of one embodiment of a display device proposed in this invention; Figure 7 This is a schematic diagram of one embodiment of a display device proposed in this invention; Figure 8 A complementary diagram of pixel electrodes and AC common delay pairs for one embodiment of a display device proposed in this invention; Figure 9 This is a three-dimensional unfolded structural diagram of Embodiment 1 of a display device proposed in this invention; Figure 10 This is a three-dimensional unfolded structural diagram of Embodiment 2 of a display device proposed in this invention; Figure 11 A schematic diagram of the AC common-pole signal input for one embodiment of a display device proposed in this invention. Figure 1 ; Figure 12A schematic diagram of the AC common-pole signal input for one embodiment of a display device proposed in this invention. Figure 2 ; Figure 13 This is a flowchart illustrating the image quality compensation driving method for a display device proposed in this invention. Detailed Implementation

[0023] Reference Figures 5-12 The present invention provides a display device comprising: A first substrate has a plurality of source lines extending along a first direction, a plurality of gate lines extending along a second direction, a plurality of pixel units defined by the intersection of the source lines and the gate lines, and at least one analog pixel unit disposed outside the display area. The analog pixel unit includes an analog switching element and an analog pixel electrode. The control terminal of the analog switching element is electrically connected to a gate line, the first terminal of the analog switching element is electrically connected to a source line, and the second terminal of the analog switching element is electrically connected to the analog pixel electrode.

[0024] Specifically, the first substrate can be a glass substrate or a flexible substrate, on which a display area AA and a non-display area NA surrounding the display area AA are formed. Within the display area AA, the first substrate has multiple source lines S1~Sn extending along a first direction (column direction, i.e., the direction of source line extension) and multiple gate lines G1~Gm extending along a second direction (row direction, i.e., the direction of gate line extension). The source lines and gate lines intersect to define multiple pixel units P arranged in an array. Each pixel unit P includes a pixel switching element T1 and a pixel electrode electrically connected to the pixel switching element T1. The control terminal (gate) of the pixel switching element T1 is connected to the gate line of the corresponding row, the first terminal (source) is connected to the source line of the corresponding column, and the second terminal (drain) is connected to the pixel electrode.

[0025] The second substrate is disposed opposite to the first substrate, and a plurality of common electrode lines extending along the second direction are disposed thereon, each common electrode line corresponding to a row of pixel units.

[0026] Specifically, the second substrate is disposed opposite to the first substrate, and multiple common electrode lines COM1~COMm extending along the second direction (row direction) are formed on the second substrate. Each common electrode line in this application is independently disposed, and each common electrode line corresponds to a row of pixel units P. That is, above each row of pixel units P, there is a strip-shaped independent common electrode line disposed opposite to that row of pixel units.

[0027] At least one analog pixel unit DP is disposed in the non-display area NA of the first substrate. The structure of the analog pixel unit DP is completely identical to that of the normal pixel unit P in the display area AA, specifically including an analog switching element T2 and an analog pixel electrode. The dimensions, channel aspect ratio, and other parameters of the analog switching element T2 are preferably exactly the same as those of the pixel switching element T1. The control terminal (gate) of the analog switching element T2 is electrically connected to the gate line of the corresponding row, the first terminal (one of the source / drain) is electrically connected to the source line of the corresponding column, and the second terminal (the other of the drain / source) is electrically connected to the analog pixel electrode.

[0028] Electrical conductivity is achieved between the first substrate and the second substrate via a conductive connector. In this embodiment, the conductive connector is specifically a conductive sealant. The conductive sealant serves both to seal the upper and lower substrates and the display medium layer, and to act as a conductor electrically connecting the analog pixel electrodes on the first substrate to the common electrode lines on the second substrate. Specifically, the analog pixel electrodes are electrically connected to one end of the corresponding row of common electrode lines on the second substrate via the conductive sealant.

[0029] The driving circuit is configured to provide a data voltage to the pixel unit corresponding to the selected gate line during the pixel writing stage of a frame, and simultaneously provide a compensation voltage to the corresponding common electrode line on the second substrate through the source line and conductive connector electrically connected to the analog pixel unit; wherein the polarity of the compensation voltage is opposite to the polarity of the data voltage applied to the pixel unit in the same row.

[0030] The driving circuit may include a gate driver, a source driver, a timing controller, and a common electrode voltage generation circuit. During the pixel writing stage of a frame, the driving circuit selects a target gate line in a certain row and provides the corresponding grayscale data voltage to the normal pixel unit P in that row through each source line. Simultaneously, the driving circuit provides a compensation voltage to the source line electrically connected to the analog pixel unit DP. This compensation voltage is transmitted to the corresponding common electrode line on the second substrate through conductive sealant. The polarity of the compensation voltage is opposite to the polarity of the data voltage applied to the pixel unit in the same row. For example, when the data voltage applied to a pixel unit P is a positive voltage relative to a common reference, the compensation voltage applied to the corresponding common electrode line is a negative voltage.

[0031] In this embodiment, the compensation voltage input terminal of the common electrode line on the second substrate is located on the side of the display area away from the data voltage input terminal of the source electrode line, so that the transmission direction of the compensation voltage on the common electrode line is opposite to the transmission direction of the data voltage on the source electrode line.

[0032] In this embodiment, the analog pixel unit is disposed on the side of the display area near the data voltage input terminal of the source line, and the conductive connector electrically connects the analog pixel electrode to one end of the common electrode line near the data voltage input terminal of the source line.

[0033] Specifically, the area of ​​the simulated pixel electrode of the simulated pixel unit is equal to the area of ​​the pixel electrode of the pixel unit, and the width of each common electrode line in the second direction is consistent with the width of the pixel electrode corresponding to each row of pixel units in the second direction.

[0034] Specifically, there are two analog pixel units, which are respectively located on both sides of the display area along the second direction; the common electrode line is broken at the middle position along the second direction and divided into a first segment and a second segment, wherein the first segment is electrically connected to the analog pixel unit located on one side through a conductive connector, and the second segment is electrically connected to the analog pixel unit located on the other side through a conductive connector.

[0035] Alternatively, there may be one analog pixel unit located on one side of the display area along the second direction, with the common electrode line being a continuous trace, and one end of the common electrode line being electrically connected to the analog pixel unit via a conductive connector.

[0036] A display medium layer is disposed between the first substrate and the second substrate. The display medium layer is a cholesteric liquid crystal layer; the cholesteric liquid crystal can switch between a planar state (P state), a focal conic state (FC state), and a vertically aligned state (H state).

[0037] A conductive connector is used to electrically connect the analog pixel electrode to a corresponding common electrode line on the second substrate.

[0038] In this embodiment, the compensation voltage output by the driving circuit is an AC voltage with an amplitude between 3V and 5V.

[0039] In this embodiment, the compensation voltage of the common electrode line is generated by a flip-chip film bonded to the near end of the source electrode of the first substrate, and led to the far end of the display area through the traces on the side of the first substrate, and then connected to the common electrode line of the second substrate through a conductive connector; or, the compensation voltage of the common electrode line is directly provided by an independent flip-chip film bonded to the far end of the display area.

[0040] It should be noted that due to the parasitic resistance R and capacitance C of the source line S, an RC delay occurs in the data voltage along the extension direction of the source line, starting from the source signal input terminal. The RC time constant of the "near-end" pixels, which are closer to the signal input terminal, is... The smaller the voltage, the less attenuated the data voltage signal, allowing the pixel electrode to be charged to near the target voltage value within the specified charging time; however, for "far" pixels located further from the signal input, the accumulated resistance and capacitance on the circuit are greater, resulting in a longer RC time constant. The voltage is significantly increased, and within the same charging time, the actual voltage reached on the far pixel electrode is significantly lower than that on the near pixel electrode.

[0041] To compensate for this difference, this application places the compensation voltage input terminal on the common electrode line COM on the opposite side of the data voltage input terminal on the source electrode line. Taking the data voltage input from the left side of the display area as an example, the compensation voltage of the common electrode line is input from the right side of the display area. In this way, the transmission direction of the compensation voltage on the common electrode line COM is exactly opposite to the transmission direction of the data voltage on the source electrode line S.

[0042] For the near-source extreme of the display area (Area A): the RC delay of the data voltage is minimal here, and the pixel electrode voltage V_pixel is close to the target value; however, this location is precisely the far end of the common electrode line, and the compensation voltage V_com experiences the maximum RC delay when it reaches this point, resulting in the smallest actual voltage amplitude. Since V_com and V_pixel have opposite polarities, a smaller amplitude V_com has a weaker "cancellation" or "pulling down" effect on V_pixel.

[0043] For the far-source extreme of the display area (region B): the RC delay of the data voltage is the largest here, and the pixel electrode voltage V_pixel is significantly lower than the target value; however, this location is exactly near the common electrode line, and the compensation voltage V_com arrives with almost no attenuation, resulting in the largest actual voltage amplitude. A larger V_com with opposite polarity creates a stronger "reverse compensation" effect on V_pixel.

[0044] The final voltage difference across the liquid crystal molecule is V_LC = V_pixel - V_com. Through the synergistic effect of the above-mentioned path complementarity and polarity reversal, at the near end point A, because V_pixel is high and V_com is low, V_LC maintains a suitable value; at the far end point B, although V_pixel is low, V_com is significantly high, and the difference between the two, V_LC, still maintains a value that is basically equal to that at the near end point A.

[0045] In this embodiment, the area of ​​the simulated pixel electrode of the simulated pixel unit DP is set to be exactly equal to the area of ​​the pixel electrode of the normal pixel unit P in the display area. Simultaneously, the width of each common electrode line COM in the row direction (second direction) is also consistent with the width of the pixel electrode corresponding to each row of pixel units in that direction. The purpose of this design is to ensure that the RC equivalent load formed by the simulated pixel unit DP and its connected common electrode lines is precisely matched with the RC equivalent load of the normal pixel units in the display area. That is, the time constant is determined by the product of the equivalent resistance and equivalent capacitance of the simulated pixel unit. The time constant is determined by the product of the equivalent resistance and equivalent capacitance of the pixel unit. They are equal. This ensures the accuracy of the aforementioned near-far voltage complementarity.

[0046] like Figure 7As shown, the vertical axis represents the screen reflectivity (in %), and the horizontal axis represents the voltage applied to the liquid crystal (in V). Figure 7 This reflects that applying the same voltage for different times and applying different voltages for the same time has a significant impact on reflectivity. When the voltage is below 20V, the longer the application time and the higher the voltage, the lower the reflectivity. When the voltage reaches 30V and above, the reflectivity change reverses with increasing time and voltage, from high to low and then from low to high.

[0047] Example 1: Figure 9 This is a schematic diagram of the structure of Implementation Example 1 of this application, illustrating a first specific layout of analog pixel units. In this embodiment, there are two analog pixel units DP, namely a first analog pixel unit DP_L and a second analog pixel unit DP_R. These two analog pixel units are respectively disposed in the non-display areas NA on the left and right sides of the display area AA along the second direction (row direction). Correspondingly, the common electrode lines of each row are broken at the middle position along the second direction and divided into left and right segments, such as COM1-L and COM1-R. The left segment COM1-L is electrically connected to the left analog pixel unit DP_L through a conductive frame adhesive located on the left side frame; the right segment COM1-R is electrically connected to the right analog pixel unit DP_R through a conductive frame adhesive located on the right side frame. The advantage of this bilateral symmetrical design is that the pixel areas on the left and right sides can be optimized independently, which is suitable for large-size or ultra-wide screen display panels.

[0048] Example 2: Figure 10 This is a schematic diagram of Implementation Example 2 of this application, illustrating another, more simplified analog pixel unit layout. In this embodiment, there is only one analog pixel unit DP, centrally located in the non-display area NA on one side of the display area AA along the second direction (shown as the left side in the diagram). In this case, the common electrode lines COM of each row are continuous traces without interruption. One end of each row's common electrode line COM (i.e., the end furthest from the analog pixel unit, shown as the right end in the diagram) serves as the compensation voltage input terminal, introducing the compensation signal through the trace; the other end of the common electrode line COM (i.e., the end closest to the analog pixel unit, shown as the left end in the diagram) is electrically connected to the analog pixel unit DP on that side through conductive frame adhesive. This scheme has a more compact structure, reducing bezel space occupation and process steps, and is suitable for small and medium-sized display products with strict requirements on size and cost.

[0049] like Figure 11 and Figure 12 As shown, the display device of this application can provide a compensation voltage to the common electrode line on the second substrate in either of the following two ways.

[0050] Method 1: The common electrode compensation voltage is generated by a chip-on-film (COF) bonded to the near end of the source electrode (i.e., near the source driver IC) of the first substrate. This signal is not directly injected at the near end, but is guided to the far end of the display area (i.e., the end away from the source driver IC) through a metal trace designed in the non-display area on the side of the first substrate, and then transmitted to the corresponding common electrode line of the second substrate through the conductive sealant located at the far end.

[0051] Method 2: One or more independent flip-chip films (COF) are individually bonded at the far end of the display area to generate a common electrode compensation voltage. The signal is then injected directly into the common electrode line of the second substrate through the conductive sealant at that location, without the need to set side traces on the first substrate.

[0052] The two methods can be flexibly selected based on factors such as product size, bezel width, and driver chip cost.

[0053] It should be noted that with the above structure, when writing black data to a screen pixel, the AC common electrode needs to output a voltage with the opposite polarity, that is, opposite to the voltage of the written data, with the same amplitude as the written voltage, and half the amplitude of the normal timing data writing voltage. For example, the normal timing 20V voltage can be broken down into ±10V. When writing white data, the white data is maintained, and the source electrode writes a voltage with the opposite polarity to the black data, the same polarity as the AC common electrode, and the same voltage amplitude, or 2-3V higher. This compensates for the voltage difference between the source electrode voltage and the AC common electrode at the near and far ends, ensuring that the voltage difference at both ends is controlled within 0-3V, which has no impact on the liquid crystal state. This is used for near and far end compensation without affecting the steady state of the liquid crystal of unwritten pixels. In existing driving schemes, the AC common electrode always maintains the GND potential during data writing. After compensation, the delay of each pixel position on the screen can be reduced as follows: Figure 8 As shown, the voltage difference applied to the first substrate and the second substrate remains consistent, improving the uniformity of the display. The AC common electrode is present on the first substrate, providing an AC reference voltage to all pixel electrodes located on the second electrode.

[0054] Reference Figure 13 The present invention proposes a display device image quality compensation driving method, applied to any of the display devices described above, the method comprising: The display data of a frame is acquired, and data voltage signals for each source line and compensation voltage signals for each common line are generated based on the display data. The polarity of the compensation voltage signal is opposite to that of the corresponding data voltage signal. In the one-pixel writing stage, a target gate line is selected, and a data voltage signal is applied to the pixel unit of the corresponding row of the target gate line through each source line. At the same time, a compensation voltage signal is applied to the corresponding common electrode line on the second substrate through the analog pixel unit and conductive connector connected by the target gate line. This ensures that the difference between the pixel voltage at any pixel unit position on the first substrate and the common electrode voltage at the corresponding position on the second substrate remains essentially constant at the near and far ends of the source line.

[0055] In this embodiment, the time constant determined by the product of the equivalent resistance and equivalent capacitance of the simulated pixel unit is equal to the time constant determined by the product of the equivalent resistance and equivalent capacitance of the pixel unit.

[0056] Specifically, based on the hardware structure of the aforementioned display device, the specific steps of the image quality compensation driving method of this application are as follows: First, the driving circuit acquires display data for a frame of the image to be displayed. Based on this display data, the internal data processing and voltage generation module generates data voltage signals to drive each source line and compensation voltage signals to drive each common line. The polarity of the generated compensation voltage signal is opposite to that of the corresponding row's data voltage signal.

[0057] Subsequently, the pixel-by-pixel writing stage for one frame begins. When the k-th row is selected, the gate driver outputs a high-level signal to the gate line Gk of the k-th row, activating all pixel switching elements T1 and analog switching elements T2 in that row. Simultaneously, the source driver applies corresponding data voltage signals to the pixel electrodes of each normal pixel unit P in the k-th row through each source line S1~Sn. For the analog pixel unit DP, the driving circuit provides a generated compensation voltage signal to the analog pixel unit DP through its connected source line. This compensation voltage signal is synchronously applied to the common electrode line COMk on the second substrate corresponding to the k-th row via the analog switching element T2, the analog pixel electrode, and the conductive sealant.

[0058] Ultimately, through the synergistic effect of the pixel electrode voltage attenuating along the source line and the common electrode voltage attenuating along the common line in opposite directions and with opposite polarities, the difference V_LC between the pixel voltage V_pixel at any pixel unit location on the first substrate and the corresponding common electrode voltage V_com on the second substrate remains essentially constant at both the near and far ends of the entire source line. This improves the brightness uniformity of the displayed image along the extension direction of the source line, enhancing the image quality of products such as cholesteric liquid crystal electronic paper.

[0059] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A display device, characterized in that, include: A first substrate has a plurality of source lines extending along a first direction, a plurality of gate lines extending along a second direction, a plurality of pixel units defined by the intersection of the source lines and the gate lines, and at least one analog pixel unit disposed outside the display area; the analog pixel unit includes an analog switching element and an analog pixel electrode, the control terminal of the analog switching element is electrically connected to a gate line, the first terminal of the analog switching element is electrically connected to a source line, and the second terminal of the analog switching element is electrically connected to the analog pixel electrode; The second substrate is disposed opposite to the first substrate, and a plurality of common electrode lines extending along the second direction are disposed thereon, each common electrode line corresponding to a row of pixel units. A display dielectric layer is disposed between the first substrate and the second substrate; A conductive connector is used to electrically connect the analog pixel electrode to a corresponding common electrode line on the second substrate. The driving circuit is configured to provide a data voltage to the pixel unit corresponding to the selected gate line during the pixel writing stage of a frame, and simultaneously provide a compensation voltage to the corresponding common electrode line on the second substrate through the source line and conductive connector electrically connected to the analog pixel unit; wherein the polarity of the compensation voltage is opposite to the polarity of the data voltage applied to the pixel unit in the same row.

2. The display device according to claim 1, characterized in that, The compensation voltage input terminal of the common electrode line on the second substrate is located on the side of the display area away from the data voltage input terminal of the source electrode line, so that the transmission direction of the compensation voltage on the common electrode line is opposite to the transmission direction of the data voltage on the source electrode line.

3. The display device according to claim 2, characterized in that, The analog pixel unit is disposed on one side of the display area, near the data voltage input terminal of the source line, and the conductive connector electrically connects the analog pixel electrode to one end of the common electrode line near the data voltage input terminal of the source line.

4. The display device according to claim 1, characterized in that, The area of ​​the simulated pixel electrode of the simulated pixel unit is equal to the area of ​​the pixel electrode of the pixel unit, and the width of each common electrode line in the second direction is consistent with the width of the pixel electrode corresponding to each row of pixel units in the second direction.

5. The display device according to claim 1, characterized in that, The number of simulated pixel units is two, respectively disposed on both sides of the display area along the second direction; the common electrode line is broken at the middle position along the second direction, and is divided into a first segment and a second segment, wherein the first segment is electrically connected to the simulated pixel unit located on one side through a conductive connector, and the second segment is electrically connected to the simulated pixel unit located on the other side through a conductive connector.

6. The display device according to claim 1, characterized in that, The number of simulated pixel units is one, which is located on one side of the display area along the second direction. The common electrode line is a continuous trace, and one end of the common electrode line is electrically connected to the simulated pixel unit through a conductive connector.

7. The display device according to claim 1, characterized in that, The conductive connector is a conductive frame adhesive; the display medium layer is a cholesteric liquid crystal layer; the compensation voltage output by the driving circuit is an AC voltage with an amplitude between 3V and 5V.

8. The display device according to claim 1, characterized in that, The compensation voltage of the common electrode line is generated by a flip-chip film bonded to the near end of the source electrode of the first substrate, and led to the far end of the display area through the traces on the side of the first substrate, and then connected to the common electrode line of the second substrate through a conductive connector; or, the compensation voltage of the common electrode line is directly provided by an independent flip-chip film bonded to the far end of the display area.

9. A method for image quality compensation driving of a display device, characterized in that, Applied to a display device as described in any one of claims 1-8, the method comprises: The display data of a frame is acquired, and a data voltage signal for each source line and a compensation voltage signal for each common line are generated based on the display data. The polarity of the compensation voltage signal is opposite to that of the corresponding data voltage signal. In the one-pixel writing stage, a target gate line is selected, and a data voltage signal is applied to the pixel unit of the corresponding row of the target gate line through each source line. At the same time, a compensation voltage signal is applied to the corresponding common electrode line on the second substrate through the analog pixel unit and conductive connector connected by the target gate line. This ensures that the difference between the pixel voltage at any pixel unit position on the first substrate and the common electrode voltage at the corresponding position on the second substrate remains essentially constant at the near and far ends of the source line.

10. The image quality compensation driving method for a display device according to claim 9, characterized in that, The time constant determined by the product of the equivalent resistance and equivalent capacitance of the simulated pixel unit is equal to the time constant determined by the product of the equivalent resistance and equivalent capacitance of the pixel unit.

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