A battery short circuit protection method, circuit, battery management system and device

Abstract

The application relates to a battery short-circuit protection method and circuit, a battery management system and equipment. The method comprises the following steps: obtaining the charging and discharging current of a battery charging and discharging circuit; comparing the voltage signal corresponding to the charging and discharging current with the voltage signal corresponding to the current threshold to output a level signal; monitoring the level signal and capturing the level change of the level signal; when the level signal changes from high to low, a falling edge interrupt request is generated, and after the falling edge interrupt request is detected, a falling edge interrupt service program is entered; in the falling edge interrupt service program, a timing mechanism is started, the level change of the level signal is captured again when the timing reaches a preset timing time value, if the level signal still remains at a low level, a battery short-circuit fault signal is determined, a short-circuit protection action is controlled to be triggered, if the level signal has returned to a high level, a transient interference signal is determined, the short-circuit protection action is not triggered, and the falling edge interrupt service program is exited. The application can improve the reliability of short-circuit protection.

Description

Technical Field

[0001] This invention relates to the field of battery short-circuit protection technology, and in particular to a battery short-circuit protection method, circuit, battery management system, and device. Background Technology

[0002] In the application of new energy storage systems, typical loads are mostly high-power AC loads, with power levels typically ranging from 1kW to 30kW. When such loads are operating, they generate alternating currents that vary with the grid frequency on the Battery Management System (BMS) side, and these currents generally contain 50Hz to 60Hz and their harmonics.

[0003] In related technologies, battery management systems (BMS) use analog front-end (AFE) chips to sample voltage and current. Limited by the scanning speed and internal structure of the analog front-end chip, its voltage and current sampling rate is relatively low. According to the Nyquist sampling theorem, under this sampling rate, it is impossible to effectively digitally filter current and voltage fluctuation signals containing 50 Hz to 60 Hz and their harmonics, making it difficult to eliminate voltage sampling jitter caused by high-power AC loads using only software algorithms. To reduce the impact of current changes on the sampling results, some existing solutions attempt to add large-capacity (microfarad level) filter capacitors to the current acquisition end of the analog front-end chip to smooth the current signal. However, when the system experiences extremely fast high-current faults such as microsecond-level short circuits, the large-capacity filter capacitors absorb and passivate the transient pulse characteristics of the short-circuit current, making the current sampling signal obtained by the BMS unable to reflect the actual fault situation in a timely and accurate manner, leading to short-circuit protection failure. Furthermore, it is prone to false triggering, resulting in poor reliability. Summary of the Invention

[0004] This invention provides a battery short-circuit protection method and circuit, a battery management system, and a device to solve the problem that the current sampling signal obtained by the existing battery management system cannot reflect the real fault situation in a timely and accurate manner, resulting in short-circuit protection failure, easy false triggering, and poor reliability.

[0005] This invention discloses a battery short-circuit protection method, comprising:

[0006] Obtain the charging and discharging current of the battery charging and discharging circuit; The voltage signal corresponding to the charging / discharging current is compared with the voltage signal corresponding to the current threshold, and a level signal is output. The level signal is monitored to capture changes in its level. When the level signal is detected to change from high to low, a falling edge interrupt request is generated, and the falling edge interrupt service routine is entered after the falling edge interrupt request is detected. In the falling edge interrupt service routine, a timing mechanism is started, and when the timing reaches the preset time value, the level change of the level signal is captured again; If the level signal remains low, it is determined to be a battery short circuit fault signal, and the short circuit protection action is triggered. If the level signal has returned to a high level, it is determined to be a transient interference signal, and the short-circuit protection action is not triggered, and the falling edge interrupt service routine is exited.

[0007] Optionally, the charging and discharging current in the battery charging and discharging circuit is obtained by a sampling resistor connected in series in the battery charging and discharging circuit, and the corresponding voltage signal is output. The voltage signal corresponding to the current threshold satisfies the following formula:

[0008] in, This is the voltage signal corresponding to the current threshold. To preset the short-circuit protection current threshold, This is the resistance value of the sampling resistor.

[0009] Optionally, the preset timing value ranges from 10μs to 100μs.

[0010] Optionally, the specific steps for controlling and triggering the short-circuit protection action include: Output a shutdown control signal to control the disconnection of the battery charging and discharging circuit; Exit the timing mechanism, record the fault operation information of the current short circuit event, and set the fault status flag; the fault operation information includes at least one of the following: short circuit occurrence time, short circuit duration, bus voltage, and battery operating status.

[0011] Optionally, the battery short-circuit protection method further includes the following steps: Upon entering the falling edge interrupt service routine, the timing mechanism is started first, and subsequent external interrupt requests from the same source are temporarily blocked until the current level signal determination operation is completed.

[0012] Optionally, prior to the start-up timing mechanism, the battery short-circuit protection method further includes the following steps: Record suspected short circuit events, clear the timer counter to zero, and load the preset timer value.

[0013] The battery short-circuit protection method further includes the following steps: After confirming that the battery short circuit fault signal has been eliminated, the system receives commands from the host computer or user confirmation instructions to control the reconnection of the charging and discharging circuit.

[0014] The present invention also discloses a battery short-circuit protection circuit for implementing the battery short-circuit protection method as described in any of the preceding claims, the battery short-circuit protection circuit comprising: A current detection unit is connected in series in the battery charging and discharging circuit. The current detection unit is used to output a voltage signal corresponding to the charging and discharging current. The first comparison unit has its input terminals connected to both ends of the current detection unit; the first comparison unit is used to compare the voltage signal corresponding to the charging current with the voltage signal corresponding to the charging current threshold, and output a first level signal. The second comparison unit has its input terminals connected to both ends of the current detection unit; the second comparison unit is used to compare the voltage signal corresponding to the discharge current with the voltage signal corresponding to the discharge current threshold, and output a second level signal. The switching unit is connected in series in the battery charging and discharging circuit; The main control unit is connected to the output terminals of the first comparison unit, the second comparison unit, and the control terminal of the switching unit.

[0015] The present invention also discloses a battery management system, including the battery short-circuit protection circuit as described above.

[0016] The present invention also discloses an energy storage device, including a memory and a processor, wherein the memory stores a computer program, and when the computer program is executed by the processor, the processor performs the steps of any of the methods described above.

[0017] The beneficial effects of the battery short-circuit protection method provided in this embodiment of the invention are as follows: This embodiment of the invention compares the voltage signal corresponding to the battery charging and discharging current with the voltage signal corresponding to the current threshold, and uses the level change of the output level signal to reflect the abnormal current state. It utilizes the falling edge interrupt to quickly respond to the level jump, and combines the time delay within the interrupt to detect the level state of the level signal again, which can effectively distinguish between the real battery short-circuit fault signal and the transient interference signal; it only determines that a short circuit and triggers the short-circuit protection action when the level remains low after the delay, avoiding false triggering of short-circuit protection due to transient interference, improving the accuracy and reliability of battery short-circuit detection and protection, while taking into account the fault response speed and the stability of the protection action. Attached Figure Description

[0018] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. In the accompanying drawings: Figure 1 This is a schematic flowchart of a battery short-circuit protection method according to an embodiment of the present invention; Figure 2 This is a structural block diagram of the battery short-circuit protection circuit according to an embodiment of the present invention; Figure 3 This is a circuit diagram of the battery short-circuit protection circuit according to an embodiment of the present invention; Figure 4 This is a structural block diagram of an energy storage device according to an embodiment of the present invention.

[0019] The labels for the attached figures are as follows: 10. Current detection unit; 20. First comparison unit; 30. Second comparison unit; 40. Switching unit; 50. Main control unit; U1A, First voltage comparator; R1, First resistor; R2, Second resistor; R3, Third resistor; R4, Fourth resistor; R5, Fifth resistor; R6, Sixth resistor; C1, First capacitor; U1B, Second voltage comparator; R7, Seventh resistor; R8, Eighth resistor; R9, Ninth resistor; R10, Tenth resistor; R11, Eleventh resistor; R12, Twelfth resistor; C2, Second capacitor; C3, Third capacitor; RS, Sampling resistor; 201. Memory; 202. Processor. Detailed Implementation

[0020] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The preferred embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0021] This invention provides a battery short-circuit protection method, such as... Figure 1 As shown, battery short-circuit protection methods include: S101. Obtain the charging and discharging current of the battery charging and discharging circuit; S102. Compare the voltage signal corresponding to the charging / discharging current with the voltage signal corresponding to the current threshold, and output a level signal; S103. Monitor the level signal and capture the level changes of the level signal; S104. When the level signal is detected to change from high to low, a falling edge interrupt request is generated, and the falling edge interrupt service routine is entered after the falling edge interrupt request is detected. S105. In the falling edge interrupt service routine, start the timing mechanism. When the timing reaches the preset timing time value, capture the level change of the level signal again. S106. If the level signal remains low, it is determined to be a battery short circuit fault signal, and the short circuit protection action is triggered. S107. If the level signal has returned to a high level, it is determined to be a momentary interference signal, and the short circuit protection action is not triggered. The falling edge interrupt service routine is exited.

[0022] This invention compares the voltage signal corresponding to the battery charging / discharging current with the voltage signal corresponding to the current threshold, and uses the level change of the output level signal to reflect the abnormal current state. It utilizes a falling edge interrupt to quickly respond to level jumps, and combines this with a time delay within the interrupt to re-detect the level state of the level signal. This effectively distinguishes between real battery short-circuit fault signals and transient interference signals. Only when the level remains low after the delay is a short circuit determined and short-circuit protection action is triggered. This avoids false triggering of short-circuit protection due to transient interference, improves the accuracy and reliability of battery short-circuit detection and protection, and simultaneously takes into account fault response speed and protection action stability.

[0023] In step S101, in a specific implementation scenario, current detection elements such as a sampling resistor and a Hall current sensor are connected in series in the main battery charging and discharging circuit to collect the circuit current of the battery in real time during charging and discharging. Regardless of whether the battery is working normally, experiencing transient interference, or a real short circuit, the circuit current will change accordingly, providing a basis for the subsequent judgment of short circuit fault signals.

[0024] In step S102, the voltage signal corresponding to the charging and discharging current is compared with the voltage signal corresponding to the current threshold. When the charging and discharging current is normal, a high level is output. When the current increases sharply to near the short circuit level, the output is flipped to a low level after comparison processing, converting the analog current change into a digital level signal for level change capture.

[0025] In step S103, in a specific implementation scenario, the level signal after comparison processing is continuously read through the IO (Input / Output) port of the microcontroller chip, and the level changes are continuously monitored. In this way, when the level signal changes abnormally due to a short circuit, the level change can be quickly captured, and then the short circuit protection can be triggered.

[0026] In step S104, when the detected level changes from high to low, it means that the loop current has suddenly increased significantly, and a short circuit is suspected. The microcontroller chip immediately generates a falling edge hardware interrupt and quickly enters the preset interrupt service routine to achieve a rapid response to the abnormal event and avoid untimely protection due to program polling delays.

[0027] In a specific implementation scenario, one of the I / O ports of the microcontroller chip is configured as an external interrupt input. When a short circuit fault occurs in the battery charging and discharging circuit, the charging and discharging current rises sharply. After comparison, the I / O port detects that the level changes from high to low, thereby generating a falling edge interrupt request. After detecting the falling edge interrupt, the microcontroller chip immediately enters the corresponding interrupt service routine.

[0028] In step S105, considering that electromagnetic interference, switching noise, and other factors may generate brief interference pulses, if the protection action is executed immediately after the falling edge is detected, the interference pulse may be mistakenly identified as a short-circuit fault, leading to false triggering of the protection. Therefore, after entering the falling edge interrupt service routine, instead of directly determining it as a battery short-circuit fault, a timing mechanism is activated, such as starting a timer inside the microcontroller chip to delay for a period of time, waiting for the momentary interference to disappear. This timing mechanism can filter out non-faulty current surges such as spike interference and load start-stop glitches. After the delay ends, the level signal is read again to provide a basis for judging whether it is a true or false fault.

[0029] In step S106, if the read level signal remains low after the preset timing time value is reached, it indicates that the current abnormality continues to exist, which is a real short circuit fault rather than a brief interference pulse. The controller then performs protective actions such as turning off the MOSFET and cutting off the charging and discharging circuit to prevent the battery from overheating, catching fire, or damaging the load.

[0030] In step S107, if the read level signal returns to a high level after the preset timing time value is reached, it indicates that the current abnormality only occurred briefly and is a non-fault signal such as electromagnetic interference or instantaneous load start-stop. At this time, the short-circuit protection is not triggered, the interrupt is exited directly and normal monitoring is resumed, and the event is only recorded or ignored to avoid false triggering of the short-circuit protection and ensure continuous and stable operation of the system.

[0031] Therefore, this application's solution achieves rapid and reliable detection and protection against microsecond-level short-circuit faults under the background of current and voltage fluctuations caused by high-power AC loads, without significantly increasing the sampling rate of the analog front-end chip or relying on large-capacity filter capacitors. Furthermore, by combining a timing mechanism with a secondary confirmation mechanism for the level signal, it effectively suppresses false triggering caused by interference pulses, thus balancing the speed and reliability of short-circuit protection action.

[0032] This application employs a timing mechanism, such as activating a timer within the microcontroller chip, to detect and reconfirm the duration of suspected short-circuit trigger signals. Only when the output level signal after comparison processing remains low within a preset time window is it considered a valid short-circuit signal, and shutdown protection is executed. This combination of falling-edge triggering and timer-based reconfirmation effectively filters transient pulses such as electromagnetic interference and switching noise, significantly reducing the probability of false triggering of short-circuit protection and improving the reliability of protection actions.

[0033] In an optional embodiment of this application, the charging and discharging current in the battery charging and discharging circuit is obtained by a sampling resistor connected in series in the battery charging and discharging circuit, and the corresponding voltage signal is output. The voltage signal corresponding to the current threshold satisfies the following formula:

[0034] in, This is the voltage signal corresponding to the current threshold. To preset the short-circuit protection current threshold, This is the resistance value of the sampling resistor.

[0035] Based on a preset short-circuit protection current threshold Sampling resistor Setting the voltage signal corresponding to the current threshold can accurately correspond to the voltage collected when the current reaches the preset short-circuit protection current threshold, thereby enabling rapid and accurate identification and timely protection against short-circuit faults.

[0036] In an optional embodiment of this application, the preset timing value ranges from 10μs to 100μs. This achieves an optimal balance between interference filtering and protection response speed. This range effectively filters out common microsecond-level spike interference and load start-stop glitches in the battery charging and discharging circuit, preventing false triggering of short-circuit protection. Simultaneously, a delay of less than 100μs still ensures a rapid response to actual short-circuit faults, preventing overcurrent damage to the battery and power devices. The preset timing value can be any value within the 10μs to 100μs range, such as 10μs, 20μs, 30μs, 40μs, 50μs, 60μs, 70μs, 80μs, 90μs, or 100μs. It can be configured via a host computer and adjusted according to different battery systems, power levels, and application scenarios, thus achieving a flexible balance between short-circuit protection sensitivity and anti-interference capability, with a wide range of applications. Preferably, the preset timing value is set to 25μs.

[0037] In an optional embodiment of this application, the specific steps for controlling and triggering the short-circuit protection action include: Output a shutdown control signal to control the disconnection of the battery charging and discharging circuit; Exit the timing mechanism, record the fault operation information of the current short circuit event, and set the fault status flag; the fault operation information includes at least one of the following: short circuit occurrence time, short circuit duration, bus voltage, and battery operating status.

[0038] Specifically, when a battery short-circuit fault signal is detected, a shutdown control signal is output to control the disconnection of the battery charging and discharging circuit. For example, the power switch in the battery discharging circuit is turned off, disconnecting the battery from the load or charging terminal to prevent the short-circuit current from continuing to increase, quickly terminating the short-circuit current, preventing damage to the battery and power devices due to overcurrent, and ensuring hardware safety. The timing mechanism is exited, and fault information including the short-circuit occurrence time, duration, bus voltage, and battery status is recorded. This releases interrupt resources and provides crucial data support for fault tracing and operational condition analysis, facilitating subsequent investigation of the short-circuit cause. Setting a fault status flag can prevent accidental restarting and restoration of power supply under fault conditions, avoiding the risk of secondary short circuits and improving system stability and safety. The entire set of actions takes into account the timeliness, safety, and traceability of fault handling, achieving closed-loop management of short-circuit protection.

[0039] In an optional embodiment of this application, the battery short-circuit protection method further includes the following steps: Upon entering the falling edge interrupt service routine, the timing mechanism is started first, and subsequent external interrupt requests from the same source are temporarily blocked until the current level signal determination operation is completed.

[0040] Specifically, after entering the falling edge interrupt service routine, the timing is started first and subsequent interrupt requests from the same source are temporarily blocked to avoid multiple interrupts triggered by the same level transition or interference signal. This prevents repeated entry into the interrupt service routine, which would waste system resources and cause program execution chaos. It ensures that the level determination operation is not disturbed and is completed in an orderly manner, improving the stability and reliability of short circuit fault determination. At the same time, it avoids program crashes or protection false triggers caused by interrupt nesting or frequent responses.

[0041] In an optional embodiment of this application, prior to the start-up timing mechanism, the battery short-circuit protection method further includes the following steps: Record suspected short circuit events, clear the timer counter to zero, and load the preset timer value.

[0042] By recording suspected short-circuit events, clearing the timer, and loading a preset timing value before starting the timing, it can be ensured that the timer starts timing from the preset starting point every time an interrupt is triggered on the falling edge. This avoids the counting of previous interference or fault residue affecting the current delay judgment. At the same time, it marks the suspected fault status, providing basic information for subsequent fault tracing, improving the accuracy and reliability of delay judgment, and avoiding misjudgment or missed judgment of short-circuit faults due to abnormal timer status.

[0043] In an optional embodiment of this application, the battery short-circuit protection method further includes the following steps: After confirming that the battery short circuit fault signal has been eliminated, the system receives commands from the host computer or user confirmation instructions to control the reconnection of the charging and discharging circuit.

[0044] Specifically, by receiving confirmation instructions from the host computer or user before restoring the charging and discharging circuit, a manual / system intervention can be forcibly introduced to ensure that potential faults have been eliminated and to prevent automatic restarts caused by temporary disappearance of short circuits or false recovery, which could lead to secondary damage to the battery, load, and circuitry. At the same time, this controlled recovery mechanism facilitates fault diagnosis and safety management, avoids repeated start-stops of the system in an unclear state, and improves the safety and maintainability of the battery protection system.

[0045] This invention also provides a battery short-circuit protection circuit for implementing the battery short-circuit protection method described above. (Refer to...) Figure 2 and Figure 3 The battery short-circuit protection circuit includes a current detection unit 10, a first comparison unit 20, a second comparison unit 30, a switching unit 40, and a main control unit 50.

[0046] The current detection unit 10 is connected in series in the battery charging and discharging circuit. The current detection unit 10 is used to output a voltage signal corresponding to the charging and discharging current.

[0047] The input terminal of the first comparison unit 20 is connected to both ends of the current detection unit 10; the first comparison unit 20 is used to compare the voltage signal corresponding to the charging current with the voltage signal corresponding to the charging current threshold, and output a first level signal.

[0048] The input terminal of the second comparison unit 30 is connected to both ends of the current detection unit 10; the second comparison unit 30 is used to compare the voltage signal corresponding to the discharge current with the voltage signal corresponding to the discharge current threshold, and output a second level signal.

[0049] The switching unit 40 is connected in series in the battery charging and discharging circuit.

[0050] The main control unit 50 is connected to the output terminal of the first comparison unit 20, the output terminal of the second comparison unit 30, and the control terminal of the switching unit 40.

[0051] This invention, through a current detection unit 10 connected in series in the battery charging and discharging circuit, outputs a voltage signal corresponding to the charging and discharging current. A first comparison unit 20 and a second comparison unit 30 compare the voltage signals corresponding to the charging and discharging currents with the voltage signals corresponding to the current thresholds, respectively, and output corresponding level signals for the main control unit 50 to judge. This enables the control of the disconnect switch unit 40 to cut off the battery charging and discharging circuit during short-circuit overcurrent. This application can detect and acquire clear level signals corresponding to short-circuit transient large currents without relying on the low-speed scanning results of the analog front-end chip, quickly and accurately identifying bidirectional short-circuit faults during charging and discharging, achieving rapid hardware response to microsecond-level short-circuit faults, and reducing safety hazards.

[0052] Optionally, the main control unit 50 can be a microcontroller chip. The two I / O ports of the microcontroller chip are respectively connected to the output terminals of the first comparison unit 20 and the second comparison unit 30 to judge the first level signal and the second signal, and then cut off the switch unit 40 in the case of charging overcurrent and discharging overcurrent.

[0053] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the first comparison unit 20 includes a first voltage comparator U1A, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4; the first end of the first resistor R1 is connected to an external power supply, and its second end is connected to the non-inverting input of the first voltage comparator U1A and the first end of the second resistor R2; the second end of the second resistor R2 is connected to the first end of the current detection unit 10; the first end of the third resistor R3 is connected to the second end of the current detection unit 10, and the second end of the third resistor R3 is connected to the inverting input of the first voltage comparator U1A and the first end of the fourth resistor R4; the second end of the fourth resistor R4 is grounded; the output end of the first voltage comparator U1A is connected to the first transmission end of the main control unit 50.

[0054] Specifically, the external power supply is divided by the first resistor R1 and the second resistor R2 and then connected to the non-inverting input of the first voltage comparator U1A. The divided voltage serves as the reference voltage for the non-inverting input of the first voltage comparator U1A, and is used as the reference voltage for charging short-circuit protection. The second terminal of the current detection unit 10 is connected to the inverting input of the first voltage comparator U1A via the third resistor R3, and the inverting input is simultaneously grounded through the fourth resistor R4. When a charging short circuit occurs, a large current flows through the current sampling unit, generating a large voltage drop, which is input to the first voltage comparator U1A. The voltage at the inverting input of the first voltage comparator U1A is greater than the voltage at its non-inverting input, causing the first voltage comparator U1A to flip and output a low-level signal. Upon receiving the low-level signal, the main control unit 50 controls the disconnect switch unit 40 to achieve short-circuit protection during battery charging. The hardware detection response of the first voltage comparator U1A is in the microsecond range, much faster than software sampling, and can quickly cut off the current at the moment of a short circuit, protecting the battery and power devices.

[0055] The charging short-circuit current threshold can be set by changing the value of the second resistor R2 to adapt to overcurrent protection requirements different from the threshold value. Specifically, a larger value of the second resistor R2 results in a larger charging short-circuit current threshold, and a smaller value of the second resistor R2 results in a smaller charging short-circuit current threshold.

[0056] In a specific embodiment, when the first resistor R1 and the fourth resistor R4 are both 120K ohms, and the second resistor R2 and the third resistor R3 are both 3.9K ohms, the external power supply of 3.3V is divided by the first resistor R1 and the second resistor R2. A reference voltage of 0.1039V is generated at the non-inverting input of the first voltage comparator U1A. 0.1039V ÷ 0.1mR = 1039A is the protection current for a charging short circuit. When the charging current exceeds 1039A, the charging short circuit protection is triggered. The charging current flows through the current detection unit 10, generating a voltage drop. This voltage drop passes through the third resistor R3 and reaches the inverting input of the first voltage comparator U1A. Since the resistance of the fourth resistor R4 is much smaller than that of the third resistor R3, the voltage at the inverting input of the first voltage comparator U1A is approximately equal to the voltage drop generated by the current detection unit 10. When a charging short circuit occurs, the current flowing through the current detection unit 10 will rapidly rise from 0. When the short-circuit current rises to a certain value, the voltage at the inverting input of the first voltage comparator U1A exceeds the reference voltage at the non-inverting input. The voltage of the first voltage comparator U1A then changes from a high level to a low level, triggering a charging short circuit.

[0057] The circuit of the first comparison unit 20 described above uses a resistor voltage divider combined with the first voltage comparator U1A and connected to the voltage signal of the current detection unit 10. It can directly and quickly capture short-circuit transient signals, with fast response speed and no signal passivation problem. It effectively suppresses common-mode interference and 50Hz-60Hz power frequency fluctuations, improves sampling stability, and avoids voltage sampling jitter. The circuit structure of the first comparison unit 20 is simple and reliable.

[0058] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the first comparison unit 20 further includes a fifth resistor R5. The first end of the fifth resistor R5 is connected to the output terminal of the first voltage comparator U1A, and its second end is connected to the first transmission terminal of the main control unit 50. In this way, the fifth resistor R5 can limit the current flowing to the first transmission terminal of the main control unit 50, preventing excessive current from damaging the main control unit 50.

[0059] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the first comparison unit 20 further includes a sixth resistor R6 and a first capacitor C1; the first end of the sixth resistor R6 is connected to an external power supply, and its second end is connected to the first transmission terminal of the main control unit 50; the first end of the first capacitor C1 is connected to the first transmission terminal of the main control unit 50, and its second end is grounded.

[0060] Specifically, the sixth resistor R6 and the first capacitor C1 form an RC filter circuit at the first transmission terminal of the main control unit 50. The first level signal output by the first voltage comparator U1A is transmitted to the main control unit 50 after passing through the RC filter circuit. High-frequency spike interference is filtered out by the first capacitor C1 and the sixth resistor R6, and the clean first level signal is sent to the main control unit 50 for judgment. Therefore, the setting of the sixth resistor R6 and the first capacitor C1 can effectively suppress high-frequency spikes and line interference, and improve the circuit's anti-interference capability and operating stability.

[0061] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the second comparison unit 30 includes a second voltage comparator U1B, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10; the first end of the seventh resistor R7 is connected to an external power supply, and its second end is connected to the non-inverting input of the second voltage comparator U1B and the first end of the eighth resistor R8; the second end of the eighth resistor R8 is connected to the second end of the current detection unit 10; the first end of the ninth resistor R9 is connected to the first end of the current detection unit 10, and the second end of the ninth resistor R9 is connected to the inverting input of the second voltage comparator U1B and the first end of the tenth resistor R10; the second end of the tenth resistor R10 is grounded; the output end of the second voltage comparator U1B is connected to the second transmission end of the main control unit 50.

[0062] Specifically, the external power supply is connected to the non-inverting input of the second voltage comparator U1B after passing through the seventh resistor R7 and the eighth resistor R8. The voltage divider is used as the reference voltage for the non-inverting input of the second voltage comparator U1B, which is then used as the reference voltage for discharge short-circuit protection. The second terminal of the current detection unit 10 is connected to the inverting input of the second voltage comparator U1B through the ninth resistor R9. The inverting input is also grounded through the tenth resistor R10. When a discharge short circuit occurs, a large current flows through the current sampling unit, generating a large voltage drop. The voltage at the inverting input of the second voltage comparator U1B is greater than the voltage at its non-inverting input, causing the second voltage comparator U1B to flip and output a low-level signal. Upon receiving the low-level signal, the main control unit 50 controls the disconnect switch unit 40 to achieve short-circuit protection during battery charging.

[0063] The discharge short-circuit current threshold can be set by changing the value of the eighth resistor R8 to accommodate different discharge overcurrent protection thresholds. Specifically, a larger value for the eighth resistor R8 results in a larger discharge short-circuit current threshold, and a smaller value for the eighth resistor R8 results in a smaller discharge short-circuit current threshold. The hardware detection response of the second voltage comparator U1B is in the microsecond range, much faster than software sampling, and can quickly cut off the current at the moment of short circuit, protecting the battery and power devices.

[0064] In a specific embodiment, when the seventh resistor R7 and the tenth resistor R10 both have a resistance of 120K ohms, and the eighth resistor R8 and the ninth resistor R9 both have a resistance of 6.2K ohms, the external power supply of 3.3V is divided by the seventh resistor R7 and the tenth resistor R10. A reference voltage of 0.1621V is generated at the non-inverting input of the second voltage comparator U1B. The ratio of this reference voltage to the resistance of the current detection unit is the protection current for the short circuit. When the discharge current exceeds the protection current, the short circuit protection is triggered. The discharge current flows through the current detection unit, generating a voltage drop. This voltage drop passes through the ninth resistor R9 and reaches the inverting input of the second voltage comparator U1B. Since the resistance of the ninth resistor R9 is much smaller than that of the tenth resistor R10, the voltage at the inverting input of the second voltage comparator U1B is approximately equal to the voltage drop generated by the current detection unit. When a short circuit occurs, the current flowing through the current detection unit will rapidly rise from 0. When the short-circuit current rises to a certain value, the voltage at the inverting input of the second voltage comparator U1B exceeds the reference voltage at the non-inverting input. The voltage at the output of the second voltage comparator U1B then changes from a high level to a low level, triggering a discharge short circuit.

[0065] The circuit of the second comparison unit 30 described above uses a resistor voltage divider combined with a second voltage comparator U1B and is connected to the voltage signal of the current detection unit 10. It can directly and quickly capture short-circuit transient signals, with fast response speed and no signal passivation problem. It effectively suppresses common-mode interference and 50Hz-60Hz power frequency fluctuations, improves sampling stability, and avoids voltage sampling jitter. The circuit structure of the second comparison unit 30 is simple and reliable.

[0066] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the second comparison unit 30 further includes an eleventh resistor R11. The first end of the eleventh resistor R11 is connected to the output terminal of the second voltage comparator U1B, and its second end is connected to the second transmission terminal of the main control unit 50. In this way, the eleventh resistor R11 can limit the current flowing to the second transmission terminal of the main control unit 50, and prevent the main control unit 50 from being damaged by excessive current.

[0067] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the second comparison unit 30 further includes a twelfth resistor R12 and a second capacitor C2; the first end of the twelfth resistor R12 is connected to an external power supply, and its second end is connected to the second transmission terminal of the main control unit 50; the first end of the second capacitor C2 is connected to the second transmission terminal of the main control unit 50, and its second end is grounded.

[0068] Specifically, the twelfth resistor R12 and the second capacitor C2 form an RC filter circuit at the second transmission terminal of the main control unit 50. The second-level signal output by the second voltage comparator U1B is transmitted to the main control unit 50 after passing through the RC filter circuit. High-frequency spike interference is filtered out by the second capacitor C2 and the twelfth resistor R12, and the clean second-level signal is sent to the main control unit 50 for judgment. Therefore, the setting of the twelfth resistor R12 and the second capacitor C2 can effectively suppress high-frequency spikes and line interference, and improve the circuit's anti-interference capability and operating stability.

[0069] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the first voltage comparator U1A and the second voltage comparator U1B are integrated into a comparator chip. The power supply terminal of the comparator chip is connected to an external power supply and is connected to ground through a third capacitor C3. Specifically, the integration of the first voltage comparator U1A and the second voltage comparator U1B into the comparator chip results in high overall circuit integration and reduces the space occupied by the circuit. The external power supply powers the comparator chip, and the third capacitor C3 directly bypasses high-frequency noise and spike interference to ground. At the same time, it compensates for energy during power transient drops, stabilizes the power supply of the comparator chip, ensures the accuracy of the threshold and the stability of the output logic of the first voltage comparator U1A and the second voltage comparator U1B, ensures the accuracy of charging overcurrent detection, and improves the circuit's anti-interference capability and reliability.

[0070] refer to Figure 2 and Figure 3 In an optional embodiment of this application, the current detection unit 10 includes a sampling resistor RS; the first end of the sampling resistor RS is connected to the negative terminal of the battery, and the second end of the sampling resistor RS is connected to the load ground terminal through the switching unit 40; the input terminal of the first comparison unit 20 is connected to both ends of the sampling resistor RS; and the input terminal of the second comparison unit 30 is connected to both ends of the sampling resistor RS.

[0071] Specifically, when the first comparison unit 20 includes a first voltage comparator U1A, a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4, and the second comparison unit 30 includes a second voltage comparator U1B, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, and a tenth resistor R10, the first end of the sampling resistor RS serves as the first end of the current detection unit 10 and is connected to the second end of the second resistor R2 and the first end of the ninth resistor R9, and the second end of the sampling resistor RS serves as the second end of the current detection unit 10 and is connected to the first end of the third resistor R3 and the second end of the eighth resistor R8.

[0072] A sampling resistor RS is connected in series between the negative terminal of the battery and the load ground. When the charging and discharging current flows through the sampling resistor RS, a voltage drop proportional to the current is generated. The input terminals of the first comparison unit 20 and the second comparison unit 30 are respectively connected across the sampling resistor RS to directly acquire this voltage drop signal and compare it with their respective voltage thresholds. When the voltage drop exceeds the corresponding voltage threshold, the first comparison unit 20 and the second comparison unit 30 flip to output a low level. After receiving the low level signal, the main control unit 50 controls the cut-off switch unit 40 to cut off the battery's charging and discharging circuit, thereby achieving short-circuit protection. Using the sampling resistor RS for current sampling accurately extracts minute voltage drops, avoids detection errors caused by ground potential fluctuations, and improves the accuracy of short-circuit overcurrent detection.

[0073] Optionally, the value of the sampling resistor RS can be set according to requirements, for example, from 0.5 mΩ to 2 mΩ, to generate a detection voltage of tens to hundreds of millivolts in the current range of hundreds of amperes.

[0074] In an optional embodiment of this application, the switching unit 40 can be implemented using an NMOS transistor. The NMOS transistor is connected in series with the sampling resistor RS and positioned between the negative terminals of the battery and the negative terminal of the load. The gate of the NMOS transistor is connected to the main control unit 50 and is turned on or off under the control of the main control unit 50. In a specific embodiment, the main control unit 50 controls the gate of the NMOS transistor through a driver chip or a gate drive circuit to realize the connection or disconnection of the charging and discharging path between the battery and the load. When the main control unit 50 determines that a valid short-circuit fault has occurred, it immediately outputs a shutdown control signal to quickly turn off the NMOS transistor, thereby cutting off the fault current.

[0075] In one specific embodiment, the software execution flow of the battery short-circuit protection circuit of this application is as follows: Initialization phase: After the system is powered on or reset, the microcontroller chip of the main control unit 10 performs the following initialization operations: 1. Configure the I / O ports connecting the first comparison unit 20 and the second comparison unit 30 as external interrupt inputs, and set the trigger mode to falling edge trigger; 2. Enable a high-precision timer and set the timer's basic time unit to the microsecond level, such as 1μs or 0.5μs; 3. Read the user-configured short-circuit determination time parameter through the host computer or EEPROM (Electrically Erasable Programmable Read-Only Memory). If no configuration is made, the default value, such as 25μs, is used. 4. Initialize the IO ports or PWM outputs related to the NMOS transistor drive of the switching unit 40 to ensure that the NMOS transistor of the switching unit is in a safe state before the system starts normally.

[0076] Short-circuit signal falling edge detection: When the battery charging / discharging current suddenly increases to the short-circuit current threshold during system operation, the voltage across the sampling resistor is compared by the first comparison unit 20 and the second comparison unit 30, causing its output level to transition from high to low. The microcontroller chip's external interrupt port of the main control unit 10 detects the falling edge and triggers an external interrupt. After responding to the external interrupt, the microcontroller chip of the main control unit 10 enters the external interrupt service routine. In this interrupt service routine, the microcontroller chip of the main control unit 10 does not immediately perform a shutdown operation, but instead starts the aforementioned high-precision timer, clears the timer count to zero, loads the preset timing value, and then starts the timing count. To avoid repeated triggering, subsequent external interrupts from the same source can be temporarily blocked in the software until the current timer determination process ends.

[0077] Level signal determination process: When the timer of the microcontroller chip in the main control unit 10 reaches the preset timing time, a timer interrupt request is generated. The microcontroller chip in the main control unit 10 enters the timer interrupt service routine. In the interrupt service routine, the microcontroller chip in the main control unit 10 reads the level status of the IO port connected to the output terminals of the first comparison unit 20 and the second comparison unit 30 again. If the IO port is still at a low level at this time, it means that the low level signal output by the first comparison unit 20 and the second comparison unit 30 has lasted for at least the preset timing time value and is not a brief interference pulse, so it can be determined as a valid short-circuit fault signal. If the IO port has returned to a high level at this time, it is considered that the rising edge was caused by transient interference and is not determined as a valid short-circuit fault. No shutdown action is performed, only the relevant flag bits are cleared, and external interrupt triggering is re-enabled. When the timer interrupt confirms that the I / O port level is still low, the microcontroller chip of the main control unit 10 immediately executes short-circuit protection actions, including but not limited to: outputting a shutdown control signal to the MOSFET driver circuit to quickly turn off the power MOSFET and cut off the bus current; recording information such as the occurrence time, duration, bus voltage, and battery pack status of this short-circuit event for subsequent diagnosis and analysis; and entering the fault handling process, such as locking the system, notifying the host computer, and displaying alarms. If necessary, certain restart logic can be set, for example, allowing the NMOS transistor of the switching unit to be turned on again only after confirming that the fault has been cleared and after command from the host computer or manual confirmation.

[0078] This invention also provides a battery management system, which includes the battery short-circuit protection circuit described above. This battery management system has the same structure and beneficial effects as the battery short-circuit protection circuit in the foregoing embodiments. The structure and beneficial effects of the battery short-circuit protection circuit have been described in detail in the foregoing embodiments and will not be repeated here.

[0079] This invention allows for the addition of a battery short-circuit protection circuit to the conventional current sampling path of the battery management system. This circuit serves as an independent, fast current detection path. The first comparison unit 20 and the second comparison unit 30 amplify the voltage signal corresponding to the weak current detection signal, outputting a corresponding level signal for the main control unit 50 to judge. Protection is triggered during short-circuit overcurrent, enabling the system to detect large current faults such as short circuits within microsecond timescales. Compared to schemes relying on low-speed scanning sampling of analog front-end chips, this invention eliminates the need to increase the sampling rate of the analog front-end chip or rely on complex digital filtering of the 50 Hz–60 Hz harmonic components. It achieves reliable short-circuit fault detection, significantly shortening the short-circuit detection and protection response time, improving the safety of the battery management system, and avoiding the increased cost and design complexity associated with using high-performance analog front-end chip devices. Furthermore, it eliminates the need for a large-capacity filter capacitor in parallel at the current acquisition end to smooth current changes, thus avoiding protection delays or failures caused by large capacitors absorbing short-circuit pulses.

[0080] The battery management system of this invention only adds a comparison detection path and a few peripheral components to the existing battery management system hardware. It implements falling edge interrupt and timer secondary confirmation through the microcontroller chip logic of the main control unit, without significantly altering the original battery management system's main structure. This solution is simple to implement, consumes few resources, can be easily integrated into existing products, and facilitates upgrades to existing products, thus possessing high engineering practical value.

[0081] By acquiring short-circuit fault information through an independent and rapid detection path, the system no longer relies on a large-capacity filter capacitor connected in parallel at the current acquisition end to smooth current changes, thus avoiding the protection delay or failure caused by the large capacitor absorbing short-circuit pulses. At the same time, the system also performs time-dimensional discrimination on possible interference signals at the software level, enabling the system to maintain both sensitive and reliable short-circuit protection capabilities when facing current and voltage fluctuations caused by high-power AC loads and various electromagnetic interferences.

[0082] This invention also provides an energy storage device, such as... Figure 1 and Figure 4 As shown, the energy storage device includes a memory 201 and a processor 202. The memory 201 stores a computer program, which, when executed by the processor 202, causes the processor 202 to perform the steps of the method described above. Detailed steps can be found above and will not be repeated here.

[0083] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in the embodiments provided in this application can include non-volatile and / or volatile memory. Non-volatile memory may include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory may include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in various forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (DDRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and RAMbus dynamic RAM (RDRAM), etc.

[0084] It should be understood that the above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit them. Those skilled in the art can modify the technical solutions described in the above embodiments, or make equivalent substitutions for some of the technical features; and all such modifications and substitutions should fall within the protection scope of the appended claims of the present invention.

Claims

1. A battery short-circuit protection method, characterized in that, include: Obtain the charging and discharging current of the battery charging and discharging circuit; The voltage signal corresponding to the charging / discharging current is compared with the voltage signal corresponding to the current threshold, and a level signal is output. The level signal is monitored to capture changes in its level. When the level signal is detected to change from high to low, a falling edge interrupt request is generated, and the falling edge interrupt service routine is entered after the falling edge interrupt request is detected. In the falling edge interrupt service routine, a timing mechanism is started, and when the timing reaches the preset time value, the level change of the level signal is captured again; If the level signal remains low, it is determined to be a battery short circuit fault signal, and the short circuit protection action is triggered. If the level signal has returned to a high level, it is determined to be a transient interference signal, and the short-circuit protection action is not triggered, and the falling edge interrupt service routine is exited.

2. The battery short-circuit protection method according to claim 1, characterized in that, The charging and discharging current in the battery charging and discharging circuit is obtained by a sampling resistor connected in series in the battery charging and discharging circuit, and the corresponding voltage signal is output. The voltage signal corresponding to the current threshold satisfies the following formula: in, This is the voltage signal corresponding to the current threshold. To preset the short-circuit protection current threshold, This is the resistance value of the sampling resistor.

3. The battery short-circuit protection method according to claim 1, characterized in that, The preset timing value ranges from 10μs to 100μs.

4. The battery short-circuit protection method according to any one of claims 1-3, characterized in that, The specific steps for controlling and triggering the short-circuit protection action include: Output a shutdown control signal to control the disconnection of the battery charging and discharging circuit; Exit the timing mechanism, record the fault operation information of the current short circuit event, and set the fault status flag; the fault operation information includes at least one of the following: short circuit occurrence time, short circuit duration, bus voltage, and battery operating status.

5. The battery short-circuit protection method according to any one of claims 1-3, characterized in that, The battery short-circuit protection method further includes the following steps: Upon entering the falling edge interrupt service routine, the timing mechanism is started first, and subsequent external interrupt requests from the same source are temporarily blocked until the current level signal determination operation is completed.

6. The battery short-circuit protection method according to any one of claims 1-3, characterized in that, Prior to the start-up timing mechanism, the battery short-circuit protection method further includes the following steps: Record suspected short circuit events, clear the timer counter to zero, and load the preset timer value.

7. The battery short-circuit protection method according to any one of claims 1-3, characterized in that, The battery short-circuit protection method further includes the following steps: After confirming that the battery short circuit fault signal has been eliminated, the system receives commands from the host computer or user confirmation instructions to control the reconnection of the charging and discharging circuit.

8. A battery short-circuit protection circuit, characterized in that, For implementing the battery short-circuit protection method as described in any one of claims 1-7, the battery short-circuit protection circuit includes: A current detection unit is connected in series in the battery charging and discharging circuit. The current detection unit is used to output a voltage signal corresponding to the charging and discharging current. The first comparison unit has its input terminals connected to both ends of the current detection unit; the first comparison unit is used to compare the voltage signal corresponding to the charging current with the voltage signal corresponding to the charging current threshold, and output a first level signal. The second comparison unit has its input terminals connected to both ends of the current detection unit; the second comparison unit is used to compare the voltage signal corresponding to the discharge current with the voltage signal corresponding to the discharge current threshold, and output a second level signal. The switching unit is connected in series in the battery charging and discharging circuit; The main control unit is connected to the output terminals of the first comparison unit, the second comparison unit, and the control terminal of the switching unit.

9. A battery management system, characterized in that, Includes the battery short-circuit protection circuit as described in claim 8.

10. An energy storage device, characterized in that, It includes a memory and a processor, the memory storing a computer program that, when executed by the processor, causes the processor to perform the steps of the method as described in any one of claims 1-7.

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