Chip heat dissipation structure and chip
Patent Information
- Application Number
- CN202510421863.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-03
- Publication Date
- 2026-10-16
AI Technical Summary
[0004]然而，由于3D Stack-Die中Die垂直堆叠，提高TIM的热导率可提升顶部Die的散热性能，而对位于中间层Die的散热无明显效果，导致中间层Die易发生过热
[0008]According to the solution provided in this embodiment, an auxiliary die is located between two adjacent dies in a vertically stacked die assembly. The auxiliary die has a first flow channel. When coolant flows through the first flow channel, it can carry away the heat generated by the two adjacent dies. At least one of the two adjacent dies is located in the middle layer of the vertically stacked die assembly, thereby improving the heat dissipation performance of the vertically stacked die assembly and preventing overheating of the middle layer die. By placing the auxiliary die between two adjacent dies, since the auxiliary die does not contain logic circuits for implementing computing or storage functions, a first flow channel with a larger aperture can be provided in the auxiliary die. This allows the first flow channel to hold more coolant, increasing the heat exchange rate of the coolant within the first flow channel per unit time, thereby ensuring the heat dissipation effect of the die attached to the auxiliary die.