Secondary side driving intelligent phase-locked circuit structure applied to push-pull circuit

Abstract

The utility model discloses a secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit, and the structure comprises a primary side driving loop and a secondary side driving loop which are connected through a driving transformer. The secondary side driving loop comprises a first driving output module and a second driving output module which are connected in parallel and are respectively configured to output secondary side PUSH and PULL signals; the first driving output module comprises a first triode, a first diode, a second diode and a third diode, anodes of the first diode and the second diode are connected in parallel with the secondary winding, cathodes are respectively connected with an emitter and a base of the first triode, and the third diode is connected in parallel with the first triode; the second driving output module comprises a second triode and fifth, sixth and fourth diodes, the positive electrodes of the fifth and sixth diodes are connected in parallel with the secondary winding, the negative electrodes are respectively connected with the base electrode and the emitter electrode of the second triode, and the fourth diode is connected in parallel with the collector electrode and the emitter electrode of the second triode; the collector electrodes of the first triode and the second triode are connected with each other.

Description

Technical Field

[0001] The present application relates to the technical field of electronic devices, and in particular to a secondary side drive intelligent phase-locked circuit structure applied to a push-pull circuit. Background Art

[0002] In the push-pull circuit, one of the more common faults is the direct connection between the PUSH and PULL bridge arms. Although the dead drive time is usually set in the push-pull circuit to alleviate this problem, sometimes certain circuit faults or inappropriate dead drive setting time will cause the PUSH and PULL bridge arms to direct at a certain moment, causing an output short circuit. Utility Model Content

[0003] The embodiment of the present application solves the problem of PUSH and PULL bridge arm direct-pass easily occurring in push-pull circuits in the prior art by providing a secondary-side driven intelligent phase-locked circuit structure applied to push-pull circuits, thereby achieving the technical effect of stably avoiding the bridge arm direct-pass phenomenon at the hardware level.

[0004] The embodiment of the present application provides a secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit, which includes:

[0005] A primary drive circuit, comprising a first control output module and a second control output module; the first control output module is configured to receive a first control judgment signal and a primary PUSH signal of a push-pull circuit respectively; the second control output module is configured to receive a second control judgment signal and a primary PULL signal of a push-pull circuit respectively;

[0006] A driving transformer, comprising a primary winding and a secondary winding, wherein two ends of the primary winding are respectively connected in series to the first control output module and the second control output module;

[0007] A secondary drive circuit, comprising a first drive output module and a second drive output module, wherein the first drive output module and the second drive output module are respectively configured to output a secondary PUSH signal and a secondary PULL signal; the first drive output module comprises a first transistor, a first diode, a second diode and a third diode, wherein the positive electrodes of the first diode and the second diode are connected in parallel to one end of the secondary winding, the negative electrodes of the first diode and the second diode are respectively connected to the emitter and the base of the first transistor, and the positive electrode and the negative electrode of the third diode are respectively connected to the collector and the emitter of the first transistor; the second drive output module comprises a second transistor, a fifth diode, a sixth diode and a fourth diode, wherein the positive electrodes of the fifth diode and the sixth diode are connected in parallel to the other end of the secondary winding, the negative electrodes of the fifth diode and the sixth diode are respectively connected to the base and the emitter of the second transistor, and the positive electrode and the negative electrode of the fourth diode are respectively connected to the collector and the emitter of the second transistor; the collectors of the first transistor and the second transistor are connected to each other.

[0008] In one possible implementation,

[0009] The first control output module and the second control output module are both MOS tubes.

[0010] In the above possible implementation, further,

[0011] The first control determination signal and the second control determination signal are both PWM signals.

[0012] In one possible implementation,

[0013] The primary drive loop further includes a capacitor and a third resistor. The capacitor is connected in series with the first control output module, and the third resistor is connected in series with the second control output module.

[0014] In one possible implementation,

[0015] It also includes a second resistor and a fourth resistor; the second resistor is connected in parallel with the second diode and connected to the base of the first transistor; the fourth resistor is connected in parallel with the fifth diode and connected to the base of the second transistor.

[0016] In one possible implementation,

[0017] It also includes a first resistor and a fifth resistor; the first resistor is connected in series with the first diode and connected to the emitter of the first transistor; the fifth resistor is connected in series with the sixth diode and connected to the emitter of the second transistor.

[0018] In one possible implementation,

[0019] The collectors of the first transistor and the second transistor are connected to each other and are grounded.

[0020] In one possible implementation,

[0021] The secondary winding is grounded.

[0022] One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:

[0023] The secondary side drive intelligent phase-locked circuit structure applied to the push-pull circuit provided in the embodiment of the present application realizes, through its specific circuit structure, that when the primary side PUSH signal and the primary side PULL signal output by the control chip enter the dead drive, the first control judgment signal and the second control judgment signal are both not output, the first control output module and the second control output module are both turned off, there is no driving signal on the secondary side, and the secondary side PUSH signal and the secondary side PULL signal that can be output by the secondary side drive circuit are both low level, locking the main control circuit and forcing it to stop working, thereby avoiding the phenomenon of bridge arm straight-through from the hardware perspective. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments of the present application or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0025] Figure 1 A structural schematic diagram of a secondary-side driven intelligent phase-locked circuit structure applied to a push-pull circuit provided in an embodiment of the present application.

[0026] Figure symbols: D1-first diode; D2-second diode; D3-third diode; D4-fourth diode; D5-fifth diode; D6-sixth diode; R1-first resistor; R2-second resistor; R3-third resistor; R4-fourth resistor; R5-fifth resistor; C1-capacitor; Q1-first MOS tube; Q2-second MOS tube; T1-driving transformer; VT1-first triode; VT2-second triode. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present utility model, not all of the embodiments. Based on the embodiments in the present utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present utility model.

[0028] In the description of the embodiments of the present application, it should be noted that the orientation or positional relationship indicated by the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the embodiments of the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. The terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance. In addition, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0029] The embodiment of the present application provides a secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit, such as Figure 1 As shown, it includes:

[0030] The primary drive circuit includes a first control output module and a second control output module; the first control output module is configured to receive a first control judgment signal and a primary PUSH signal of the push-pull circuit (i.e. Figure 1 The second control output module is configured to receive the second control judgment signal and the primary PULL signal of the push-pull circuit (ie Figure 1 PULL1 in );

[0031] A driving transformer T1, comprising a primary winding and a secondary winding, wherein two ends of the primary winding are respectively connected in series to the first control output module and the second control output module;

[0032] The secondary side drive circuit includes a first drive output module and a second drive output module, wherein the first drive output module and the second drive output module are respectively configured to output a secondary side PUSH signal (i.e. Figure 1 PUSH2) and the secondary PULL signal (i.e. Figure 1PULL2 in the figure); the first driving output module includes a first transistor VT1, a first diode D1, a second diode D2 and a third diode D3, the anodes of the first diode D1 and the second diode D2 are connected in parallel to one end of the secondary winding, the cathodes of the first diode D1 and the second diode D2 are connected to the emitter and base of the first transistor VT1 respectively, and the anode and cathode of the third diode D3 are connected to the collector and emitter of the first transistor VT1 respectively; the second driving output module includes a second transistor VT2, a fifth diode D5, a sixth diode D6 and a fourth diode D4, the anodes of the fifth diode D5 and the sixth diode D6 are connected in parallel to the other end of the secondary winding, the cathodes of the fifth diode D5 and the sixth diode D6 are connected to the base and emitter of the second transistor VT2 respectively, and the anode and cathode of the fourth diode D4 are connected to the collector and emitter of the second transistor VT2 respectively; the collectors of the first transistor VT1 and the second transistor VT2 are connected to each other.

[0033] In a preferred embodiment of this embodiment,

[0034] The first control output module and the second control output module are both MOS transistors, wherein the first control output module is specifically a first MOS transistor Q1, and the second control output module is specifically a second MOS transistor Q2.

[0035] In a further preferred embodiment of this embodiment,

[0036] The first control determination signal and the second control determination signal are both PWM signals.

[0037] In a preferred embodiment of this embodiment,

[0038] The primary drive loop further includes a capacitor C1 and a third resistor R3. The capacitor C1 is connected in series with the first control output module, and the third resistor R3 is connected in series with the second control output module.

[0039] In a preferred embodiment of this embodiment,

[0040] It also includes a second resistor R2 and a fourth resistor R4; the second resistor R2 is connected in parallel with the second diode D2 and connected to the base of the first transistor VT1; the fourth resistor R4 is connected in parallel with the fifth diode D5 and connected to the base of the second transistor VT2.

[0041] In a preferred embodiment of this embodiment,

[0042] It also includes a first resistor R1 and a fifth resistor R5; the first resistor R1 is connected in series with the first diode D1 and connected to the emitter of the first transistor VT1; the fifth resistor R5 is connected in series with the sixth diode D6 and connected to the emitter of the second transistor VT2.

[0043] In a preferred embodiment of this embodiment,

[0044] The collectors of the first transistor VT1 and the second transistor VT2 are connected to each other and are grounded.

[0045] In a preferred embodiment of this embodiment,

[0046] The secondary winding is grounded.

[0047] Specifically, if Figure 1 As shown, in the preferred implementation of this embodiment, the primary drive circuit is composed of a first MOS transistor Q1, a second MOS transistor Q2, a first capacitor C1, a third resistor R3 and a primary winding of a drive transformer T1. Figure 1 PUSH1 and PULL1 are the primary PUSH signal and primary PULL signal of the push-pull circuit. The secondary drive circuit is composed of the first diode D1, the second diode D2, the third diode D3, the fourth diode D4, the fifth diode D5, the sixth diode D6, the first resistor R1, the second resistor R2, the fourth resistor R4, the fifth resistor R5, the first transistor VT1, the second transistor VT2 and the secondary winding of the driving transformer T1. Figure 1 PUSH2 and PULL2 in the figure are the secondary side PUSH signal and secondary side PULL signal of the push-pull circuit; Figure 1 The PWM in the figure is the control judgment signal output by the control chip. When the control chip has a secondary side drive signal (i.e., PUSH1 and PUSH2), the PWM outputs a high level. When the control chip has no secondary side drive signal or the secondary side drive signal enters the dead zone, the PWM outputs a low level.

[0048] Circuit principle:

[0049] When the control chip has a secondary drive signal, PWM outputs a high level, so that the first MOS tube Q1 and the second MOS tube Q2 are turned on. When the primary drive signal PUSH1 is high and PULL1 is low, the primary drive transmits the signal to the secondary side of the drive transformer T1 through the first MOS tube Q1, the second MOS tube Q2, the capacitor C1, the third resistor R3 and the primary winding of the drive transformer T1, wherein the high-level drive signal is transmitted to PUSH2 through the first diode D1 and the first resistor R1, so that PUSH2 is high and drives the subsequent MOS tube, the base voltage of the first transistor VT1 is high, and the first transistor VT1 is in the off state at this time. At this time, the drive signal of the other path is low, the fifth diode D5 and the sixth diode D6 are not turned on, the base voltage of the second transistor VT2 is low, and the second transistor VT2 is in the on state at this time, and PULL2 enters a fast discharge state. When the primary drive signal PUSH1 is at a low level and PULL1 is at a high level, the primary drive transmits the signal to the secondary side of the drive transformer T1 through the first MOS transistor Q1, the second MOS transistor Q2, the capacitor C1, the third resistor R3 and the primary winding of the drive transformer T1, wherein the high-level drive signal is transmitted to PULL2 through the sixth diode D6 and the fifth resistor R5, so that PULL2 is at a high level and drives the subsequent MOS transistor, the base voltage of the second transistor VT2 is at a high level, at this time the second transistor VT2 is in the off state, the other drive signal is at a low level, the first diode D1 and the second diode D2 are not conducting, the base voltage of the first transistor VT1 is at a low level, at this time the first transistor VT1 is in the on state, and PUSH2 enters a fast discharge state.

[0050] When the driving signals PUSH1 and PULL1 output by the control chip enter the dead drive, the PWM signal has no output, the first MOS tube Q1 and the second MOS tube Q2 are turned off, there is no driving signal on the secondary side, and the secondary side driving signals PUSH2 and PULL2 are low level, locking the main control loop and forcing it to stop working, thereby avoiding the phenomenon of bridge arm direct pass from the hardware perspective.

[0051] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other. Each embodiment focuses on the differences from other embodiments.

[0052] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit the present application. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some or all of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the present application.

Claims

1. A secondary side drive intelligent phase-locked circuit structure applied to a push-pull circuit, characterized in that: include: A primary drive circuit, comprising a first control output module and a second control output module; The first control output module is configured to receive the first control judgment signal and the primary side PUSH signal of the push-pull circuit respectively; the second control output module is configured to receive the second control judgment signal and the primary side PULL signal of the push-pull circuit respectively; A driving transformer, comprising a primary winding and a secondary winding, wherein two ends of the primary winding are respectively connected in series to the first control output module and the second control output module; A secondary drive circuit, comprising a first drive output module and a second drive output module, wherein the first drive output module and the second drive output module are respectively configured to output a secondary PUSH signal and a secondary PULL signal; the first drive output module comprises a first transistor, a first diode, a second diode and a third diode, wherein the positive electrodes of the first diode and the second diode are connected in parallel to one end of the secondary winding, the negative electrodes of the first diode and the second diode are respectively connected to the emitter and the base of the first transistor, and the positive electrode and the negative electrode of the third diode are respectively connected to the collector and the emitter of the first transistor; the second drive output module comprises a second transistor, a fifth diode, a sixth diode and a fourth diode, wherein the positive electrodes of the fifth diode and the sixth diode are connected in parallel to the other end of the secondary winding, the negative electrodes of the fifth diode and the sixth diode are respectively connected to the base and the emitter of the second transistor, and the positive electrode and the negative electrode of the fourth diode are respectively connected to the collector and the emitter of the second transistor; the collectors of the first transistor and the second transistor are connected to each other.

2. According to claim 1, a secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit is characterized in that: The first control output module and the second control output module are both MOS tubes.

3. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 2, characterized in that: The first control determination signal and the second control determination signal are both PWM signals.

4. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 1, characterized in that: The primary drive loop further includes a capacitor and a third resistor. The capacitor is connected in series with the first control output module, and the third resistor is connected in series with the second control output module.

5. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 1, characterized in that: It also includes a second resistor and a fourth resistor; the second resistor is connected in parallel with the second diode and connected to the base of the first transistor; the fourth resistor is connected in parallel with the fifth diode and connected to the base of the second transistor.

6. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 1, characterized in that: It also includes a first resistor and a fifth resistor; the first resistor is connected in series with the first diode and connected to the emitter of the first transistor; the fifth resistor is connected in series with the sixth diode and connected to the emitter of the second transistor.

7. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 1, characterized in that: The collectors of the first transistor and the second transistor are connected to each other and are grounded.

8. The secondary side driving intelligent phase-locked circuit structure applied to a push-pull circuit according to claim 1, characterized in that: The secondary winding is grounded.

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