Inverter series-parallel circuit

Abstract

The utility model discloses an inverter series-parallel circuit which comprises a first transformer and a second transformer. The first transformer comprises a first primary coil, a first secondary coil and a second secondary coil; the second transformer comprises a second primary coil, a third secondary coil and a fourth secondary coil; wherein one end of the first primary coil is electrically connected with the drain electrode of the first MOS tube, the other end of the first primary coil is electrically connected with the drain electrode of the fourth MOS tube, one end of the second primary coil is electrically connected with the drain electrode of the seventh MOS tube, and the other end of the second primary coil is electrically connected with the drain electrode of the eighth MOS tube; and the source electrodes of the first MOS tube, the fourth MOS tube, the seventh MOS tube and the eighth MOS tube are all grounded. According to the utility model, inversion output can be ensured when photovoltaic input is as low as 14V, and the photovoltaic voltage input range is improved. And meanwhile, the problem of non-uniform heat dissipation caused by inconsistent device parameters can be effectively relieved after the series-connection uniform power design of the secondary winding of the transformer.

Description

Technical Field

[0001] The utility model relates to the field of machinery, in particular to an inverter series-parallel circuit. Background Art

[0002] Micro inverters invert each component. Its advantage is that it can independently control the MPPT of each component, which can greatly improve the overall efficiency. At the same time, it can also avoid the DC high voltage, poor weak light effect, and barrel effect of centralized inverters.

[0003] North American micro inverters generally have a photovoltaic voltage input range of 24-60V DC, and the input and output require isolation, so energy transfer must be isolated using a transformer. MOS tubes can dissipate heat by connecting heat sinks, but the heat dissipation method of transformers is limited by parameters and structure in addition to materials. The multi-way parallel architecture will always have shortcomings and cannot guarantee consistency. In addition, when the photovoltaic input voltage is below 24V, the inverter will stop working. The transformer in the inverter is a power transmission link, so the transformer power balance design can effectively alleviate the problem of uneven heat dissipation caused by inconsistent device parameters, so it needs to be improved. Utility Model Content

[0004] In order to solve the above technical problems, the utility model proposes an inverter series-parallel circuit.

[0005] The purpose of the utility model is achieved through the following technical solutions:

[0006] An inverter series-parallel circuit includes a first transformer J1 and a second transformer J2; the first transformer J1 includes a first primary coil L11, a first secondary coil L12 and a second secondary coil L13; the second transformer J2 includes a second primary coil L21, a third secondary coil L22 and a fourth secondary coil L24; wherein one end of the first primary coil L11 is electrically connected to the drain of the first MOS transistor Q1, and the other end is electrically connected to the drain of the fourth MOS transistor Q4; one end of the second primary coil L21 is electrically connected to the drain of the seventh MOS transistor Q7, and the other end is electrically connected to the drain of the eighth MOS transistor Q8; the sources of the first MOS transistor Q1, the fourth MOS transistor Q4, the seventh MOS transistor Q7 and the eighth MOS transistor Q8 are all grounded; the gate of the first MOS transistor Q1 and the gate of the seventh MOS transistor Q7 are connected in parallel and electrically connected to an SPWM signal controller A, and the gate of the fourth MOS transistor Q4 and the gate of the eighth MOS transistor Q8 are connected in parallel and electrically connected to an SPWM signal controller B;

[0007] One end of the first secondary coil L12 is electrically connected to the first AC input end of the first rectifier bridge REC1, the second AC input end of the first rectifier bridge REC1 is electrically connected to one end of the third secondary coil L22, and the other end of the third secondary coil L22 is electrically connected to the other end of the first secondary coil L12;

[0008] One end of the second secondary coil L13 is electrically connected to the first AC input end of the second rectifier bridge REC2, the second AC input end of the second rectifier bridge REC2 is electrically connected to one end of the third secondary coil L22, and the other end of the third secondary coil L22 is electrically connected to the other end of the second secondary coil L13; the first DC output end of the first rectifier bridge REC1 is electrically connected to the sixth contact of the relay K1, and the second DC output end is electrically connected to the second contact of the relay K1 through the first filter circuit; the first DC output end of the second rectifier bridge REC2 is grounded, the second DC output end is electrically connected to the third contact and the fifth contact of the relay K1 through the second filter circuit, and the seventh contact of the relay K1 is grounded; wherein, the sixth contact and the seventh contact of the relay K1 are a group of normally closed switches, and the second contact and the third contact are a group of normally closed switches; when the sixth contact and the seventh contact are disconnected, the fifth contact and the sixth contact are connected; when the second contact and the third contact are disconnected, the third contact and the fourth contact are connected.

[0009] As a further improvement, the first filtering circuit includes a first inductor L1, one end of the first inductor L1 is electrically connected to the second DC output end of the first rectifier bridge REC1, and the other end is electrically connected to one end of the first capacitor C1 and one end of the first resistor R1; the other end of the first resistor R1 is electrically connected to one end of the second resistor R2, and the other end of the second resistor R2 is electrically connected to the other end of the first capacitor C1 and is grounded.

[0010] As a further improvement, the other end of the first inductor L1 is also electrically connected to the anode of the first diode D1, the anode of the second diode D2 and the second contact of the relay K1; the cathode of the first diode D1 is electrically connected to the drain of the third MOS tube Q3, and the cathode of the second diode D2 is electrically connected to the drain of the second MOS tube Q4; the source of the third MOS tube Q3 is electrically connected to the gate of the sixth MOS tube Q6, and the source of the second MOS tube Q4 is electrically connected to the gate of the fifth MOS tube Q5; the source of the sixth MOS tube Q6 is electrically connected to the source of the fifth MOS tube Q5 and is grounded.

[0011] As a further improvement, the second MOS tube Q4, the third MOS tube Q3, the fifth MOS tube Q5 and the sixth MOS tube Q6 are all of model NCE65TF130.

[0012] As a further improvement, the first diode D1 and the second diode D2 are both RHRP1560.

[0013] As a further improvement, the second filtering circuit includes a second inductor L2, one end of the second inductor L2 is electrically connected to the second DC output end of the second rectifier bridge REC2, and the other end is electrically connected to one end of the second capacitor C2, one end of the third resistor R3, and the third contact and the fifth contact of the relay K1; the other end of the third resistor R3 is electrically connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is electrically connected to the other end of the second capacitor C2 and is grounded.

[0014] As a further improvement, the first rectifier bridge REC1 and the second rectifier bridge REC2 are both of model GBPC351.

[0015] As a further improvement, the first MOS tube Q1 , the fourth MOS tube Q4 , the seventh MOS tube Q7 and the eighth MOS tube Q8 are all of model 2SK1158.

[0016] As a further improvement, the models of the first transformer J1 and the second transformer J2 are both KD-WC700W-25V.

[0017] The beneficial effects of the utility model are:

[0018] 1. Two sets of outputs are connected in series and boosted under low voltage input: This is achieved through relays, transformers, rectifier bridges and other devices. The inverter can connect the two originally parallel voltages in series through relays at a lower input voltage to continue to maintain the AC output after the inverter.

[0019] 2. Transformer power balance design: This is achieved through transformers, MOS tubes and other devices. The secondary of one transformer is connected in series with the secondary of another transformer and then output to the rectifier bridge. The cross-connection of the two transformer windings improves the impedance consistency of the two transformers, and the energy transmitted by the transformers of multiple channels is more balanced.

[0020] 3. It can ensure that there is an inverter output when the photovoltaic input is as low as 14V, which increases the photovoltaic voltage input range. At the same time, the transformer secondary winding series power equalization design can effectively alleviate the problem of uneven heat dissipation caused by inconsistent device parameters. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The present invention is further described with reference to the accompanying drawings, but the contents in the accompanying drawings do not constitute any limitation to the present invention.

[0022] Figure 1 It is a schematic diagram of the circuit structure of the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail below with reference to the accompanying drawings and examples.

[0024] Example 1

[0025] 1. Two sets of outputs are converted to series voltage boost under low voltage input:

[0026] like Figure 1 As shown, the inverter photovoltaic input uses a basic push-pull structure, Q1, Q4, Q7, Q8 are N-MOS of model 2SK1158 used to control the charging and discharging of the primary winding of the transformer; J1, J2 are two high-frequency power transformers KD-WC700W-25V, where the input is with an intermediate tap, and the output voltage of the two secondary windings of each transformer is the same; REC1, REC2 are rectifier bridges of model GBPC3510, and the current can reach 35A; filter capacitor at the power input end of the comparator; L1, L2 are energy storage inductors; C1, C2 are filter capacitors; R1, R2, R3, R4 are discharge resistors, D1, D2 are anti-reverse diodes of model RHRP1560; Q2, Q3, Q5, Q6 are N-MOS of model NCE65TF130 used for level flipping, which inverts the steamed bun wave into standard AC power.

[0027] Principle: Q1, Q4, Q7, Q8 and transformers J1 and J2 form a push-pull architecture. The push-pull circuit adopts PWM current control mode, which is very beneficial for micro inverters. On the one hand, it can prevent the magnetic saturation of the transformer, and on the other hand, it can ensure grid connection by current loop control. The gates of Q1 and Q7 are connected in parallel and controlled by SPWMA signal, and the gates of Q4 and Q8 are connected in parallel and controlled by SPWMB signal. Signals SPWMA and SPWMB are output by the processor. Since the pulses of SPWMA and SPWMB are alternately controlled, the magnetic field of the transformer is alternately changed, so the magnetic saturation of the transformer can be prevented. VPP is the photovoltaic voltage input voltage.

[0028] In order to achieve tighter energy coupling, the transformer is generally made into a sandwich winding method, with the primary coil wound in the middle of the magnetic core and the secondary windings wound on both sides. The secondary winding of the transformer can be an output. In order to ensure that the heat dissipation area of ​​the transformer is increased at the same time, we split the output winding of the transformer into two identical parts. As shown in the figure, the secondary output pin 4 of the transformer J1 is connected to the pin 3 of the rectifier bridge REC1, the pin 5 is connected in series to the pin 6 of the transformer J2, and the pin 7 of the transformer J2 is connected to the pin 4 of the rectifier bridge REC1. Similarly, the two transformers J1, J2 and the rectifier bridge REC2 are connected in the same way. This series connection of the secondary windings of the J1 and J2 transformers can effectively suppress the difference in the parameters of the two transformers to ensure that the AC impedance of the secondary windings is approximately equal. In this way, after multiple groups of this circuit are connected in parallel, the energy of each sub-circuit can be basically balanced.

[0029] After the rectifier bridge, the first circuit is filtered by L1 and C1, and the second circuit is filtered by L2 and C2, and then directly connected in parallel through the normally closed contacts of the default state of relay K1 (the relay contains two sets of independent switches, one set of 6 and 7 is turned on by default, and the other set of 2 and 3 is turned on by default). R1 ​​and R2 are energy discharge resistors of L1 and C1, and R3 and R4 are energy discharge resistors of L2 and C2.

[0030] When the voltage after the rectifier bridge is lower than the voltage of the grid, we control relay K1 to operate, a group of switches 6 and 7 are disconnected, 5 and 6 are connected, and another group of switches 2 and 3 are disconnected, 3 and 4 are connected. At this time, the output of the first circuit and the output of the second circuit form a series mode, the voltage after the rectifier bridge doubles, and the inverter can continue to output energy to the grid.

[0031] D1 and D2 are used to prevent the backflow of grid voltage.

[0032] Q2, Q3, Q5, and Q6 are NCE65TF130 N-MOS used for level flipping, which converts the steamed bun wave into standard AC power. This H-bridge works in low-frequency mode and is only used to flip the second waveform next to it to the negative direction to form AC power.

[0033] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model rather than to limit the protection scope of the utility model. Although the utility model is described in detail with reference to the preferred embodiments, ordinary technicians in this field should understand that the technical solution of the utility model can be modified or replaced by equivalents without departing from the essence and scope of the technical solution of the utility model.

Claims

1. An inverter series-parallel circuit, characterized in that: The invention comprises a first transformer (J1) and a second transformer (J2); the first transformer (J1) comprises a first primary coil (L11), a first secondary coil (L12) and a second secondary coil (L13); the second transformer (J2) comprises a second primary coil (L21), a third secondary coil (L22) and a fourth secondary coil (L24); one end of the first primary coil (L11) is electrically connected to the drain of the first MOS tube (Q1), and the other end is electrically connected to the drain of the fourth MOS tube (Q4); the second primary coil (L21) One end is electrically connected to the drain of the seventh MOS tube (Q7), and the other end is electrically connected to the drain of the eighth MOS tube (Q8); the sources of the first MOS tube (Q1), the fourth MOS tube (Q4), the seventh MOS tube (Q7) and the eighth MOS tube (Q8) are all grounded; the gate of the first MOS tube (Q1) and the gate of the seventh MOS tube (Q7) are connected in parallel and electrically connected to an SPWM signal controller A, and the gate of the fourth MOS tube (Q4) and the gate of the eighth MOS tube (Q8) are connected in parallel and electrically connected to an SPWM signal controller B; One end of the first secondary coil (L12) is electrically connected to a first AC input end of a first rectifier bridge (REC1), a second AC input end of the first rectifier bridge (REC1) is electrically connected to one end of a third secondary coil (L22), and the other end of the third secondary coil (L22) is electrically connected to the other end of the first secondary coil (L12); One end of the second secondary coil (L13) is electrically connected to a first AC input end of a second rectifier bridge (REC2), the second AC input end of the second rectifier bridge (REC2) is electrically connected to one end of a third secondary coil (L22), and the other end of the third secondary coil (L22) is electrically connected to the other end of the second secondary coil (L13); The first DC output end of the first rectifier bridge (REC1) is electrically connected to the sixth contact of the relay (K1), and the second DC output end is electrically connected to the second contact of the relay (K1) through the first filter circuit; the first DC output end of the second rectifier bridge (REC2) is grounded, the second DC output end is electrically connected to the third contact and the fifth contact of the relay (K1) through the second filter circuit, and the seventh contact of the relay (K1) is grounded; wherein the sixth contact and the seventh contact of the relay (K1) are a group of normally closed switches, and the second contact and the third contact are a group of normally closed switches; when the sixth contact and the seventh contact are disconnected, the fifth contact and the sixth contact are connected; when the second contact and the third contact are disconnected, the third contact and the fourth contact are connected.

2. The inverter series-parallel circuit according to claim 1, characterized in that: The first filtering circuit comprises a first inductor (L1), one end of the first inductor (L1) is electrically connected to the second DC output end of the first rectifier bridge (REC1), and the other end is electrically connected to one end of the first capacitor (C1) and one end of the first resistor (R1); the other end of the first resistor (R1) is electrically connected to one end of the second resistor (R2), and the other end of the second resistor (R2) is electrically connected to the other end of the first capacitor (C1) and is grounded.

3. The inverter series-parallel circuit according to claim 2, characterized in that: The other end of the first inductor (L1) is also electrically connected to the positive electrode of the first diode (D1), the positive electrode of the second diode (D2) and the second contact of the relay (K1); the negative electrode of the first diode (D1) is electrically connected to the drain of the third MOS tube (Q3), and the negative electrode of the second diode (D2) is electrically connected to the drain of the second MOS tube (Q4); the source electrode of the third MOS tube (Q3) is electrically connected to the gate electrode of the sixth MOS tube (Q6), and the source electrode of the second MOS tube (Q4) is electrically connected to the gate electrode of the fifth MOS tube (Q5); and the source electrode of the sixth MOS tube (Q6) is electrically connected to the source electrode of the fifth MOS tube (Q5) and is grounded.

4. The inverter series-parallel circuit according to claim 3, characterized in that: The models of the second MOS tube (Q4), the third MOS tube (Q3), the fifth MOS tube (Q5) and the sixth MOS tube (Q6) are all NCE65TF130.

5. The inverter series-parallel circuit according to claim 3, characterized in that: The first diode (D1) and the second diode (D2) are both RHRP1560.

6. The inverter series-parallel circuit according to claim 1, characterized in that: The second filtering circuit comprises a second inductor (L2), one end of the second inductor (L2) is electrically connected to the second DC output end of the second rectifier bridge (REC2), and the other end is electrically connected to one end of the second capacitor (C2), one end of the third resistor (R3), and the third contact and the fifth contact of the relay (K1); the other end of the third resistor (R3) is electrically connected to one end of the fourth resistor (R4), and the other end of the fourth resistor (R4) is electrically connected to the other end of the second capacitor (C2) and is grounded.

7. The inverter series-parallel circuit according to claim 1, characterized in that: The models of the first rectifier bridge (REC1) and the second rectifier bridge (REC2) are both GBPC351.

8. The inverter series-parallel circuit according to claim 1, characterized in that: The models of the first MOS tube (Q1), the fourth MOS tube (Q4), the seventh MOS tube (Q7) and the eighth MOS tube (Q8) are all 2SK1158.

9. The inverter series-parallel circuit according to claim 1, characterized in that: The models of the first transformer (J1) and the second transformer (J2) are both KD-WC700W-25V.

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