Multiplexer and communication equipment comprising same
By integrating four filters on the same wafer substrate and adopting a combination of series and parallel branches, the existing four-mechanical device size is solved and the problem of not easily shrinking and crosstalk is achieved, and a multifunctional device design with small size and high isolation is achieved.
Patent Information
- Application Number
- CN202420538870.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-20
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2034-03-20
AI Technical Summary
Each filter in the existing four-mechanical device does not share a wafer substrate, resulting in a poor size reduction during packaging and requires multiple moldings, and crosstalk between each filter impairs the quality of wireless communication.
A multiplexer is designed in which four filters (two each of the transmitting filter and two receiving filters) are integrated on the same wafer substrate and by combining at least one series branch and one parallel branch, the input impedance of the filter is increased and crosstalk is reduced.
The size of the four-mechanical device is reduced by about 10%, while maintaining high isolation, improving wireless communication quality, and meeting the needs of small size and high isolation.
Smart Images
Figure CN222602396U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a communication device, and more specifically, to a multiplexer and a communication device comprising the same. Background Art
[0002] Portable communication devices, such as mobile phones, notebooks, personal digital assistants (PDAs), global positioning systems (GPS) and BeiDou, need to acquire and transmit signals. Different signals have different frequency ranges. In order to meet the needs of signal acquisition and transmission of portable communication devices, multiplexers came into being. With the increase of 5G commercial use, the demand for multiplexers is also increasing.
[0003] Take a quadplexer as an example for explanation. A quadplexer is usually composed of four filters with different frequencies, and the filters can pass the desired frequency of the signal and block the undesired frequency. Figure 1a A schematic diagram of the layout of the quadplexer is shown; Figure 1b for Figure 1a The cross-sectional view at A-A' in FIG. Figure 1a-1b As shown, the transmitting filter TX1, the transmitting filter TX2, the receiving filter RX1 and the receiving filter RX2 are respectively arranged on 4 wafer substrates. It is understandable that the transmitting filter TX1, the transmitting filter TX2, the receiving filter RX1 and the receiving filter RX2 can also be arranged on 2 or 3 wafer substrates. Then, the transmitting filter TX1, the transmitting filter TX2, the receiving filter RX1 and the receiving filter RX2 on different wafer substrates are cut by a cutting process and packaged on the same packaging substrate. Since each filter in the quadplexer in the prior art does not share a wafer substrate, when the quadplexer is packaged on the packaging substrate, based on the packaging spacing requirements between different filters, it will cause the size of the entire quadplexer to be difficult to reduce and multiple packaging molding is required, and the crosstalk between the filters in the quadplexer will damage the quality of wireless communication of each filter, so it is expected by the industry to provide a small size, high isolation multiplexer. Utility Model Content
[0004] In view of the above technical problems, the utility model has carefully designed a multiplexer, and has designed a multiplexer and an electronic device which can overcome the above technical problems.
[0005] A brief overview of the present invention will be given below in order to provide a basic understanding of certain aspects of the present invention. It should be understood that this overview is not an exhaustive overview of the present invention. It is not intended to identify key or important parts of the present invention, nor is it intended to limit the scope of the present invention. Its purpose is simply to present certain concepts in a simplified form as a prelude to a more detailed description discussed later.
[0006] According to one aspect of the utility model, a multiplexer is provided, comprising: a common port, a first transmit filter, a first receive filter, a second transmit filter, and a second receive filter; the first transmit filter, the first receive filter, the second transmit filter, and the second receive filter each comprise at least one series branch and at least one parallel branch; the first transmit filter, the first receive filter, the second transmit filter, and the second receive filter are integrated on the first surface of the same wafer substrate; the interval between the first transmit filter, the first receive filter, the second transmit filter, and the second receive filter is greater than or equal to 100 μm.
[0007] Furthermore, the first transmit filter, the first receive filter, the second transmit filter and the second receive filter each include a metal shielding sealing ring surrounding itself.
[0008] Furthermore, the spacing between each metal shielding sealing ring and each resonator in each filter is maintained at a minimum spacing while meeting the process spacing requirement.
[0009] Furthermore, a first matching circuit is provided between the common port and the ground.
[0010] Furthermore, the multiplexer also includes a second matching circuit, which is arranged in a filter of the multiplexer, and the filter of the multiplexer is at least one of a first transmit filter, a first receive filter, a second transmit filter and a second receive filter.
[0011] Furthermore, the series branch has N nodes, where N is a natural number; a series resonance unit is arranged between adjacent nodes; each node is also connected to a parallel branch; wherein the parallel branch includes a parallel resonance unit and an inductor connected in series therewith; or the parallel branch includes a parallel resonance unit, and the parallel resonance units in at least two parallel branches are grounded through a common inductor.
[0012] Furthermore, the parallel resonance unit and the series resonance unit each include at least one resonator. When the parallel resonance unit and the series resonance unit each include multiple resonators, the multiple resonators are connected in series and / or in parallel.
[0013] Furthermore, each filter has a series branch that is closer to the common port than all parallel branches in the filter.
[0014] Furthermore, the passband frequency range of the first transmit filter is 1920MHz to 1980MHz; the first receive filter is 2110MHz to 2170MHz; the passband frequency range of the second transmit filter is 1805MHz to 1880MHz; the second receive filter is 1710MHz to 1785MHz.
[0015] According to another aspect of the present invention, a communication device is provided, wherein the communication device comprises any one of the multiplexers described above. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The specific contents of the utility model are described below with reference to the accompanying drawings, which will help to more easily understand the above and other purposes, features and advantages of the utility model. The accompanying drawings are only for illustrating the principles of the utility model. The sizes and relative positions of the units in the accompanying drawings do not need to be drawn in proportion.
[0017] Figure 1a-1b A schematic diagram of the layout of a quadplexer provided in the prior art is shown;
[0018] Figure 2 The circuit structure block diagram of the quadplexer provided by the utility model is shown;
[0019] Figure 3a-Figure 3b The schematic diagram of the layout of the quadplexer provided by the utility model is shown;
[0020] Figure 4 A test curve diagram of the isolation between the B1 transmitting filter and the B1 receiving filter in the quadplexer provided by the utility model is shown;
[0021] Figure 5 A test curve diagram of the isolation between the B1 transmitting filter and the B3 receiving filter in the quadplexer provided by the utility model is shown;
[0022] Figure 6 A test curve diagram of the isolation between the B3 transmitting filter and the B3 receiving filter in the quadplexer provided by the utility model is shown;
[0023] Figure 7 The test curve diagram of the isolation between the B3 transmitting filter and the B1 receiving filter in the quadplexer provided by the utility model is shown. DETAILED DESCRIPTION
[0024] Below, exemplary disclosures of the present invention will be described in conjunction with the accompanying drawings. For the sake of clarity and conciseness, not all features of implementing the present invention are described in the specification. However, it should be understood that many decisions specific to the present invention may be made in the process of developing any such implementation of the present invention in order to achieve the specific goals of the developer, and these decisions may vary from one utility model to another.
[0025] It should also be noted that, in order to avoid obscuring the present invention due to unnecessary details, only the device structure closely related to the solution according to the present invention is shown in the drawings, while other details that are not closely related to the present invention are omitted.
[0026] It should be understood that the present invention is not limited to the described implementation forms due to the following description with reference to the accompanying drawings. In the present invention, features between different implementations can be replaced or borrowed, and one or more features can be omitted in one implementation, if feasible.
[0027] The following is an explanation of the multiplexer of the utility model by taking a quadplexer as an example. Specifically, the quadplexer includes a B1 receiving filter with a passband frequency range of 2110MHz to 2170MHz and a B1 transmitting filter with a passband frequency range of 1920MHz to 1980MHz; a B3 receiving filter with a passband frequency range of 1805MHz to 1880MHz and a B3 transmitting filter with a passband frequency range of 1710MHz to 1785MHz. This configuration enables the quadplexer to adapt to the wide network coverage of the B1 frequency band and the B3 frequency band, as well as to adapt to communication equipment that uses the two as a carrier aggregation combination.
[0028] It should be understood by those skilled in the art that the quadplexer provided by the present invention is not limited to the passband frequency ranges exemplified above, and quadplexers of other passband frequency ranges are also within the protection scope of the present invention. It should be further understood by those skilled in the art that the multiplexer provided by the present invention is not limited to the quadplexer.
[0029] See also Figure 2 , Figure 2 A circuit structure block diagram of a quadplexer provided by the utility model is shown, and the quadplexer includes a common port A, a B1 transmit filter 100, a B3 transmit filter 200, a B1 receive filter 110 and a B3 receive filter 210, that is, the first transmit filter, the first receive filter, the second transmit filter and the second receive filter are the B1 transmit filter 100, the B1 receive filter 110, the B3 transmit filter 200 and the B3 receive filter 210 respectively.
[0030] The common port A is an external port for sending and receiving radio waves through an antenna element (not shown in the figure); the input end of the B1 transmitting filter 100 is connected to the first transmitting port B1TP, and the output end of the B1 transmitting filter 100 is connected to the common port A; the input end of the B1 receiving filter 110 is connected to the common port A, and the output end of the B1 receiving filter 110 is connected to the first receiving port B1RP; the input end of the B3 transmitting filter 200 is connected to the second transmitting port B3TP, and the output end of the B3 transmitting filter 200 is connected to the common port A; the input end of the B3 receiving filter 210 is connected to the common port A, and the output end of the B3 receiving filter 210 is connected to the second receiving port B3RP.
[0031] A first matching circuit MC1 is connected between the common port A and the ground potential. Since the B1 transmit filter 100, the B1 receive filter 110, the B3 transmit filter 200 and the B3 receive filter 210 are capacitive, the first inductive matching circuit MC1 is provided to offset the capacitive characteristics of the filters in the quadplexer as a whole, so that the B1 transmit filter 100, the B1 receive filter 110, the B3 transmit filter 200 and the B3 receive filter 210 are impedance matched with each other to avoid insertion loss deterioration.
[0032] Furthermore, the B1 receiving filter 110, the B3 receiving filter 210, the B1 transmitting filter 100, and the B3 transmitting filter 200 may each include M series branches SL 1 -SL M , P parallel branches PL 1 -PL P , M and P are natural numbers, and M and P can be the same value.
[0033] The following uses the B1 transmit filter 100 as a representative to illustrate the arrangement of the series branches and parallel branches. 1 -SL M The common port A and the first transmitting port B1TP are sequentially arranged between the common port A and the series branch SL. 1 Between adjacent series branches and the Mth series branch SL M There is a connection node between the first transmission port B1TP, that is, there are a total of (M+1) connection nodes N 1 -N M+1 .
[0034] Parallel branch PL I One end is connected to the connection node N I+1， Parallel branch PL IThe other end is connected to the variable module MU, which is selected from the ground potential, the shared inductance or a combination of the above options, 1≤I≤P. I When the variable module MU connected to the other end of I At least one other parallel branch is connected in parallel to one end of the common inductor.
[0035] In one embodiment, if Figure 2 As shown, in the series branch SL 1 -SL M A series resonant unit SZ is provided on each 1 -SZ M , in the parallel branch PL 1 -PL P A parallel resonance unit PZ is provided on each 1 -PZ P .
[0036] Furthermore, for the series resonant unit SZ 1 -SZ M and parallel resonant unit PZ 1 -PZ P For example, the resonance unit may be selected from a single resonance unit, a series connection of the resonance unit and an inductor element, and a parallel connection of the resonance unit and a capacitor element. Specifically, the resonance unit includes at least one resonator or multiple resonators. When the resonance unit includes multiple resonators, the multiple resonators are connected in series and / or in parallel.
[0037] Furthermore, when the series resonant unit SZ 1 -SZ M and parallel resonant unit PZ 1 -PZ P When the series connection of the resonant unit and at least one inductor is selected, the inductance values of the inductors of different resonant units may be equal or different. 1 -SZ M and parallel resonant unit PZ 1 -PZ P When the parallel connection of the resonance unit and the capacitor element is selected, the capacitance values of the capacitor elements between different resonance units may be equal or different.
[0038] It can be understood that the configuration of the series branches and parallel branches of the B3 transmit filter 200, the B1 receive filter 110 and the B3 receive filter 210 can refer to the configuration of the B1 transmit filter 100, and will not be repeated here.
[0039] The connection method of the series branches and parallel branches of each filter in the quadplexer of the utility model can make the series branches in each filter connected to the common port before the parallel branches. The reason is that the filters affect each other due to their mutual connection. By connecting the series branches in each filter to the common port before the parallel branches, the input impedance of each filter can be increased, the influence of the remaining filters on a certain filter when it is working can be reduced, and the performance of the quadplexer can be improved.
[0040] In other embodiments, Figure 2 As shown, at least one of the B1 receiving filter 110, the B3 receiving filter 210, the B1 transmitting filter 100, and the B3 transmitting filter 200 in the quadplexer of the present invention may have a second matching branch MC2. Specifically, the second matching circuit MC2 may be arranged at least one of the first transmitting port B1TP of the B1 transmitting filter 100, the second transmitting port B3TP of the B3 transmitting filter 200, the first receiving port B1RP of the B1 receiving filter 110, and the second receiving port B3RP of the B3 receiving filter 210.
[0041] Further, when the second matching branch MC2 is arranged at the first transmitting port B1TP of the B1 transmitting filter 100, it can be arranged in series at the node N M+1 and the first transmitting port B1TP, or the second matching branch MC2 can be arranged in parallel at the node N of the B1 transmitting filter 100. M+1 At this time, the second matching branch MC2 is used to match the impedance of the B1 transmit filter 100 itself to avoid signal reflection and signal loss. The second matching branch MC2 can be various series-parallel combinations of capacitors and / or inductors.
[0042] It can be understood that when the second matching branch MC2 is set at the second transmit port B3TP of the B3 transmit filter 200, the first receive port B1RP of the B1 receive filter 110, and the second receive port B3RP of the B3 receive filter 210, the manner and function are the same as when the second matching branch MC2 is set at the first transmit port B1TP of the B1 transmit filter 100, and will not be repeated here.
[0043] Figure 3a-Figure 3b FIG. 2 shows a schematic diagram of the layout of the quadplexer provided by the present utility model. Figure 3a The quadplexer die includes the above Figure 2The B1 transmitting filter 100, the B1 receiving filter 110, the B3 transmitting filter 200 and the B3 receiving filter 210 in the embodiment of the present invention are shown in FIG. The resonators in each filter can be prepared according to the structure and manufacturing method of the resonator in the prior art, which is not limited here. The above filters can be prepared according to Figure 2 The topological relationship in the layout design rules is as follows: Figure 3a-Figure 3b As shown, they are arranged on the first surface of the same wafer substrate S of the quadplexer bare die. The periphery of each filter forms a metal shielding sealing ring surrounding the filter itself, and each metal shielding sealing ring performs grounding shielding on each filter. The spacing between each metal shielding sealing ring and each resonator in each filter is maintained at the minimum spacing while meeting the process spacing requirements.
[0044] Furthermore, the spacing between the filters surrounded by the metal shielding sealing ring M should be greater than or equal to 100 μm to meet the performance requirements of the device. The above-mentioned configuration of the utility model can successfully reduce the size of the quadplexer by more than about 10%, thereby meeting the demand for miniaturization, and since the quadplexer provided by the utility model is monolithically integrated on the same wafer substrate S, the quadplexer is obtained after the cutting process, so it can be formed at one time during the flip chip packaging with the packaging substrate, and it can be understood that it can also be packaged on the packaging substrate through leads.
[0045] See also Figure 4-Figure 7 , Figure 4 The test curve diagram of the isolation between the B1 transmitting filter and the B1 receiving filter in the quadplexer provided by the utility model is shown. Figure 5 The test curve diagram of the isolation between the B1 transmitting filter and the B3 receiving filter in the quadplexer provided by the utility model is shown. Figure 6 The test curve diagram of the isolation between the B3 transmitting filter and the B3 receiving filter in the quadplexer provided by the utility model is shown. Figure 7 The test curve diagram of the isolation between the B3 transmitting filter and the B1 receiving filter in the quadplexer provided by the utility model is shown. Figure 4-Figure 7 From the test results, it can be seen that the quadplexer provided by the utility model can reduce the size of the quadplexer by more than 10%, while maintaining the isolation of the B1 duplexer and the B3 duplexer themselves and the cross isolation between the two at 60dB, has a steep passband edge roll-off and good suppression between multiple frequency bands, can minimize the impact of the transmission path on the receiving path, and has high signal transmission and reception sensitivity. It can be seen that the multiplexer provided by the utility model meets the requirements of small size and high isolation.
[0046] Furthermore, the multiplexer provided by the utility model can be used in communication equipment, and the communication equipment can be desktop computers, notebooks, smart phones, smart watches, wearable devices, Internet server intelligent voice systems, routers, automotive electronic equipment, Internet of Things (IoT) equipment, medical equipment, etc.
[0047] The present invention is described above in conjunction with specific implementation schemes, but those skilled in the art should be aware that these descriptions are exemplary and are not intended to limit the scope of protection of the present invention. Those skilled in the art can make various modifications and variations to the present invention based on the spirit and principles of the present invention, and these modifications and variations are also within the scope of the present invention.
Claims
1. A multiplexer, characterized in that: include: a common port, a first transmit filter, a first receive filter, a second transmit filter, and a second receive filter; The first transmitting filter, the first receiving filter, the second transmitting filter and the second receiving filter each include at least one series branch and at least one parallel branch; The first transmit filter, the first receive filter, the second transmit filter, and the second receive filter are integrated on a first surface of the same wafer substrate; The intervals between the first transmit filter, the first receive filter, the second transmit filter and the second receive filter are greater than or equal to 100 μm.
2. The multiplexer as claimed in claim 1, wherein: The first transmit filter, the first receive filter, the second transmit filter and the second receive filter each include a metal shielding sealing ring surrounding itself.
3. The multiplexer as claimed in claim 2, wherein: The distance between each metal shielding sealing ring and each resonator in each filter is kept at a minimum distance while meeting the process distance requirement.
4. The multiplexer according to any one of claims 1 to 3, characterized in that: A first matching circuit is provided between the common port and the ground.
5. The multiplexer as claimed in claim 4, wherein: The multiplexer further includes a second matching circuit, which is disposed in a filter of the multiplexer. The filter of the multiplexer is at least one of a first transmit filter, a first receive filter, a second transmit filter, and a second receive filter.
6. The multiplexer as claimed in claim 5, wherein: The series branch has N nodes, where N is a natural number; a series resonance unit is arranged between adjacent nodes; each node is also connected to a parallel branch; wherein the parallel branch includes a parallel resonance unit and an inductor connected in series therewith; or the parallel branch includes a parallel resonance unit, and the parallel resonance units in at least two parallel branches are grounded through a common inductor.
7. The multiplexer as claimed in claim 6, wherein: The parallel resonance unit and the series resonance unit each include at least one resonator. When the parallel resonance unit and the series resonance unit each include a plurality of resonators, the plurality of resonators are connected in series and / or in parallel.
8. The multiplexer as claimed in claim 7, wherein: There is a series branch in each filter that is closer to the common port than all parallel branches in the filter.
9. The multiplexer as claimed in claim 8, wherein: The first transmit filter has a passband frequency range of 1920MHz to 1980MHz; the first receive filter has a passband frequency range of 2110MHz to 2170MHz; the second transmit filter has a passband frequency range of 1805MHz to 1880MHz; the second receive filter has a passband frequency range of 1710MHz to 1785MHz.
10. A communication device, characterized in that: The communication device comprises the multiplexer according to any one of claims 1-9.