Output circuit
By combining the driving unit and the detection unit, the open circuit of the output tube is determined by voltage difference or voltage comparison, which solves the problems of detection accuracy and voltage loss in the prior art and realizes flexible and accurate output circuit status detection and load adaptability.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2025-06-03
- Publication Date
- 2026-04-07
AI Technical Summary
Existing current-type output circuits suffer from accuracy issues or voltage margin loss when detecting open circuits, and cannot flexibly adapt to different load impedance variations.
By employing a combination of a drive unit, an output transistor, and a detection unit, a characterization signal is generated by detecting the voltage difference of the output transistor or comparing the voltage with a reference voltage to determine whether the output transistor is open-circuited, thus avoiding adding leakage paths or voltage losses in the output path.
It achieves flexible and accurate output circuit status detection, ensures load current accuracy and voltage range, promptly alarms for load abnormalities, and adapts to different load conditions.
Smart Images
Figure CN224096167U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of integrated circuit technology, and specifically relates to an output circuit. Background Technology
[0002] For current-type output circuits, open circuit is a common failure mode. Timely detection of faults and issuance of alarms can greatly improve the safety and reliability of the system.
[0003] Common detection methods include: Method 1, connecting a large pull-up resistor to the current output port and detecting the port voltage; Method 2, connecting a resistor in series in the current output path and detecting whether current flows. The problems with these methods are: In Method 1, the presence of the pull-up resistor affects the accuracy of the output current; in Method 2, when the current is large, the series resistor will reduce the voltage headroom of the output stage.
[0004] The output current range varies in different application scenarios, and the requirements for the impedance range of the load also vary. Method 1 uses a fixed output impedance threshold as the standard for judging whether there is an open circuit, which is not flexible enough. Method 2 uses whether current can be output as the standard for judging whether there is an open circuit, which cannot detect the situation where the output load impedance is too large, causing the output current to deviate from the expected value.
[0005] The information disclosed in this background section is intended only to enhance the understanding of the overall background of this utility model and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Utility Model Content
[0006] The purpose of this invention is to provide an output circuit that can flexibly and accurately detect whether it is outputting an open circuit.
[0007] To achieve the above objectives, a specific embodiment of the present invention provides an output circuit, including: a driving unit, an output transistor, and a detection unit. The driving unit is connected to the control terminal and the first terminal of the output transistor to drive the output transistor. The second terminal of the output transistor is connected to the load to provide load current to the load. The detection unit is connected to the output transistor to detect the voltage on the output transistor and generate a characterization signal indicating whether the output transistor outputs an open circuit.
[0008] In one or more embodiments of this utility model, the detection unit is connected to the control terminal of the output tube to generate a characterization signal indicating whether the output tube outputs an open circuit based on the voltage at the control terminal of the output tube and a reference voltage.
[0009] In one or more embodiments of this utility model, the detection unit is connected to the control terminal of the output tube and the first terminal of the output tube, so as to generate a characterization signal that characterizes whether the output tube outputs an open circuit based on the voltage difference between the first terminal of the output tube and the control terminal of the output tube and the reference voltage.
[0010] In one or more embodiments of the present invention, the detection unit includes a first comparator, the first input terminal of the first comparator is connected to the control terminal of the output transistor, the second input terminal of the first comparator is connected to a reference voltage, and the output terminal of the first comparator is used to output a characterization signal.
[0011] In one or more embodiments of this utility model, the detection unit includes a sampling unit and a second comparator. The sampling unit is connected to the control terminal and the first terminal of the output tube to collect the voltage on the control terminal and the first terminal of the output tube. The first input terminal of the second comparator is connected to the sampling unit, and the second input terminal of the second comparator is connected to a reference voltage. The second comparator is used to compare the voltage between the control terminal and the first terminal of the output tube with the reference voltage to generate a characterization signal.
[0012] In one or more embodiments of this utility model, the sampling unit includes a sampling capacitor, a first switch, a second switch, and a third switch. The first end of the sampling capacitor is connected to the first end of the first switch, the second end of the first switch is connected to the control terminal of the output transistor, the second end of the sampling capacitor is connected to the first input terminal of the second comparator and the first end of the second switch, the second end of the second switch is connected to the first end of the output transistor, the first end of the third switch is connected to the first end of the sampling capacitor, and the second end of the third switch is connected to ground voltage.
[0013] In one or more embodiments of the present invention, the output circuit further includes a voltage generation circuit for generating a reference voltage.
[0014] In one or more embodiments of this utility model, the voltage generating circuit includes a reference resistor and a reference current source, which are connected in series between the power supply voltage and the ground voltage and generate a reference voltage at the connection terminal where the reference resistor and the reference current source are connected.
[0015] In one or more embodiments of the present invention, the driving unit includes a voltage generation branch, an amplifier, and a bias unit. The voltage generation branch is used to generate a reference voltage. The second input terminal of the amplifier is connected to the voltage generation branch. The first input terminal of the amplifier is connected to the bias unit and the first terminal of the output transistor. The amplifier is used to clamp the voltage at the first terminal of the output transistor to the reference voltage. The output terminal of the amplifier is connected to the control terminal of the output transistor.
[0016] In one or more embodiments of this utility model, the voltage generating branch includes a first resistor and a current source, the first resistor and the current source being connected in series between the power supply voltage and the ground voltage, and generating a reference voltage at the connection terminal where the first resistor and the current source are connected; and / or
[0017] The bias unit includes a second resistor, the first end of which is connected to the power supply voltage, and the second end of which is connected to the first end of the output transistor and the first input end of the amplifier.
[0018] Compared with the prior art, the output circuit of this utility model does not add a leakage path in the output path, so it has no impact on the accuracy of the load current; it also does not generate voltage loss in the output path, thus maximizing the usable voltage range of the load current; by utilizing the automatic adjustment characteristics of the loop, it can accept a larger load when the load current is low, and can also provide timely alarm when the load current is large, ensuring that the "open circuit" alarm is not triggered, and outputting the expected load current according to the load conditions. Attached Figure Description
[0019] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is a circuit diagram of the output circuit in Embodiment 1 of this utility model.
[0021] Figure 2 This is a circuit diagram of the voltage generation circuit in Embodiment 1 of this utility model.
[0022] Figure 3 This is a circuit diagram of the output circuit in Embodiment 2 of this utility model. Detailed Implementation
[0023] To enable those skilled in the art to better understand the technical solutions of this utility model, the technical solutions of the embodiments of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, and not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort should fall within the protection scope of this utility model.
[0024] The terms "coupled," "connected," or "linked" in this specification include both direct and indirect connections. An indirect connection is a connection made through an intermediate medium, such as an electrical conduction medium, which may have parasitic inductance or capacitance. Indirect connections may also include connections made through other active or passive devices to achieve the same or similar functional purpose, such as connections through switches, follower circuits, or other circuits or components. Furthermore, in utility models, terms such as "first" and "second" are primarily used to distinguish one technical feature from another, and do not necessarily require or imply any actual relationship, quantity, or order between these technical features.
[0025] In the detailed description of this specification, reference is made to the accompanying drawings, which form a part thereof, wherein like reference numerals always denote like parts, and wherein exemplary embodiments are shown by way of example that may be implemented. It should be understood that other embodiments may be utilized, and structural or logical changes may be made, without departing from the scope of this disclosure. Therefore, the following detailed description should not be considered limiting.
[0026] The various operations in the specification may be described sequentially as multiple discrete actions or operations in a manner most conducive to understanding the claimed subject matter. However, the order of description should not be construed as implying that these operations must be sequentially related. Specifically, these operations may not be performed in the order presented. The described operations may be performed in a different order than in the described embodiments. Various additional operations may be performed in additional embodiments and / or the described operations may be omitted.
[0027] For the purposes of this disclosure, the phrase “A and / or B” means (A), (B), or (A and B). For the purposes of this disclosure, the phrase “A, B and / or C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C).
[0028] Various components and devices may be referred to or shown in the singular (e.g., “transistor”, “transistor”, “switch”, etc.) in this document, but only for the convenience of discussion, and any element referred to in the singular may include multiple such elements as taught herein.
[0029] The description uses the phrases "in one embodiment," "in other embodiments," or "in some embodiments," each of which may refer to one or more of the same or different embodiments. Furthermore, the terms "comprising," "including," "having," etc., used with respect to embodiments of this disclosure are synonymous.
[0030] Example 1
[0031] like Figure 1As shown, an output circuit in an embodiment of this utility model includes: a driving unit, an output transistor MT, and a detection unit. The driving unit is connected to the control terminal of the output transistor MT and the first terminal of the output transistor MT to drive the output transistor MT. The second terminal of the output transistor MT is connected to the load RL to provide a load current Iout to the load RL.
[0032] The detection unit is connected to the output transistor MT to detect the voltage on the output transistor MT and generate a characterization signal FAULT indicating whether the second terminal of the output transistor MT is open. Specifically, the detection unit is connected to the control terminal of the output transistor MT to generate the characterization signal FAULT indicating whether the second terminal of the output transistor MT is open based on the voltage VG at the control terminal of the output transistor MT and the reference voltage Vref.
[0033] In one embodiment, the output transistor MT is a P-channel MOSFET, with its first terminal being the source, its second terminal being the drain, and its control terminal being the gate. In other embodiments, the output transistor MT can be an N-channel MOSFET, with other circuit structures modified accordingly.
[0034] The driving unit includes a voltage generation branch, an amplifier Ap, and a bias unit. The voltage generation branch is used to generate a reference voltage Ve. The second input terminal of the amplifier Ap is connected to the voltage generation branch. The first input terminal of the amplifier Ap is connected to the bias unit and the first terminal of the output transistor MT. The amplifier Ap is used to clamp the voltage VS at the first terminal of the output transistor MT to the reference voltage Ve, so that the voltage VS at the first terminal of the output transistor MT is equal to the reference voltage Ve. The output terminal of the amplifier Ap is connected to the control terminal of the output transistor MT.
[0035] In one embodiment, the voltage generation branch includes a first resistor R1 and a current source Ia. The first resistor R1 and the current source Ia are connected in series between the power supply voltage VDD and the ground voltage GND, and a reference voltage Ve is generated at the connection terminal where the first resistor R1 and the current source Ia are connected.
[0036] The bias unit includes a second resistor R2. The first terminal of the second resistor R2 is connected to the power supply voltage VDD, and the second terminal of the second resistor R2 is connected to the first terminal of the output transistor MT and the first input terminal of the amplifier Ap. The second input terminal of the amplifier Ap is used to receive the reference voltage Ve. In one embodiment, the first input terminal of the amplifier Ap is a negative input terminal, and the second input terminal of the amplifier Ap is a positive input terminal. In other embodiments, the first input terminal of the amplifier Ap can be a positive input terminal, and the second input terminal of the amplifier Ap can be a negative input terminal.
[0037] like Figure 2 As shown, the output circuit also includes a voltage generation circuit for generating the reference voltage Vref.
[0038] In one embodiment, the voltage generation circuit includes a reference resistor Rc and a reference current source Ic, which are connected in series between the power supply voltage VDD and the ground voltage GND, generating a reference voltage Vref at the connection point where the reference resistor Rc and the reference current source Ic are connected. In other embodiments, the voltage generation circuit may employ other structures.
[0039] like Figure 1 As shown, the detection unit includes a first comparator A1. The first input terminal of the first comparator A1 is connected to the control terminal of the output transistor MT, and the second input terminal of the first comparator A1 is connected to a reference voltage Vref. The output terminal of the first comparator A1 is used to output a characterization signal FAULT. In one embodiment, the first input terminal of the first comparator A1 is a negative input terminal, and the second input terminal of the first comparator A1 is a positive input terminal. In other embodiments, the first input terminal of the first comparator A1 can be a positive input terminal, and the second input terminal of the first comparator A1 can be a negative input terminal.
[0040] like Figure 1 As shown, when the load current Iout is larger and the source-drain voltage VSD of the output transistor MT is smaller, the source-gate voltage VSG of the output transistor MT required to not affect the accuracy of the load current Iout is larger.
[0041] Where VSD = VDD - Iout * (R2 + RL), it can be seen that the larger the load RL, the smaller the source-drain voltage VSD of the output transistor MT. When RL increases to the point that the on-chip circuit cannot provide the basic source-drain voltage VSG, that is, when the loop gain decreases (a) or the source-gate withstand voltage of the output transistor MT is insufficient (b), the circuit cannot output the load current Iout that meets the accuracy requirements, and it can be determined that the second terminal of the output transistor MT is "open circuit". Both failure modes (a) and (b) are reflected in the voltage VG at the control terminal of the output transistor MT. Therefore, by using the first comparator A1 to compare the reference voltage Vref and the voltage VG, when the voltage VG is lower than the reference voltage Vref, it is considered that the output transistor MT is over-open. At this time, the first comparator A1 outputs the characterization signal FAULT to perform an "open circuit" alarm.
[0042] This embodiment also discloses a chip, including the above-described output circuit.
[0043] Example 2
[0044] like Figure 3 Combination Figure 1As shown, in one embodiment, the difference from Embodiment 1 lies in the structure of the detection unit. The detection unit is connected to the control terminal and the first terminal of the output transistor MT to generate a characterizing signal FAULT indicating whether the second terminal of the output transistor MT is open, based on the voltage difference VSG between the first terminal and the control terminal of the output transistor MT and the reference voltage Vref. Generally, when the voltage drop across the second resistor R2 is relatively large, the scheme of this embodiment can be used, as detecting the voltage difference VSG is more intuitive. However, when the load RL is large, a different approach can be used. Figure 1 The scheme shown.
[0045] In one embodiment, the detection unit includes a sampling unit and a second comparator A2. The sampling unit is connected to the control terminal and the first terminal of the output transistor MT to acquire the voltage VG at the control terminal and the voltage VS at the first terminal of the output transistor MT. The first input terminal of the second comparator A2 is connected to the sampling unit, and the second input terminal of the second comparator A2 is connected to a reference voltage Vref. The second comparator A2 is used to compare the voltage VSG between the control terminal and the first terminal of the output transistor MT with the reference voltage Vref to generate a characterization signal FAULT. The first input terminal of the second comparator A2 is a positive input terminal, and the second input terminal of the second comparator A2 is a negative input terminal. In other embodiments, the first input terminal of the second comparator A2 can be a negative input terminal, and the second input terminal of the second comparator A2 can be a positive input terminal.
[0046] like Figure 3 As shown, the sampling unit includes a sampling capacitor CS, a first switch K1, a second switch K2, and a third switch K3. The first terminal of the sampling capacitor CS is connected to the first terminal of the first switch K1. The second terminal of the first switch K1 is connected to the control terminal of the output transistor MT. The second terminal of the sampling capacitor CS is connected to the first input terminal of the second comparator A2 and the first terminal of the second switch K2. The second terminal of the second switch K2 is connected to the first terminal of the output transistor MT. The first terminal of the third switch K3 is connected to the first terminal of the sampling capacitor CS, and the second terminal of the third switch K3 is connected to ground.
[0047] When acquiring the voltage difference VSG between the first terminal and the control terminal of the output transistor MT, in the first stage, the first switch K1 and the second switch K2 are simultaneously turned on, and the third switch K3 is turned off. The sampling capacitor CS samples the voltage VS at the first terminal of the output transistor MT and the voltage VG at the control terminal of the output transistor MT. In the second stage, after the second switch K2 is turned off, the first switch K1 is turned off again, and then the third switch K3 is turned on. At this time, the voltage on the second plate of the sampling capacitor CS is equal to the voltage difference VSG between the first terminal and the control terminal of the output transistor MT. By controlling the frequency of each switch according to the sampling rate requirements, when the voltage difference VSG exceeds the reference voltage Vref, the second comparator A2 will promptly report the characteristic signal FAULT to issue an "open circuit" alarm.
[0048] It will be apparent to those skilled in the art that this invention is not limited to the details of the exemplary embodiments described above, and that it can be implemented in other specific forms without departing from the spirit or essential characteristics of this invention. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this invention is defined by the appended claims rather than the foregoing description. Thus, it is intended that all variations falling within the meaning and scope of equivalents of the claims be included within this invention. No reference numerals in the claims should be construed as limiting the scope of the claims.
[0049] Furthermore, it should be understood that although this specification describes embodiments, not every embodiment contains only one independent technical solution. This narrative style is merely for clarity. Those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.
Claims
1. An output circuit, characterized in that, include: The device includes a driving unit, an output transistor, and a detection unit. The driving unit is connected to the control terminal and the first terminal of the output transistor to drive the output transistor. The second terminal of the output transistor is connected to the load to provide load current to the load. The detection unit is connected to the output transistor to detect the voltage on the output transistor and generate a characterization signal indicating whether the output transistor is open-circuited.
2. The output circuit according to claim 1, characterized in that, The detection unit is connected to the control terminal of the output transistor to generate a characterization signal indicating whether the output transistor is outputting an open circuit based on the voltage at the control terminal of the output transistor and the reference voltage.
3. The output circuit according to claim 1, characterized in that, The detection unit is connected to the control terminal and the first terminal of the output tube to generate a characterization signal indicating whether the output tube is outputting an open circuit based on the voltage difference between the first terminal and the control terminal of the output tube and the reference voltage.
4. The output circuit according to claim 1, characterized in that, The detection unit includes a first comparator, the first input terminal of the first comparator is connected to the control terminal of the output transistor, the second input terminal of the first comparator is connected to a reference voltage, and the output terminal of the first comparator is used to output a characterization signal.
5. The output circuit according to claim 1, characterized in that, The detection unit includes a sampling unit and a second comparator. The sampling unit is connected to the control terminal and the first terminal of the output transistor to collect the voltage on the control terminal and the first terminal of the output transistor. The first input terminal of the second comparator is connected to the sampling unit, and the second input terminal of the second comparator is connected to a reference voltage. The second comparator is used to compare the voltage between the control terminal and the first terminal of the output transistor with the reference voltage to generate a characterization signal.
6. The output circuit according to claim 5, characterized in that, The sampling unit includes a sampling capacitor, a first switch, a second switch, and a third switch. The first end of the sampling capacitor is connected to the first end of the first switch, the second end of the first switch is connected to the control terminal of the output transistor, the second end of the sampling capacitor is connected to the first input terminal of the second comparator and the first end of the second switch, the second end of the second switch is connected to the first end of the output transistor, the first end of the third switch is connected to the first end of the sampling capacitor, and the second end of the third switch is connected to ground voltage.
7. The output circuit according to any one of claims 2 to 6, characterized in that, The output circuit also includes a voltage generation circuit for generating a reference voltage.
8. The output circuit according to claim 7, characterized in that, The voltage generation circuit includes a reference resistor and a reference current source, which are connected in series between the power supply voltage and the ground voltage, and generate a reference voltage at the connection point where the reference resistor and the reference current source are connected.
9. The output circuit according to claim 1, characterized in that, The driving unit includes a voltage generation branch, an amplifier, and a bias unit. The voltage generation branch is used to generate a reference voltage. The second input terminal of the amplifier is connected to the voltage generation branch. The first input terminal of the amplifier is connected to the bias unit and the first terminal of the output transistor. The amplifier is used to clamp the voltage at the first terminal of the output transistor to the reference voltage. The output terminal of the amplifier is connected to the control terminal of the output transistor.
10. The output circuit according to claim 9, characterized in that, The voltage generation branch includes a first resistor and a current source, the first resistor and the current source being connected in series between the power supply voltage and the ground voltage, and generating a reference voltage at the connection point where the first resistor and the current source are connected; and / or The bias unit includes a second resistor, the first end of which is connected to the power supply voltage, and the second end of which is connected to the first end of the output transistor and the first input end of the amplifier.