Image acquisition device
By controlling the alternating operation of the fill light module and the aiming module with a switching chip, the problem of chaotic exposure timing in traditional image acquisition systems is solved, thus improving the accuracy and efficiency of the scanning equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- WUXI IDATA TECHNOLOGY COMPANY LTD
- Filing Date
- 2025-05-12
- Publication Date
- 2026-04-28
AI Technical Summary
In traditional image acquisition systems, the untimely switching between the supplementary lighting module and the laser module leads to a decrease in the scanning efficiency and accuracy of the equipment. In particular, the exposure timing is disordered during high-speed continuous shooting, which affects the image quality.
A switching chip is used to control the alternating operation of the fill light module and the aiming module. Exposure synchronization is achieved by controlling the OE pin state of the switching chip through the camera, ensuring timely switching between the fill light and the laser module.
It achieves synchronized camera exposure, improves the accuracy and efficiency of scanning equipment, and avoids image overexposure and loss of feature points.
Smart Images
Figure CN224178234U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of image acquisition technology, and in particular to an image acquisition device. Background Technology
[0002] In industrial automation and high-precision scanning scenarios, image acquisition systems need to dynamically switch light source modes to adapt to different detection requirements. For example, supplementary lighting (such as LEDs) is used to provide uniform illumination to capture surface texture or color information of objects, while laser aiming modules (such as phototubes) need to project a characteristic beam to locate the target object in the absence of ambient light interference. In traditional solutions, the two types of light sources often switch asynchronously due to time-division control delays. Especially during high-speed continuous shooting, residual supplementary lighting or laser lag can easily cause camera exposure sequence disorder, leading to problems such as image overexposure and loss of feature points, seriously affecting the scanning efficiency and accuracy of the equipment. Utility Model Content
[0003] This invention provides an image acquisition device to solve the defect in the prior art where the switching between the supplementary lighting module and the laser module is not timely, resulting in a decrease in the scanning efficiency and accuracy of the device. It achieves synchronous exposure of the camera and improves the scanning accuracy.
[0004] This utility model provides an image acquisition device, including: a CPU, a power supply, a switching chip, a camera, a supplementary lighting module, and an aiming module;
[0005] The switching chip is connected to the CPU, camera, fill light module, and aiming module respectively; the power supply is connected to the switching chip and fill light module respectively.
[0006] The switch chip has ten pins: the S pin is connected to the camera, the OE pin is connected to the CPU, the HSD1+ pin, GND pin, and HSD2- pin are grounded, the HSD2+ pin, HSD1- pin, and V+ pin are connected to the power supply, the D+ pin is connected to the fill light module, and the D- pin is connected to the aiming module.
[0007] According to the image acquisition device provided by this utility model, the supplementary lighting module includes a supplementary lighting power chip and a supplementary light. The supplementary lighting power chip has eight pins. Its B2 pin is connected to the D+ pin of the switch chip, the D2 pin and C2 pin are respectively connected to the CPU, the A2 pin and B1 pin are respectively connected to the power supply, the C1 pin and A1 pin are respectively grounded, and the D1 pin is connected to the supplementary light.
[0008] According to the image acquisition device provided by this utility model, the aiming module includes an NPN transistor and a laser tube. The first and fourth pins of the NPN transistor are grounded, the fifth and sixth pins are connected to the D-pin of the switching chip, the second pin is connected to the PD pin of the laser tube, the third pin is connected to the LD pin of the laser tube, and the common power supply terminal of the laser tube is connected to the D-pin of the switching chip.
[0009] According to the image acquisition device provided by this utility model, the HSD1+ pin of the switching chip is grounded through a first resistor, the HSD2- pin is grounded through a second resistor, and the V+ pin is also grounded through a first capacitor.
[0010] According to the image acquisition device provided by this utility model, the B1 pin of the supplementary light power chip is connected to the power supply through a first inductor, the A2 pin of the supplementary light power chip is grounded through a second capacitor, and the C1 pin of the supplementary light power chip is grounded through a third capacitor.
[0011] According to the image acquisition device provided by this utility model, the B2 pin of the supplementary light power chip is connected to the D+ pin of the switch chip through a fifth resistor, and the line between the B2 pin of the supplementary light power chip and the fifth resistor is also grounded through a fourth resistor.
[0012] According to the image acquisition device provided by this utility model, the 5th and 6th pins of the NPN transistor are both connected to the D-pin of the switching chip through a third resistor.
[0013] According to the image acquisition device provided by this utility model, the fourth pin of the NPN transistor is grounded through the sixth resistor, and the second pin of the NPN transistor is grounded through the seventh resistor.
[0014] The image acquisition device provided by this utility model uses a camera to control the supplementary light module and the aiming module to work alternately via a switching chip. When the camera is not acquiring images, the switching chip controls the supplementary light module to not work and the supplementary light to be turned off, while the laser tube of the aiming module starts to aim at the object and runs stably with constant power. When the camera starts acquiring images, the switching chip controls the aiming module to stop working and simultaneously controls the supplementary light to turn on and enter the working state, thus achieving exposure synchronization. Attached Figure Description
[0015] To more clearly illustrate the technical solutions in this utility model or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this utility model. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0016] Fig. 1 This is a circuit diagram of the image acquisition device provided by this utility model;
[0017] Fig. 2 This is an electrical block diagram of the image acquisition device provided by this utility model;
[0018] Fig. 3 This is a timing diagram showing the relationship between the OE and S pins of the switching chip and the fill light and laser tube. Detailed Implementation
[0019] To make the objectives, technical solutions, and advantages of this utility model clearer, the technical solutions of this utility model will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this utility model, not all embodiments. Based on the embodiments of this utility model, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this utility model.
[0020] The following is combined with Figs. 1-3 This utility model describes an image acquisition device, comprising: a CPU, a power supply, a switching chip U1, a camera, a supplementary lighting module, and an aiming module; the switching chip U1 is connected to the CPU, the camera, the supplementary lighting module, and the aiming module respectively; the power supply is connected to the switching chip U1 and the supplementary lighting module respectively.
[0021] The switch chip U1 is model SGM7222, which has ten pins: S pin, HSD1+ pin, HSD2+ pin, D+ pin, GND pin, D- pin, HSD2- pin, HSD1- pin, OE pin, and V+ pin. The S pin of the switch chip U1 is connected to the camera, the OE pin is connected to the CPU, the HSD1+ pin, GND pin, and HSD2- pin are grounded, the HSD2+ pin, HSD1- pin, and V+ pin are connected to the power supply, the D+ pin is connected to the fill light module, and the D- pin is connected to the aiming module.
[0022] Furthermore, the HSD1+ pin of the switch chip U1 is grounded through the first resistor R1, the HSD2- pin is grounded through the second resistor R2, and the V+ pin is also grounded through the first capacitor C1.
[0023] In this embodiment, when the CPU controls the OE pin of the switch chip U1 to a low level, the switch chip U1 is in the working state. At this time, the camera can control the working state of the fill light module and the aiming module by controlling the level of the S pin of the switch chip U1. When the CPU controls the OE pin of the switch chip U1 to a high level, the switch chip U1 is in the off state, and electrical signals cannot be transmitted between the pins. At this time, the camera cannot control the working state of the fill light module and the aiming module through the S pin of the switch chip U1.
[0024] The supplementary lighting module includes a supplementary lighting power chip U2 and a supplementary light F1. The supplementary lighting power chip U2 is model LM36010, which has eight pins: A1 (GND), A2 (IN), B1 (SW), B2 (STROBE), C1 (OUT), C2 (SDA), D1 (LED), and D2 (SCL). The B2 pin of the supplementary lighting power chip U2 is connected to the D+ pin of the switch chip U1. The D2 and C2 pins are connected to the CPU, the A2 and B1 pins are connected to the power supply, the C1 and A1 pins are grounded, and the D1 pin is connected to the supplementary light F1.
[0025] Furthermore, pin B1 of the supplementary lighting power chip U2 is connected to the power supply through the first inductor L1, pin A2 of the supplementary lighting power chip U2 is grounded through the second capacitor C2, and pin C1 of the supplementary lighting power chip U2 is grounded through the third capacitor C3.
[0026] Furthermore, the B2 pin of the supplementary lighting power chip U2 is connected to the D+ pin of the switching chip U1 through the fifth resistor R5, and the line between the B2 pin of the supplementary lighting power chip U2 and the fifth resistor R5 is also grounded through the fourth resistor R4.
[0027] Furthermore, pin B2 of the fill light power chip U2 is the switch control pin of the fill light F1. When pin B2 of the fill light power chip U2 is in a high-level state, the fill light F1 is turned on and enters the working state. When pin B2 of the fill light power chip U2 is in a low-level state, the fill light F1 is in the off state.
[0028] Furthermore, the CPU controls the light intensity, color, and duration of the fill light F1 through the C2 and D2 pins of the fill light power chip U2.
[0029] The aiming module includes an NPN transistor U3 and a laser tube M1. Pins 1 and 4 of the NPN transistor U3 are grounded, pins 5 and 6 are connected to the D-pin of the switching chip U1, pin 2 is connected to the PD pin of the laser tube M1, pin 3 is connected to the LD pin of the laser tube M1, and the common power supply terminal of the laser tube M1 is connected to the D-pin of the switching chip U1.
[0030] Furthermore, pins 5 and 6 of NPN transistor U3 are connected to the D-pin of switch chip U1 through the third resistor R3; pin 4 of NPN transistor U3 is grounded through the sixth resistor R6, and pin 2 of NPN transistor U3 is grounded through the seventh resistor R7.
[0031] In this embodiment, the NPN transistor U3 and the laser tube M1 together form a constant power circuit (APC). When the current flowing through the PD pin of the laser tube M1 increases, the current flowing through the LD pin of the laser tube M1 decreases, and when the current flowing through the PD pin of the laser tube M1 decreases, the current flowing through the LD pin of the laser tube M1 increases, so that the laser module always operates at a constant power. The specific working principle is as follows:
[0032] On one hand, when the S pin of the camera control switch chip U1 is at a low level, the D- pin of the switch chip U1 outputs a high-level signal LAS_POWER, energizing the common power supply terminal of the laser tube M1. Simultaneously, pin 5 of the NPN transistor U3 is at a high level due to the third resistor R3, creating a voltage difference between pins 4 and 5 of the NPN transistor U3, causing pins 3 and 4 of the NPN transistor U3 to conduct. On the other hand, the current at the PD pin of the laser tube M1 changes with the overall light intensity of the laser tube M1. For example, when the overall light intensity of laser tube M1 increases, the current flowing through its PD pin also increases. This leads to an increase in the current flowing through resistor R7 and pin 2 of NPN transistor U3. A voltage difference forms between pins 2 and 1 of NPN transistor U3, causing pins 1 and 6 of NPN transistor U3 to conduct. Due to the current shunting effect between pins 1 and 6 of NPN transistor U3, the current flowing from the D-pin of switching chip U1 to pin 5 of NPN transistor U3 decreases, ultimately reducing the current flowing through the LD pin of laser tube M1. Similarly, when the overall light intensity of laser tube M1 decreases, the current through its PD pin also decreases, ultimately increasing the current flowing through the LD pin of laser tube M1, ensuring the laser module always operates at a constant power.
[0033] In this embodiment, as Fig. 3As shown, when the OE pin of switch chip U1 is high, switch chip U1 is in the off state, and the camera, fill light F1, and laser tube M1 cannot be started and enter the working state. When the CPU sends the LED_LAS_EN signal to control the OE pin of switch chip U1 to a low level, switch chip U1 is turned on and enters the working state. At this time, when the camera captures an image, it sends the STORBE signal to make the S pin of switch chip U1 high. Then, the D+ pin of switch chip U1 sends the LED_EN signal to the B2 pin of fill light power chip U2 to control the B2 pin of fill light power chip U2 to a high level, so that fill light F1 is turned on and enters the working state. At this time, the aiming module does not work.
[0034] When the camera stops capturing images (i.e. no STORBE signal is emitted), the S pin of the switch chip U1 goes low, causing the B2 pin of the supplementary light power chip U2 to go low, at which point the supplementary light F1 is turned off. At the same time, the D-pin of the switch chip U1 emits the LAS_POWER signal to control the laser tube M1 to start aiming at the target object and control the laser module to operate stably with constant power.
[0035] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and not to limit it. Although this utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this utility model.
Claims
1. An image acquisition device, characterized in that, include: CPU, power supply, switching chip, camera, fill light module, aiming module; The switching chip is connected to the CPU, camera, fill light module, and aiming module respectively; the power supply is connected to the switching chip and fill light module respectively. The switch chip has ten pins: the S pin is connected to the camera, the OE pin is connected to the CPU, the HSD1+ pin, GND pin, and HSD2- pin are grounded, the HSD2+ pin, HSD1- pin, and V+ pin are connected to the power supply, the D+ pin is connected to the fill light module, and the D- pin is connected to the aiming module.
2. The image acquisition device according to claim 1, characterized in that, The supplementary lighting module includes a supplementary lighting power chip and a supplementary light. The supplementary lighting power chip has eight pins. Its B2 pin is connected to the D+ pin of the switch chip, the D2 pin and C2 pin are connected to the CPU, the A2 pin and B1 pin are connected to the power supply, the C1 pin and A1 pin are grounded, and the D1 pin is connected to the supplementary light.
3. The image acquisition device according to claim 1, characterized in that, The aiming module includes an NPN transistor and a laser tube. The first and fourth pins of the NPN transistor are grounded, the fifth and sixth pins are connected to the D-pin of the switching chip, the second pin is connected to the PD pin of the laser tube, the third pin is connected to the LD pin of the laser tube, and the common power supply terminal of the laser tube is connected to the D-pin of the switching chip.
4. The image acquisition device according to claim 1, characterized in that, The HSD1+ pin of the switching chip is grounded through a first resistor, the HSD2- pin is grounded through a second resistor, and the V+ pin is also grounded through a first capacitor.
5. An image acquisition device according to claim 2, characterized in that, The B1 pin of the supplementary lighting power chip is connected to the power supply through a first inductor, the A2 pin of the supplementary lighting power chip is grounded through a second capacitor, and the C1 pin of the supplementary lighting power chip is grounded through a third capacitor.
6. The image acquisition device according to claim 2, characterized in that, The B2 pin of the supplementary lighting power chip is connected to the D+ pin of the switching chip through a fifth resistor, and the line between the B2 pin of the supplementary lighting power chip and the fifth resistor is also grounded through a fourth resistor.
7. The image acquisition device according to claim 3, characterized in that, The 5th and 6th pins of the NPN transistor are both connected to the D-pin of the switching chip through a third resistor.
8. An image acquisition device according to claim 3, characterized in that, The fourth pin of the NPN transistor is grounded through the sixth resistor, and the second pin of the NPN transistor is grounded through the seventh resistor.