Substrate and bonding type packaging structure
By setting an adhesive blocking structure on the solder resist layer of the substrate, the problem of adhesive overflow affecting the wire bonding pads is solved, the reliability of the solder joints is improved, it is suitable for existing packaging processes, and does not affect chip design or equipment investment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SUZHOU FOREX INFORMATION TECH CO LTD
- Filing Date
- 2025-04-14
- Publication Date
- 2026-05-05
AI Technical Summary
In wire bonded ball array (WBBGA) packages, glue overflow can contaminate the wire bonding pads, affecting the reliability of the solder joints between the wire bonding pads and the bonding wires, leading to poor wire bonding.
An adhesive blocking structure, including a raised ring or annular groove, is provided on the solder resist layer of the substrate to surround the chip bonding area, restricting adhesive from overflowing to the wire bonding pads and improving the connection reliability between the pads and the bonding wires.
It effectively solves the problem of glue overflow affecting wire bonding pads, improves solder joint reliability, and does not require changes to chip design or additional equipment investment, making it suitable for existing packaging processes.
Smart Images

Figure CN224205651U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of semiconductor technology, and in particular to a substrate and a wire bonding packaging structure. Background Technology
[0002] In a wire bonded ball array (WBBGA) package, the chip is bonded to the top of the substrate using bonding and wire bonding (WB) technology. Figure 1 This is a top view of an existing WBBGA package structure. Figure 2 This is a cross-sectional view of an existing WBBGA package structure. (Reference) Figure 1 and Figure 2 As shown, the front side of the substrate 100 has a chip bonding area and a wire bonding pad 101 located on the side of the chip bonding area. The back side of the chip 200 is bonded to the chip bonding area of the substrate 100 by adhesive 300. The chip bonding pad 201 on the front side of the chip 200 is electrically connected to the wire bonding pad 101 on the substrate 100 by bonding wire 400.
[0003] However, when using glue 300 to attach chip 200, because glue 300 has a certain degree of fluidity, such as... Figure 1 and Figure 2 As shown, the adhesive 300 will overflow from the side of the chip 200 and spread to the surface of the wire bonding pad 101 on the side of the chip 200. That is, the adhesive 300 overflows and contaminates the wire bonding pad 101. This will affect the subsequent wire bonding of the wire bonding pad 101. If it causes poor wire bonding, it will affect the reliability of the solder joint between the wire bonding pad 101 and the corresponding bonding wire 400, or even directly cause the wire bonding pad 101 to be unable to be bonded. Utility Model Content
[0004] One of the purposes of this invention is to solve the problem of glue overflow affecting wire bonding pads, improve the reliability of solder joints between wire bonding pads and corresponding bonding wires, and without changing the chip design or the packaging plant's process.
[0005] To achieve the above objectives, this utility model provides a substrate. The front side of the substrate includes a chip bonding area and multiple wire bonding pads located on the side of the chip bonding area. The back side of the chip is bonded to the chip bonding area with adhesive. The front side of the chip has multiple chip pads, which are electrically connected to the corresponding wire bonding pads via bonding wires. The front side of the substrate has a solder resist layer, which includes an adhesive blocking structure surrounding the chip bonding area. The wire bonding pads are located outside the adhesive blocking structure, which is a raised ring or an annular groove.
[0006] Optionally, the top surface of the raised ring is higher than the top surface of the wire bonding pad.
[0007] Optionally, the protruding height of the protruding ring is greater than or equal to 5 μm and less than or equal to 10 μm.
[0008] Optionally, the material of the protruding ring is green oil.
[0009] Optionally, the depth of the annular groove is less than the thickness of the solder mask layer.
[0010] Optionally, the glue blocking structure includes a plurality of annular grooves.
[0011] Optionally, the annular groove is in a double-square shape.
[0012] Optionally, the solder mask layer has a plurality of openings, and the plurality of openings expose the plurality of wire bonding pads.
[0013] The present utility model further provides a wire bonding type packaging structure. The wire bonding type packaging structure includes: a substrate, the front surface of the substrate includes a chip bonding area and a plurality of wire bonding pads located on the side of the chip bonding area; a chip, the back surface of the chip is bonded to the chip bonding area by glue, the front surface of the chip has a plurality of chip pads, and the chip pads are electrically connected to the corresponding wire bonding pads through bonding wires; wherein, the front surface of the substrate has a solder mask layer, the solder mask layer includes a glue blocking structure surrounding the chip bonding area, the wire bonding pads are located outside the glue blocking structure, and the glue blocking structure is a protruding ring or an annular groove.
[0014] Optionally, the packaging structure includes a plurality of solder balls, and the plurality of solder balls are welded on the back surface of the substrate and are arranged in an array on the back surface of the substrate.
[0015] In the substrate and the wire bonding type packaging structure provided by the present utility model, the front surface of the substrate includes a chip bonding area and a plurality of wire bonding pads located on the side of the chip bonding area, the back surface of the chip is bonded to the chip bonding area by glue, the front surface of the chip has a plurality of chip pads, and the chip pads are electrically connected to the corresponding wire bonding pads through bonding wires. Among them, the front surface of the substrate has a solder mask layer, the solder mask layer includes a glue blocking structure surrounding the chip bonding area, the wire bonding pads are located outside the glue blocking structure, and the glue blocking structure is a protruding ring or an annular groove. The glue blocking structure can limit the overflow of glue onto the wire bonding pads, effectively solve the problem of the influence of glue overflow on the wire bonding of the wire bonding pads, improve the problem of poor wire bonding of the wire bonding pads, and improve the solder joint reliability between the wire bonding pads and the corresponding bonding wires; in this application, by changing the structure of the solder mask layer of the substrate to form a glue blocking structure, it can be realized in the daily solder mask process of the substrate manufacturing factory, without the need for additional equipment investment, which is friendly to the factory implementation, has little impact on the packaging operation, has no impact on the chip design, and has no impact on the product performance or heat dissipation. Attached Figure Description
[0016] Figure 1 This is a top view of an existing WBBGA package structure.
[0017] Figure 2 This is a cross-sectional view of an existing WBBGA package structure.
[0018] Figure 3 This is a top view of a substrate provided in an embodiment of the present invention.
[0019] Figure 4 This is a cross-sectional schematic diagram of a wire bonding packaging structure provided in an embodiment of the present invention.
[0020] Figure 5 This is a cross-sectional schematic diagram of a wire bonding packaging structure provided in another embodiment of the present invention.
[0021] Explanation of reference numerals in the attached figures: 100-substrate; 101-wire bonding pad; 102-solder resist layer; 102a-adhesive barrier structure; 103-metal trace layer; 104-dielectric layer; 105-solder ball; 200-chip; 201-chip pad; 300-adhesive; 400-bonding wire. Detailed Implementation
[0022] To address the issue of adhesive overflow affecting wire bonding pads, this application proposes a substrate and a wire bonding type packaging structure including the substrate. The solder resist layer on the front side of the substrate includes an adhesive blocking structure that surrounds the chip bonding area on the front side of the substrate. This way, even if adhesive used for bonding the chip overflows, the adhesive blocking structure can limit the adhesive from overflowing onto the wire bonding pads, effectively solving the problem of adhesive overflow affecting wire bonding pads. Furthermore, the adhesive blocking structure can be implemented in the daily solder resist process of the substrate manufacturer without the need for additional equipment investment, making it factory-friendly. It also has minimal impact on the packaging operation, chip design, product performance, or heat dissipation.
[0023] The substrate and wire bonding packaging structure proposed in this utility model will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this utility model will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of this utility model.
[0024] The terminology used in this invention is for the purpose of describing particular embodiments only and is not intended to limit the invention. Unless otherwise defined in this application, the technical or scientific terms used in this invention should be understood in their ordinary sense by one of ordinary skill in the art to which this invention pertains. "A plurality of" or "several" means two or more. Unless otherwise indicated, terms such as "upper / upper layer" and / or "lower / lower layer" are for ease of description only and are not limited to a location or spatial orientation. Terms such as "comprising" or "including" mean that the elements or structures preceding "comprising" or "including" encompass the elements or structures listed following "comprising" or "including" and their equivalents, and do not exclude other elements or structures. Terms such as "connected" or "linked" are not limited to physical or mechanical connections and can include electrical connections, whether direct or indirect. The singular forms "a," "described," and "the" used in this specification and the appended claims are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any or all possible combinations of one or more associated listed items.
[0025] Figure 3 This is a top view of a substrate provided in an embodiment of the present invention. Figure 4 This is a cross-sectional schematic diagram of a wire bonding packaging structure provided in an embodiment of the present invention. Figure 5 This is a cross-sectional schematic diagram of a wire bonding packaging structure provided in another embodiment of the present invention.
[0026] like Figure 3 , Figure 4 and Figure 5 As shown, the front side of the substrate 100 provided in this embodiment includes a chip bonding area and a plurality of wire bonding pads 101 located on the side of the chip bonding area. The back side of the chip 200 is bonded to the chip bonding area with adhesive 300. The front side of the chip 200 has a plurality of chip pads 201. The chip pads 201 are electrically connected to the corresponding wire bonding pads 101 through bonding wires 400. The front side of the substrate 100 has a solder resist layer 102. The solder resist layer 102 includes an adhesive blocking structure 102a surrounding the chip bonding area. The wire bonding pads 101 are located outside the adhesive blocking structure 102a. The adhesive blocking structure 102a restricts the adhesive 300 from overflowing onto the wire bonding pads 101. The adhesive blocking structure 102a is a raised ring or an annular groove.
[0027] For example, refer to Figure 3 and Figure 4As shown, the substrate 100 includes multiple interconnected metal trace layers 103. The top surface of the top metal trace layer and the bottom surface of the bottom metal trace layer both have solder mask layers 102. The metal trace layers 103 can be isolated from each other by dielectric layers 104. Multiple wire bonding pads 101 on the front side of the substrate may be part of the top metal trace layer. The solder mask layer 102 on the front side of the substrate 100 has multiple openings exposing the multiple wire bonding pads 101. The solder mask layer 102 on the back side of the substrate 100 may have openings exposing part of the bottom metal trace layer, so that solder balls 105 can be soldered onto the back side of the substrate 100 during the packaging process.
[0028] For example, the wire bonding pads 101 and the metal trace layer 103 may be made of the same material, such as Cu, but are not limited thereto. The dielectric layer 104 may be a resin layer, for example. For example, a method for forming multiple metal trace layers may include: laminating the dielectric layer 104 and a copper foil; performing a conformal mask process; performing a laser drilling process to form laser holes exposing the metal; filling the laser holes with copper plating and forming a metal material layer on the dielectric layer 104; patterning the metal material layer to form the metal trace layer; repeating the lamination, laser drilling, copper plating, and metal material layer patterning process steps to form a set number of metal trace layers 103; and forming a solder mask layer 102 on the surface of the multiple metal trace layers 103.
[0029] In this application, the surface of the wire bonding pad 101 may have a gold layer, that is, the wire bonding pad 101 may be a gold finger, which can improve the welding reliability of the bonding wire 400 and the wire bonding pad 101.
[0030] In one embodiment of this application, reference is made to... Figure 3 and Figure 4 As shown, the adhesive blocking structure 102a is a raised ring. When adhesive overflow occurs during the die-attach process, the raised ring acts as a dam to prevent adhesive 300 from flowing onto the wire bonding pad 101. The top surface of the raised ring is higher than other parts of the solder mask layer 102. For example, the protrusion height of the raised ring is greater than or equal to 5 μm and less than or equal to 10 μm, but is not limited thereto. In this embodiment, the top surface of the raised ring can be higher than the top surface of the wire bonding pad 101, and the top surface of other parts of the solder mask layer 102 can be flush with the top surface of the wire bonding pad 101. In this way, the raised ring can effectively prevent adhesive 300 from overflowing onto the top surface of the wire bonding pad 101.
[0031] For example, adhesive 300 includes, but is not limited to, silver paste. Adhesive 300 includes, but is not limited to, epoxy resin. When the epoxy resin in adhesive 300 flows onto the wire bonding pad 101 and cures, it may cover part of the surface of the wire bonding pad 101, causing poor wire bonding of the wire bonding pad 101.
[0032] It should be noted that in this embodiment, when the raised ring is used as the glue blocking structure 102a, the raised ring is part of the solder resist layer 102, and the material of the raised ring is the same as the material of the solder resist layer 102. For example, the materials of the raised ring and the solder resist layer are both green oil.
[0033] In another embodiment of this application, such as Figure 5 As shown, the adhesive blocking structure 102a can be an annular groove. When adhesive overflow occurs during the chip 200 bonding process, the annular groove can store the overflowing adhesive 300, thereby preventing the adhesive 300 from overflowing onto the wire bonding pad 101. In this embodiment, the depth of the annular groove is less than the thickness of the solder resist layer 102, which ensures that the solder resist layer 102 can protect the metal layer in the substrate 100. In some embodiments, the adhesive blocking structure 102a may include multiple annular grooves, all of which are arranged around the chip bonding area. The depth of the multiple annular grooves may be the same, and the width of the multiple annular grooves may be the same or different.
[0034] It should be noted that the conventional process for fabricating the solder mask 102 during the normal substrate manufacturing process includes: mechanical processing; rolling on green solder mask; leveling to make the surface of the green solder mask horizontal; UV exposure of the green solder mask; development to complete the patterning of the green solder mask; and curing the remaining green solder mask to form the solder mask 102.
[0035] In one embodiment, if a raised ring is used as the adhesive blocking structure 102a, during the fabrication of the solder mask layer 102, a basic solder mask layer can first be formed on the metal trace layer 103, covering a portion of the metal trace layer 103 and exposing multiple bonding pads 101. Then, green solder mask is rolled onto the basic solder mask layer, the height of which is selected according to the height of the raised ring. The green solder mask on the basic solder mask layer is then exposed, developed, and cured to form the raised ring. Thus, the solder mask layer 102 includes the basic solder mask layer and the raised ring located on the basic solder mask layer. In another embodiment, a green solder mask material layer can be formed on the metal trace layer 103, the thickness of which includes the height of the raised ring. By controlling the development time of the green solder mask material layer, a solder mask layer including the raised ring is formed, and then an opening exposing the bonding pads 101 is created in the solder mask layer.
[0036] If an annular groove is used as the adhesive blocking structure 102a, when making the solder resist layer 102, it is only necessary to add the pattern of the annular groove in the UV exposure stage. Moreover, by controlling the exposure and / or development time, the formed solder resist layer 102 can have an annular groove as the adhesive blocking structure 102a.
[0037] It should be noted that the adhesive blocking structure 102a in this application is formed by changing the structure of the solder resist layer 102, and can be implemented in the daily solder resist process of the substrate manufacturing plant without the need for additional equipment investment. It is friendly to the plant implementation, has little impact on the packaging operation, and has no impact on chip design, product performance or heat dissipation.
[0038] This utility model also provides a wire bonding type packaging structure, which includes the above-mentioned substrate.
[0039] For details, please refer to Figures 3 to 5 As shown, the wire bonding package structure includes a substrate 100 and a chip 200. The front side of the substrate 100 includes a chip bonding area and a plurality of wire bonding pads 101 located on the side of the chip bonding area. The back side of the chip 200 is bonded to the chip bonding area with adhesive 300. The front side of the chip 200 has a plurality of chip pads 201, and the chip pads 201 are electrically connected to the corresponding wire bonding pads 101 through bonding wires 400. The front side of the substrate 100 has a solder resist layer 102, which includes an adhesive blocking structure 102a surrounding the chip bonding area. The wire bonding pads 101 are located outside the adhesive blocking structure 102a, and the adhesive blocking structure 102a is a raised ring or an annular groove.
[0040] For example, the wire bonding package structure includes, but is not limited to, a wire bonding BGA package structure. The package structure may also include a plurality of solder balls 105, which are soldered to the back side of the substrate 100 and arranged in an array on the back side of the substrate 100 to form a ball grid array. The material of the solder balls 105 includes, but is not limited to, tin. All of the solder balls 105 are electrically connected to the metal trace layer 103 inside the substrate 100.
[0041] The packaging structure may further include a molding compound (not shown in the figure), which may be formed on the front side of the substrate 100, covering the front side of the substrate 100, the chip 200 and the bonding wire 400.
[0042] For example, the steps of forming the package structure may include: providing a substrate 100, wherein the solder resist layer 102 of the substrate 100 includes an adhesive blocking structure 102a; applying adhesive 300 to the chip bonding area of the substrate 100, bonding the chip 200 with its back side facing down onto the substrate 200, and curing the adhesive 300. During the bonding process of the chip 200, the adhesive 300 may overflow from the side of the chip 200. The adhesive blocking structure 102a can restrict the adhesive 300 from flowing onto the wire bonding pads 101 of the substrate 100. The adhesive 300 includes, but is not limited to, silver paste; bonding wires 400 to the chip bonding pads 201 and the corresponding wire bonding pads 101 on the front side of the chip 100. For example, one end of the bonding wire 400 is bonded to the chip bonding pad 201 and the other end is bonded to the wire bonding pad 101; forming a molding compound on the front side of the substrate 100; and soldering solder balls 105 to the back side of the substrate 100.
[0043] In the substrate 100 and wire bonding packaging structure including the substrate 100 provided by this utility model, the front side of the substrate 100 includes a chip bonding area and a plurality of wire bonding pads 101 located on the side of the chip bonding area. The back side of the chip 200 is bonded to the chip bonding area by adhesive 300. The front side of the chip 200 has a plurality of chip pads 201, and the chip pads 201 are electrically connected to the corresponding wire bonding pads 101 by bonding wires 400. The front side of the substrate 100 has a solder resist layer 102, and the solder resist layer 102 includes an adhesive blocking structure 102a surrounding the chip bonding area. The wire bonding pads 101 are located outside the adhesive blocking structure 102a. The adhesive blocking structure 102a is a raised ring or an annular groove. 102a can limit the overflow of adhesive 300 onto the wire bonding pad 101, effectively solving the problem of adhesive overflow affecting the wire bonding of the wire bonding pad 101, improving the problem of poor wire bonding, and improving the reliability of the solder joint between the wire bonding pad 101 and the corresponding bonding wire 300. This application forms the adhesive blocking structure 102a by changing the structure of the substrate solder resist layer, which can be implemented in the daily solder resist process of the substrate manufacturing plant without the need for additional equipment investment, making it factory-friendly. The adhesive blocking structure 102a is part of the solder resist layer 102 on the surface of the substrate and has no impact on the internal wiring of the substrate 100. The adhesive blocking structure 102a is small in size, has little impact on the molding station in the packaging operation, and has no impact on chip design, product performance, or heat dissipation.
[0044] It is worth noting that the foregoing embodiments and illustrations of this utility model use WBBGA (Wire Bonding Ball Grid Array) packaging as an example, but this utility model is not limited to this. It is applicable to any packaging structure that includes wire bonding (WB) type chips, such as LGA (Land Grid Array) packaging.
[0045] It should be noted that this specification adopts a progressive approach. The wire bonding packaging structure described later focuses on the differences between it and the substrate described earlier. For the same or similar parts, please refer to each other.
[0046] The above description is only a description of the preferred embodiment of the present utility model and is not intended to limit the scope of the present utility model. Any person skilled in the art can make possible changes and modifications to the technical solution of the present utility model by using the methods and techniques disclosed above without departing from the spirit and scope of the present utility model. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present utility model without departing from the content of the technical solution of the present utility model shall fall within the protection scope of the technical solution of the present utility model.
Claims
1. A substrate, characterized in that, The front side of the substrate includes a chip bonding area and a plurality of wire bonding pads located on the side of the chip bonding area. The back side of the chip is bonded to the chip bonding area by glue. The front side of the chip has a plurality of chip pads, and the chip pads are electrically connected to the corresponding wire bonding pads through bonding wires. Among them, the front side of the substrate has a solder mask layer, and the solder mask layer includes a glue blocking structure surrounding the chip bonding area. The wire bonding pads are located outside the glue blocking structure, and the glue blocking structure is a raised ring or an annular groove.
2. The substrate as described in claim 1, characterized in that, The top surface of the raised ring is higher than the top surface of the wire bonding pad.
3. The substrate as described in claim 1, characterized in that, The protruding height of the raised ring is greater than or equal to 5 μm and less than or equal to 10 μm.
4. The substrate as claimed in claim 1, characterized in that, The material of the raised ring is green oil.
5. The substrate as claimed in claim 1, characterized in that, The depth of the annular groove is less than the thickness of the solder mask layer.
6. The substrate as claimed in claim 1, characterized in that, The glue blocking structure includes a plurality of annular grooves.
7. The substrate as claimed in claim 1, characterized in that, The annular groove is in a double-loop shape.
8. The substrate as claimed in claim 1, characterized in that, The solder mask layer has a plurality of openings, and the plurality of openings expose the plurality of wire bonding pads.
9. A wire bonding type packaging structure, characterized in that, Comprising: A substrate, the front side of the substrate includes a chip bonding area and a plurality of wire bonding pads located on the side of the chip bonding area; and A chip, the back side of the chip is bonded to the chip bonding area by glue. The front side of the chip has a plurality of chip pads, and the chip pads are electrically connected to the corresponding wire bonding pads through bonding wires; Among them, the front side of the substrate has a solder mask layer, and the solder mask layer includes a glue blocking structure surrounding the chip bonding area. The wire bonding pads are located outside the glue blocking structure, and the glue blocking structure is a raised ring or an annular groove.
10. The wire bonding packaging structure as described in claim 9, characterized in that, The packaging structure includes a plurality of solder balls, and the plurality of solder balls are welded on the back side of the substrate and are arranged in an array on the back side of the substrate.