A novel low-power circuit for HDMI interfaces

Abstract

This utility model relates to the field of HDMI interface technology and discloses a novel low-power circuit for an HDMI interface, comprising: an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit. The output terminal of the HDMI signal input circuit is connected to the power input terminal of the HDMI cable insertion detection circuit, the enable terminal of the HDMI cable insertion detection circuit is connected to the enable terminal of the power module circuit, the reset terminal of the HDMI cable insertion detection circuit is connected to the reset terminal of the video processing module circuit, the signal terminal of the HDMI signal input circuit is connected to the signal terminal of the video processing module, the input terminal of the power module circuit is connected to the power output terminal of the HDMI cable insertion detection circuit, and the output terminal of the power module circuit is connected to the power input terminal of the video processing module. This circuit achieves a low-power state when no HDMI signal is inserted and only enters the working state when an HDMI signal is inserted, thereby reducing the overall power consumption of the HDMI module.

Description

Technical Field

[0001] This utility model relates to the field of HDMI interface technology, and specifically to a novel low-power circuit for HDMI interfaces. Background Technology

[0002] High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission interface that can send uncompressed audio and video signals. During normal use, HDMI interfaces are frequently plugged and unplugged, resulting in frequent contact with the external environment, making them susceptible to static electricity. Furthermore, HDMI interfaces on the market exhibit some power loss, primarily due to the relatively high power consumption of the HDMI interface circuitry. The HDMI interface circuitry mainly comprises three core modules: signal transmission, hot-plug detection, and I2C communication, achieving lossless transmission of high-definition video and audio through differential signal transmission.

[0003] There is a certain energy consumption issue in the HDMI interface circuit used in normal times. Specifically, the circuit is still working when the HDMI interface is not plugged in, which leads to some wasted power. If the circuit could be made to stop working when the HDMI interface is not plugged in, energy consumption would be reduced.

[0004] Therefore, existing HDMI interface technology needs further improvement to address the above issues. Utility Model Content

[0005] The purpose of this invention is to provide a low-power circuit for an HDMI interface, enabling the device to operate in a low-power state when no HDMI signal is inserted, and only entering the working state when an HDMI signal is inserted, thereby reducing the overall power consumption of the HDMI module. By rationally designing the HDMI interface technology and employing an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit, the device can achieve a low-power state when no HDMI signal is inserted, and only enter the working state when an HDMI signal is inserted, thus reducing the overall power consumption of the HDMI module.

[0006] The specific technical solution of this utility model is as follows:

[0007] A novel low-power circuit for an HDMI interface includes: an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit. The power output terminal of the HDMI signal input circuit is electrically connected to the power input terminal of the HDMI cable insertion detection circuit. The enable terminal of the HDMI cable insertion detection circuit is electrically connected to the enable terminal of the power module circuit. The reset terminal of the HDMI cable insertion detection circuit is electrically connected to the reset terminal of the video processing module circuit. The signal terminal of the HDMI signal input circuit is electrically connected to the signal terminal of the video processing module. The power input terminal of the power module circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit, and the power output terminal of the power module circuit is electrically connected to the power input terminal of the video processing module.

[0008] The power module circuit includes a high-voltage power supply circuit and a low-voltage power supply circuit. The power input terminal of the high-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The power input terminal of the low-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The enable terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the enable terminals of the HDMI cable insertion detection circuit. The power output terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the power input terminal of the video processing module.

[0009] Furthermore, the HDMI cable insertion detection circuit includes an NPN circuit and a PMOS circuit. The emitter of the NPN circuit is grounded, the collector of the NPN circuit is electrically connected to the gate of the PMOS circuit, the base of the NPN circuit is electrically connected to the power output terminal of the HDMI signal input circuit, the drain of the PMOS circuit is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit, and the source of the PMOS circuit is electrically connected to the power input terminal of the power module circuit.

[0010] Furthermore, the NPN circuit includes resistors R11 and R10 and an NPN transistor Q2. One end of resistor R11 is electrically connected to the power output terminal of the HDMI signal input circuit, and the other end of resistor R11 is electrically connected to one end of resistor R10 and the base of NPN transistor Q2. The emitter of NPN transistor Q2 and the other end of resistor R10 are grounded together, and the collector of NPN transistor Q2 is electrically connected to the gate of the PMOS circuit.

[0011] Furthermore, the PMOS circuit includes resistors R8 and R5 and a PMOS transistor Q1. The collector of the NPN transistor Q2 is electrically connected to one end of resistor R8, and the other end of resistor R8 is electrically connected to one end of resistor R5 and the gate of the PMOS transistor Q1. The other end of resistor R5 is electrically connected to the power input terminal of the power module circuit and the source of the PMOS transistor Q1. The drain of the PMOS transistor Q1 is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit.

[0012] Furthermore, the high-voltage power supply circuit includes a parallel input capacitor, resistors R18, R15, and R14, chip U2, capacitor C2, inductor L1, capacitor C8, resistors R13, R16, C3, and R17, and a parallel output capacitor. One end of the parallel input capacitor is electrically connected to the power output terminal of the HDMI cable insertion detection circuit, one end of resistor R14, terminal "4" of chip U2, terminal "5" of chip U2, and terminal "6" of chip U2. The other end of the parallel input capacitor is grounded. The other end of resistor R14 is electrically connected to terminal "11" of chip U2. Terminal "12" of chip U2 is electrically connected to one end of resistor R18 and one end of resistor R15. The other end of resistor R18 is grounded. The other end of resistor R15 is electrically connected to the HDMI cable insertion point. The enable terminal of the input detection circuit is connected to the ground of the chip U2 "1" terminal and the chip U2 "3" terminal. The chip U2 "8" terminal is electrically connected to one end of the capacitor C8, and the other end of the capacitor C8 is grounded. The chip U2 "9" terminal is electrically connected to one end of the resistor R16, one end of the resistor R13 and one end of the resistor R17. The other end of the resistor R16 is grounded. The other end of the resistor R13 is electrically connected to one end of the inductor L1, one end of the capacitor C3, one end of the parallel output capacitor and the power input terminal of the video processing module. The other end of the parallel output capacitor is grounded. The other end of the inductor L1 is electrically connected to the chip U2 "2" terminal and one end of the capacitor C2. The other end of the capacitor C2 is electrically connected to the chip U2 "7" terminal. The other end of the capacitor C3 is electrically connected to the other end of the resistor R17.

[0013] Furthermore, the parallel input capacitors include capacitors C4 and C5, which are connected in parallel. This parallel input capacitor configuration can reduce equivalent resistance, reduce energy consumption, reduce ripple in the input power supply, and allow the other capacitor to continue operating normally to compensate for a failed capacitor.

[0014] Furthermore, the parallel output capacitors include capacitors C6, C9, and C7, which are connected in parallel. This parallel output capacitor configuration can reduce equivalent resistance, reduce energy consumption, reduce ripple in the output power supply, allow one capacitor to compensate for a failure by having another continue operating normally, and distribute the load of the output voltage and current more evenly, resulting in a more stable output voltage.

[0015] Further, the low-voltage power supply circuit includes a low-voltage parallel input capacitor, resistors R22, R23, and R20, chip U3, inductor L2, resistors R21 and R24, and a low-voltage parallel output capacitor. One end of the low-voltage parallel input capacitor is electrically connected to the power output terminal of the HDMI cable insertion detection circuit, one end of resistor R20, and terminal "5" of chip U3. The other end of the low-voltage parallel input capacitor is grounded. The other end of resistor R20 is electrically connected to terminal "3" of chip U3. Terminal "4" of chip U3 is electrically connected to one end of resistor R22 and one end of resistor R23. The other end of resistor R22 is grounded, the other end of resistor R23 is electrically connected to the enable terminal of the HDMI cable insertion detection circuit, terminal 7 of chip U3 is grounded, terminal 1 of chip U3 is electrically connected to one end of resistor R24 ​​and one end of resistor R21, the other end of resistor R24 ​​is grounded, terminal 2 of chip U3 is electrically connected to the other end of resistor R21, one end of low-voltage parallel output capacitor, one end of inductor L2 and the power input terminal of the video processing module, the other end of low-voltage parallel output capacitor is grounded, and the other end of inductor L2 is electrically connected to terminal 6 of chip U3.

[0016] Furthermore, the low-voltage parallel input capacitor includes capacitor C10 and capacitor C11, which are connected in parallel. This parallel input capacitor can reduce equivalent resistance, reduce energy consumption, reduce ripple in the input power supply, and also allow the other capacitor to continue operating normally to compensate for the failure of one capacitor.

[0017] Furthermore, the low-voltage parallel output capacitor includes capacitors C12, C13, C14, and C15, which are connected in parallel. This parallel output capacitor configuration can reduce equivalent resistance, lower energy consumption, reduce ripple in the output power supply, allow one capacitor to compensate for a failure by continuing to operate normally, and distribute the load of the output voltage and current more evenly, resulting in a more stable output voltage.

[0018] Further, the video processing module circuit includes chip U1, resistor R1, capacitor C1, resistors R2, R3, R6, R7, R19, R25, R26, R27, crystal oscillator Y1, capacitors C16, C17, R9, and R12. Terminal "47" of chip U1 is electrically connected to one end of capacitor C1 and one end of resistor R1. The other end of resistor R1 is electrically connected to the drain of PMOS transistor Q1. Terminal "19" of chip U1 and the other end of capacitor C1 are grounded together. Terminal "21" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R2. One end of resistor R3 is electrically connected to the signal terminal of the HDMI signal input circuit, and the other end of resistor R3 is grounded. Terminal "16" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R6. Terminal "17" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R7. The signal terminals are interconnected. Terminal 11 of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R12. Terminal 12 of chip U1 is connected to terminal 20 of chip U1 through resistor R9. Terminal 49 of chip U1 is connected to the power output terminal of the power module circuit through resistor R19. Terminal 38 of chip U1 is electrically connected to one end of resistor R25, terminal 3 of crystal oscillator Y1, and one end of capacitor C16. The other end of capacitor C16 is grounded. Terminal 39 of chip U1 is electrically connected to the other end of resistor R25, terminal 1 of crystal oscillator Y1, and one end of capacitor C17. The other end of capacitor C17 is grounded. Terminal 2 of crystal oscillator Y1 is grounded. Terminal 18 of chip U1 is electrically connected to one end of resistor R27 and one end of resistor R26. The other end of resistor R27 is grounded. The other end of resistor R26 is electrically connected to the power output terminal of the HDMI cable insertion detection circuit.

[0019] The crystal oscillator Y1, capacitor C16, capacitor C17 and resistor R25 can form the clock circuit of the video processor.

[0020] The resistor R1 and capacitor C1 can form the reset circuit of the video processor.

[0021] Furthermore, the HDMI signal input circuit includes an HDMI interface and a resistor R4. The HDMI interface terminals "20", "21", "22" and "23" are grounded together. The HDMI interface terminals "2", "5", "8", "11" and "17" are also grounded together. The HDMI interface terminals "1", "3", "4", "6", "7", "9", "10", "12", "13", "15", "16" and "19" are electrically connected to the signal terminals of the video processing module. The HDMI interface terminal "18" is connected to the power input terminal of the HDMI cable insertion detection circuit through the resistor R4.

[0022] Furthermore, the chip U1 is selected as the IT66021FN chip; the IT66021FN is a single-port HDMI receiver that can support multiple video output formats; the reset circuit of R1C1 will perform a reset operation on the video processor; the clock circuit consisting of crystal oscillator Y1, capacitor C16, capacitor C17 and resistor R25 can provide a stable clock frequency for the video processor, enabling the video processor to work stably.

[0023] Furthermore, the chip U2 is selected as the SY8368AQQC chip; the SY8368AQQC chip is a high-efficiency synchronous buck converter. When a high level is obtained from the HDMI cable insertion detection circuit, the external output will be disconnected, so that the video processor does not work and the circuit power consumption is reduced; when a low level is obtained from the HDMI cable insertion detection circuit, the external output will be normal, powering the video processor and enabling the video processor to work.

[0024] Furthermore, the chip U3 is selected as the SY8843L model chip; the SY8843L chip is a high-efficiency synchronous buck converter. When a low level is obtained from the HDMI cable insertion detection circuit, the external output will be disconnected, so that the video processor does not work and the circuit power consumption is reduced; when a high level is obtained from the HDMI cable insertion detection circuit, the external output will be normal, powering the video processor and enabling the video processor to work.

[0025] Furthermore, the PMOS transistor Q1 is selected as a WPM3407-3 / TR model PMOS transistor. This WPM3407-3 / TR model PMOS transistor realizes voltage regulation and current control through the on and off of the control circuit, and also provides high and low level enable terminal voltages for low voltage power supply circuits and high voltage power supply circuits.

[0026] Furthermore, the NPN transistor is selected as the MMBT3904 model NPN transistor. Beneficial effects

[0027] This invention optimizes the HDMI interface technology by employing an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit. This allows the device to operate at low power when no HDMI signal is inserted, only activating when an HDMI signal is inserted, thus reducing the overall power consumption of the HDMI module. In other words, this invention ensures that the corresponding video processor module is powered off when the HDMI cable is not inserted, and the HDMI module only operates normally when an HDMI cable is inserted, thereby reducing the HDMI module's power consumption. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of a novel low-power HDMI interface circuit according to the present invention.

[0029] Figure 2 This is a schematic diagram of the HDMI signal input circuit of a novel low-power HDMI interface circuit according to this utility model.

[0030] Figure 3 This is a schematic diagram of the HDMI cable insertion detection circuit of a novel low-power HDMI interface circuit according to this utility model.

[0031] Figure 4 This is a schematic diagram of the high-voltage power supply circuit of a novel low-power HDMI interface circuit according to this utility model.

[0032] Figure 5 This is a schematic diagram of the low-voltage power supply circuit of a novel low-power HDMI interface circuit according to this utility model.

[0033] Figure 6 This utility model presents a schematic diagram of the video processing module circuit of a novel low-power HDMI interface circuit. Detailed Implementation

[0034] The technical solutions of the present utility model will be clearly and completely described below with reference to the accompanying drawings of the embodiments. Obviously, the described embodiments are only some embodiments of the present utility model, and not all embodiments. Based on the embodiments of the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of the present utility model.

[0035] See Figure 1As shown, this utility model provides a novel low-power HDMI interface circuit, which includes: an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit. The power output terminal of the HDMI signal input circuit is electrically connected to the power input terminal of the HDMI cable insertion detection circuit. The enable terminal of the HDMI cable insertion detection circuit is electrically connected to the enable terminal of the power module circuit. The reset terminal of the HDMI cable insertion detection circuit is electrically connected to the reset terminal of the video processing module circuit. The signal terminal of the HDMI signal input circuit is electrically connected to the signal terminal of the video processing module. The power input terminal of the power module circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The power output terminal of the power module circuit is electrically connected to the power input terminal of the video processing module.

[0036] The HDMI cable insertion detection circuit includes an NPN circuit and a PMOS circuit. The emitter of the NPN circuit is grounded, the collector of the NPN circuit is electrically connected to the gate of the PMOS circuit, the base of the NPN circuit is electrically connected to the power output terminal of the HDMI signal input circuit, the drain of the PMOS circuit is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit, and the source of the PMOS circuit is electrically connected to the power input terminal of the power module circuit.

[0037] The power module circuit includes a high-voltage power supply circuit and a low-voltage power supply circuit. The power input terminal of the high-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The power input terminal of the low-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The enable terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the enable terminals of the HDMI cable insertion detection circuit. The power output terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the power input terminal of the video processing module.

[0038] Specifically, see [link to relevant document]. Figures 3-5 As shown, the power module circuit includes a high-voltage power supply circuit and a low-voltage power supply circuit. The power input terminal of the high-voltage power supply circuit is electrically connected to the other end of resistor R5, and the power input terminal of the low-voltage power supply circuit is electrically connected to the other end of resistor R5. The enable terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the drain of PMOS transistor Q1. The power output terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the power input terminal of the video processing module.

[0039] The NPN circuit includes resistors R11 and R10 and an NPN transistor Q2. One end of resistor R11 is electrically connected to the power output terminal of the HDMI signal input circuit, and the other end of resistor R11 is electrically connected to one end of resistor R10 and the base of NPN transistor Q2. The emitter of NPN transistor Q2 and the other end of resistor R10 are grounded together. The collector of NPN transistor Q2 is electrically connected to the gate of the PMOS circuit.

[0040] The PMOS circuit includes resistors R8 and R5 and a PMOS transistor Q1. The collector of the NPN transistor Q2 is electrically connected to one end of resistor R8. The other end of resistor R8 is electrically connected to one end of resistor R5 and the gate of the PMOS transistor Q1. The other end of resistor R5 is electrically connected to the power input terminal of the power module circuit and the source of the PMOS transistor Q1. The drain of the PMOS transistor Q1 is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit.

[0041] Among them, see Figures 2-6 As shown, the HDMI signal input circuit includes an HDMI interface and resistor R4; the HDMI cable insertion detection circuit includes resistors R11 and R10, NPN transistor Q2, resistors R8 and R5, and PMOS transistor Q1; the high-voltage power supply circuit includes capacitors C4 and C5, resistors R18, R15, and R14, chip U2, capacitor C2, inductor L1, capacitor C8, resistors R13 and R16, capacitor C3, resistor R17, capacitor C6, capacitor C9, and capacitor C7; the low-voltage power supply circuit... The circuit includes capacitors C10, C11, R22, R23, and R20, chip U3, inductor L2, resistors R21 and R24, capacitors C12, C13, C14, and C15; the video processing module circuit includes chip U1, resistor R1, capacitor C1, resistors R2, R3, R6, R7, R19, R25, R26, and R27, crystal oscillator Y1, capacitors C16 and C17, resistors R9 and R12;

[0042] Among them, see Figure 2As shown, in this HDMI signal input circuit, terminals "20", "21", "22", and "23" of the HDMI interface are grounded together; terminals "2", "5", "8", "11", and "17" of the HDMI interface are grounded together; and terminals "1", "3", "4", "6", "7", "9", "10", "12", "13", "15", "16", and "19" of the HDMI interface are electrically connected to the signal terminals of the video processing module, specifically: HDMI interface "1" is electrically connected to terminal "34" of chip U1; HDMI interface "3" is electrically connected to terminal "33" of chip U1; HDMI interface "4" is electrically connected to terminal "32" of chip U1; HDMI interface "6" is electrically connected to terminal "31" of chip U1; and so on. The HDMI interface “7” is electrically connected to chip U1 “29” terminal; the HDMI interface “9” is electrically connected to chip U1 “28” terminal; the HDMI interface “10” is electrically connected to chip U1 “27” terminal; the HDMI interface “12” is electrically connected to chip U1 “26” terminal; the HDMI interface “13” is electrically connected to chip U1 “11” terminal through resistor R12; the HDMI interface “15” is electrically connected to chip U1 “17” terminal through resistor R7; the HDMI interface “16” is electrically connected to chip U1 “16” terminal through resistor R6; the HDMI interface “19” is electrically connected to chip U1 “21” terminal through resistor R2; and the HDMI interface “18” terminal is connected to one end of resistor R11 at the power input terminal of the HDMI cable insertion detection circuit through resistor R4.

[0043] Among them, see Figure 3 As shown, one end of resistor R11 in the HDMI cable insertion detection circuit is electrically connected to the HDMI interface "18" terminal of the power output terminal of the HDMI signal input circuit. The other end of resistor R11 is electrically connected to one end of resistor R10 and the base of NPN transistor Q2. The emitter of NPN transistor Q2 and the other end of resistor R10 are grounded together. The collector of NPN transistor Q2 is electrically connected to one end of resistor R8. The other end of resistor R8 is electrically connected to one end of resistor R5 and the gate of PMOS transistor Q1. The other end of resistor R5 is electrically connected to one end of capacitor C4 and one end of capacitor C10 of the power input terminal of the power module circuit and the source of PMOS transistor Q1. The drain of PMOS transistor Q1 is electrically connected to the other end of resistor R23 of the enable terminal of the power module circuit, the other end of resistor R15, and the other end of resistor R1 of the reset terminal of the video processing module circuit.

[0044] Among them, see Figure 4As shown, in this high-voltage power supply circuit, one end of capacitor C4 is electrically connected to one end of capacitor C5, the other end of resistor R5, one end of resistor R14, terminal 4 of chip U2, terminal 5 of chip U2, and terminal 6 of chip U2. The other ends of capacitor C4 and C5 are grounded together. The other end of resistor R14 is electrically connected to terminal 11 of chip U2. Terminal 12 of chip U2 is electrically connected to one end of resistor R18 and one end of resistor R15. The other end of resistor R18 is grounded. The other end of resistor R15 is electrically connected to the drain of PMOS transistor Q1. Terminals 1 and 3 of chip U2 are grounded together. Terminal 8 of chip U2 is electrically connected to one end of capacitor C8. The other end of capacitor C8 is grounded. The chip U2 terminal "9" is electrically connected to one end of resistor R16, one end of resistor R13, and one end of resistor R17. The other end of resistor R16 is grounded. The other end of resistor R13 is electrically connected to one end of inductor L1, one end of capacitor C3, one end of capacitor C6, one end of capacitor C9, one end of capacitor C7, and the power input terminals of chip U1 "25", "30", "35", "40", and "24" of the video processing module. The other ends of capacitor C6, capacitor C9, and capacitor C7 are all grounded. The other end of inductor L1 is electrically connected to the chip U2 terminal "2" and one end of capacitor C2. The other end of capacitor C2 is electrically connected to the chip U2 terminal "7". The other end of capacitor C3 is electrically connected to the other end of resistor R17.

[0045] Further, see Figure 5 As shown, in this low-voltage power supply circuit, one end of capacitor C10 is electrically connected to one end of capacitor C11, the other end of resistor R5, one end of resistor R20, and terminal "5" of chip U3. The other ends of capacitor C10 and C11 are grounded together. The other end of resistor R20 is electrically connected to terminal "3" of chip U3. Terminal "4" of chip U3 is electrically connected to one end of resistor R22 and one end of resistor R23. The other end of resistor R22 is grounded. The other end of resistor R23 is electrically connected to the drain of PMOS transistor Q1. Terminal "7" of chip U3 is grounded, and terminal "1" of chip U3 is electrically connected to... One end of resistor R24 ​​and one end of resistor R21 are connected, and the other end of resistor R24 ​​is grounded. The "2" terminal of chip U3 is electrically connected to the other end of resistor R21, one end of capacitor C12, one end of capacitor C13, one end of capacitor C14, one end of capacitor C15, one end of inductor L2, and the "36", "22", "23" and "37" terminals of chip U1, which are the power input terminals of the video processing module. The other ends of capacitor C12, capacitor C13, capacitor C14 and capacitor C15 are grounded together. The other end of inductor L2 is electrically connected to the "6" terminal of chip U3.

[0046] Among them, see Figure 6As shown, in this video processing module circuit, terminal 47 of chip U1 is electrically connected to one end of capacitor C1 and one end of resistor R1. The other end of resistor R1 is electrically connected to the drain of PMOS transistor Q1. Terminal 19 of chip U1 and the other end of capacitor C1 are grounded together. Terminal 21 of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R2. One end of resistor R3 is electrically connected to the signal terminal of the HDMI signal input circuit, and the other end of resistor R3 is grounded. Terminal 16 of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R6. Terminal 17 of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R7. Terminal 11 of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R12. Connect the U1 "12" terminal to the U1 "20" terminal via resistor R9. Connect the U1 "49" terminal to the power output terminal of the power module circuit via resistor R19. Connect the U1 "38" terminal to one end of resistor R25, the Y1 "3" terminal of crystal oscillator, and one end of capacitor C16. The other end of capacitor C16 is grounded. Connect the U1 "39" terminal to the other end of resistor R25, the Y1 "1" terminal of crystal oscillator, and one end of capacitor C17. The other end of capacitor C17 is grounded. Connect the Y1 "2" terminal of crystal oscillator to ground. Connect the U1 "18" terminal to one end of resistor R27 and one end of resistor R26. The other end of resistor R27 is grounded. Connect the other end of resistor R26 to the power output terminal of the HDMI cable inserted into the detection circuit.

[0047] Specifically, chip U1 is an IT66021FN chip; chip U2 is a SY8368AQQC chip; chip U3 is a SY8843L chip; PMOS transistor Q1 is a WPM3407-3 / TR PMOS transistor; and NPN transistor is an MMBT3904 NPN transistor.

[0048] The specific implementation of this utility model is as follows: A 5V power supply from the HDMI interface is led out and connected to the HDMI cable insertion detection circuit. When the detection circuit has 5V power from the HDMI input cable, the power output of the detection circuit is connected to the reset pin of the video processor and the EN enable pin of the power module, allowing the RC reset circuit of the video processor to work normally. At the same time, it allows the EN enable pin of the power module to be pulled high, outputting power to the video processor to start normal operation. When the HDMI signal cable is unplugged, the detection circuit cannot output a high level to enable the power module, causing the power supply module of the video processor to stop working, thereby achieving the purpose of reducing the power consumption of the HDMI module.

[0049] In other words, when an HDMI cable is plugged into an HDMI port, the 5V current on the HDMI cable is relatively small and may not be able to directly drive the larger load circuit at the back end. This could also cause problems with the signal source at the front end. To use the 5V on the HDMI cable for cable insertion detection, it needs to be processed by the back-end circuit. After passing through resistor R11, the 5V turns on transistor Q2, which grounds the collector of transistor Q2, triggering the P-channel MOSFET Q1 to turn on and output the system's 5V_DET to the RC reset circuit of the video processor and the EN enable pin of the power supply module of the video processor. Power module chips U3 and U2 start supplying power to the video processor U1, and the reset circuit composed of resistor R1 and capacitor C1 starts working normally. When the HDMI cable is unplugged, the enable pins of power module chips U3 and U2 are pulled low, the power module stops supplying power to the video processor, and the video processing module stops working, thus achieving the goal of low power consumption of the HDMI module unit when it is not plugged in or unplugged.

[0050] Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the present invention, the scope of which is defined by the appended claims and their equivalents.

Claims

1. A novel low-power circuit for an HDMI interface, characterized in that, The HDMI interface low-power circuit includes: an HDMI signal input circuit, an HDMI cable insertion detection circuit, a power module circuit, and a video processing module circuit. The power output terminal of the HDMI signal input circuit is electrically connected to the power input terminal of the HDMI cable insertion detection circuit. The enable terminal of the HDMI cable insertion detection circuit is electrically connected to the enable terminal of the power module circuit. The reset terminal of the HDMI cable insertion detection circuit is electrically connected to the reset terminal of the video processing module circuit. The signal terminal of the HDMI signal input circuit is electrically connected to the signal terminal of the video processing module. The power input terminal of the power module circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The power output terminal of the power module circuit is electrically connected to the power input terminal of the video processing module. The power module circuit includes a high-voltage power supply circuit and a low-voltage power supply circuit. The power input terminal of the high-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The power input terminal of the low-voltage power supply circuit is electrically connected to the power output terminal of the HDMI cable insertion detection circuit. The enable terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the enable terminals of the HDMI cable insertion detection circuit. The power output terminals of the high-voltage power supply circuit and the low-voltage power supply circuit are respectively electrically connected to the power input terminal of the video processing module.

2. The novel low-power HDMI interface circuit according to claim 1, characterized in that, The HDMI cable insertion detection circuit includes an NPN circuit and a PMOS circuit. The emitter of the NPN circuit is grounded, the collector of the NPN circuit is electrically connected to the gate of the PMOS circuit, the base of the NPN circuit is electrically connected to the power output terminal of the HDMI signal input circuit, the drain of the PMOS circuit is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit, and the source of the PMOS circuit is electrically connected to the power input terminal of the power module circuit.

3. The novel low-power HDMI interface circuit according to claim 2, characterized in that, The NPN circuit includes resistors R11 and R10 and an NPN transistor Q2. One end of resistor R11 is electrically connected to the power output terminal of the HDMI signal input circuit, and the other end of resistor R11 is electrically connected to one end of resistor R10 and the base of NPN transistor Q2. The emitter of NPN transistor Q2 and the other end of resistor R10 are grounded together, and the collector of NPN transistor Q2 is electrically connected to the gate of the PMOS circuit.

4. A novel low-power HDMI interface circuit according to claim 3, characterized in that, The PMOS circuit includes resistors R8 and R5 and a PMOS transistor Q1. The collector of the NPN transistor Q2 is electrically connected to one end of resistor R8. The other end of resistor R8 is electrically connected to one end of resistor R5 and the gate of the PMOS transistor Q1. The other end of resistor R5 is electrically connected to the power input terminal of the power module circuit and the source of the PMOS transistor Q1. The drain of the PMOS transistor Q1 is electrically connected to the enable terminal of the power module circuit and the reset terminal of the video processing module circuit.

5. A novel low-power HDMI interface circuit according to claim 1, characterized in that, The high-voltage power supply circuit includes a parallel input capacitor, resistors R18, R15, and R14, chip U2, capacitor C2, inductor L1, capacitor C8, resistors R13, R16, capacitor C3, resistor R17, and a parallel output capacitor. One end of the parallel input capacitor is electrically connected to the power output terminal of the HDMI cable insertion detection circuit, one end of resistor R14, and terminals "4", "5", and "6" of chip U2. The other end of the parallel input capacitor is grounded. The other end of resistor R14 is electrically connected to terminal "11" of chip U2. Terminal "12" of chip U2 is electrically connected to one end of resistor R18 and one end of resistor R15. The other end of resistor R18 is grounded. The other end of resistor R15 is electrically connected to the HDMI cable insertion detection circuit. The enable terminal of the test circuit is connected to the common ground of the chip U2"1 terminal and the chip U2"3 terminal. The chip U2"8 terminal is electrically connected to one end of the capacitor C8, and the other end of the capacitor C8 is grounded. The chip U2"9 terminal is electrically connected to one end of the resistor R16, one end of the resistor R13 and one end of the resistor R17. The other end of the resistor R16 is grounded. The other end of the resistor R13 is electrically connected to one end of the inductor L1, one end of the capacitor C3, one end of the parallel output capacitor and the power input terminal of the video processing module. The other end of the parallel output capacitor is grounded. The other end of the inductor L1 is electrically connected to the chip U2"2 terminal and one end of the capacitor C2. The other end of the capacitor C2 is electrically connected to the chip U2"7 terminal. The other end of the capacitor C3 is electrically connected to the other end of the resistor R17.

6. A novel low-power HDMI interface circuit according to claim 1, characterized in that, The low-voltage power supply circuit includes a low-voltage parallel input capacitor, resistors R22, R23, and R20, chip U3, inductor L2, resistors R21 and R24, and a low-voltage parallel output capacitor. One end of the low-voltage parallel input capacitor is electrically connected to the power output terminal of the HDMI cable insertion detection circuit, one end of resistor R20, and terminal "5" of chip U3. The other end of the low-voltage parallel input capacitor is grounded. The other end of resistor R20 is electrically connected to terminal "3" of chip U3. Terminal "4" of chip U3 is electrically connected to one end of resistor R22 and one end of resistor R23. The other end of resistor R22 is grounded, the other end of resistor R23 is electrically connected to the enable terminal of the HDMI cable insertion detection circuit, the terminal of chip U3"7 is grounded, the terminal of chip U3"1 is electrically connected to one end of resistor R24 ​​and one end of resistor R21, the other end of resistor R24 ​​is grounded, the terminal of chip U3"2 is electrically connected to the other end of resistor R21, one end of low-voltage parallel output capacitor, one end of inductor L2 and the power input terminal of the video processing module, the other end of low-voltage parallel output capacitor is grounded, and the other end of inductor L2 is electrically connected to the terminal of chip U3"6.

7. A novel low-power HDMI interface circuit according to claim 4, characterized in that, The video processing module circuit includes chip U1, resistor R1, capacitor C1, resistors R2, R3, R6, R7, R19, R25, R26, R27, crystal oscillator Y1, capacitors C16, C17, R9, and R12. Terminal "47" of chip U1 is electrically connected to one end of capacitor C1 and one end of resistor R1. The other end of resistor R1 is electrically connected to the drain of PMOS transistor Q1. Terminal "19" of chip U1 and the other end of capacitor C1 are grounded together. Terminal "21" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R2. One end of resistor R3 is electrically connected to the signal terminal of the HDMI signal input circuit, and the other end of resistor R3 is grounded. Terminal "16" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R6. Terminal "17" of chip U1 is connected to the signal terminal of the HDMI signal input circuit through resistor R7. The chips are interconnected. Terminal U1"11 is connected to the signal terminal of the HDMI signal input circuit via resistor R12. Terminal U1"12 is connected to terminal U1"20 via resistor R9. Terminal U1"49 is connected to the power output terminal of the power module circuit via resistor R19. Terminal U1"38 is electrically connected to one end of resistor R25, terminal Y1"3 of crystal oscillator, and one end of capacitor C16. The other end of capacitor C16 is grounded. Terminal U1"39 is electrically connected to the other end of resistor R25, terminal Y1"1 of crystal oscillator, and one end of capacitor C17. The other end of capacitor C17 is grounded. Terminal Y1"2 of crystal oscillator is grounded. Terminal U1"18 is electrically connected to one end of resistor R27 and one end of resistor R26. The other end of resistor R27 is grounded. The other end of resistor R26 is electrically connected to the power output terminal of the HDMI cable insertion detection circuit.

8. A novel low-power HDMI interface circuit according to claim 1, characterized in that, The HDMI signal input circuit includes an HDMI interface and a resistor R4. The HDMI interface terminals "20", "21", "22" and "23" are grounded together. The HDMI interface terminals "2", "5", "8", "11" and "17" are also grounded together. The HDMI interface terminals "1", "3", "4", "6", "7", "9", "10", "12", "13", "15", "16" and "19" are electrically connected to the signal terminals of the video processing module. The HDMI interface terminal "18" is connected to the power input terminal of the HDMI cable insertion detection circuit through the resistor R4.

9. A novel low-power HDMI interface circuit according to claim 7, characterized in that, The chip U1 is selected as the IT66021FN model.

10. A novel low-power HDMI interface circuit according to claim 4, characterized in that, The PMOS transistor Q1 is selected as a WPM3407-3 / TR model PMOS transistor.

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