Power conversion device and voltage adjustment circuit

Abstract

This invention provides a power conversion device and a voltage adjustment circuit. During the step adjustment period, the switching circuit connects the input of the control circuit to a buffer circuit. The buffer circuit provides a buffer voltage based on the voltage divided by the voltage divider output voltage. During the step adjustment period, the control circuit adjusts the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage. This invention effectively improves the response speed of the feedback circuit and avoids excessively long voltage stabilization times for the output voltage of the power conversion device, thus preventing it from failing to meet power transfer protocol specifications.

Description

Technical Field

[0001] This utility model relates to an electronic device, and more particularly to a power conversion device and a voltage regulation circuit. Background Technology

[0002] Power conversion devices are indispensable components in modern electronic devices. In power conversion devices based on pulse width modulation (PWM) control, the feedback circuit on the secondary side of the power conversion device usually has a compensation capacitor to stabilize the system voltage. However, when the power conversion device makes step adjustments to the output voltage, the compensation capacitor will reduce the response speed of the feedback circuit, causing the output voltage of the power conversion device to fail to be adjusted to the target voltage within a specified time. In other words, the voltage stabilization time of the output voltage of the power conversion device is too long, thus failing to meet the specifications of the power transfer protocol. Utility Model Content

[0003] This invention provides a power conversion device and a voltage adjustment circuit, which can effectively improve the response speed of the feedback circuit and avoid the output voltage of the power conversion device from having an excessively long voltage stabilization time that fails to meet the specifications of the power transmission protocol.

[0004] This invention discloses a voltage adjustment circuit suitable for adjusting the feedback signal of a feedback circuit. The feedback circuit includes a compensation circuit with a compensation capacitor. The feedback circuit generates a feedback signal based on the output voltage. The voltage adjustment circuit includes a voltage divider circuit, a switching circuit, a buffer circuit, and a control circuit. The voltage divider circuit divides the output voltage to generate a divided voltage. The switching circuit is coupled to the voltage divider circuit. The buffer circuit is coupled to the switching circuit and generates a buffer voltage based on the divided voltage. The input terminal of the control circuit is coupled to the switching circuit and the feedback circuit. The switching circuit switches the input terminal of the control circuit to the buffer circuit when the voltage adjustment circuit enters the step adjustment period, and switches the control circuit to the voltage divider circuit when the voltage adjustment circuit leaves the step adjustment period. During the step adjustment period, the control circuit adjusts the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage.

[0005] In one embodiment of this utility model, the switching circuit includes a first switch, a second switch, and a third switch. The first switch is coupled between the output terminal of the voltage divider circuit and the input terminal of the control circuit. The second switch is coupled between the output terminal of the voltage divider circuit and the input terminal of the buffer circuit. The third switch is coupled between the output terminal of the buffer circuit and the input terminal of the control circuit. The conducting state of the first switch is opposite to that of the second and third switches. During the step adjustment, the first switch is in the off state, while the second and third switches are in the on state.

[0006] In one embodiment of the present invention, the buffer circuit includes an operational amplifier, the positive input terminal of which is coupled to the input terminal of the buffer circuit, the negative input terminal of which is coupled to the output terminal, and the output terminal of which is coupled to the output terminal of the buffer circuit.

[0007] In one embodiment of this invention, the control circuit includes a voltage-to-analog converter, an operational amplifier, and an adjustment transistor. The output voltage of the voltage-to-analog converter serves as a step control signal. The positive input terminal of the operational amplifier is coupled to a switching circuit and a feedback circuit, while the negative input terminal receives the step control signal. The adjustment transistor is coupled between the feedback circuit and ground, and its control terminal is coupled to the output terminal of the operational amplifier. During step adjustment, the operational amplifier controls the conduction level of the adjustment transistor based on the buffer voltage and the step control signal to adjust the feedback signal generated by the feedback circuit.

[0008] In one embodiment of the present invention, the voltage divider circuit includes a first resistor and a second resistor, wherein the second resistor is coupled to the first resistor between the output voltage and ground.

[0009] In one embodiment of this invention, the control circuit includes an operational amplifier, an adjustment transistor, and a current-to-analog converter. The positive input terminal of the operational amplifier is coupled to a switching circuit and a feedback circuit, while the negative input terminal receives a reference voltage. The adjustment transistor is coupled between the feedback circuit and ground, and its control terminal is coupled to the output terminal of the operational amplifier. The operational amplifier controls the conduction level of the adjustment transistor based on a voltage divider or a buffer voltage to adjust the feedback signal generated by the feedback circuit. The current-to-analog converter is coupled to the common junction of a first resistor and a second resistor, and its output current serves as a step control signal.

[0010] In one embodiment of this invention, the feedback circuit further includes a third resistor and a fourth resistor. The third resistor is coupled between the output voltage and the output terminal of the control circuit. The first terminal of the fourth resistor is coupled to the third resistor, and the second terminal of the fourth resistor is coupled to the input terminal of the control circuit. The first terminal of the fourth resistor is used to generate a feedback signal.

[0011] In one embodiment of the present invention, the feedback circuit further includes an optocoupler, which is coupled between the third resistor and the fourth resistor and is controlled by the control circuit to generate a feedback signal.

[0012] In one embodiment of the present invention, the control circuit described above controls the feedback circuit to generate a feedback signal based on the voltage divider and the step control signal after the step adjustment period ends.

[0013] This invention also provides a power conversion device comprising the voltage regulation circuit, transformer circuit, power switch, and switch control circuit described above. The transformer circuit includes a primary winding and a secondary winding, receiving input voltage and outputting output voltage. The power switch is coupled between the primary winding and ground. The switch control circuit is coupled to the power switch and controls the power switch to switch between an on and off state based on a feedback signal, thereby controlling the output of the transformer circuit.

[0014] Based on the above, the switching circuit of this embodiment can switch the input terminal of the control circuit to the buffer circuit during the step adjustment period of the voltage adjustment circuit. The buffer circuit provides a buffer voltage based on the voltage divided by the voltage divider output voltage of the voltage divider circuit. During the step adjustment period, the control circuit adjusts the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage. In this way, adjusting the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage provided by the buffer circuit during the step adjustment period can reduce the influence of the compensation capacitor and effectively improve the response speed of the feedback circuit, avoiding the output voltage stabilization time of the power conversion device being too long and failing to meet the power transmission protocol specifications.

[0015] To make the above-mentioned features and advantages of this utility model more apparent and understandable, specific embodiments are described below, and detailed descriptions are provided in conjunction with the accompanying drawings. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of a voltage adjustment circuit according to the present invention;

[0017] Figure 2 This is a schematic diagram of a power conversion device according to the present invention;

[0018] Figure 3A and Figure 3B It is a waveform diagram of the output voltage of the power conversion device;

[0019] Figure 4 and Figure 5 This is a schematic diagram of the voltage adjustment circuit according to this utility model. Detailed Implementation

[0020] Figure 1This is a schematic diagram of a voltage adjustment circuit according to an embodiment of the present invention. The voltage adjustment circuit 100 can be used to adjust the feedback signal SFB of the feedback circuit 110, wherein the feedback circuit 110 includes a compensation circuit with a compensation capacitor. The voltage adjustment circuit 100 includes a voltage divider circuit 102, a switching circuit 104, a buffer circuit 106, and a control circuit 108. The voltage divider circuit 102 is coupled to the output voltage VOUT and the switching circuit 104. The switching circuit 104 is coupled to the buffer circuit 106 and the input terminal of the control circuit 108. The feedback circuit 110 is coupled to the output voltage VOUT and the input terminal of the control circuit 108.

[0021] Feedback circuit 110 generates a feedback signal SFB based on the output voltage VOUT, which can be used to adjust the output voltage VOUT. Voltage divider circuit 102 divides the output voltage VOUT to generate a divided voltage VD1. Buffer circuit 106 generates a buffer voltage VBF1 based on the divided voltage VD1. Switching circuit 104 switches the input of control circuit 108 to either buffer circuit 106 or voltage divider circuit 102 depending on whether voltage adjustment circuit 100 has entered a step adjustment period. For example, switching circuit 104 can switch the input of control circuit 108 to buffer circuit 106 in response to voltage adjustment circuit 100 entering a step adjustment period, causing control circuit 108 to adjust the feedback signal SFB generated by feedback circuit 110 based on step control signal ST1 and buffer voltage VBF1, thereby performing step adjustment of output voltage VOUT. Furthermore, the switching circuit 104 can switch the input terminal of the control circuit 108 to the voltage divider circuit 102 when the voltage adjustment circuit 100 leaves the step adjustment period, so that the control circuit 108 controls the feedback signal SFB of the feedback circuit 110 according to the voltage divider voltage VD1 and the step control signal ST1.

[0022] Compared to adjusting the feedback signal SFB generated by the feedback circuit 110 based on the step control signal ST1 and the voltage divider VD1, adjusting the feedback signal SFB generated by the feedback circuit 110 based on the step control signal ST1 and the buffer voltage VBF1 during the step adjustment period effectively reduces the influence of the compensation capacitor in the feedback circuit 110 through the low output impedance characteristic of the buffer circuit 106. This allows changes in the output voltage VOUT to be reflected more quickly at the input of the control circuit 108, enabling the control circuit 108 to adjust the feedback signal SFB generated by the feedback circuit 110 in real time in response to changes in the output voltage VOUT. After the voltage adjustment circuit 100 leaves the step adjustment period, the control circuit 108 can return to the mechanism of controlling the feedback signal SFB of the feedback circuit 110 based on the voltage divider VD1 and the step control signal ST1, allowing the compensation capacitor in the feedback circuit 110 to perform its function of stabilizing the voltage.

[0023] Voltage regulation circuit 100 can be as follows Figure 2 As shown, the power conversion device 200 is applied in this embodiment. In this embodiment, the power conversion device 200 is a flyback architecture, but it is not limited thereto. In other embodiments, the architecture of the power conversion device can also be, for example, a push-pull, forward, half-bridge, full-bridge, or other types of architecture. In addition, the voltage regulation circuit 100 can be implemented in this embodiment, for example, as a power delivery IC.

[0024] The power conversion device 200 includes a transformer circuit T, a power switch Mp, a rectifier diode DR1, a capacitor CO, a switch control circuit 202, a voltage regulation circuit 100, and a feedback circuit 110. The transformer circuit T includes a primary winding Np and a secondary winding Ns. The first terminal of the primary winding Np receives the input voltage VIN. The power switch Mp is coupled between the second terminal of the primary winding Np and ground. The control terminal of the power switch Mp is coupled to the switch control circuit 202. The rectifier diode DR1 is coupled to the first terminal of the secondary winding Ns. The capacitor CO is coupled between the rectifier diode DR1 and the second terminal of the secondary winding Ns. In this embodiment, the power switch Mp is implemented using a transistor, but this is not a limitation. The voltage regulation circuit 100 is coupled to the secondary winding Ns. The feedback circuit 110 is coupled to the switch control circuit 202, the voltage regulation circuit 100, and the output voltage VOUT. The feedback circuit 110 is controllable by the voltage regulation circuit 100 and provides a feedback signal SFB to the switch control circuit 202.

[0025] like Figure 1 As described in the embodiment, during the step adjustment, the control circuit 108 of the voltage adjustment circuit 100 can adjust the feedback signal SFB generated by the feedback circuit 110 according to the step control signal ST1 and the buffer voltage VBF1. This causes the switch control circuit 202 to provide a pulse width modulation (PWM) signal to the power switch Mp based on the feedback signal SFB, switching the conduction state of the power switch Mp and thus adjusting the output voltage VOUT. Because the buffer circuit 106 has low output impedance, adjusting the feedback signal SFB generated by the feedback circuit 110 according to the buffer voltage VBF1 can effectively reduce the influence of the compensation capacitor in the feedback circuit 110, thus making the change in the output voltage VOUT more consistent with the expected voltage change of the step adjustment. Figure 3A and Figure 3B As shown, in Figure 3AIn the circuit, the feedback signal SFB is adjusted based on the step control signal ST1 and the voltage divider voltage VD1. Due to the influence of the compensation capacitor in the feedback circuit 110, the control circuit 108 cannot react in real time to the changes in the output voltage VOUT to adjust the feedback signal SFB. This causes the output voltage VOUT to decrease at a slower rate than the expected voltage (as shown by the dashed line), resulting in an excessively long voltage stabilization time. Figure 3B In this embodiment, during the step adjustment period T1, the feedback signal SFB is adjusted based on the step control signal ST1 and the buffer voltage VBF1. Since the low output impedance characteristic of the buffer circuit 106 reduces the influence of the compensation capacitor in the feedback circuit 110, the control circuit 108 can adjust the feedback signal SFB in real time according to the change in the output voltage VOUT, ensuring that the rate of decrease of the output voltage VOUT matches the expected rate of decrease (as shown by the dashed line), and thus decreases to the target voltage within the time specified by the power transfer protocol. The step adjustment period T1 can be, for example, the time required for the output voltage VOUT to decrease to the target voltage, and the step adjustment period T1 is less than or equal to the time specified by the power transfer protocol.

[0026] Furthermore, the voltage regulation circuit 100 can be implemented as follows: Figure 4As shown, the voltage divider circuit 102 includes resistors R1 and R2, which are coupled between the output voltage VOUT and ground. In this embodiment, the switching circuit 104 is implemented using switches SW1 to SW3. Switch SW1 is coupled between the common contact of resistors R1 and R2 and the input terminal of the control circuit 108; switch SW2 is coupled between the common contact of resistors R1 and R2 and the input terminal of the buffer circuit 106; and switch SW3 is coupled between the output terminal of the buffer circuit 106 and the input terminal of the control circuit 108. The buffer circuit 106 may include an operational amplifier OP2. The positive input terminal of operational amplifier OP2 is coupled to switch SW2, the negative input terminal of operational amplifier OP2 is coupled to its output terminal, and the output terminal of operational amplifier OP2 is also coupled to switch SW3. The control circuit 108 includes an operational amplifier OP1, an adjustment transistor M1, and a voltage-to-digital converter VDAC. The positive input terminal of the operational amplifier OP1 is coupled to switches SW1 and SW3 and a feedback circuit 110. The negative input terminal of the operational amplifier OP1 is coupled to the voltage-to-digital converter VDAC. The output terminal of the operational amplifier OP1 is coupled to the control terminal of the adjustment transistor M1. The adjustment transistor M1 is coupled between the feedback circuit 110 and ground. In addition, in this embodiment, the feedback circuit 110 includes a compensation circuit 402, a resistor R3, and an optocoupler D1. The compensation circuit 402 includes a resistor R4, a compensation capacitor C1, and a compensation capacitor C2. The resistor R3 and the optocoupler D1 are connected in series between the output voltage VOUT and the adjustment transistor M1. The resistor R4 and the compensation capacitor C1 are connected in series between the optocoupler D1 and the positive input terminal of the operational amplifier OP1, and are connected in parallel with the compensation capacitor C2 between the optocoupler D1 and the positive input terminal of the operational amplifier OP1.

[0027] Resistors R1 and R2 divide the output voltage VOUT, generating a divided voltage VD1 at the common junction of resistors R1 and R2. The conduction state of switches SW1~SW3 can be controlled by switch control signals EN1 and EN2, which are inverse signals. During step adjustment, switch SW1 is off, and switches SW2 and SW3 are on. During non-step adjustment, switch SW1 is on, and switches SW2 and SW3 are off. During step adjustment, buffer circuit 106 receives the divided voltage VD1 through switch SW2 and provides a buffer voltage VBF1 to the positive input terminal of operational amplifier OP1 through switch SW3 based on the divided voltage VD1. Operational amplifier OP1 can control the conduction state of adjustment transistor M1 based on buffer voltage VBF1 and the voltage generated by voltage-to-digital converter VDAC based on digital-to-analog conversion code (step control signal ST1), thereby changing the voltage driving optocoupler D1 and adjusting the feedback signal SFB. In addition, during the non-step adjustment period, the voltage divider voltage VD1 is instead supplied to the positive input terminal of the operational amplifier OP1 through the switch SW1. The operational amplifier OP1 controls the conduction state of the adjustment transistor M1 according to the voltage divider voltage VD1 and the voltage (step control signal ST1) provided by the voltage digital-to-analog converter VDAC.

[0028] It is worth noting that in other embodiments, the step control signal ST1 may also be provided, for example, by a current digital-to-analog converter. Figure 5 As shown, Figure 5 Examples and Figure 4 The difference in this embodiment is that the voltage-to-analog converter VDAC in the control circuit 108 is replaced by a current-to-analog converter IDAC, and the negative input of the operational amplifier OP1 receives a reference voltage VREF. The current-to-analog converter IDAC is coupled to the common junction of resistors R1 and R2, and the current flowing through resistors R1 and R2 is changed according to the current generated by the digital-to-analog conversion code (step control signal ST1). Similarly, the operational amplifier OP1 can control the conduction state of the adjusting transistor M1 according to the voltage divider voltage VD1 or the buffer voltage VBF1 to adjust the feedback signal SFB. In some embodiments, the feedback circuit 110 may not include the optocoupler D1, that is, the feedback signal SFB may be generated at the common junction of resistors R3 and R4.

[0029] In summary, the switching circuit of this embodiment can switch the input terminal of the control circuit to the buffer circuit during the step adjustment period of the voltage adjustment circuit. The buffer circuit provides a buffer voltage based on the voltage divided by the voltage divider output voltage. During the step adjustment period, the control circuit adjusts the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage. By adjusting the feedback signal generated by the feedback circuit based on the step control signal and the buffer voltage provided by the buffer circuit during the step adjustment period, the influence of the compensation capacitor can be reduced, effectively improving the response speed of the feedback circuit and preventing the output voltage of the power conversion device from having an excessively long voltage stabilization time that fails to meet the power transmission protocol specifications.

[0030] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this utility model, and are not intended to limit it. Although the utility model has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this utility model.

Claims

1. A voltage adjustment circuit, suitable for adjusting the feedback signal of a feedback circuit, characterized in that, The feedback circuit includes a compensation circuit, which generates a feedback signal based on the output voltage. The voltage adjustment circuit includes: A voltage divider circuit divides the output voltage to generate a voltage divider voltage. A switching circuit is coupled to the voltage divider circuit; A buffer circuit, coupled to the switching circuit, generates a buffer voltage based on the voltage divider; and A control circuit, the input of which is coupled to the switching circuit and the feedback circuit, wherein the switching circuit switches the input of the control circuit to the buffer circuit in response to the voltage adjustment circuit entering the step adjustment period, and switches the control circuit to the voltage divider circuit in response to the voltage adjustment circuit leaving the step adjustment period, wherein the control circuit adjusts the feedback signal generated by the feedback circuit according to the step control signal and the buffer voltage during the step adjustment period.

2. The voltage adjustment circuit according to claim 1, characterized in that, The switching circuit includes: The first switch is coupled between the output terminal of the voltage divider circuit and the input terminal of the control circuit; The second switch is coupled between the output terminal of the voltage divider circuit and the input terminal of the buffer circuit; and A third switch is coupled between the output of the buffer circuit and the input of the control circuit, wherein the conduction state of the first switch is opposite to that of the second and third switches. During the step adjustment, the first switch is in the off state, and the second and third switches are in the on state.

3. The voltage adjustment circuit according to claim 1, characterized in that, The buffer circuit includes: An operational amplifier, the positive input of which is coupled to the input of the buffer circuit, the negative input of which is coupled to the output, and the output of which is coupled to the output of the buffer circuit.

4. The voltage regulation circuit according to claim 1, characterized in that, The control circuit includes: A voltage-to-digital converter, whose output voltage serves as the step control signal; An operational amplifier, the positive input of which is coupled to the switching circuit and the feedback circuit, and the negative input of which receives the step control signal; and An adjustment transistor is coupled between the feedback circuit and ground. The control terminal of the adjustment transistor is coupled to the output terminal of the operational amplifier. During the step adjustment, the operational amplifier controls the conduction level of the adjustment transistor according to the buffer voltage and the step control signal to adjust the feedback signal generated by the feedback circuit.

5. The voltage regulation circuit according to claim 1, characterized in that, The voltage divider circuit includes: First resistor; and The second resistor is coupled to the first resistor between the output voltage and ground.

6. The voltage regulation circuit according to claim 5, characterized in that, The control circuit includes: An operational amplifier, the positive input of which is coupled to the switching circuit and the feedback circuit, and the negative input of which receives a reference voltage; An adjustment transistor is coupled between the feedback circuit and the ground. The control terminal of the adjustment transistor is coupled to the output terminal of the operational amplifier. The operational amplifier controls the conduction level of the adjustment transistor based on the voltage divider or the buffer voltage to adjust the feedback signal generated by the feedback circuit. A current-to-analog converter is coupled to the common contact of the first resistor and the second resistor, and outputs current as the step control signal.

7. The voltage regulation circuit according to claim 1, characterized in that, The feedback circuit also includes: A third resistor is coupled between the output voltage and the output terminal of the control circuit; and A fourth resistor, the first end of which is coupled to the third resistor, and the second end of which is coupled to the input terminal of the control circuit, wherein the first end of the fourth resistor is used to generate the feedback signal.

8. The voltage adjustment circuit according to claim 7, characterized in that, The feedback circuit also includes: An optocoupler, coupled between the third resistor and the fourth resistor, is controlled by the control circuit to generate the feedback signal.

9. The voltage adjustment circuit according to claim 1, characterized in that, After the step adjustment period ends, the control circuit controls the feedback circuit to generate the feedback signal based on the voltage divider and the step control signal.

10. A power conversion device, characterized in that, include: The voltage adjustment circuit as described in any one of claims 1 to 9; A transformer circuit, including a primary winding and a secondary winding, receives an input voltage and outputs the output voltage; A power switch is coupled between the primary coil and ground; as well as A switch control circuit, coupled to the power switch, controls the power switch to switch between an on and off state based on the feedback signal, thereby controlling the output of the transformer circuit.

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