Automatic transceiving communication circuit and electronic device
By adding delay circuits to the receive and transmit enable ports of the level conversion chip, the impact of pull-up and pull-down resistors on the system in traditional RS485 circuits is resolved, communication speed and anti-interference capability are improved, and system performance is optimized.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- TCL HOME APPLIANCES (HEFEI) CO LTD
- Filing Date
- 2025-05-15
- Publication Date
- 2026-06-16
Smart Images

Figure CN224367828U_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of electronic equipment technology, and in particular relates to an automatic transceiver communication circuit and electronic equipment. Background Technology
[0002] Intelligent instruments have developed with the maturity of microcontroller technology. One of the essential conditions for enterprises when selecting instruments is that they must have a network communication interface. Initially, they output simple process quantities as analog signals. Later, the instrument interface became RS232. RS232 interface can realize point-to-point communication, but this method cannot realize networking function, so RS485 emerged.
[0003] In a traditional RS485 automatic transceiver circuit, when a high level is transmitted, the 485 chip enters the receiving state, and the two signal lines enter a high-impedance state. The high level transmitted is entirely achieved by the pull-up and pull-down resistors of the 485 bus. If the resistance is too small, it will affect the power consumption and the number of nodes in the system; if the resistance is too large, the communication speed will be slow and it will be easily affected by interference. In other words, the system is greatly affected by the pull-up and pull-down resistors. Utility Model Content
[0004] This application provides an automatic transceiver communication circuit and electronic device that can reduce the impact of pull-up and pull-down resistors on the system.
[0005] In a first aspect, embodiments of this application provide an automatic transceiver communication circuit, comprising:
[0006] The level conversion chip has a receive enable port, a transmit enable port, a receive output port, and a drive input port. The receive output port is used to connect to the receiving end of a microcontroller, and the drive input port is grounded.
[0007] A delay circuit is provided, wherein the input terminal of the delay circuit is connected to the transmitting terminal of the microcontroller, and the output terminal of the delay circuit is connected to the receiving enable port and the transmitting enable port respectively. The delay circuit is used to: when the level conversion chip is in the transmitting state, and the data transmitted by the microcontroller changes from data 0 to data 1, the delay circuit delays the current level of the receiving enable port and the transmitting enable port for a preset time before performing a level flip, so that the level conversion chip enters the receiving state.
[0008] Optionally, the delay circuit includes:
[0009] The NOT gate chip has input pins and output pins. The input pins are used to connect to the transmitter of the microcontroller, and the output pins are connected to the receive enable port and the transmit enable port, respectively. The NOT gate chip is used for level conversion.
[0010] A first capacitor, one end of which is connected to the output pin, and the other end of which is grounded.
[0011] Optionally, the delay circuit further includes:
[0012] A first resistor, one end of which is connected to the output pin, and the other end of which is connected to the receive enable port and the transmit enable port;
[0013] A second resistor, one end of which is connected to the output pin, and the other end of which is grounded.
[0014] Optionally, the resistance value of the first resistor is greater than the resistance value of the second resistor.
[0015] Optionally, the delay circuit further includes:
[0016] The third resistor has one end connected to the input pin and the other end connected to the transmitter of the microcontroller.
[0017] Optionally, the delay circuit further includes a fourth resistor, one end of which is connected to a power supply;
[0018] The NOT gate chip also has a power supply pin, which is connected to the other end of the fourth resistor.
[0019] Optionally, the automatic transceiver communication circuit further includes a connector having two ports for electrically connecting to the control board via the two ports.
[0020] The level conversion chip also has a first signal line port and a second signal line port, which are respectively connected to the two ports via signal lines.
[0021] Optionally, the automatic transceiver communication circuit further includes:
[0022] The fifth resistor has one end connected to the first signal line port and the other end connected to the power supply.
[0023] The sixth resistor has one end connected to the second signal line port and the other end grounded.
[0024] Optionally, the automatic transceiver communication circuit further includes:
[0025] The seventh resistor has one end connected to the receiving end of the microcontroller and the other end connected to the receiving output port.
[0026] The eighth resistor has one end connected to the receiving output port and the other end connected to the power supply.
[0027] Secondly, embodiments of this application also provide an electronic device, including:
[0028] Automatic transceiver communication circuit as described in any of the preceding items;
[0029] The microcontroller is electrically connected to the automatic transceiver communication circuit.
[0030] In the automatic transceiver communication circuit and electronic device of this application embodiment, by adding a delay circuit to the receive enable port and transmit enable port of the level conversion chip, the level conversion chip can maintain the transmit state and delay when transmitting a high level, and the level conversion chip only enters the receive state after the high level is transmitted, thereby reducing the impact of pull-up and pull-down resistors on the system. Attached Figure Description
[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0032] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings. In the following description, the same reference numerals denote the same parts.
[0033] Figure 1 This is a structural block diagram of an automatic transceiver communication circuit provided in an embodiment of this application.
[0034] Figure 2 A circuit diagram of an automatic transceiver communication circuit provided in an embodiment of this application.
[0035] Figure 3 Another circuit diagram of the automatic transceiver communication circuit provided in the embodiments of this application. Detailed Implementation
[0036] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0037] To reduce the impact of pull-up and pull-down resistors on the system, embodiments of this application provide an automatic transceiver communication circuit and electronic device, which will be described below in conjunction with the accompanying drawings.
[0038] For example, please refer to Figure 1 As shown, Figure 1 This is a structural block diagram of an automatic transceiver communication circuit provided in an embodiment of this application. The automatic transceiver communication circuit 100 in this embodiment includes a level conversion chip 110 and a delay circuit 120.
[0039] The level conversion chip 110, also known as an RS485 chip, is based on RS485 communication. RS485 communication, also called RS-485 or RS485, is a commonly used half-duplex asynchronous serial communication bus. Half-duplex means that only one party can send data and the other party can receive data at any given time; simultaneous transmission is not possible. This communication method uses differential signal transmission technology, transmitting data through a pair of symmetrical signal lines. It has strong anti-interference capabilities and is suitable for long-distance data transmission and multi-device network communication.
[0040] The automatic transceiver communication circuit 100 has an automatic transceiver function, that is, the level conversion chip 110 can automatically switch between receiving and transmitting states according to the transmitted data signal.
[0041] For example, the level conversion chip 110 has a receive enable port RE, a transmit enable port DE, a receive output port RO, and a drive input port DI. The receive output port RO is used to connect to the receiver RXD of the microcontroller, and the drive input port DI is grounded to GND.
[0042] It should be noted that the level conversion chip 110 is the data conversion center between the main control board MCU (microcontroller) and the control board. Communication between the main control board MCU and the control board is achieved through the level conversion chip 110. Taking the automatic transceiver communication circuit 100 applied to electronic devices such as refrigerators, the main control board MCU is the control center of the refrigerator, and the control board can be the refrigerator's display and control board. Communication between the main control board MCU and the display and control board can be achieved through the level conversion chip 110. Simultaneously, the main control board MCU can also communicate with other control boards.
[0043] The input of delay circuit 120 is connected to the microcontroller's transmitter (TXD), and the output of delay circuit 120 is connected to the receive enable port (RE) and the transmit enable port (DE). Delay circuit 120 is used to: when level conversion chip 110 is in transmit mode, and the data transmitted by the microcontroller changes from data 0 to data 1 (i.e., a high-level signal is transmitted), delay circuit 120 delays the current high-level signal on the receive enable port (RE) and the transmit enable port (DE) for a preset time before flipping the level, causing level conversion chip 110 to enter receive mode. In other words, when a high-level signal is transmitted, delay circuit 120 keeps level conversion chip 110 in transmit mode, delaying the transmission until the high-level signal is transmitted before entering receive mode.
[0044] In the automatic transceiver communication circuit 100 provided in this application embodiment, by adding a delay circuit 120 to the receive enable port RE and the transmit enable port DE of the level conversion chip 110, the level conversion chip 110 can maintain the transmit state and delay when transmitting a high level. The level conversion chip 110 only enters the receive state after the high level is transmitted, thereby reducing the impact of pull-up and pull-down resistors on the system.
[0045] For example, please refer to Figure 2 As shown, Figure 2 This is a circuit diagram of an automatic transceiver communication circuit provided in an embodiment of this application. The delay circuit 120 includes a NOT gate chip IC2 and a first capacitor C1.
[0046] The NOT gate IC2 has an input pin A1 and an output pin Y1. Input pin A1 connects to the microcontroller's transmit pin TXD, and output pin Y1 connects to the receive enable port RE and the transmit enable port DE. The NOT gate IC2 is used for level conversion; that is, when the data input to the NOT gate IC2 is 0 (or a low-level signal), it is processed by the NOT gate IC2 and converted into data 1 (or a high-level signal). The NOT gate IC2 may include an integrated operational amplifier device, or in other words, it is a NOT gate constructed from integrated operational amplifier chips.
[0047] One end of the first capacitor C1 is connected to the output pin Y1, and the other end of the first capacitor C1 is grounded to GND. The charging process of the first capacitor C1 can delay the transmission of a high-level signal to the level conversion chip 110.
[0048] The delay circuit 120 also includes a first resistor R1 and a second resistor R2. One end of the first resistor R1 is connected to the output pin Y1, and the other end is connected to the receive enable port RE and the transmit enable port DE. One end of the second resistor R2 is connected to the output pin Y1, and the other end is grounded (GND). The resistance of the first resistor R1 is greater than the resistance of the second resistor R2; for example, the resistance of the first resistor R1 can be 10KΩ, and the resistance of the second resistor R2 can be 110Ω. It can be understood that the first resistor R1 and the second resistor R2 are used to step down the signal output by the NOT gate chip IC2 to prevent large current signals from impacting the level conversion chip 110.
[0049] The delay duration can be adjusted using the first capacitor C1 and the second resistor R2.
[0050] For example, the delay circuit 120 also includes a third resistor R3 and a fourth resistor R4.
[0051] One end of the third resistor R3 is connected to the input pin A1, and the other end of the third resistor R3 is used to connect to the microcontroller's transmitter TXD.
[0052] One end of the fourth resistor R4 is connected to the power supply VCC, and the other end of the fourth resistor R4 is connected to the NOT gate chip IC2. For example, NOT gate chip IC2 has a power supply pin VCC, which is connected to the other end of the fourth resistor R4. Connecting the fourth resistor R4 between the power supply pin VCC of NOT gate chip IC2 and the power supply can limit current, protect the circuit, and implement overcurrent protection.
[0053] Among them, the NOT gate chip IC2 also has a ground pin GND, which is grounded to GND. The NOT gate chip IC2 also has a no-connect pin NC, which is left floating, limited by the package chip form.
[0054] Please see Figure 3 As shown, Figure 3 Another circuit diagram of the automatic transceiver communication circuit provided in this application embodiment is shown. The level conversion chip 110 is not limited to the ports described above; for example, the level conversion chip 110 may also have a power supply port VCC and a ground port GND. The power supply port VCC is connected to the power supply VCC, and the ground port GND is grounded to GND. The automatic transceiver communication circuit 100 also includes a second capacitor C2. One end of the second capacitor C2 is connected to the power supply port VCC of the level conversion chip 110, and the other end of the second capacitor C2 is grounded to GND.
[0055] Since the level conversion chip 110 also needs to be connected to the control board, the level conversion chip 110 also has a first signal line port A and a second signal line port B. The first signal line port A and the second signal line port B are respectively used to connect two symmetrical signal transmission lines.
[0056] To facilitate the connection between the level conversion chip 110 and the control board, the automatic transceiver communication circuit 100 of this embodiment is further provided with a connector 130. The connector 130 has two ports and is used to electrically connect to the control board through the two ports. The connector 130 is also connected to the first signal line port A and the second signal line port B of the level conversion chip 110 through the two ports and two signal lines, respectively.
[0057] For example, the automatic transceiver communication circuit 100 further includes a fifth resistor R5 and a sixth resistor R6, which are also pull-up and pull-down resistors. One end of the fifth resistor R5 is connected to the first signal line port A, and the other end is connected to the power supply VCC. One end of the sixth resistor R6 is connected to the second signal line port B, and the other end is grounded (GND). The resistance values of the fifth resistor R5 and the sixth resistor R6 can be equal, for example, both 10KΩ.
[0058] For example, the automatic transceiver communication circuit 100 also includes a seventh resistor R7 and an eighth resistor R8. One end of the seventh resistor R7 is connected to the receiver RXD of the microcontroller or main control board MCU, and the other end of the seventh resistor R7 is connected to the receive output port RO. One end of the eighth resistor R8 is connected to the receive output port RO, and the other end of the eighth resistor R8 is connected to the power supply VCC.
[0059] The working principle of the automatic transceiver communication circuit 100 in this embodiment is as follows:
[0060] When the level conversion chip 110 is in the receiving state, the transmitting end of the microcontroller or main control board MCU in the idle state is high by default. At this time, the receive enable port RE and the transmit enable port DE of the level conversion chip 110 are low. The level conversion chip 110 is in the receiving state and receives data from the 485 bus by default.
[0061] When the level conversion chip 110 is in the transmitting state, in the first case, when transmitting data 0, the integrated operational amplifier chip is turned on, the Schmitt trigger signal of the NOT gate flips, the receive enable port RE and the transmit enable port DE of the level conversion chip 110 become high level, the level conversion chip 110 is in the transmitting state, and the data 0 of the drive input port DI of the level conversion chip 110 is normally transmitted to the 485 bus. In the second scenario, when data 1 is sent, the data at the transmitting end of the microcontroller (MCU) changes from 0 to 1. This state is immediately sent to the drive input port DI of the level conversion chip 110. Because the signal output delay circuit 120, composed of the NOT gate chip IC2, the first capacitor C1, and the second resistor R2, maintains the high level of the receive enable port RE and the transmit enable port DE, it will not immediately flip, maintaining the transmission state for a delay. The length of this delay can be adjusted by the first capacitor C1 and the second resistor R2 to ensure that the signal, i.e., data 1, is sent to the 485 bus. When the first capacitor C1 is fully charged, the levels of the receive enable port RE and the transmit enable port DE flip. At this time, the level conversion chip 110 enters the receiving state, and the high-level data 1 of the 485 bus is maintained by the pull-up and pull-down resistors, i.e., the fifth resistor R5 and the sixth resistor R6.
[0062] The automatic transceiver communication circuit 100 of this application embodiment is optimized based on the traditional automatic transceiver circuit by adding a transmission delay circuit 120. When a high level is transmitted, the level conversion chip 110 will maintain the transmission state and delay. The level conversion chip 110 will only enter the receiving state after the high level is transmitted. This process does not depend on the resistance value of the pull-up and pull-down resistors, which can reduce the impact of the pull-up and pull-down resistors on the system.
[0063] This application also provides an electronic device, which can be a household appliance such as a refrigerator, air conditioner, or washing machine, or a portable electronic device such as a computer, mobile phone, or tablet. This application uses a refrigerator as an example for illustration, and should not be construed as a limitation on the electronic device. The electronic device includes the aforementioned automatic transceiver communication circuit and a microcontroller. The microcontroller can be understood as the refrigerator's main control board MCU. The microcontroller and the automatic transceiver communication circuit are electrically connected to achieve data transmission. Since this electronic device adopts all the technical solutions of all the above embodiments, it possesses at least all the beneficial effects brought about by the technical solutions of the above embodiments, which will not be elaborated upon here.
[0064] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.
[0065] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more features.
[0066] The automatic transceiver communication circuit and electronic device provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.
Claims
1. An automatic transceiver communication circuit, characterized in that, include: The level conversion chip has a receive enable port, a transmit enable port, a receive output port, and a drive input port. The receive output port is used to connect to the receiving end of a microcontroller, and the drive input port is grounded. A delay circuit is provided, wherein the input terminal of the delay circuit is connected to the transmitting terminal of the microcontroller, and the output terminal of the delay circuit is connected to the receiving enable port and the transmitting enable port respectively. The delay circuit is used to: when the level conversion chip is in the transmitting state, and the data transmitted by the microcontroller changes from data 0 to data 1, the delay circuit delays the current level of the receiving enable port and the transmitting enable port for a preset time before performing a level flip, so that the level conversion chip enters the receiving state.
2. The automatic transceiver communication circuit according to claim 1, characterized in that, The delay circuit includes: The NOT gate chip has input pins and output pins. The input pins are used to connect to the transmitter of the microcontroller, and the output pins are connected to the receive enable port and the transmit enable port, respectively. The NOT gate chip is used for level conversion. A first capacitor, one end of which is connected to the output pin, and the other end of which is grounded.
3. The automatic transceiver communication circuit according to claim 2, characterized in that, The delay circuit also includes: A first resistor, one end of which is connected to the output pin, and the other end of which is connected to the receive enable port and the transmit enable port; A second resistor, one end of which is connected to the output pin, and the other end of which is grounded.
4. The automatic transceiver communication circuit according to claim 3, characterized in that, The resistance of the first resistor is greater than the resistance of the second resistor.
5. The automatic transceiver communication circuit according to claim 2, characterized in that, The delay circuit also includes: The third resistor has one end connected to the input pin and the other end connected to the transmitter of the microcontroller.
6. The automatic transceiver communication circuit according to claim 2, characterized in that, The delay circuit also includes a fourth resistor, one end of which is connected to a power supply. The NOT gate chip also has a power supply pin, which is connected to the other end of the fourth resistor.
7. The automatic transceiver communication circuit according to claim 1, characterized in that, The automatic transceiver communication circuit also includes a connector having two ports, which are used to electrically connect to the control board via the two ports. The level conversion chip also has a first signal line port and a second signal line port, which are respectively connected to the two ports via signal lines.
8. The automatic transceiver communication circuit according to claim 7, characterized in that, The automatic transceiver communication circuit also includes: The fifth resistor has one end connected to the first signal line port and the other end connected to the power supply. The sixth resistor has one end connected to the second signal line port and the other end grounded.
9. The automatic transceiver communication circuit according to claim 1, characterized in that, The automatic transceiver communication circuit also includes: The seventh resistor has one end connected to the receiving end of the microcontroller and the other end connected to the receiving output port. The eighth resistor has one end connected to the receiving output port and the other end connected to the power supply.
10. An electronic device, characterized in that, include: The automatic transceiver communication circuit as described in any one of claims 1 to 9; The microcontroller is electrically connected to the automatic transceiver communication circuit.