A low-frequency ultra-wideband low-noise amplifier
By connecting the outer and inner loops of a choke inductor in the power supply circuit of a low-frequency ultra-wideband low-noise amplifier, the problem of resonance effect in low-frequency circuits is solved, the gain and stability of the circuit are improved, and better circuit performance is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- SICHUAN YIFENG ELECTRONICS SCI & TECH CO LTD
- Filing Date
- 2025-06-19
- Publication Date
- 2026-06-19
AI Technical Summary
At low frequencies of 0.35 GHz, the choke inductor in existing low-noise amplifier circuits is relatively large, leading to resonance effects and making it difficult to optimize circuit performance.
By connecting the outer loop of the choke inductor and a similar inner loop in the power supply circuit, the resonant frequency is moved away, and the circuit structure is optimized, including the connection methods of the power supply circuit, feedback circuit, input matching circuit, first-stage amplifier circuit and second-stage amplifier circuit.
It effectively avoids resonant frequency interference, improves the gain performance and circuit stability of the low-frequency ultra-wideband low-noise amplifier, and optimizes circuit parameter adjustment.
Smart Images

Figure CN224385466U_ABST
Abstract
Description
Technical Field
[0001] This utility model relates to the field of microwave radio frequency technology, specifically to a low-frequency ultra-wideband low-noise amplifier. Background Technology
[0002] Low-noise amplifiers (LNAs) are critical components in modern microwave / millimeter-wave communication, radar, electronic warfare, and telemetry / remote control receiving systems. In RF receiving systems, the LNA is typically located at the receiver front end and is one of the most important circuit modules. The noise and gain of the front-end LNA play a major role in the system's sensitivity. In the low-frequency band of 0.35 GHz, to ensure circuit performance, larger components are selected, and circuit parameters are difficult to adjust. For example, a large choke inductor can introduce resonance effects into the circuit. Therefore, it is necessary to optimize the circuit performance of low-noise amplifiers in the low-frequency band. Utility Model Content
[0003] The purpose of this invention is to provide a low-frequency ultra-wideband low-noise amplifier, which connects the outer ring of the choke inductor and the adjacent inner ring in the power supply circuit, thus moving it away from the resonant frequency.
[0004] To achieve the above objectives, the present invention adopts the following solution:
[0005] A low-frequency ultra-wideband low-noise amplifier includes a power supply circuit, a feedback circuit, and an input matching circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, and an output matching circuit connected in series. The power supply circuit is connected to the output matching circuit and supplies power to the first-stage amplifier circuit, the second-stage amplifier circuit, and the feedback circuit, respectively. The feedback circuit is connected in parallel with the first-stage amplifier circuit, the second-stage amplifier circuit, and the output matching circuit.
[0006] In some specific implementations, the power supply circuit includes a power supply port, a filter capacitor, and a choke inductor connected in series, with the output terminal of the choke inductor connected to the output matching circuit.
[0007] In some specific implementations, the choke inductor is equivalent to a square inductor, where adjacent turns of the outermost coil are connected. By connecting the outer loop to the adjacent inner loop within the inductor, the resonant frequency is moved further away.
[0008] In some specific implementations, the first-stage amplifier circuit includes an input matching inductor and a first RF amplifier transistor, and the second-stage amplifier circuit includes a second RF amplifier transistor and an active bias circuit. The gate of the first RF amplifier transistor is connected to the input matching inductor and the feedback circuit, respectively. The source of the first RF amplifier transistor is grounded. The drain of the first RF amplifier transistor is connected to the source of the second RF amplifier transistor. The gate of the second RF amplifier transistor is connected to the active bias circuit. The output of the active bias circuit is connected to the input matching inductor. The drain of the second RF amplifier transistor is connected to the feedback circuit.
[0009] In some specific implementations, a voltage divider circuit is connected in series between the gate of the second RF amplifier transistor and the output matching circuit. The voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor connected in series. One end of the first voltage divider resistor is connected to the gate of the second RF amplifier transistor, and the other end is connected to one end of the second voltage divider resistor. The other end of the second voltage divider resistor is connected to the output matching circuit. An active bias circuit is connected in parallel between the first voltage divider resistor and the second voltage divider resistor.
[0010] In some specific implementations, the feedback circuit includes a first feedback loop and a second feedback loop that share a common feedback inductor.
[0011] In some specific implementations, the first feedback loop includes a first feedback resistor, a feedback DC blocking capacitor, a feedback inductor, a second RF amplifier transistor, and a first RF amplifier transistor connected in series. The gate of the first RF amplifier transistor is connected to the first feedback resistor, and the feedback inductor is connected to the drain of the second RF amplifier transistor.
[0012] In some specific implementations, the second feedback loop includes a feedback inductor, a second radio frequency amplifier transistor, a second DC blocking capacitor, and a second feedback resistor connected in series. One end of the feedback inductor is connected to the drain of the second radio frequency amplifier transistor, and the other end is connected to the second feedback resistor and the output matching circuit, respectively. The second DC blocking capacitor is connected to the gate of the second radio frequency amplifier transistor.
[0013] In some specific implementations, the input matching circuit includes an input DC blocking capacitor, with one end of the input DC blocking capacitor connected to the RF input port and the other end connected to the input matching inductor.
[0014] The beneficial effects of this utility model are:
[0015] This utility model discloses a low-frequency ultra-wideband low-noise amplifier. By connecting the outer ring of the choke inductor and the adjacent inner ring in the power supply circuit, the resonant frequency is moved away. In addition, the power supply circuit not only supplies power to the gate of the first RF amplifier transistor, but also supplies power to the gate and drain of the second RF amplifier transistor. Attached Figure Description
[0016] Figure 1A circuit connection diagram of a low-noise amplifier provided for an embodiment of this utility model;
[0017] Figure 2 Circuit simulation layout of the low-noise amplifier provided for embodiments of this utility model;
[0018] Figure 3 A schematic diagram of the choke coil structure provided in this embodiment of the utility model;
[0019] Figure 4 A gain simulation diagram provided for an embodiment of this utility model;
[0020] Figure 5 A simulation diagram of the noise figure provided for an embodiment of this utility model;
[0021] Figure 6 A simulation diagram of input and output return loss provided for an embodiment of this utility model;
[0022] Figure 7 A simulation diagram of the output P-1dB provided for an embodiment of this utility model.
[0023] Explanation of reference numerals in the attached figures:
[0024] 1-RF input port; 2-RF output port; 3-Power supply port; 4-Filter capacitor; 5-Choke inductor; 61-Input DC blocking capacitor; 62-Output DC blocking capacitor; 7-Input matching inductor; 81-First RF amplifier transistor; 82-Second RF amplifier transistor; 9-First feedback resistor; 10-Feedback DC blocking capacitor; 11-Feedback inductor; 12-Second feedback resistor; 13-Second DC blocking capacitor; 141-Third resistor; 142-First voltage divider resistor; 143-Second voltage divider resistor; 15-Active bias circuit. Detailed Implementation
[0025] The present invention will be further described in detail below with reference to the embodiments and accompanying drawings, but the implementation of the present invention is not limited thereto.
[0026] In the description of this utility model, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "longitudinal", "lateral", "horizontal", "inner", "outer", "front", "rear", "top", "bottom", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the utility model product is in use. They are only for the convenience of describing this utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this utility model.
[0027] In the description of this utility model, it should also be noted that, unless otherwise explicitly specified and limited, the terms "set up," "have," "install," "connect," and "connect" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this utility model based on the specific circumstances.
[0028] The present invention will now be described in detail with reference to the accompanying drawings and embodiments:
[0029] Example 1:
[0030] like Figure 1 As shown, this embodiment provides a low-frequency ultra-wideband low-noise amplifier, including a power supply circuit, a feedback circuit, and an input matching circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, and an output matching circuit connected in series. The power supply circuit is connected to the output matching circuit and supplies power to the first-stage amplifier circuit, the second-stage amplifier circuit, and the feedback circuit, respectively. The feedback circuit is connected in parallel with the first-stage amplifier circuit, the second-stage amplifier circuit, and the output matching circuit.
[0031] Specifically, the input matching circuit includes an input DC blocking capacitor 61, one end of which is connected to the RF input port 1, and the other end is connected to the input matching inductor 7. The output matching circuit includes an output DC blocking capacitor 62, with its two ends connected to the feedback inductor 11 and the RF output port 2, respectively.
[0032] And such Figure 2 As shown, the first-stage amplifier circuit includes an input matching inductor 7 and a first RF amplifier transistor 81. The second-stage amplifier circuit includes a second RF amplifier transistor 82 and an active bias circuit 15. The gate of the first RF amplifier transistor 81 is connected to the input matching inductor 7 and the feedback circuit, respectively. The source of the first RF amplifier transistor 81 is grounded. The drain of the first RF amplifier transistor 81 is connected to the source of the second RF amplifier transistor 82. The gate of the second RF amplifier transistor 82 is connected to the first voltage divider resistor 142 and the second voltage divider resistor 143 of the voltage divider circuit and the active bias circuit 15. The output terminal of the active bias circuit 15 is connected to the input matching inductor 7. The drain of the second RF amplifier transistor 82 is connected to the feedback circuit.
[0033] The feedback circuit includes a first feedback loop and a second feedback loop sharing a common feedback inductor 11. The first feedback loop includes a first feedback resistor 9, a feedback DC blocking capacitor 10, a feedback inductor 11, a second RF amplifier transistor 82, and a first RF amplifier transistor 81 connected in series. The gate of the first RF amplifier transistor 81 is connected to the first feedback resistor 9, and the feedback inductor 11 is connected to the drain of the second RF amplifier transistor 82. The second feedback loop includes a feedback inductor 11, a second RF amplifier transistor 82, a second DC blocking capacitor 13, and a second feedback resistor 12 connected in series. One end of the feedback inductor 11 is connected to the drain of the second RF amplifier transistor 82, and the other end is connected to the second feedback resistor 12 and the output matching circuit. The second DC blocking capacitor 13 is connected to the gate of the second RF amplifier transistor 82.
[0034] As can be seen, the first feedback loop, which is formed by connecting the first feedback resistor 9, the feedback DC blocking capacitor 10, the feedback inductor 11, the second RF amplifier transistor 82 and the first RF amplifier transistor 81 in series, and the second feedback loop, which is formed by the feedback inductor 11, the second RF amplifier transistor 82, the second DC blocking capacitor 13 and the second feedback resistor 12, are connected through the common feedback inductor 11, which is a spiral inductor.
[0035] In some specific implementations, a voltage divider circuit is connected in series between the gate of the second RF amplifier transistor 82 and the output matching circuit. The voltage divider circuit includes a first voltage divider resistor 142 and a second voltage divider resistor 143 connected in series. One end of the first voltage divider resistor 142 is connected to the gate of the second RF amplifier transistor 82, and the other end is connected to one end of the second voltage divider resistor 143. The other end of the second voltage divider resistor 143 is connected to the output matching circuit. The active bias circuit 15 is connected in parallel between the first voltage divider resistor 142 and the second voltage divider resistor 143.
[0036] For the power supply circuit, the power supply is divided into three paths after passing through the power supply circuit and the matching capacitor at the output terminal. One path supplies power to the drain of the second RF amplifier transistor 82 through the feedback loop, and the other two paths supply power to the gates of the second RF amplifier transistor 82 and the gate of the first RF amplifier transistor 81 respectively through the voltage divider circuit. The power supply circuit includes a power supply port 3, a filter capacitor 4, and a choke inductor 5 connected in series. The output terminal of the choke inductor 5 is connected to the output matching circuit, such as... Figure 3 As shown, the choke inductor 5 is equivalent to a square inductor with 11 turns. In the outermost turns of the square inductor, adjacent turns are connected. For example... Figure 3 As shown, it can be seen that the four outermost turns of the coil are connected, with adjacent turns connected. This connects the outer loop and the adjacent inner loop in the inductor, thus moving the resonant frequency further apart.
[0037] The power supply process in this embodiment is as follows:
[0038] After the power supply is input from the power supply port 3, it passes through the filter capacitor 4 and the choke inductor 5 in sequence. Since the outer ring of the choke inductor 5 and the inner ring close to the outer ring are connected, it is far away from the resonant frequency. After the power supply passes through the output DC blocking capacitor, one path goes through the second feedback loop to supply power to the drain of the second RF amplifier transistor 82, and the other path goes through the voltage divider circuit. After passing through the voltage divider circuit, it supplies power to the gate of the second RF amplifier transistor 82 and the active bias circuit 15 respectively. After passing through the active bias circuit 15, it is connected to the input matching inductor 7 through the third resistor 141 to supply power to the gate of the first RF amplifier transistor 81.
[0039] To better illustrate the optimized performance of the low-noise amplifier provided in this invention, such as... Figures 4-7 The following is given: Figure 2 The simulation graphs of various performance parameters obtained after layout simulation are from... Figure 4 It can be seen that below 1GHz, a gain increase is needed at this low frequency, which generally requires the use of a large-coil choke inductor 5. To minimize gain fluctuations, this application connects the outer coils of the inductor to reduce the resonant frequency. From Figures 5-7 It can also be seen that other aspects of the circuit's performance have been improved.
[0040] It is understood that the above embodiments are merely exemplary implementations used to illustrate the principles of this utility model, and the utility model is not limited thereto. For those skilled in the art, various modifications and improvements can be made without departing from the spirit and essence of this utility model, and these modifications and improvements are also considered to be within the protection scope of this utility model.
Claims
1. A low-frequency ultra-wideband low-noise amplifier, characterized in that, It includes a power supply circuit, a feedback circuit, and an input matching circuit, a first-stage amplifier circuit, a second-stage amplifier circuit, and an output matching circuit connected in series. The power supply circuit is connected to the output matching circuit to supply power to the first-stage amplifier circuit, the second-stage amplifier circuit, and the feedback circuit, respectively. The feedback circuit is connected in parallel with the first-stage amplifier circuit, the second-stage amplifier circuit, and the output matching circuit.
2. The low-frequency ultra-wideband low-noise amplifier according to claim 1, characterized in that, The power supply circuit includes a power supply port, a filter capacitor, and a choke inductor connected in series. The output terminal of the choke inductor is connected to the output matching circuit.
3. A low-frequency ultra-wideband low-noise amplifier according to claim 2, characterized in that, A choke inductor is equivalent to a square inductor. In the outermost turns of a square inductor, adjacent turns are connected.
4. A low-frequency ultra-wideband low-noise amplifier according to claim 1, characterized in that, The first-stage amplifier circuit includes an input matching inductor and a first RF amplifier transistor. The second-stage amplifier circuit includes a second RF amplifier transistor and an active bias circuit. The gate of the first RF amplifier transistor is connected to the input matching inductor and the feedback circuit, respectively. The source of the first RF amplifier transistor is grounded. The drain of the first RF amplifier transistor is connected to the source of the second RF amplifier transistor. The gate of the second RF amplifier transistor is connected to the active bias circuit. The output of the active bias circuit is connected to the input matching inductor. The drain of the second RF amplifier transistor is connected to the feedback circuit.
5. A low-frequency ultra-wideband low-noise amplifier according to claim 4, characterized in that, A voltage divider circuit is connected in series between the gate of the second RF amplifier transistor and the output matching circuit. The voltage divider circuit includes a first voltage divider resistor and a second voltage divider resistor connected in series. One end of the first voltage divider resistor is connected to the gate of the second RF amplifier transistor, and the other end is connected to one end of the second voltage divider resistor. The other end of the second voltage divider resistor is connected to the output matching circuit. An active bias circuit is connected in parallel between the first voltage divider resistor and the second voltage divider resistor.
6. A low-frequency ultra-wideband low-noise amplifier according to claim 4, characterized in that, The feedback circuit includes a first feedback loop and a second feedback loop that share a common feedback inductor.
7. A low-frequency ultra-wideband low-noise amplifier according to claim 6, characterized in that, The first feedback loop includes a first feedback resistor, a feedback DC blocking capacitor, a feedback inductor, a second RF amplifier transistor, and a first RF amplifier transistor connected in series. The gate of the first RF amplifier transistor is connected to the first feedback resistor, and the feedback inductor is connected to the drain of the second RF amplifier transistor.
8. A low-frequency ultra-wideband low-noise amplifier according to claim 7, characterized in that, The second feedback loop includes a feedback inductor, a second radio frequency amplifier transistor, a second DC blocking capacitor, and a second feedback resistor connected in series. One end of the feedback inductor is connected to the drain of the second radio frequency amplifier transistor, and the other end is connected to the second feedback resistor and the output matching circuit, respectively. The second DC blocking capacitor is connected to the gate of the second radio frequency amplifier transistor.
9. A low-frequency ultra-wideband low-noise amplifier according to claim 4, characterized in that, The input matching circuit includes an input DC blocking capacitor, with one end connected to the RF input port and the other end connected to the input matching inductor.