Chip peripheral package structure for optical communication system tracking error improvement
By introducing the electrical connection of a semiconductor cooler (TEC), a heating resistor, and a diode into the optical communication system, an improved chip peripheral packaging structure is formed, which solves the problem of the laser chip's excessively wide operating temperature range and enables the laser chip to operate stably and reduce errors in high and low temperature environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- CHENGDU SUPERXON COMM TECH CO LTD
- Filing Date
- 2025-08-11
- Publication Date
- 2026-08-04
AI Technical Summary
In optical communication systems, an excessively wide operating temperature range of laser chips can lead to excessive tracking errors, affecting signal transmission accuracy, especially in high and low temperature environments.
By employing chip packaging layout units and component connection circuit units, and through the electrical connection of semiconductor coolers (TEC), heating resistors, and diodes, an improved chip peripheral packaging structure is formed. The Peltier effect is used to achieve temperature control of the laser chip, narrowing the operating temperature range.
It reduces the tracking error of the optical communication system, improves the accuracy of the communication signal, and ensures that the laser chip can work stably in high and low temperature environments.
Smart Images
Figure CN224596490U_ABST
Abstract
Description
Technical Field
[0001] This utility model belongs to the field of optical communication system technology, and specifically relates to a chip peripheral packaging structure for improving tracking error in optical communication systems. Background Technology
[0002] In optical communication systems, tracking error (TE) typically refers to the deviation of optical modules (such as coherent optical modules, tunable lasers, or optical receivers) during signal tracking, wavelength locking, or phase synchronization. Excessive tracking error can lead to signal distortion, decreased signal accuracy, and increased bit error rate (BER), even causing communication interruptions. This is particularly true in high-speed coherent optical transmission (such as 400G / 800G), dense wavelength division multiplexing (DWDM), and flexible optical networks (FlexGrid), where improving tracking error has become a key challenge. Lasers are crucial light sources in optical communication systems, and the performance of laser chips is significantly affected by temperature. Thermoelectric coolers (TECs) are used to control the laser's temperature. TECs are typically used in conjunction with thermistors; the thermistors monitor the current temperature within the laser cavity, while the TEC regulates the temperature. The two form a feedback loop, ensuring that the laser can always be in a relatively constant temperature environment, ensuring that it provides stable output power and wavelength, thereby reducing wavelength drift and tracking errors caused by temperature changes.
[0003] However, the thermoelectric cooler (TEC) cools the laser chip at high temperatures and releases heat outwards, while heating the laser chip at low temperatures and releasing cold outwards. Therefore, the peripheral packaging structure of the laser chip exhibits an extreme temperature range under both high and low temperature conditions. For precision-coupled communication products, an excessively wide operating temperature range causes significant fluctuations in tracking errors, greatly affecting the accuracy of signal transmission.
[0004] Therefore, there is an urgent need to provide a chip peripheral packaging structure for improving tracking errors in optical communication systems that can narrow the operating temperature range of laser chips to reduce tracking errors. Utility Model Content
[0005] The purpose of this invention is to provide a chip peripheral packaging structure for improving tracking errors in optical communication systems, thereby solving the aforementioned problems in the prior art.
[0006] To achieve the above objectives, the present invention adopts the following technical solution:
[0007] This invention provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, comprising:
[0008] Chip packaging layout unit and component connection circuit unit;
[0009] The chip packaging layout unit is used to lay out and package the various components in the optical communication system tracking error improvement scheme, and the component connection circuit unit is used to electrically connect the various components in the optical communication system tracking error improvement scheme.
[0010] In one possible design, the components in the optical communication system tracking error improvement scheme include a laser chip, a thermoelectric cooler (TEC), a heating resistor, and a diode.
[0011] The laser chip is disposed on the semiconductor cooler TEC via the chip packaging layout unit, and the semiconductor cooler TEC, the heating resistor, and the diode are electrically connected via the component connection circuit unit.
[0012] In one possible design, the semiconductor cooler TEC includes a first working surface and a second working surface;
[0013] The laser chip is disposed on the first working surface, and the heating resistor and diode are disposed on the second working surface.
[0014] In one possible design, the positive terminal of the thermoelectric cooler TEC is electrically connected to one end of the laser chip and connected to a positive current input, while the negative terminal of the thermoelectric cooler TEC is electrically connected to the other end of the laser chip and connected to a reverse current input.
[0015] In one possible design, the positive terminal of the thermoelectric cooler TEC is also electrically connected to the cut-off terminal of the diode, the on terminal of the diode is electrically connected to one end of the heating resistor, and the other end of the heating resistor is electrically connected to the negative terminal of the thermoelectric cooler TEC.
[0016] In one possible design, the heating resistor is a 4-ohm resistor.
[0017] Beneficial Effects: This utility model provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, including a chip packaging layout unit and a component connection circuit unit. The chip packaging layout unit is used to layout and package various components in the optical communication system tracking error improvement scheme, and the component connection circuit unit is used to electrically connect these components. Through the design of the chip packaging layout unit and the component connection circuit unit, various components in the optical communication system tracking error improvement scheme are introduced. These components, under the guidance of the semiconductor cooler (TEC), are connected to the laser chip and their layout is completed, forming an improved chip peripheral packaging structure. This allows the chip peripheral packaging structure to narrow the operating temperature range of the laser chip, reduce the tracking error of the optical communication system, and improve the accuracy of the communication signal. Attached image description:
[0018] Figure 1 A circuit connection diagram of a component connection circuit unit provided in Embodiment 1 of this utility model;
[0019] Figure 2 This is a schematic diagram of the component layout of a chip packaging layout unit provided in Embodiment 1 of the present utility model;
[0020] Figure 3 A circuit connection diagram of a component connection circuit unit provided in Embodiment 2 of this utility model;
[0021] Figure 4 A circuit connection diagram of a component connection circuit unit provided in Embodiment 3 of this utility model;
[0022] Figure 5 This is a circuit connection diagram of a component connection circuit unit provided in Embodiment 4 of this utility model.
[0023] The components are: 1. Laser chip; 2. Semiconductor cooler (TEC); 3. Heating resistor; 4. Diode; 5. Base. Detailed Implementation
[0024] To more clearly illustrate the technical solutions in the embodiments of this utility model or the prior art, the present utility model will be briefly introduced below in conjunction with the accompanying drawings and descriptions of the embodiments or the prior art. Obviously, the following description of the structure of the accompanying drawings is only some embodiments of this utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. It should be noted that the description of these embodiments is used to help understand this utility model, but does not constitute a limitation on this utility model.
[0025] It should be understood that although the terms first, second, etc., may be used herein to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another. For example, the first unit may be referred to as the second unit, and similarly, the second unit may be referred to as the first unit, without departing from the scope of the exemplary embodiments of this utility model.
[0026] It should be understood that the term "and / or" that may appear in this document is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A exists alone, B exists alone, and A and B exist simultaneously. The term " / and" that may appear in this document describes another relationship between related objects, indicating that two relationships can exist. For example, A / and B can mean: A exists alone, and A and B exist alone. In addition, the character " / " that may appear in this document generally indicates that the related objects before and after it are in an "or" relationship.
[0027] Example 1:
[0028] like Figure 1 As shown, this embodiment provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, including: a chip peripheral packaging structure for improving tracking errors in optical communication systems, including:
[0029] Chip packaging layout unit and component connection circuit unit;
[0030] The chip packaging layout unit is used to lay out and package the various components in the optical communication system tracking error improvement scheme, and the component connection circuit unit is used to electrically connect the various components in the optical communication system tracking error improvement scheme.
[0031] In one possible implementation, the components in the optical communication system tracking error improvement scheme include a laser chip, a thermoelectric cooler (TEC), a heating resistor, and a diode.
[0032] The laser chip is disposed on the semiconductor cooler TEC via the chip packaging layout unit, and the semiconductor cooler TEC, the heating resistor, and the diode are electrically connected via the component connection circuit unit.
[0033] like Figure 2 As shown, in one possible implementation, the semiconductor cooler TEC includes a first working surface and a second working surface;
[0034] The laser chip is disposed on the first working surface, and the heating resistor and diode are disposed on the second working surface.
[0035] In one possible implementation, the positive terminal of the thermoelectric cooler TEC is electrically connected to one end of the laser chip and connected to a positive current input, while the negative terminal of the thermoelectric cooler TEC is electrically connected to the other end of the laser chip and connected to a reverse current input.
[0036] In one possible implementation, the positive terminal of the thermoelectric cooler TEC is also electrically connected to the cut-off terminal of the diode, the on terminal of the diode is electrically connected to one end of the heating resistor, and the other end of the heating resistor is electrically connected to the negative terminal of the thermoelectric cooler TEC.
[0037] In one possible implementation, the heating resistor is preferably a 4-ohm resistor.
[0038] It should be noted that, through the design of the chip packaging layout unit and the component connection circuit unit, various components in the optical communication system tracking error improvement scheme are introduced. These components are connected to the laser chip under the guidance of the semiconductor cooler (TEC) and the layout is completed to form an improved chip peripheral packaging structure. This chip peripheral packaging structure can narrow the operating temperature range of the laser chip, reduce the tracking error of the optical communication system, and improve the accuracy of the communication signal.
[0039] Specifically, such as Figure 1As shown, the positive terminal of the thermoelectric cooler (TEC) is connected to a forward current input. When it operates in the forward direction, a forward current is input to the positive terminal of the TEC. Based on the Peltier effect (where the Peltier effect states that when a direct current passes through a thermocouple composed of two different semiconductor materials, hot and cold sides are generated at the two ends of the thermocouple; one side absorbs heat and cools, while the other side releases heat and heats up; therefore, in high-temperature environments, the TEC cools the laser chip and releases heat outwards; in low-temperature environments, the TEC heats the laser chip and releases cold outwards), it begins to cool the laser chip. At this time, the heating resistor does not operate because the diode is cut off. The operation is so efficient that it does not affect the cooling efficiency. The negative terminal of the thermoelectric cooler (TEC) is connected to the reverse current input. When it operates in reverse, the reverse current is input to the negative terminal of the TEC, and the TEC starts to work based on the Peltier effect to heat the laser chip. At the same time, the diode conducts, and the heating resistor also participates in the operation, connected in parallel with the reverse-operating TEC, to jointly heat the laser chip. This ensures that even in low-temperature environments, the peripheral packaging structure of the laser chip can also be kept at a high temperature, narrowing the operating temperature range of the peripheral packaging structure of the laser chip to a high-temperature to room-temperature operating range, thereby reducing tracking errors.
[0040] Example 2:
[0041] like Figure 3 As shown, this embodiment provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, wherein:
[0042] In one possible implementation, the components in the optical communication system tracking error improvement scheme include a laser chip, a thermoelectric cooler (TEC), a heating resistor, and two diodes.
[0043] The laser chip is disposed on the semiconductor cooler TEC via the chip packaging layout unit, and the semiconductor cooler TEC, the heating resistor and the two diodes are electrically connected via the component connection circuit unit.
[0044] In one possible implementation, the semiconductor cooler TEC includes a first working surface and a second working surface;
[0045] The laser chip is disposed on the first working surface, and the heating resistor and two diodes are disposed on the second working surface.
[0046] In one possible implementation, the positive terminal of the thermoelectric cooler TEC is electrically connected to one end of the laser chip and connected to a forward current input, while the negative terminal of the thermoelectric cooler TEC is electrically connected to the conducting terminal of one of the diodes, and the cut-off terminal of this diode is electrically connected to the other end of the laser chip and connected to a reverse current input.
[0047] In one possible design, the positive terminal of the thermoelectric cooler TEC is also electrically connected to the cut-off terminal of the diode, the conducting terminal of another diode is electrically connected to one end of the heating resistor, and the other end of the heating resistor is electrically connected to the negative terminal of the thermoelectric cooler TEC.
[0048] Specifically, such as Figure 3 As shown, the positive terminal of the thermoelectric cooler (TEC) is connected to a forward current input. When it operates in the forward direction, a forward current is input to the positive terminal of the TEC, and a diode connected to its negative terminal is in a conducting state. The TEC starts working based on the Peltier effect to cool the laser chip. At this time, the heating resistor does not work because the other diode is cut off, so it does not affect the cooling efficiency. When a reverse current is input, the TEC does not work because the diode connected to its negative terminal is cut off, while the other diode is in a conducting state. At this time, the heating resistor participates in the work to heat the laser chip. This ensures that the peripheral packaging structure of the laser chip can also be in a high-temperature state even in a low-temperature environment, narrowing the operating temperature range of the peripheral packaging structure of the laser chip to a high-temperature to room-temperature operating range, thereby reducing tracking errors.
[0049] Example 3:
[0050] like Figure 4 As shown, this embodiment provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, wherein:
[0051] In one possible implementation, the components in the optical communication system tracking error improvement scheme include a laser chip, a thermoelectric cooler (TEC), a heating resistor, and two diodes.
[0052] The laser chip is disposed on the semiconductor cooler TEC via the chip packaging layout unit, and the semiconductor cooler TEC, the heating resistor and the two diodes are electrically connected via the component connection circuit unit.
[0053] In one possible implementation, the semiconductor cooler TEC includes a first working surface and a second working surface;
[0054] The laser chip is disposed on the first working surface, and the heating resistor and two diodes are disposed on the second working surface.
[0055] In one possible implementation, the positive terminal of the thermoelectric cooler TEC is electrically connected to one end of the laser chip and connected to a forward current input. The negative terminal of the thermoelectric cooler TEC is electrically connected to the on end of one of the diodes and one end of the heating resistor. The off end of the diode is electrically connected to the other end of the laser chip and connected to a reverse current input. The other end of the heating resistor is electrically connected to the off end of another diode, and the on end of the other diode is electrically connected to the other end of the laser chip and connected to a reverse current input.
[0056] Specifically, such as Figure 4 As shown, the positive terminal of the thermoelectric cooler (TEC) is connected to a forward current input. When it operates in the forward direction, a forward current is input to the positive terminal of the TEC, and a diode connected to its negative terminal is in a conducting state. The TEC then operates based on the Peltier effect to cool the laser chip. At this time, the heating resistor does not operate because the other diode is cut off, thus not affecting the cooling efficiency. When a reverse current is input, the reverse current enters through the conducting terminal of one of the diodes, the heating resistor operates, and the TEC also operates in the reverse direction, working together to heat the laser chip. This ensures that even in low-temperature environments, the peripheral packaging structure of the laser chip can also be kept at a high temperature, narrowing the operating temperature range of the peripheral packaging structure of the laser chip to a high-temperature to room-temperature operating range, thereby reducing tracking errors.
[0057] Example 4:
[0058] like Figure 5 As shown, this embodiment provides a chip peripheral packaging structure for improving tracking errors in optical communication systems, wherein:
[0059] In one possible implementation, the components in the optical communication system tracking error improvement scheme include a laser chip, a thermoelectric cooler (TEC), a heating resistor, and two diodes.
[0060] The laser chip is disposed on the semiconductor cooler TEC via the chip packaging layout unit, and the semiconductor cooler TEC, the heating resistor and the two diodes are electrically connected via the component connection circuit unit.
[0061] In one possible implementation, the semiconductor cooler TEC includes a first working surface and a second working surface;
[0062] The laser chip is disposed on the first working surface, and the heating resistor and two diodes are disposed on the second working surface.
[0063] In one possible implementation, one end of the heating resistor is electrically connected to one end of the laser chip and connected to a forward current input, the other end of the heating resistor is electrically connected to the cut-off end of one of the diodes, the conducting end of the diode is electrically connected to the positive terminal of the thermoelectric cooler TEC, and the negative terminal of the thermoelectric cooler TEC is electrically connected to the other end of the laser chip and connected to a reverse current input.
[0064] In one possible implementation, the positive terminal of the thermoelectric cooler TEC is also electrically connected to the cutoff terminal of another diode, the on terminal of which is electrically connected to one end of the laser chip and connected to a forward current input.
[0065] Specifically, such as Figure 5 As shown, when a forward current is input, the diode connected to the positive terminal of the thermoelectric cooler (TEC) at its cutoff end conducts, allowing the TEC to operate in the forward direction and cool the laser chip. At this time, the heating resistor does not operate because the other diode is cut off, thus not affecting the cooling efficiency. When a reverse current is input, the reverse current flows through the TEC and directly into the conducting terminal of one of the diodes, ensuring the heating resistor operates. The TEC also operates in the reverse direction, and the TEC and the heating resistor together heat the laser chip. This ensures that even in low-temperature environments, the peripheral packaging structure of the laser chip remains at a high temperature, narrowing the operating temperature range of the peripheral packaging structure to a high-temperature to room-temperature range, thereby reducing tracking errors.
[0066] Finally, it should be noted that the above description is merely a preferred embodiment of this utility model and is not intended to limit the scope of protection of this utility model. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this utility model should be included within the scope of protection of this utility model.
Claims
1. A chip peripheral packaging structure for improving tracking errors in optical communication systems, characterized in that, include: Chip packaging layout unit and component connection circuit unit; The chip packaging layout unit is used to lay out and package the various components in the optical communication system tracking error improvement scheme, and the component connection circuit unit is used to electrically connect the various components in the optical communication system tracking error improvement scheme. The components in the optical communication system tracking error improvement scheme include a laser chip, a semiconductor cooler (TEC), a heating resistor, and a diode. The laser chip is disposed on the thermoelectric cooler TEC via the chip packaging layout unit, and the thermoelectric cooler TEC, the heating resistor and the diode are electrically connected via the component connection circuit unit. The positive terminal of the thermoelectric cooler TEC is electrically connected to one end of the laser chip and connected to a positive current input, while the negative terminal of the thermoelectric cooler TEC is electrically connected to the other end of the laser chip and connected to a reverse current input. The positive terminal of the thermoelectric cooler TEC is also electrically connected to the cut-off terminal of the diode, the conducting terminal of the diode is electrically connected to one end of the heating resistor, and the other end of the heating resistor is electrically connected to the negative terminal of the thermoelectric cooler TEC.
2. The chip peripheral packaging structure for improving tracking errors in optical communication systems according to claim 1, characterized in that, The semiconductor cooler TEC includes a first working surface and a second working surface; The laser chip is disposed on the first working surface, and the heating resistor and diode are disposed on the second working surface.
3. The chip peripheral packaging structure for improving tracking errors in optical communication systems according to claim 1, characterized in that, The heating resistor is a 4-ohm resistor.